Commit Graph

244 Commits

Author SHA1 Message Date
Linus Torvalds
907bb57aa7 Pin control bulk changes for the v5.19 series:
Core changes:
 
 - New helpers from Andy such as for_each_gpiochip_node() affecting both
   GPIO and pin control, improving a bunch of drivers in the process.
 
 - Pulled in Marc Zyngiers work to make IRQ chips immutable, and started
   to apply fixups on top.
 
 New drivers:
 
 - New driver for Marvell MVEBU 98DX2530.
 
 - New driver for Mediatek MT8195.
 
 - Support Qualcomm PMX65 and PM6125.
 
 - New driver for Qualcomm SC7280 LPASS pin control.
 
 - New driver for Rockchip RK3588.
 
 - New driver for NXP Freescale i.MXRT1170.
 
 - New driver for Mediatek MT6795 Helio X10.
 
 Improvements:
 
 - Several Aspeed G6 cleanups and non-critical fixes.
 
 - Thorought refactoring of some of the ever improving Renesas drivers.
 
 - Clean up Mediatek MT8192 bindings a bit.
 
 - PWM output and clock monitoring in the Ocelot LAN966x driver.
 
 - Thorough refactoring and cleanup of the Ralink drivers such as
   RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper
   sub-drivers.
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Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Pretty big this time. Mostly due to (nice) Renesas refactorings.

  Core changes:

   - New helpers from Andy such as for_each_gpiochip_node() affecting
     both GPIO and pin control, improving a bunch of drivers in the
     process.

   - Pulled in Marc Zyngiers work to make IRQ chips immutable, and
     started to apply fixups on top.

  New drivers:

   - New driver for Marvell MVEBU 98DX2530.

   - New driver for Mediatek MT8195.

   - Support Qualcomm PMX65 and PM6125.

   - New driver for Qualcomm SC7280 LPASS pin control.

   - New driver for Rockchip RK3588.

   - New driver for NXP Freescale i.MXRT1170.

   - New driver for Mediatek MT6795 Helio X10.

  Improvements:

   - Several Aspeed G6 cleanups and non-critical fixes.

   - Thorought refactoring of some of the ever improving Renesas
     drivers.

   - Clean up Mediatek MT8192 bindings a bit.

   - PWM output and clock monitoring in the Ocelot LAN966x driver.

   - Thorough refactoring and cleanup of the Ralink drivers such as
     RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
     proper sub-drivers"

* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
  pinctrl: apple: Use a raw spinlock for the regmap
  pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
  pinctrl: intel: Fix kernel doc format, i.e. add return sections
  dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
  pinctrl: starfive: Make the irqchip immutable
  pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
  dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
  pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
  dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
  dt-bindings: pinctrl: rockchip: increase max amount of device functions
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
  dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
  dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
  dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
  pinctrl: qcom: spmi-gpio: Add pm6125 compatible
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
  pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
  pinctrl: intel: make irq_chip immutable
  pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
  ...
2022-05-28 11:15:54 -07:00
AngeloGioacchino Del Regno
2e1ccc6a75 pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
Add support for the MediaTek Helio X10 (MT6795) SoC's GPIO/pinmux
controller.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220517083957.11816-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-19 15:11:15 +02:00
Linus Walleij
f930b69a89 Linux 5.18-rc5
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Merge tag 'v5.18-rc5' into devel

Merge in Linux 5.18-rc5 since new code to the STM32 driver
depend in a non-trivial way on the fixes merged in -rc5.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-01 23:25:10 +02:00
Mattijs Korpershoek
f680058f40 pinctrl: mediatek: mt8365: fix IES control pins
IES26 (BIT 16 of IES1_CFG_ADDR) controls the following pads:

- PAD_I2S_DATA_IN (GPIO114)
- PAD_I2S_LRCK (GPIO115)
- PAD_I2S_BCK (GPIO116)

The pinctrl table is wrong since it lists pins 114 to 112.

Update the table with the correct values.

Fixes: e94d8b6fb8 ("pinctrl: mediatek: add support for mt8365 SoC")
Reported-by: Youngmin Han <Youngmin.Han@geappliances.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20220426125714.298907-1-mkorpershoek@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-01 23:24:18 +02:00
Fabien Parent
931d7fa89e pinctrl: mediatek: mt8195: enable driver on mtk platforms
Set the pinctrl driver as built-in by default if
ARM64 and ARCH_MEDIATEK are enabled.

Fixes: 6cf5e9ef36 ("pinctrl: add pinctrl driver on mt8195")
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220327160813.2978637-1-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-22 22:56:46 +02:00
YueHaibing
87950929e2 pinctrl: mediatek: moore: Fix build error
If EINT_MTK is m and PINCTRL_MTK_V2 is y, build fails:

drivers/pinctrl/mediatek/pinctrl-moore.o: In function `mtk_gpio_set_config':
pinctrl-moore.c:(.text+0xa6c): undefined reference to `mtk_eint_set_debounce'
drivers/pinctrl/mediatek/pinctrl-moore.o: In function `mtk_gpio_to_irq':
pinctrl-moore.c:(.text+0xacc): undefined reference to `mtk_eint_find_irq'

Select EINT_MTK for PINCTRL_MTK_V2 to fix this.

Fixes: 8174a8512e ("pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20220409105958.37412-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-21 00:49:47 +02:00
kernel test robot
4a6d01495a pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
drivers/pinctrl/mediatek/pinctrl-mtk-common.c:171:2-3: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: 156f721704 ("pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback")
CC: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220322130308.GA21877@65fc916127a5
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-27 14:00:42 +02:00
Linus Walleij
042a6362ce pinctrl: mediatek: mt8186: Account for probe refactoring
The new MT8186 drive came in and the probe calls were
refactored at the same time. Fix it up. Fixes a build issue.

Cc: Guodong Liu <guodong.liu@mediatek.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-24 20:10:31 +01:00
AngeloGioacchino Del Regno
156f721704 pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
All of the MediaTek pinctrl drivers registering with pinctrl-mtk-common
that are offering a .spec_ies_smt_set() callback are declaring their
own function which is doing exactly the same on all drivers: calling
mtk_pconf_spec_set_ies_smt_range() with their struct and a simple check.

Commonize this callback by adding the ies and smt structure pointers
to struct mtk_pinctrl_devdata and changing the callback signature to
take it.

Removing the callback and checking for the existance of the spec_smt
and/or spec_ies data would allow us to staticize the function
mtk_pconf_spec_set_ies_smt_range(), but this solution was avoided as
to keep flexibility, as some SoCs may need to perform a very different
operation compared to what this commonized function is doing.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-17 02:06:53 +01:00
AngeloGioacchino Del Regno
c19763c3de pinctrl: mediatek: common-v1: Commonize spec_pupd callback
Reduce code size and duplication by using a common spec_pupd callback,
which is possible to use on all of the pinctrl drivers that are
using the v1 pinctrl-mtk-common code, with the exception of mt8135,
which has a different handling compared to the others.
Since the callback function signature was changed, this had to be
propagated to pinctrl-mt8135's spec_pull_set().

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-5-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-17 02:06:53 +01:00
AngeloGioacchino Del Regno
c8c206cdc1 pinctrl: mediatek: common-v1: Use common probe function
Most of the mediatek pinctrl drivers are calling mtk_pctrl_init() and
passing only a pointer to struct mtk_pinctrl_devdata, as the regmap
handle it passed from device-tree, with the exception of mt6397.

For all of the drivers that don't require passing a struct regmap
pointer from a parent device, simplify the probe mechanism by assigning
the required structure as match data and use mtk_pctrl_common_probe()
as their probe function.

While at it, also collapse the of_device_id entries to a single line,
as they all fit in max 83 columns, which is acceptable.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-17 02:06:53 +01:00
AngeloGioacchino Del Regno
e091feda1e pinctrl: mediatek: common-v1: Add common probe function
As a preparation to cleanup the probe mechanism of mediatek pinctrl
drivers that are using the v1 controller, add a common probe function
to this driver.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-17 02:06:52 +01:00
AngeloGioacchino Del Regno
78df7bba4a pinctrl: mediatek: paris: Unify probe function by using OF match data
All of the SoCs using Paris pinctrl are defining a custom probe
function that is simply calling mtk_paris_pinctrl_probe() passing
a pointer to the SoC specific mtk_pin_soc structure and nothing else.

Simplify the probe mechanism across all pinctrl drivers that are
using pinctrl-paris by passing the specific mtk_pin_soc as match
data and using function mtk_paris_pinctrl_probe as a common probe
function for all of them.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-17 02:06:52 +01:00
AngeloGioacchino Del Regno
0dd1628aae pinctrl: mediatek: pinctrl-mtk-common: Simplify with dev_err_probe()
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220308100956.2750295-12-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:16 +01:00
AngeloGioacchino Del Regno
dc75d1ed7f pinctrl: mediatek: pinctrl-paris: Simplify with dev_err_probe()
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220308100956.2750295-11-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:16 +01:00
AngeloGioacchino Del Regno
9c59fda330 pinctrl: mediatek: pinctrl-moore: Simplify with dev_err_probe()
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220308100956.2750295-10-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:16 +01:00
Chen-Yu Tsai
e5fabbe43f pinctrl: mediatek: paris: Support generic PIN_CONFIG_DRIVE_STRENGTH_UA
Some of the MediaTek chips that utilize the Paris pinctrl driver library
support a lower drive strength (<= 1mA) than the standard drive strength
settings (2~16 mA) on certain pins. This was previously supported by the
custom MTK_PIN_CONFIG_DRV_ADV parameter along with the
"mediatek,drive-strength-adv" device tree property.

The drive strength values for this hardware are 125, 250, 500, and 1000 mA,
and can be readily described by the existing "drive-strength-microamp"
property, which then gets parsed by the generic pinconf library into the
parameter PIN_CONFIG_DRIVE_STRENGTH_UA.

Add support for PIN_CONFIG_DRIVE_STRENGTH_UA while keeping the old
custom parameter around for backward compatibility.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-9-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:16 +01:00
Chen-Yu Tsai
9b780fa1ff pinctrl: mediatek: paris: Rework mtk_pinconf_{get,set} switch/case logic
The current code deals with optional features by testing for the
function pointers and returning -ENOTSUPP if it is not valid. This is
done for multiple pin config settings and results in the code that
handles the supporting cases to get indented by one level. This is
aggrevated by the fact that some features require another level of
conditionals.

Instead of assigning the same error code in all unsupported optional
feature cases, simply have that error code as the default, and break
out of the switch/case block whenever a feature is unsupported, or an
error is returned. This reduces indentation by one level for the useful
code.

Also replace the goto statements with break statements. The result is
the same, as the gotos simply exit the switch/case block, which can
also be achieved with a break statement. With the latter the intent
is clear and easier to understand.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-8-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:16 +01:00
Chen-Yu Tsai
1763933d37 pinctrl: mediatek: paris: Skip custom extra pin config dump for virtual GPIOs
Virtual GPIOs do not have any hardware state associated with them. Any
attempt to read back hardware state for these pins result in error
codes.

Skip dumping extra pin config information for these virtual GPIOs.

Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-7-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:15 +01:00
Chen-Yu Tsai
fcde2a3fc8 pinctrl: mediatek: paris: Drop extra newline in mtk_pctrl_show_one_pin()
The caller of mtk_pctrl_show_one_pin() is responsible for printing the
full line. mtk_pctrl_show_one_pin(), called through mtk_pctrl_dbg_show(),
should only produce a string containing the extra information the driver
wants included.

Drop the extra newlines. Also unbreak the line that is only slightly
over 80 characters to make it easier on the eye, and get rid of the
braces now that each block in the conditionals is just one line.

Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-6-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:15 +01:00
Chen-Yu Tsai
54fe55fb38 pinctrl: mediatek: paris: Fix pingroup pin config state readback
mtk_pconf_group_get(), used to read back pingroup pin config state,
simply returns a set of configs saved from a previous invocation of
mtk_pconf_group_set(). This is an unfiltered, unvalidated set passed
in from the pinconf core, which does not match the current hardware
state.

Since the driver library is designed to have one pin per group, pass
through mtk_pconf_group_get() to mtk_pinconf_get(), to read back the
current pin config state of the only pin in the group.

Also drop the assignment of pin config state to the group.

Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-5-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:15 +01:00
Chen-Yu Tsai
19bce7ce0a pinctrl: mediatek: paris: Fix "argument" argument type for mtk_pinconf_get()
For mtk_pinconf_get(), the "argument" argument is typically returned by
pinconf_to_config_argument(), which holds the value for a given pinconf
parameter. It certainly should not have the type of "enum pin_config_param",
which describes the type of the pinconf parameter itself.

Change the type to u32, which matches the return type of
pinconf_to_config_argument().

Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-4-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:15 +01:00
Chen-Yu Tsai
3e8c6bc608 pinctrl: mediatek: paris: Fix PIN_CONFIG_BIAS_* readback
When reading back pin bias settings, if the pin is not in the
corresponding bias state, the function should return -EINVAL.

Fix this in the mediatek-paris pinctrl library so that the read back
state is not littered with bogus a "input bias disabled" combined with
"pull up" or "pull down" states.

Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-3-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:24:15 +01:00
Miaoqian Lin
dab4df9ca9 pinctrl: mediatek: Fix missing of_node_put() in mtk_pctrl_init
The device_node pointer is returned by of_parse_phandle()  with refcount
incremented. We should use of_node_put() on it when done.

Fixes: a6df410d42 ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308071155.21114-1-linmq006@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:21:27 +01:00
Guodong Liu
7966c5051f pinctrl: canonical rsel resistance selection property
Change "mediatek,rsel_resistance_in_si_unit" to "mediatek,rsel-resistance-in-si-unit"

Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Link: https://lore.kernel.org/r/20220216032124.28067-4-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:00:03 +01:00
Guodong Liu
8b483bda1e pinctrl: add pinctrl driver on mt8186
This commit includes pinctrl driver for mt8186.

Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Link: https://lore.kernel.org/r/20220216032124.28067-3-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15 01:00:03 +01:00
Linus Torvalds
e3084ed48f Pin control bulk changes for the v5.17 kernel cycle
Core changes:
 
 - New standard enumerator and corresponding device tree bindings
   for output impedance pin configuration. (Implemented and used
   in the Renesas rzg2l driver.)
 
 - Cleanup of Kconfig and Makefile to be somewhat orderly and
   alphabetic.
 
 New drivers:
 
 - Samsung Exynos 7885 pin controller.
 
 - Ocelot LAN966x pin controller.
 
 - Qualcomm SDX65 pin controller.
 
 - Qualcomm SM8450 pin controller.
 
 - Qualcomm PM8019, PM8226 and PM2250 pin controllers.
 
 - NXP/Freescale i.MXRT1050 pin controller.
 
 - Intel Thunder Bay pin controller.
 
 Enhancements:
 
 - Introduction of the string library helper function
   "kasprintf_strarray()" and subsequent use in Rockchip, ST and
   Armada pin control drivers, as well as the GPIO mockup driver.
 
 - The Ocelot pin controller has been extensively rewritten to
   use regmap and other modern kernel infrastructure.
 
 - The Microchip SGPIO driver has been converted to use regmap.
 
 - The SPEAr driver had been converted to use regmap.
 
 - Substantial cleanups and janitorial on the Apple pin control
   driver that was merged for v5.16.
 
 - Janitorial to remove of_node assignments in the GPIO portions
   that anyway get this handled in the GPIO core.
 
 - Minor cleanups and improvements in several pin controllers.
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Merge tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control bulk updates from Linus Walleij:
 "Core changes:

   - New standard enumerator and corresponding device tree bindings for
     output impedance pin configuration. (Implemented and used in the
     Renesas rzg2l driver.)

   - Cleanup of Kconfig and Makefile to be somewhat orderly and
     alphabetic.

  New drivers:

   - Samsung Exynos 7885 pin controller.

   - Ocelot LAN966x pin controller.

   - Qualcomm SDX65 pin controller.

   - Qualcomm SM8450 pin controller.

   - Qualcomm PM8019, PM8226 and PM2250 pin controllers.

   - NXP/Freescale i.MXRT1050 pin controller.

   - Intel Thunder Bay pin controller.

  Enhancements:

   - Introduction of the string library helper function
     "kasprintf_strarray()" and subsequent use in Rockchip, ST and
     Armada pin control drivers, as well as the GPIO mockup driver.

   - The Ocelot pin controller has been extensively rewritten to use
     regmap and other modern kernel infrastructure.

   - The Microchip SGPIO driver has been converted to use regmap.

   - The SPEAr driver had been converted to use regmap.

   - Substantial cleanups and janitorial on the Apple pin control driver
     that was merged for v5.16.

   - Janitorial to remove of_node assignments in the GPIO portions that
     anyway get this handled in the GPIO core.

   - Minor cleanups and improvements in several pin controllers"

* tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (98 commits)
  pinctrl: imx: fix assigning groups names
  dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations
  pinctrl: bcm: ns: use generic groups & functions helpers
  pinctrl: imx: fix allocation result check
  pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt
  pinctrl: Propagate firmware node from a parent device
  dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings
  pinctrl: add one more "const" for generic function groups
  pinctrl: keembay: rework loops looking for groups names
  pinctrl: keembay: comment process of building functions a bit
  pinctrl: imx: prepare for making "group_names" in "function_desc" const
  ARM: dts: gpio-ranges property is now required
  pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEED
  pinctrl: Get rid of duplicate of_node assignment in the drivers
  pinctrl-sunxi: don't call pinctrl_gpio_direction()
  pinctrl-bcm2835: don't call pinctrl_gpio_direction()
  pinctrl: bcm2835: Silence uninit warning
  pinctrl: Sort Kconfig and Makefile entries alphabetically
  pinctrl: Add Intel Thunder Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver
  ...
2022-01-12 10:56:08 -08:00
Andy Shevchenko
8a8d6bbe1d pinctrl: Get rid of duplicate of_node assignment in the drivers
GPIO library does copy the of_node from the parent device of
the GPIO chip, there is no need to repeat this in the individual
drivers. Remove these assignment all at once.

For the details one may look into the of_gpio_dev_init() implementation.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20211214125855.33207-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-16 04:18:30 +01:00
Dan Carpenter
9f9d17c228 pinctrl: mediatek: add a check for error in mtk_pinconf_bias_get_rsel()
All the other mtk_hw_get_value() calls have a check for "if (err)" so
we can add one here as well.  This silences a Smatch warning:

    drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:819 mtk_pinconf_bias_get_rsel()
    error: uninitialized symbol 'pd'.

Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20211127140836.GB24002@kili
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-02 02:33:33 +01:00
Dan Carpenter
67bbbcb49b pinctrl: mediatek: uninitialized variable in mtk_pctrl_show_one_pin()
The "try_all_type" variable is not set if (hw->soc->pull_type) is false
leading to the following Smatch warning:

    drivers/pinctrl/mediatek/pinctrl-paris.c:599 mtk_pctrl_show_one_pin()
    error: uninitialized symbol 'try_all_type'.

Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20211127140750.GA24002@kili
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-02 02:32:36 +01:00
Guodong Liu
2d5446da5a pinctrl: mediatek: fix global-out-of-bounds issue
When eint virtual eint number is greater than gpio number,
it maybe produce 'desc[eint_n]' size globle-out-of-bounds issue.

Signed-off-by: Guodong Liu <guodong.liu@mediatek.corp-partner.google.com>
Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20211110071900.4490-2-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-24 09:38:44 +01:00
Sam Shih
360de67280 pinctrl: mediatek: add support for MT7986 SoC
This commit includes pinctrl driver for Mediatek MT7986

The difference of pinctrl between mt7986a and mt7986b
is that pin-41 to pin-65 do not exist on mt7986b

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Link: https://lore.kernel.org/r/20211022124036.5291-3-sam.shih@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-24 23:06:32 +02:00
Zhiyong Tao
387292c357 pinctrl: mediatek: add rsel setting on MT8195
I2C pins's resistance value can be controlled by rsel register.
This patch provides rsel (resistance selection) setting on MT8195

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210924080632.28410-6-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-03 00:43:36 +02:00
Zhiyong Tao
fb34a9ae38 pinctrl: mediatek: support rsel feature
This patch supports rsel(resistance selection) feature for I2C pins.
It provides more resistance selection solution in different ICs.
It provides rsel define and si unit solution by identifying
"mediatek,rsel_resistance_in_si_unit" property in pio dtsi node.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210924080632.28410-5-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-03 00:43:36 +02:00
Zhiyong Tao
25a74c0f4b pinctrl: mediatek: fix coding style
Fix Camel spelling coding style to avoid checkpatch
warning in a following patch.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210924080632.28410-4-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-03 00:43:36 +02:00
Zhiyong Tao
d9608eab1e pinctrl: mediatek: mt8195: Add pm_ops
Setting this up will configure wake from suspend properly,
and wake only for the interrupts that are setup in wake_mask,
not all interrupts.

Fixes: 6cf5e9ef36 ("pinctrl: add pinctrl driver on mt8195")
Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210911071046.17349-2-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-17 00:32:24 +02:00
Sam Shih
d8b94c9ff9 pinctrl: mediatek: moore: check if pin_desc is valid before use
Certain SoC are missing the middle part gpios in consecutive pins,
it's better to check if mtk_pin_desc is a valid pin for the extensibility

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Link: https://lore.kernel.org/r/20210914085137.31761-5-sam.shih@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-16 12:06:28 +02:00
Linus Torvalds
c793011242 This is the bulk of pin control changes for the v5.15 kernel cycle,
no core changes at all this time, just driver work!
 
 New drivers:
 
 - New subdriver for Intel Keem Bay (an ARM-based SoC)
 
 - New subdriver for Qualcomm MDM9607 and SM6115
 
 - New subdriver for ST Microelectronics STM32MP135
 
 - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
 
 - New subdriver for Ingenic X2100
 
 - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
 
 - Support Samsung Exynos850
 
 - Support Renesas RZ/G2L
 
 Enhancements:
 
 - A major refactoring of the Rockchip driver, breaking part of it out
   to a separate GPIO driver in drivers/gpio
 
 - Pin bias support on Renesas r8a77995
 
 - Add SCI pins support to Ingenic JZ4755 and JZ4760
 
 - Mediatek device tree bindings converted to YAML
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Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.15 kernel cycle, no
  core changes at all this time, just driver work!

  New drivers:

   - New subdriver for Intel Keem Bay (an ARM-based SoC)

   - New subdriver for Qualcomm MDM9607 and SM6115

   - New subdriver for ST Microelectronics STM32MP135

   - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")

   - New subdriver for Ingenic X2100

   - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO

   - Support Samsung Exynos850

   - Support Renesas RZ/G2L

  Enhancements:

   - A major refactoring of the Rockchip driver, breaking part of it out
     to a separate GPIO driver in drivers/gpio

   - Pin bias support on Renesas r8a77995

   - Add SCI pins support to Ingenic JZ4755 and JZ4760

   - Mediatek device tree bindings converted to YAML"

* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  pinctrl: samsung: Add Exynos850 SoC specific data
  dt-bindings: pinctrl: samsung: Add Exynos850 doc
  MAINTAINERS: Add maintainers for amd-pinctrl driver
  pinctrl: Add Intel Keem Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
  pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
  dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
  dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
  dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
  dt-bindings: mediatek: convert pinctrl to yaml
  arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
  arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
  pinctrl: ingenic: Add .max_register in regmap_config
  pinctrl: ingenic: Fix bias config for X2000(E)
  pinctrl: ingenic: Fix incorrect pull up/down info
  pinctrl: Ingenic: Add pinctrl driver for X2100.
  dt-bindings: pinctrl: Add bindings for Ingenic X2100.
  pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
  pinctrl: Ingenic: Improve the code.
  ...
2021-09-02 14:22:56 -07:00
Linus Torvalds
7d6e3fa87e Updates to the interrupt core and driver subsystems:
Core changes:
 
    - The usual set of small fixes and improvements all over the place, but nothing
      outstanding
 
 MSI changes:
 
    - Further consolidation of the PCI/MSI interrupt chip code
 
    - Make MSI sysfs code independent of PCI/MSI and expose the MSI interrupts
      of platform devices in the same way as PCI exposes them.
 
 Driver changes:
 
    - Support for ARM GICv3 EPPI partitions
 
    - Treewide conversion to generic_handle_domain_irq() for all chained
      interrupt controllers
 
    - Conversion to bitmap_zalloc() throughout the irq chip drivers
 
    - The usual set of small fixes and improvements
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Merge tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq updates from Thomas Gleixner:
 "Updates to the interrupt core and driver subsystems:

  Core changes:

   - The usual set of small fixes and improvements all over the place,
     but nothing stands out

  MSI changes:

   - Further consolidation of the PCI/MSI interrupt chip code

   - Make MSI sysfs code independent of PCI/MSI and expose the MSI
     interrupts of platform devices in the same way as PCI exposes them.

  Driver changes:

   - Support for ARM GICv3 EPPI partitions

   - Treewide conversion to generic_handle_domain_irq() for all chained
     interrupt controllers

   - Conversion to bitmap_zalloc() throughout the irq chip drivers

   - The usual set of small fixes and improvements"

* tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (57 commits)
  platform-msi: Add ABI to show msi_irqs of platform devices
  genirq/msi: Move MSI sysfs handling from PCI to MSI core
  genirq/cpuhotplug: Demote debug printk to KERN_DEBUG
  irqchip/qcom-pdc: Trim unused levels of the interrupt hierarchy
  irqdomain: Export irq_domain_disconnect_hierarchy()
  irqchip/gic-v3: Fix priority comparison when non-secure priorities are used
  irqchip/apple-aic: Fix irq_disable from within irq handlers
  pinctrl/rockchip: drop the gpio related codes
  gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type
  gpio/rockchip: support next version gpio controller
  gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
  gpio/rockchip: add driver for rockchip gpio
  dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank
  pinctrl/rockchip: add pinctrl device to gpio bank struct
  pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
  pinctrl/rockchip: always enable clock for gpio controller
  genirq: Fix kernel doc indentation
  EDAC/altera: Convert to generic_handle_domain_irq()
  powerpc: Bulk conversion to generic_handle_domain_irq()
  nios2: Bulk conversion to generic_handle_domain_irq()
  ...
2021-08-30 14:38:37 -07:00
Marc Zyngier
a9cb09b7be pinctrl: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-08-12 11:39:39 +01:00
kernel test robot
1ac1f6459d pinctrl: mediatek: fix platform_no_drv_owner.cocci warnings
drivers/pinctrl/mediatek/pinctrl-mt8365.c:488:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Fixes: e94d8b6fb8 ("pinctrl: mediatek: add support for mt8365 SoC")
CC: Fabien Parent <fparent@baylibre.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20210626051550.GA37544@d0c207d51ce8
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23 18:11:30 +02:00
Hsin-Yi Wang
798a315fc3 pinctrl: mediatek: Fix fallback behavior for bias_set_combo
Some pin doesn't support PUPD register, if it fails and fallbacks with
bias_set_combo case, it will call mtk_pinconf_bias_set_pupd_r1_r0() to
modify the PUPD pin again.

Since the general bias set are either PU/PD or PULLSEL/PULLEN, try
bias_set or bias_set_rev1 for the other fallback case. If the pin
doesn't support neither PU/PD nor PULLSEL/PULLEN, it will return
-ENOTSUPP.

Fixes: 81bd1579b4 ("pinctrl: mediatek: Fix fallback call path")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Link: https://lore.kernel.org/r/20210701080955.2660294-1-hsinyi@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23 17:41:56 +02:00
Matthias Brugger
21c423a651 pinctrl: mediatek: fix mode encoding
Pin modes are encoded in the SoC data structure. Use that value to set
IES SMT.

Cc: Fabien Parent <fparent@baylibre.com>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: linux-mediatek@lists.infradead.org
Fixes: 696beef775 ("pinctrl: mediatek: move bit assignment")
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Link: https://lore.kernel.org/r/20210608150656.29007-1-matthias.bgg@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-09 15:30:45 +02:00
Linus Walleij
375eede3e3 pinctrl: mtk: Fix mt8365 Kconfig dependency
This SoC needs to select PINCTRL_MTK or we can end up in
kernel compiles that miss some symbols.

Cc: Fabien Parent <fparent@baylibre.com>
Reported-by: kernel test robot <lkp@intel.com>
Fixes: e94d8b6fb8 ("pinctrl: mediatek: add support for mt8365 SoC")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-07 08:56:20 +02:00
Linus Walleij
696beef775 pinctrl: mediatek: move bit assignment
The bit needs offset to be defined which happens some lines
below. Looks like a bug. The kernel test robot complains:

drivers/pinctrl/mediatek/pinctrl-mtk-common.c:137:12:
warning: variable 'offset' is uninitialized when used here [-Wuninitialized]
           bit = BIT(offset & pctl->devdata->mode_mask);
                     ^~~~~~

Fix it up by reverting to what was done before.

Cc: Fabien Parent <fparent@baylibre.com>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: linux-mediatek@lists.infradead.org
Fixes: 9f940d8ecf ("pinctrl: mediatek: don't hardcode mode encoding in common code")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28 11:19:10 +02:00
Fabien Parent
e94d8b6fb8 pinctrl: mediatek: add support for mt8365 SoC
Add pinctrl driver for MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210519162409.3755679-3-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-27 16:50:15 +02:00
Fabien Parent
9f940d8ecf pinctrl: mediatek: don't hardcode mode encoding in common code
MT8365 encode the pins mode differently than other
MTK pinctrl drivers that use the PINCTRL_MTK common code.

Add 3 new fields in mtk_pinctrl_devdata in order to store how
pin modes are encoded into the register. At the
same time update all the pinctrl driver that depends on
CONFIG_PINCTRL_MTK.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210519162409.3755679-2-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-27 16:50:15 +02:00
Tzung-Bi Shih
56ab29ec6f pinctrl: mediatek: use spin lock in mtk_rmw
Commit 42a46434e9 ("pinctrl: add lock in mtk_rmw function.") uses
mutex lock in mtk_rmw.  However the function is possible called from
atomic context.

For example call trace:
  mutex_lock+0x28/0x64
  mtk_rmw+0x38/0x80
  [snip]
  max98357a_daiops_trigger+0x8c/0x9c
  soc_pcm_trigger+0x5c/0x10c

The max98357a_daiops_trigger() could run in either atomic or non-atomic
context.  As a result, dmesg shows some similar messages: "BUG: sleeping
function called from invalid context at kernel/locking/mutex.c:254".

Uses spin lock in mtk_rmw instead.

Fixes: 42a46434e9 ("pinctrl: add lock in mtk_rmw function.")
Signed-off-by: Tzung-Bi Shih <tzungbi@google.com>
Link: https://lore.kernel.org/r/20210419093449.3125704-1-tzungbi@google.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22 01:53:29 +02:00
Zhiyong Tao
ea9d2ed465 pinctrl: add drive for I2C related pins on MT8195
This patch provides the advanced drive raw data setting version
for I2C used pins on MT8195.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Link: https://lore.kernel.org/r/20210413055702.27535-4-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22 01:53:02 +02:00
Zhiyong Tao
6cf5e9ef36 pinctrl: add pinctrl driver on mt8195
This commit includes pinctrl driver for mt8195.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Link: https://lore.kernel.org/r/20210413055702.27535-3-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22 01:53:02 +02:00