PXA27x and later processors support overlay1 and overlay2 on-top of the
base framebuffer (although under-neath the base is also possible). They
support palette and no-palette RGB formats, as well as YUV formats (only
available on overlay2). These overlays have dedicated DMA channels and
behave in a similar way as a framebuffer.
This heavily simplified and re-structured work is based on the original
pxafb_overlay.c (which is pending for mainline merge for a long time).
The major problems with this pxafb_overlay.c are (if you are interested
in the history):
1. heavily redundant (the control logics for overlay1 and overlay2 are
actually identical except for some small operations, which are now
abstracted into a 'pxafb_layer_ops' structure)
2. a lot of useless and un-tested code (two workarounds which are now
fixed on mature silicons)
3. cursorfb is actually useless, hardware cursor should not be used
this way, and the code was actually un-tested for a long time.
The code in this patch should be self-explanatory, I tried to add minimum
comments. As said, this is basically simplified, there are several things
still on the pending list:
1. palette mode is un-supported and un-tested (although re-using the
palette code of the base framebuffer is actually very easy now with
previous clean-up patches)
2. fb_pan_display for overlay(s) is un-supported
3. the base framebuffer can actually be abstracted by 'pxafb_layer' as
well, which will help further re-use of the code and keep a better
and consistent structure. (This is the reason I named it 'pxafb_layer'
instead of 'pxafb_overlay' or something alike)
See Documentation/fb/pxafb.txt for additional usage information.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Rodolfo Giometti <giometti@linux.it>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
1. introduce var_to_depth() to calculate the color depth including the
transparency bit
2. the conversion from 'fb_var_screeninfo' to LCCR3 BPP bits can be re-
used by overlays (in OVLxC1), thus an individual pxafb_var_to_bpp()
has been separated out.
3. pxafb_setmode() should really set the color bitfields correctly at
begining, introduce a pxafb_set_pixfmt() for this
4. allow user apps to specify color formats within fb_var_screeninfo,
and checking of this in pxafb_check_var() has been simplified as
below:
a) pxafb_var_to_bpp() should pass - which means a basically correct
bits_per_pixel and color depth setting
b) the RGBT bitfields are then forced into supported values by
pxafb_set_pixfmt()
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
Add the palette format support for LCCR4_PAL_FOR_3, and fix the
issue of LCCR4 being never assigned.
Also remove the useless pxafb_set_truecolor().
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
dma branching is enabled by extending the current setup_frame_dma()
function to allow a 2nd set of frame/palette dma descriptors to be
used.
As a result, pxafb_dma_buff.dma_desc[], pxafb_dma_buff.pal_desc[]
and pxafb_info.fdadr[] are doubled.
This allows maximum re-use of the current dma setup code, although
the pxafb_info.fdadr[xx] for FBRx register values looks a bit odd.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
The amount of video memory size is decided according to the following
order:
1. <xres> x <yres> x <bits_per_pixel> by default, which is the backward
compatible way
2. size specified in platform data
3. size specified in module parameter 'options' string or specified in
kernel boot command line (see updated Documentation/fb/pxafb.txt)
And now since the memory is allocated from system memory, the pxafb_mmap
can be removed and the default fb_mmap() should be working all right.
Also, since we now have introduced the 'struct pxafb_dma_buff' for DMA
descriptors and palettes, the allocation can be separated cleanly.
NOTE: the LCD DMA actually supports chained transfer (i.e. page-based
transfers), to simplify the logic and keep the performance (with less
TLB misses when accessing from memory mapped user space), the memory
is allocated by alloc_pages_*() to ensures it's physical contiguous.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
As Nicolas and Russell pointed out, CLOCK_TICK_RATE is no more
a constant on PXA when multiple processors and platforms are
selected, change TIMER_FREQ in rtc-sa1100.c into a variable.
Since the code to decide the clock tick rate is re-used from
timer.c, introduce a common get_clock_tick_rate() for this.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1429 commits)
net: Allow dependancies of FDDI & Tokenring to be modular.
igb: Fix build warning when DCA is disabled.
net: Fix warning fallout from recent NAPI interface changes.
gro: Fix potential use after free
sfc: If AN is enabled, always read speed/duplex from the AN advertising bits
sfc: When disabling the NIC, close the device rather than unregistering it
sfc: SFT9001: Add cable diagnostics
sfc: Add support for multiple PHY self-tests
sfc: Merge top-level functions for self-tests
sfc: Clean up PHY mode management in loopback self-test
sfc: Fix unreliable link detection in some loopback modes
sfc: Generate unique names for per-NIC workqueues
802.3ad: use standard ethhdr instead of ad_header
802.3ad: generalize out mac address initializer
802.3ad: initialize ports LACPDU from const initializer
802.3ad: remove typedef around ad_system
802.3ad: turn ports is_individual into a bool
802.3ad: turn ports is_enabled into a bool
802.3ad: make ntt bool
ixgbe: Fix set_ringparam in ixgbe to use the same memory pools.
...
Fixed trivial IPv4/6 address printing conflicts in fs/cifs/connect.c due
to the conversion to %pI (in this networking merge) and the addition of
doing IPv6 addresses (from the earlier merge of CIFS).
The patch is for w90p910 platform default config.
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Split off Orion GPIO handling code into plat-orion/, and add
support for multiple sets of (32) GPIO pins.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
When CONFIG_PM is selected, the VFP code does not have any handler
installed to deal with either saving the VFP state of the current
task, nor does it do anything to try and restore the VFP after a
resume.
On resume, the VFP will have been reset and the co-processor access
control registers are in an indeterminate state (very probably the
CP10 and CP11 the VFP uses will have been disabled by the ARM core
reset). When this happens, resume will break as soon as it tries to
unfreeze the tasks and restart scheduling.
Add a sys device to allow us to hook the suspend call to save the
current thread state if the thread is using VFP and a resume hook
which restores the CP10/CP11 access and ensures the VFP is disabled
so that the lazy swapping will take place on next access.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As per Russell King's last review comment, find and remove
all unnecessary includes of <linux/delay.h> in the files
that do not need them.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The commit 39263db7986bf15c753f6847699107bdf5a2e318 added
a default <mach/io.h> implementation which is shared if
needed between all the s3c implementations. Remove the
s3c24a0 version which is the same as this.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The changes for ARM highmem support have removed the need
for the __virt_to_bus and __bus_to_virt macros, so remove them
from this build.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the fourth UART definition for the S3C2443, and at the
same time fixup the problems caused by the enlarging of the
UART array in the previous commits.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the usage of CONFIG_SERIAL_SAMSUNG_UARTS in several places
in the kernel where it had been missed. This finishes fixing a
long standing issue where S3C2443 and S3C64XX could not use the
4th UART
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch removes the inclusion of mach/hardware.h from mach/irqs.h and
switches to more meaningful names for the irq related macros.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a missing call to local_irq_restore() and fixes some
compiler warnings about unused variables for MX1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add GPIO support to the SM501 on the Simtec Anubis,
and then add the necessary updates for allowing the
two gpio I2C busses to be used.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the name of the driver, as well as the fact we are not
passing the number of chipselects to the driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A common core driver for the S3C24XX ADC block so that
the touchscreen, hwmon and any other drivers can share
the resource.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Changes made as suggested by Eric Miao (including fix to map_io
silly mistake!).
Originally designed by Intel, now sold by Crossbow (www.xbow.com).
Very little actually on board. The patch includes sensors and
similar as found on commonly occurring daughter boards.
Some of the drivers are not in mainline as yet as they are either
part of the IIO subsystem or need a lot of work before submission.
What is the position wrt to putting them in i2c board configs etc?
Support for these boards has been maintained outside the kernel
for a long time, but now that there is a good da9030 pmic driver
available the last major hurdle no longer exists.
All comments welcomed.
The Imote2's big brother (stargate2) will follow once any problems
with this one have been cleaned up and a few bits and bobs have
been added to the da903x driver. Hopefully the cc2420 driver will
get cleaned up and submitted in the not too distant future as
well.
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
I2C platform data setups.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Matrix and single key setups for all phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Pin configs for different generations and phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Our bootloader now supports ATAGS_MEM
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Some smart panel requires a delay between command sequences, while PXA
LCD controller didn't provide such one, let's emulate this by software.
A software delay marker can be inserted into the command sequence, once
pxafb_smart_queue() detects this, it flushes the previous commands and
delay for a specified number of milliseconds.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
For smart panels (LCD panel with internal framebuffer), the following
LCCR3 register bits have different meanings than the parallel one:
LCCR3_PCP - controls the L_PCLK_WR polarity
LCCR3_HSP - controls the L_LCLK_A0 polarity
LCCR3_VSP - controls the L_FCLK_RD polarity
To keep minimum change to the original parallel timing, the .lcd_conn
flags and 'pxafb_mode_info.sync' are re-used to reflect this:
LCD_PCLK_EDGE_{RISE,FALL} - configures LCCR3_PCP
sync & FB_SYNC_{HOR,VERT}_HIGH_ACT - configures LCCR3_{HSP,VSP}
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This patch prepares the current i.MX1 framebuffer driver for usage in the
whole i.MX family. It switches to readl/writel for register accesses.
Also it moves the register definitions to the driver where they belong.
Acked-by: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds MX1 architecture to platform MXC. It will supersede mach-imx
and let it die.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix GIUS register setup in the mxc_gpio_mode().
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Initial support for mx31moboard platfor with 3 serial ports
and NOR Flash
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pins definition for UART5 when used in alternate mode 2
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
UART2 pins when used in functionnal mode
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic support to the MX31PDK development board, also known
as MX31 3DS or MX31 3-stack board (http://www.freescale.com/imx31pdk).
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: sascha Hauer <s.hauer@pengutronix.de>
The pcm038 module (phyCORE-i.MX27) comes with a 512 KiB static RAM which
can be battery buffered. Add mtd_ram support and configure the chip select
line, to which the sram is attached.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_iomux_set_pad() is buggy on i.MX31 - it calculates the register and
the offset therein wrongly. Fix it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_gpio_setup_multiple_pins used to take several ALLOC_MODE flags. Most
of them are unused, so simplify the function by removing the flags. Also,
instead of using a confusing MXC_GPIO_ALLOC_MODE_RELEASE flag in a function
having alloc in its name, add a mxc_gpio_release_multiple_pins function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EMMA (Enhanced Multimedia Engine) is divided into two parts, the
postprocessor and the preprocessor. Fix the base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This one updates DMA support on MX2 which got broken in:
[ARM] Hide ISA DMA API when ISA_DMA_API is unset
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a configuration option to start the UART FIFOs during the
decompressions sequence to improve boot time when the bootloader
fails to enable the UART FIFOs.
For example, the SMDK6410 UBoot 1.1.6 leaves the FIFOs off.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Select the correct EINT configuration register when configuring
the external interrupt level/edge type.
Signed-off-by: Matt Hsu <matt_hsu@openmoko.org>
[ben-linux@fluff.org: description improvement]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Correct the PLL field masks to ensure the PLL functions return the
right value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the initialisation of the fifo data in the uncompression serial
routines to ensure that if the FIFO is enabled, that the serial output
is not corrupted.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: edit description to add more detail]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C64XX timer is running at the wrong rate due to the
assumptions made in the timer initialisation about the way
the pwm dividers work. This means that time on the S3C64XX
runs twice as fast as it should.
Fix the problem by moving to using the clk framework to setup
the pwm timer clock muxes, as the pwm-clock code has all the
necessary knowledge of how the timer clock inputs are routed.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The S3C64XX series has a new TCFG divider setting to allow the clock
directly through, which means that we need to update the pwm-clock
code to cope with this.
Add <mach/pwm-clock.h> containing the specific code to deal with the
TCFG divider settings and provide any other per-arch data that the
pwm-clock driver needs to function.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add device definition and support functions for the
second i2c device (i2c1). If this is selected, the first
i2c bus will become index 0 instead of index -1.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Provide the initial register definitions for the newer
style of framebuffer cores found in the Samsung SoCs
such as S3C2450, S3C64XX.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the compilation of the SDHCI configuration/setup
functions to depend on their respective configuration
variables.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The function s3c64xx_init_io was missing from <plat/cpu.h>
and was masked by the SMDK6410 having an local definition.
Fix by removing the SMDK6410 variant and adding it to the
relevant <plat/cpu.h> file.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the specific register definitions for the Samsung SDHCI
(HSMMC) block for the S3C2443 and S3C64XX series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The clk_fout_epll clock wasn't registered as part of the initial clock
work, which can cause problems if it is used by one of the hardware
blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The gpiolib driver keeps its chip array to itself
and having a separate array for s3c-only gpios stops
any non-s3c gpio being used in one of the s3c specific
configuration calls.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the definition for the hsmmc device to plat-s3c
to be shared between the s3c24xx and s3c64xx platforms.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add definitions for the external interrupt groups which accompany
the original IRQ_EINT from the s3c24xx series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Discard the 'void *' from the pointers used for the
virtual addresses when setting up the .virtual fields
of the io map to avoid implicit cast warnings
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Index: linux.git/arch/arm/plat-s3c64xx/cpu.c
===================================================================
Some of the startup output can be reduced to
KERN_DEBUG from KERN_INFO as it is only really
useful when trying to debug kernel initialisation
problems.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.
Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The original arch/arm/include/asm/hardware/vic.h was
written for the PL190 ARM VIC implementation, and as
such does not have any information about the PL192
version.
Add details about the PL192 and PL190 specific registers
and any changes between the two units.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add demux handling for the UART interrupts
generated by the VIC into their seperate IRQs
that the serial driver can register.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
