3 Commits

Author	SHA1	Message	Date
David Lechner	76c9dd9dbd	clk: davinci: pll: allow dev == NULL ... This modifies the TI Davinci PLL clock driver to allow for the case when dev == NULL. On some (most) SoCs that use this driver, the PLL clock needs to be registered during early boot because it is used for clocksource/clkevent and there will be no platform device available. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180525181150.17873-7-david@lechnology.com	2018-05-30 12:48:35 -07:00
Sekhar Nori	7f02f18e7f	clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled ... PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot be disabled. Mark it so to prevent unused clock disable infrastructure from disabling it. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180525181150.17873-5-david@lechnology.com	2018-05-30 12:48:27 -07:00
David Lechner	6ef35851a0	clk: davinci: Add platform information for TI DM646x PLL ... This adds platform-specific declarations for the PLL clocks on TI DM646x based systems. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-03-20 10:16:26 -07:00