3 Commits

Author	SHA1	Message	Date
Colin Ian King	f3606687b4	rtc: msc313: Fix unintentional sign extension issues with left shift of a u16 ... Shifting the u16 value returned by readw by 16 bits to the left will be promoted to a 32 bit signed int and then sign-extended to an unsigned long. If the top bit of the readw is set then the shifted value will be sign extended and the top 32 bits of the result will be set. Fixes: be7d9c9161 ("rtc: Add support for the MSTAR MSC313 RTC") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210928134654.991923-1-colin.king@canonical.com	2021-10-01 23:28:46 +02:00
Alexandre Belloni	27ff63eb07	rtc: msc313: fix missing include ... The driver needs io.h Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210927063724.312687-1-alexandre.belloni@bootlin.com	2021-09-27 08:39:43 +02:00
Daniel Palmer	be7d9c9161	rtc: Add support for the MSTAR MSC313 RTC ... This adds support for the RTC block on the Mstar MSC313e SoCs and newer. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Co-developed-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Romain Perier <romain.perier@gmail.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210823171613.18941-3-romain.perier@gmail.com	2021-09-26 00:17:25 +02:00