Commit Graph

15 Commits

Author SHA1 Message Date
Thierry Reding
3f748d4450 ARM: tegra: Enable power key on Venice2
Contrary to the rest of the keyboard, which is connected to the ChromeOS
embedded controller, the power key is hooked up to a GPIO. Add a device
tree node to handle it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20 10:55:34 -07:00
Thierry Reding
146db0eae8 ARM: tegra: Enable Venice2 keyboard
The keyboard on Venice2 is attached to the ChromeOS embedded controller.
Add the corresponding device tree nodes and use the MATRIX_KEY define to
encode keycodes.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20 10:54:35 -07:00
Stephen Warren
b1afa7822d ARM: tegra: set up /aliases for RTCs on Venice2
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 11:41:25 -07:00
Laxman Dewangan
fcacaba732 ARM: tegra: add ams AS3722 device to Venice2 DT
Add ams AS3722 entry for gpio/pincontrol and regulators
to venice2 DT.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 11:40:39 -07:00
Laxman Dewangan
365c483f19 ARM: tegra: fix missing pincontrol configuration for Venice2
Compare the initial population of default pinmux configuration of Venice2
with the chrome branch and add/fix the missing configurations.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 11:40:36 -07:00
Thierry Reding
f5cb19b496 ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
This pin needs to be configured in pull-down, non-tristate mode in order
for the backlight to work correctly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:22 -07:00
Stephen Warren
4ffb938576 ARM: tegra: fix pinctrl misconfiguration on Venice2
Other boards use PULL_NONE for their debug UART pins, and without this
change, the board doesn't accept any serial input.

Don't set the I2S port pins to tristate mode, or no audio signal will
be sent out.

Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:21 -07:00
Laxman Dewangan
4b20bcbea1 ARM: tegra: add default pinctrl nodes for Venice2
Add the default pinmux configuration for the Tegra124 based
Venice2 platform.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:21 -07:00
Thierry Reding
e013485d12 ARM: tegra: Enable PWM on Venice2
Subsequent patches will need to reference a PWM channel for backlight
support, so enable the PWM device and assign a label to it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:19 -07:00
Stephen Warren
b0e1caeedd ARM: tegra: add sound card to Venice2 DT
Venice2 uses the MAX98090 audio CODEC, and supports built-in speakers,
and a combo headphones/microphone jack. Add a top-level sound card node
to represent this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:19 -07:00
Stephen Warren
9d5b250507 ARM: tegra: enable I2C controllers on Venice2
Enable all the I2C controllers that are wired up on Venice2. I don't
know the correct I2C bus clock rates, so set them all to a conservative
100KHz for now.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:18 -07:00
Stephen Warren
784c7444f0 ARM: tegra: add MMC controllers to Tegra124 DT
Tegra124 has 4 MMC controllers just like previous versions of the SoC.
Note that there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW.

Also enable the relevant controllers in the Venice2 board DT.

power-gpios property suggested by Thierry Reding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
2013-12-16 14:09:18 -07:00
Joseph Lo
3b86baf296 ARM: tegra: add clock properties for devices of Tegra124
This patch adds clock properties for devices in the DT for basic support
of Tegra124 SoC.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren, added missing unit address to "clock" node]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:17 -07:00
Joseph Lo
6ec1d127ee ARM: tegra: enable LP1 suspend mode for Venice2
Enable LP1 suspend mode for Tegra124 Venice2 board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-11 12:32:17 -06:00
Joseph Lo
a1425d428f ARM: tegra: add Venice2 board support
Add support for the Tegra124 based Venice2 reference board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-08 13:51:41 -06:00