2 Commits

Author	SHA1	Message	Date
Horatiu Vultur	5ad5915dea	clk: lan966x: Extend lan966x clock driver for clock gating support ... Extend the clock driver to add support also for clock gating. The following peripherals can be gated: UHPHS, UDPHS, MCRAMC, HMATRIX. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103085102.1656081-5-horatiu.vultur@microchip.com	2021-12-08 11:19:20 +01:00
Kavyasree Kotagiri	54104ee023	clk: lan966x: Add lan966x SoC clock driver ... This adds Generic Clock Controller driver for lan966x SoC. Lan966x clock controller contains 3 PLLs - cpu_clk, ddr_clk and sys_clk. It generates and supplies clock to various peripherals within SoC. Register settings required to provide GCK clocking to a peripheral is as below: GCK_SRC_SEL = Select clock source. GCK_PRESCALER = Set divider value. GCK_ENA = 1 - Enable GCK clock. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Co-developed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103061935.25677-4-kavyasree.kotagiri@microchip.com	2021-12-08 10:57:26 +01:00