Most machine classes want some way to register a block of clk_lookup
structures, and most do it by implementing a clks_register() type
function which walks an array, or by open-coding a loop.
Consolidate all this into clkdev_add_table().
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For some platforms, it is inappropriate to register all PXA UARTs.
In some cases, the UARTs may not be used, and in others we may want
to avoid registering the UARTs to allow other drivers (eg, FICP) to
make use of the UART.
In addition, a while back there was a request to be able to pass
platform data to the UART driver.
This patch enables all of this by providing functions platforms can
call to register each individual UART.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
In commit f23d491131, the pwr-i2c device name changed due to the
newly introduced device table. This patch fixes the clock so the
driver's probe will succeed again.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
As reported by Aric Blumer, the pxa27x_udc driver does work
with pxa3xx devices. Add support into device files.
Reported-by: Aric Blumer <aric@sdgsystems.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Matt Reimer <mattjreimer@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This is part of the work making gpio.c generic enough, the changes
include:
1. move IRQ handling of GPIO 0 and 1 outside (and back into irq.c)
2. pxa_init_gpio() accepts a range for muxed GPIO IRQs, and an IRQ
number for the muxed GPIOs
3. __gpio_is_occupied() and __gpio_is_inverted() are made inline,
and are moved into <mach/gpio.h> instead of generic gpio.c
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add IO memory and IRQ ressources for pxa based SoC to be
able to use the new rtc-pxa driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Let's put these devices into a central place even if they are now
processor specific, as they might be re-used in later processors.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add power I2C support for PXA3xx processors
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Due to the problem of reset status bits being handled by different
registers between pxa2xx and pxa3xx, introduce a global reset_status
variable, initialized by SoC-specific code and later being used by
other drivers.
And also introduce clear_reset_status(), which is used to clear the
corresponding status bits. Pass RESET_STATUS_ALL to clear all bits.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
So processor specific clock sources can be defined in pxa300.c
and pxa320.c.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The pxa2xx_udc.c driver is renamed to pxa25x_udc.c (the platform
driver name changes from pxa2xx-udc to pxa25x-udc) and the
platform driver name of pxa27x_udc.c is fixed to pxa27x-udc.
pxa_device_udc in devices.c is split into pxa25x and pxa27x flavors
and the pxa27x_device_udc is enabled in pxa27x.c.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Including from Ian Molton:
Fixes for mistakes left over from the PXA2{5,7}X UDC split.
Signed-off-by: Ian Molton <spyro@f2s.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The PXA25x and PXA27x USB device controller register definitions are
different. Currently, they live side by side in pxa-regs.h, but only
one set is available depending on the setting of PXA25x or PXA27x.
This means that if we build to support both PXA25x and PXA27x, the
PXA27x definitions are unavailable, even to PXA27x specific code.
Remove these definitions from pxa-regs.h, and place them in separate
files. Include these files where appropriate.
Note: according to the dependencies in drivers/usb/gadget/Kconfig,
we do not support the UDC on PXA27x nor PXA3xx CPUs, so remove the
platform devices from pxa27x.c and pxa3xx.c.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch mainly from Eric Miao, with minor edits by rmk.
Note: PWM0 and PWM2 share the same register I/O space and clock gating
on pxa{27x, 3xx}, thus PWM2 is treated in the driver as a child PWM of
PWM0. And this is also true for PWM1/3.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Each time a pxa type cpu went in suspend, a portion of
kmalloc memory was corrupted.
The issue was an incorrect length allocation introduced by
the commit 711be5ccfe for
the save registers array (=> overflow).
Signed-off-by: Robert Jarzmik <rjarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa3xx_set_wake() silently accepts unsupported wake sources, causing
users to believe that they have succesfully configured sources that they
haven't. Fail the operation instead.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Initialise PXA devices before platform initialisation, so that
platforms can parent devices to these.
Acked-by: eric miao <ymiao3@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The PXA3xx will not suspend if there are no wakeup sources configured.
Print a diagnostic message to make it easier for the user to see what's
happening.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
also update the clk definitions in pxa27x and pxa3xx.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
MFP configurations after resume should be done before the GPIO registers
are restored. Move the mfp sysdev registeration to the same place where
GPIO and IRQ sysdev(s) are registered to better control the order.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
To further clean up the GPIO and IRQ structure:
1. pxa_init_irq_gpio() and pxa_init_gpio() combines into a single
function pxa_init_gpio()
2. assignment of set_wake merged into pxa_init_{irq,gpio}() as
an argument
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This makes the code better organized and simplified a bit. The change
will lose a bit of performance when performing IRQ ack/mask/unmask,but
that's not too much after checking the result binary.
This patch also removes the ugly #ifdef CONFIG_PXA27x .. #endif by
carefully not to access those pxa{27x,3xx} specific registers, this
is done by keeping an internal IRQ number variable. The pxa-regs.h
is also modified so registers for IRQ > PXA_IRQ(31) are made public
even if CONFIG_PXA{27x,3xx} isn't defined (for pxa25x's sake)
The incorrect assumption in the original code that internal irq starts
from 0 is also corrected by comparing with PXA_IRQ(0).
"struct sys_device" for the IRQ are reduced into one single device on
pxa{27x,3xx}.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The AC97 clock rate on PXA3xx is generated with a configurable divider
from sys_pll.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is unnecessary since it is already protected by
spin_lock_irq{save, restore} in clock.c.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to PXA300/310 and PXA320 Developer manuals,
the ASCR[RDH] "bit needs to be cleared as part of the software
initialization coming out of any reset and coming out of D3".
The latter requirement is addressed by commit
"c4d1fb627ff3072", as for the former (coming out of any reset),
the kernel relies on boot loaders and assumes that RDH bit
is cleared there. Though, not all bootloaders follow the rule
so we have to clear the bit in kernel.
We clear the RDH bit in pxa3xx_init() function since
it is always invoked after any reset. We also preserve D1S, D2S
and D3S bits from being cleared in case we invoke pxa3xx_init()
function not from normal hardware reset (e.g. kexec scenario),
so these bits can be properly referenced later.
Signed-off-by: Dmitry Krivoschekov <dmitry.krivoschekov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. clear RDH bit after resuming back from D3, otherwise, the multi function
pins will retain the low power state
2. save/restore essential system registers
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The original code incorrectly returns Hz instead of KHz.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Wakeup sources on PXA3 are enabled at two levels. First, the MFP
configuration has to be set to enable which edges a specific pin
will trigger a wakeup. The pin also has to be routed to a functional
unit. Lastly, the functional unit must be enabled as a wakeup source
in the appropriate AD*ER registers (AD2D0ER for standby resume.)
This doesn't fit well with the IRQ wake scheme - we currently do a
best effort conversion from IRQ numbers to functional unit wake enable
bits. For instance, there's several USB client related enable bits but
there's no corresponding IRQs to determine which you'd want. Conversely,
there's a single enable bit covering several functional units.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is to add the third mmc controller support _only_
for pxa310.
On zylonite, the third controller support one slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is to add the second mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the second controller has no slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patchis to add the first mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the first controller supports two slots, this patch
only support the first one right now.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
