Commit Graph

982050 Commits

Author SHA1 Message Date
Drew Fustini
cd4919105c pinctrl: clarify #pinctrl-cells for pinctrl-single,pins
Document that #pinctrl-cells can be 1 or 2 for pinctrl-single,pins

Fixes: 27c90e5e48 ("ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2")
Reported-by: Emmanuel Vadot <manu@bidouilliste.com>
Link: https://lore.kernel.org/linux-gpio/20210115190201.9273b637a7f967e7e55bc740@bidouilliste.com/
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210120050342.320704-1-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-22 14:20:07 +01:00
Manivannan Sadhasivam
5784921f7b pinctrl: actions: Add the platform dependency to drivers
The Actions Semi pinctrl drivers are a mix of both ARM32 and ARM64
platforms. So let's add the correct platform dependency to avoid them
being selected on the other.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210121062547.27173-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-22 14:17:27 +01:00
Andre Przywara
561c1cf17c pinctrl: sunxi: Add support for the Allwinner H616-R pin controller
There are only two pins left now, used to connect to the PMIC via I2C.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210118020848.11721-6-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 22:15:46 +01:00
Andre Przywara
25adc29407 pinctrl: sunxi: Add support for the Allwinner H616 pin controller
Port A is used for an internal connection to some analogue circuitry
which looks like an AC200 IP (as in the H6), though this is not
mentioned in the manual.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20210118020848.11721-5-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 22:14:18 +01:00
Andre Przywara
fdca7cb995 dt-bindings: pinctrl: Add Allwinner H616 compatible strings
A new SoC, a new compatible string.
Also we were too miserly with just allowing seven interrupt banks.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20210118020848.11721-4-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 22:11:57 +01:00
Paul Cercueil
dd1ccfd676 pinctrl: ingenic: Improve JZ4760 support
- Add otg function and otg-vbus group.

- Add lcd-8bit, lcd-16bit, lcd-18bit, lcd-generic and lcd-special
  groups. Change the lcd-24bit group so that it only selects the pins
  that aren't in the lcd-18bit and lcd-generic groups (which breaks
  Device Tree in theory, but there is none out there for any JZ4760
  based board, yet). Remove the lcd-no-pins group which is just useless.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20210120110722.20133-1-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 13:15:36 +01:00
Arnd Bergmann
4ef82b3052 pinctrl: remove ste u300 driver
The ST-Ericsson U300 platform is getting removed, so this driver is no
longer needed.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210120132045.2127659-6-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 09:53:51 +01:00
Arnd Bergmann
5817364a90 pinctrl: remove coh901 driver
The ST-Ericsson U300 platform is getting removed, so this driver is no
longer needed.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210120132045.2127659-5-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 09:53:40 +01:00
Arnd Bergmann
c41e02c384 pinctrl: remove sirf atlas/prima drivers
The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.

Cc: Barry Song <baohua@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Barry Song <baohua@kernel.org>
Link: https://lore.kernel.org/r/20210120132045.2127659-4-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 09:53:26 +01:00
Arnd Bergmann
484c58d660 pinctrl: remove zte zx driver
The zte zx platform is getting removed, so this driver is no
longer needed.

Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210120132045.2127659-3-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-21 09:53:15 +01:00
Jonathan Neuschäfer
df1bdee806 dt-bindings: pinctrl: pinctrl-microchip-sgpio: Fix indentation
yamllint warns:
./Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
  102:10  error   wrong indentation: expected 10 but found 9 (indentation)

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20210116015350.3501927-1-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-18 16:33:46 +01:00
Jiapeng Zhong
e95d931a15 pinctrl: bcm: Simplify bool comparison
Fix the follow coccicheck warnings:

./drivers/pinctrl/bcm/pinctrl-ns2-mux.c:856:29-38: WARNING:
Comparison to bool.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
Link: https://lore.kernel.org/r/1610705349-24310-1-git-send-email-abaci-bugfix@linux.alibaba.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-18 16:30:08 +01:00
Paul Cercueil
9aa351784e pinctrl: ingenic: Only support SoCs enabled in config
Tested on a JZ4740 system (ARCH=mips make qi_lb60_defconfig), this saves
about 14 KiB, by allowing the compiler to garbage-collect all the
functions and tables that correspond to SoCs that were disabled in the
config.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20201213235447.138271-2-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-18 16:13:51 +01:00
Paul Cercueil
1b399bb048 kconfig.h: Add IF_ENABLED() macro
IF_ENABLED(CONFIG_FOO, ptr) evaluates to (ptr) if CONFIG_FOO is set to 'y'
or 'm', NULL otherwise. The (ptr) argument must be a pointer.

The IF_ENABLED() macro can be very useful to help GCC drop dead code.

For instance, consider the following:

    #ifdef CONFIG_FOO_SUSPEND
    static int foo_suspend(struct device *dev)
    {
       ...
    }
    #endif

    static struct pm_ops foo_ops = {
	#ifdef CONFIG_FOO_SUSPEND
        .suspend = foo_suspend,
	#endif
    };

While this works, the foo_suspend() macro is compiled conditionally,
only when CONFIG_FOO_SUSPEND is set. This is problematic, as there could
be a build bug in this function, we wouldn't have a way to know unless
the config option is set.

An alternative is to declare foo_suspend() always, but mark it as maybe
unused:

    static int __maybe_unused foo_suspend(struct device *dev)
    {
       ...
    }

    static struct pm_ops foo_ops = {
	#ifdef CONFIG_FOO_SUSPEND
        .suspend = foo_suspend,
	#endif
    };

Again, this works, but the __maybe_unused attribute is required to
instruct the compiler that the function may not be referenced anywhere,
and is safe to remove without making a fuss about it. This makes the
programmer responsible for tagging the functions that can be
garbage-collected.

With this patch, it is now possible to write the following:

    static int foo_suspend(struct device *dev)
    {
       ...
    }

    static struct pm_ops foo_ops = {
        .suspend = IF_ENABLED(CONFIG_FOO_SUSPEND, foo_suspend),
    };

The foo_suspend() function will now be automatically dropped by the
compiler, and it does not require any specific attribute.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20201213235447.138271-1-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-18 16:13:51 +01:00
Linus Walleij
dbbdb8da42 pinctrl: renesas: Updates for v5.12
- Restrict debug runtime-checks to Renesas platforms,
   - Initial support for the R-Car V3U SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYAFgRQAKCRCKwlD9ZEnx
 cEWIAP40TrUerqfnQgJ7iNYLh9WfSk48w9Gxzm92E7FanXaJBAD/dmkieXwQBBig
 zKNuoWL2ZlK7O5MMkzpNnhLNS95SEQs=
 =vIxg
 -----END PGP SIGNATURE-----

Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.12

  - Restrict debug runtime-checks to Renesas platforms,
  - Initial support for the R-Car V3U SoC.
2021-01-18 16:11:42 +01:00
YANG LI
60c456e0ff pinctrl: sprd: Simplify bool comparison
Fix the following coccicheck warning:
./drivers/pinctrl/sprd/pinctrl-sprd.c:690:8-23: WARNING: Comparison to
bool

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: YANG LI <abaci-bugfix@linux.alibaba.com>
Reviewed-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/1610440080-68600-1-git-send-email-abaci-bugfix@linux.alibaba.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-18 14:41:42 +01:00
Souptick Joarder
a5d8278375 pinctrl: ti :iodelay: Fixed inconsistent indenting
Kernel test robot throws below warning ->

smatch warnings:
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:708
ti_iodelay_pinconf_group_dbg_show() warn: inconsistent indenting

Fixed the inconsistent indenting.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Link: https://lore.kernel.org/r/1610394585-4296-1-git-send-email-jrdr.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-18 14:21:04 +01:00
Ulrich Hecht
a5cda861ed pinctrl: renesas: r8a779a0: Add TPU pins, groups and functions
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-13-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:16 +01:00
Ulrich Hecht
b3761cd6e1 pinctrl: renesas: r8a779a0: Add TMU pins, groups and functions
This patch adds TMU TCLK1-4 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-12-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
a6a5140333 pinctrl: renesas: r8a779a0: Add QSPI pins, groups, and functions
Add the QSPI0-1 pins, groups and functions to the R8A779A0 (V3U) PFC
driver.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-11-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
30db678101 pinctrl: renesas: r8a779a0: Add PWM pins, groups and functions
This patch adds PWM0-4 pins, groups and functions to the R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-10-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
88aac7aa75 pinctrl: renesas: r8a779a0: Add MSIOF pins, groups and functions
This patch adds MSIOF0-5 pins, groups and functions to R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-9-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
2feb2d5cba pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions
This patch adds MMC pins, groups and functions to R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165929.31002-8-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
8be8e8ee02 pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-7-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
7e67ff6efc pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions
This patch adds HSCIF0-3 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165929.31002-6-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
6e03446d0e pinctrl: renesas: r8a779a0: Add DU pins, groups and function
This patch adds DU pins, groups and function for the R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-5-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
1a954c6823 pinctrl: renesas: r8a779a0: Add CANFD pins, groups and functions
This patch adds CANFD 0-7 and CANFD clock pinmux support for the
R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-4-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
cc35593ff4 pinctrl: renesas: r8a779a0: Add EtherAVB pins, groups and functions
This patch adds groups and function for AVB PHY, LINK, MAGIC, RGMII and
PTP pins for the R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165929.31002-3-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
7b66f2ddc8 pinctrl: renesas: r8a779a0: Add I2C pins, groups and functions
This patch adds I2C0-6 pins, groups and functions to the R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165929.31002-2-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
5621739dc1 pinctrl: renesas: r8a779a0: Add SCIF pins, groups and functions
This patch adds SCIF0, 1, 3 and 4 pins, groups and functions for the
R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-6-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
741a7370fc pinctrl: renesas: Initial R8A779A0 (V3U) PFC support
This patch adds initial pinctrl support for the R8A779A0 (V3U) SoC,
including bias, drive strength and voltage control.

Based on patch by LUU HOAI <hoai.luu.ub@renesas.com>.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-5-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
9f2af9e561 pinctrl: renesas: Add PORT_GP_CFG_{2,31} macros
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-4-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
537db25ca3 pinctrl: renesas: Add I/O voltage level flag
This patch adds config macros describing the voltage levels available on
a pin. The current default (3.3V/1.8V) maps to zero to avoid having to
change existing PFC implementations.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-3-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:15 +01:00
Ulrich Hecht
e127ef2ed0 pinctrl: renesas: Implement unlock register masks
The V3U SoC has several unlock registers, one per register group. They
reside at offset zero in each 0x200 bytes-sized block.

To avoid adding yet another table to the PFC implementation, this
patch adds the option to specify an address mask instead of the fixed
address in sh_pfc_soc_info::unlock_reg.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-2-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 12:06:12 +01:00
Ulrich Hecht
88a1590b14 dt-bindings: pinctrl: renesas,pfc: Document r8a779a0 PFC support
Document PFC support for the R-Car V3U (R8A779A0) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165912.30876-7-uli+renesas@fpond.eu
[geert: increase reg maxItems to 10]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-14 11:56:26 +01:00
Geert Uytterhoeven
6dd169fc20 pinctrl: renesas: checker: Restrict checks to Renesas platforms
When DEBUG is defined (e.g. if CONFIG_DEBUG_PINCTRL=y), the Renesas pin
control driver runs sanity checks against the pin control tables.  This
may cause lots of output on the console, and can be annoying in ARM
multi-platform kernels.  Fix this by only running the checks when
running on SuperH, or on a DT platform supported by the Renesas pin
controller driver.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210111165013.496897-1-geert+renesas@glider.be
2021-01-12 10:45:43 +01:00
Samuel Holland
b071a12455 pinctrl: sunxi: h6-r: Add s_rsb pin functions
As there is an RSB controller in the H6 SoC, there should be some pin
configuration for it. While no such configuration is documented, the
"s_i2c" pins are suspiciously on the "alternate" function 3, with no
primary function 2 given. This suggests the primary function for these
pins is actually RSB, and that is indeed the case.

Add the "s_rsb" pin functions so the RSB controller can be used.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20210103100007.32867-3-samuel@sholland.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-06 21:10:04 +01:00
Zhaoyu Liu
43878eb7c8 pinctrl: remove empty lines in pinctrl subsystem
Remove all empty lines at the end of functions in pinctrl subsystem,
and make the code neat.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Zhaoyu Liu <zackaryliu@yeah.net>
Link: https://lore.kernel.org/r/X98NP6NFK1Afzrgd@manjaro
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-05 16:09:24 +01:00
Sergio Paracuellos
c6d212951b pinctrl: ralink: rt2880: fix '-Wmissing-prototypes' in init function
Kernel test robot reported the following warning:
'warning: no previous prototype for 'rt2880_pinmux_init''.
This function is the entry point for the platform driver and
it is private to this driver. Hence declare it 'static' which is
the correct thing to do fixing also this warning.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20201228064727.30098-1-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:40:02 +01:00
Sergio Paracuellos
50a7108733 pinctrl: ralink: rt2880: use 'PTR_ERR_OR_ZERO'
Avoid some boilerplate code using 'PTR_ERR_OR_ZERO'
 in probe function.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-8-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:35 +01:00
Sergio Paracuellos
8a55d64c33 pinctrl: ralink: rt2880: preserve error codes
Some paths in probe function are returning '-EINVAL'
instead of preserve original code from called functions.
Change them to preserve all of them.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-7-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:34 +01:00
Sergio Paracuellos
420cf17d97 pinctrl: ralink: rt2880: delete not needed error message
When '-ENOMEM' is returned there is not need at all to
add custom error messages. Hence delete it.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-6-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:34 +01:00
Sergio Paracuellos
09f8101d31 pinctrl: ralink: rt2880: add missing NULL check
Memory is being requested to the kernel but there is
a missing check for NULL. Hence, add it.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-5-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:34 +01:00
Sergio Paracuellos
7391031be7 pinctrl: ralink: rt2880: return proper error code
Check for NULL shall return '-ENOMEM' instead of '-1'.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-4-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:34 +01:00
Sergio Paracuellos
53abfe67f0 pinctrl: ralink: rt2880: avoid double pointer to simplify code
Double pointer is being used and assigned in a bit dirty way to
assign functions in pinctrl. Instead of doing this just avoid it
and use directly 'p->func' instead.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-3-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:34 +01:00
Sergio Paracuellos
86e666df40 dt-bindings: pinctrl: rt2880: properly redo bindings
When this bindings where applied there weren't already
reviewed and some old hacks was being used to properly
pass the schemas checks. This commits fix them up:
 - Instead of using 'if-then' clause use '-pins$'.
 - 'groups' and 'function' are included inside a new
   '^(.*-)?pinmux$' node.
 - compatible string is not an 'enum' but a 'const'.
 - 'pinctrl-0' and 'pinctrl-names' removed since they are
    used in consumer nodes.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20201213161721.6514-2-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:38:34 +01:00
Zheng Yongjun
502045d91a pinctrl: ti-iodelay: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Link: https://lore.kernel.org/r/20201211084902.2480-1-zhengyongjun3@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:31:51 +01:00
Zheng Yongjun
0014d7a9c0 pinctrl: mediatek: moore: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Link: https://lore.kernel.org/r/20201211084801.2425-1-zhengyongjun3@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:30:26 +01:00
Zheng Yongjun
8ad5749395 pinctrl: mediatek: paris: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Link: https://lore.kernel.org/r/20201211084717.2371-1-zhengyongjun3@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:29:19 +01:00
Zheng Yongjun
46e5dbe7f3 pinctrl: at91: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Link: https://lore.kernel.org/r/20201211084541.2318-1-zhengyongjun3@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-04 15:29:11 +01:00