Commit Graph

9131 Commits

Author SHA1 Message Date
Geoff Levand
cc21a66d7f [POWERPC] cell: remove unused struct spu variable
Remove the mostly unused variable isrc from struct spu and a forgotten
function declaration.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-25 14:20:21 +10:00
Masato Noguchi
24f43b33f7 [POWERPC] spufs: wrap mfc sdr access
SPRN_SDR1 and the SPE's MFC SDR are hypervisor resources and
are not accessible from a logical partition.  This change adds an
access wrapper.

When running on bare H/W, the spufs needs to only set the SPE's MFC SDR
to the value of the PPE's SPRN_SDR1 once at SPE initialization, so this
change renames mfc_sdr_set() to mfc_sdr_setup() and moves the
access of SPRN_SDR1 into the mmio wrapper.  It also removes the now
unneeded member mfc_sdr_RW from struct spu_priv1_collapsed.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

--
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-25 14:20:20 +10:00
Michael Ellerman
5414c6be57 [POWERPC] Make irq_dispose_mapping(NO_IRQ) a nop
It makes for a friendlier API if irq_dispose_mapping(NO_IRQ) is a
nop, rather than triggering a WARN_ON.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-25 14:20:20 +10:00
Matthew McClintock
a0f467261a [POWERPC] Fixed some missing files to be deleted when running make clean
Fixed some missing files to be deleted when running make clean

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-25 14:20:20 +10:00
Michael Ellerman
41999295b6 [POWERPC] Move iSeries initrd logic into device tree
Remove the iSeries initrd logic, instead just store the initrd location and
size in the device tree so generic code can do the rest for us.

The iSeries code had a "feature" which the generic code lacks, ie. if the
compressed initrd is bigger than the configured ram disk size, we make
the ram disk size bigger. That's bogus, as the compressed size of the initrd
tells us nothing about how big the ram disk needs to be. If the ram disk
isn't big enough you just need to make CONFIG_BLK_DEV_RAM_SIZE larger.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-24 15:01:27 +10:00
Andy Fleming
83efafb301 [POWERPC] Fix up the OF functions to only do PCI stuff if PCI is actually configured
The original problem that inspired this patch was solved quite some time
ago (Turning off PCI didn't work), but this patch neatens things up a
little (I think), by putting all the PCI stuff inside a single CONFIG_PCI
block.  It also removes the OF PCI bus matching entries if CONFIG_PCI is
off.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-24 15:01:27 +10:00
Josh Boyer
0cfcccb468 [POWERPC] Add mktree utility to arch/powerpc/boot
This patch adds the mktree program that is needed to post process zImage
wrappers for various PowerPC 4xx boards

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-24 15:01:27 +10:00
Mark A. Greer
01a6372008 [POWERPC] Add simple memory allocator to bootwrapper
Provide primitive malloc, free, and realloc functions for bootwrapper.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-23 12:49:19 +10:00
Mark A. Greer
0c176fa80f [POWERPC] Add non-OF serial console support
Add serial console support for non-OF systems.  There is a generic serial
console layer which calls a serial console driver.  Included is the serial
console driver for the ns16550 class of uarts.  Necessary support routines
are added as well.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-23 12:49:19 +10:00
Mark A. Greer
6fb4efc68f [POWERPC] Add flatdevtree source
Add the latest version of the flatdevtree code and corresponding glue.

A phandle table now tracks values returned by ft_find_device().
The value returned by ft_find_device() is a phandle which is really
an index into the phandle table.  The phandle table contains the address
of the corresponding node.  When the flat dt is edited/moved, the node
pointers in the phandle table are updated accordingly so no phandles kept
by the caller become stale.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-23 12:49:18 +10:00
Mark A. Greer
c888554bf9 [POWERPC] More bootwrapper reorganization
More reorganization of the bootwrapper:
- Add dtb section to zImage
- ft_init now called by platform_init
- Pack a flat dt before calling kernel
- Remove size parameter from free
- printf only calls console_ops.write it its not NULL
- Some cleanup

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-18 15:50:18 +10:00
Paul Mackerras
b0a779debd [POWERPC] Make sure interrupt enable gets restored properly
The lazy IRQ disable patch missed a couple of places where the
interrupt enable flags need to be restored correctly.  First, we
weren't restoring the paca->hard_enabled flag on interrupt exit.
Instead of saving it on entry, we compute it from the MSR_EE bit
in the MSR we are restoring at exit.  Secondly, the MMU hash miss
code was clearing both paca->soft_enabled and paca->hard_enabled
but not restoring them in the case where hash_page was able to
resolve the miss from the Linux page tables.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-18 10:12:53 +10:00
Geoff Levand
035223fb28 [POWERPC] Make pSeries_lpar_hpte_insert static
Change the powerpc hpte_insert routines now called through ppc_md to
static scope.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 16:33:04 +10:00
David Gibson
0f03a43b8f [POWERPC] Remove todc code from ARCH=powerpc
Apparently we've copied the todc drivers, for various RTCs used in
embedded machines from ARCH=ppc to ARCH=powerpc, despite the fact that
it's never used in the latter.  This patch removes it.

If we ever need these drivers (which we probably shouldn't now the RTC
class stuff is in), we can transfer them one by one from ARCH=ppc,
removing from the hideous abomination which is the todc
"infrastructure".

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 16:32:30 +10:00
Olof Johansson
5b43d20a4d [POWERPC] powerpc: Enable DEEPNAP power savings mode on 970MP
Without this patch, on an idle system I get:

cpu-power-0:21.638
cpu-power-1:27.102
cpu-power-2:29.343
cpu-power-3:25.784
Total: 103.8W

With this patch:

cpu-power-0:11.730
cpu-power-1:17.185
cpu-power-2:18.547
cpu-power-3:17.528
Total: 65.0W

If I lower HZ to 100, I can get it as low as:

cpu-power-0:10.938
cpu-power-1:16.021
cpu-power-2:17.245
cpu-power-3:16.145
Total: 60.2W

Another (older) Quad G5 went from 54W to 39W at HZ=250.

Coming back out of Deep Nap takes 40-70 cycles longer than coming back
from just Nap (which already takes quite a while). I don't think it'll
be a performance issue (interrupt latency on an idle system), but in
case someone does measurements feel free to report them.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 16:32:25 +10:00
Paul Mackerras
d04c56f73c [POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts.  This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca.  If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns.  This means that interrupts only
actually get disabled in the processor when an interrupt comes along.

When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled.  If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.

This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.

This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw.  This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags.  This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 16:31:36 +10:00
Anton Blanchard
284a940675 [POWERPC] Check for offline nodes in pci NUMA code
During boot we bring up all memory and cpu nodes. Normally a PCI device
will be in one of these online nodes, however in some weird setups it
may not.

We have only seen this in the lab but we may as well check for the case
and fallback to -1 (all nodes).

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Anton Blanchard
00ae36de49 [POWERPC] Better check in show_instructions
Instead of just checking that an address is in the right range, use the
provided __kernel_text_address() helper which covers both the kernel and
module text sections.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Anton Blanchard
99f4861025 [POWERPC] POWER6 has 6 PMCs
Change ->num_pmcs to match the number of PMCs in POWER6.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Anton Blanchard
6c4841c2b6 [POWERPC] Never panic when taking altivec exceptions from userspace
At the moment we rely on a cpu feature bit or a firmware property to
detect altivec. If we dont have either of these and the cpu does in fact
support altivec we can cause a panic from userspace.

It seems safer to always send a signal if we manage to get an 0xf20
exception from userspace.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Randy Vinson
60b2a46cd6 [POWERPC] Fix IO Window Updates on P2P bridges.
When update_bridge_base() updates the IO window on a PCI-to-PCI
bridge, it fails to zero the upper 16 bits of the base and limit
registers if the window size is less than 64K.  This fixes it.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Li Yang
8ba738c2bb [POWERPC] Add Makefile entry for MPC832x_mds support
Add missing entry in Makefile for MPC832x MDS support.  It
also change white space to tab in MPC8360 entry.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Li Yang
f5a37b0661 [POWERPC] Fix MPC8360EMDS PB board support
MPC8360EMDS PB support is broken as some code was missing
in last submission.  This patch adds missing code and makes
MPC8360EMDS PB support working.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Kumar Gala
7d2bd30f67 [POWERPC] ppc: Add missing calls to set_irq_regs
In the timer_interrupt we were not calling set_irq_regs() and if we are
profiling we will end up calling get_irq_regs().  This causes bad things to
happen.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:52:14 +10:00
Eric Sesterhenn
bb579cf1d4 [POWERPC] Off-by-one in /arch/ppc/platforms/mpc8*
A find -iname \*.[ch] | xargs grep "> ARRAY_SIZE(" revealed several
incorrect usages of ARRAY_SIZE in the mpc drivers.  The last element in the
array is always ARRAY_SIZE()-1, this patch modifies the bounds checks
accordingly.

Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
Cc: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:52:14 +10:00
Timur Tabi
ee4ea82c07 [POWERPC] Add DOS partition table support to mpc834x_itx_defconfig
The default configuration file for the MPC8349E-mITX reference board,
mpc834x_itx_defconfig, did not include support for DOS partition table types.
This support is necessary because the hard drive that comes with the ITX
is formatted with this partition table type.  Without this config option,
no partitions on the drive can be mounted.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:52:14 +10:00
Noguchi, Masato
654e4aee49 [POWERPC] spufs: fix support for read/write on cntl
This fixes a memory leak introduced by "spufs: add support
for read/write oncntl", which was missing a call to simple_attr_close.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:52:14 +10:00
Benjamin Herrenschmidt
e5267b4b37 [POWERPC] Don't crash on cell with 2 BEs when !CONFIG_NUMA
The SPU code will crash if CONFIG_NUMA is not set and SPUs are found on
a non-0 node. This workaround will ignore those SPEs and just print an
message in the kernel log.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:52:14 +10:00
Ulrich Drepper
51018b0a31 [PATCH] make UML compile (FC6/x86-64)
I need this patch to get a UML kernel to compile.  This is with the
kernel headers in FC6 which are automatically generated from the kernel
tree.  Some headers are missing but those files don't need them.  At
least it appears so since the resuling kernel works fine.

Tested on x86-64.

Signed-off-by: Ulrich Drepper <drepper@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-15 14:18:39 -07:00
Len Brown
18d508bf51 Pull sci into test branch 2006-10-14 02:27:52 -04:00
Kimball Murray
281ea49b0c ACPI: SCI interrupt source override
The Linux group at Stratus Technologies has come across an issue with SCI
routing under ACPI.  We were bitten by this when we made an x86_64 platform
whose BIOS provides an Interrupt Source Override for the SCI itself.
Apparently the override has no effect for the System Control Interrupt, and
this appears to be because of the way the SCI is setup in the ACPI code.
It does not handle the case where busirq != gsi.

The code that sets up the SCI routing assumes that bus irq == global irq.
So there is simply no provision for telling it otherwise.  The attached
patch provides this mechanism.

This patch provided by David Bulkow, was tested on an i386 platform, which
does not use the SCI override, and also on an x86_64 platform which does
use an override.

Signed-off-by: David Bulkow <david.bulkow@stratus.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Len Brown <len.brown@intel.com>
2006-10-14 02:01:26 -04:00
Venkatesh Pallipadi
991528d734 ACPI: Processor native C-states using MWAIT
Intel processors starting with the Core Duo support
support processor native C-state using the MWAIT instruction.
Refer: Intel Architecture Software Developer's Manual
http://www.intel.com/design/Pentium4/manuals/253668.htm

Platform firmware exports the support for Native C-state to OS using
ACPI _PDC and _CST methods.
Refer: Intel Processor Vendor-Specific ACPI: Interface Specification
http://www.intel.com/technology/iapc/acpi/downloads/302223.htm

With Processor Native C-state, we use 'MWAIT' instruction on the processor
to enter different C-states (C1, C2, C3).  We won't use the special IO
ports to enter C-state and no SMM mode etc required to enter C-state.
Overall this will mean better C-state support.

One major advantage of using MWAIT for all C-states is, with this and
"treat interrupt as break event" feature of MWAIT, we can now get accurate
timing for the time spent in C1, C2, ..  states.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Len Brown <len.brown@intel.com>
2006-10-14 00:35:39 -04:00
Geert Uytterhoeven
e0fafda36a [PATCH] m68knommu: sync syscalls with m68k
m68knommu: sync syscalls with m68k

Signed-Off-By: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-Off-By: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-13 08:35:39 -07:00
Stephen Hemminger
6569345abb [PATCH] thermal throttle: sysfs error checking
Get rid of warning in the thermal throttling code about not checking
sysfs return values.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-13 08:35:39 -07:00
James Bottomley
81c06b10bc [VOYAGER] fix up ptregs removal mess
Apparently whoever converted voyager never actually checked that the
patch would compile ...

Remove as much of the pt_regs references as possible and move the
remaining ones into line with what's in x86 generic.

Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
2006-10-12 22:25:03 -05:00
James Bottomley
c771746ef6 [VOYAGER] fix genirq mess
The implementation of genirq in x86 completely broke voyager (and
presumably visws).  Since it's plugged into so much of the x86
infrastructure, you can't expect it to work unconverted.

This patch introduces a voyager IRQ handler type and switches voyager
to the genirq infrastructure.

Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
2006-10-12 22:21:16 -05:00
Ravikiran Thirumalai
734c4c6739 [PATCH] Fix build breakage with CONFIG_X86_VSMP
Kernel build breaks with CONFIG_X86_VSMP.  Probably due to some header
file cleanups in 2.6.19-rc1.

Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-12 12:25:27 -07:00
Al Viro
78b93f2db1 [PATCH] fixing includes in alpha_ksyms.c
kernel_execve() fallout

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-12 12:25:27 -07:00
Linus Torvalds
9eb2007488 Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: SH-4A UBC support
  sh: interrupt exception handling rework
  sh: Default enable R7780RP IRQs.
  sh: Zero-out coherent buffer in consistent_alloc().
  sh: Convert IPR-IRQ to IRQ chip.
  sh: Convert INTC2 IRQ handler to irq_chip.
  sh: Fix pr_debug statements for sh4
  sh: Convert r7780rp IRQ handler to IRQ chip.
  sh: Updates for IRQ handler changes.
  sh: Kill off timer_ops get_frequency().
  sh: First step at generic timeofday support.
2006-10-12 08:33:23 -07:00
Linus Torvalds
83d3d3c524 Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
  [SPARC32]: Fix sparc32 modpost warnings.
  [SPARC32]: Fix sparc32 modpost warnings with sunzilog
  [SPARC32]: Mark srmmu_nocache_init as __init.
  [SPARC32]: pcic.c needs asm/irq_regs.h
2006-10-12 07:37:59 -07:00
Eric W. Biederman
994bd4f9f5 [PATCH] x86_64 irq: Properly update vector_irq
This patch fixes my one line thinko where I was clearing
the vector_irq entries on the wrong cpus.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-12 07:37:30 -07:00
Martin Habets
ab5da288ce [SPARC32]: Fix sparc32 modpost warnings.
Fix these 2.6.19-rc1 build warnings from modpost:

WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'core_kernel_text' (at offset 0x3e060) and '__kernel_text_address'
WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'core_kernel_text' (at offset 0x3e064) and '__kernel_text_address'
WARNING: vmlinux - Section mismatch: reference to .init.text:_einittext from .text between 'core_kernel_text' (at offset 0x3e07c) and '__kernel_text_address'
WARNING: vmlinux - Section mismatch: reference to .init.text:_einittext from .text between 'core_kernel_text' (at offset 0x3e080) and '__kernel_text_address'
WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'is_ksym_addr' (at offset 0x4b3a4) and 'kallsyms_expand_symbol'
WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'is_ksym_addr' (at offset 0x4b3a8) and 'kallsyms_expand_symbol'
WARNING: vmlinux - Section mismatch: reference to .init.text:_einittext from .text between 'is_ksym_addr' (at offset 0x4b3b4) and 'kallsyms_expand_symbol'
WARNING: vmlinux - Section mismatch: reference to .init.text:_einittext from .text between 'is_ksym_addr' (at offset 0x4b3e4) and 'kallsyms_expand_symbol'
WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'get_symbol_pos' (at offset 0x4b640) and 'kallsyms_lookup_size_offset'
WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'get_symbol_pos' (at offset 0x4b644) and 'kallsyms_lookup_size_offset'
WARNING: vmlinux - Section mismatch: reference to .init.text:_einittext from .text between 'get_symbol_pos' (at offset 0x4b654) and 'kallsyms_lookup_size_offset'
WARNING: vmlinux - Section mismatch: reference to .init.text:_einittext from .text between 'get_symbol_pos' (at offset 0x4b658) and 'kallsyms_lookup_size_offset'
WARNING: vmlinux - Section mismatch: reference to .init.text:_sinittext from .text between 'get_symbol_pos' (at offset 0x4b68c) and 'kallsyms_lookup_size_offset'

The crux of the matter is that modpost only checks the relocatable
sections. i386 vmlinux has none, so modpost does no checking on it (it
does on the modules).  However, sparc vmlinux has plenty of
relocatable sections because it is being built with 'ld -r' (to allow
for btfixup processing).  So for sparc, modpost does do a lot of
checking. Sure enough, running modpost on arch/sparc/boot/image yields
no output (i.e. all is well).

modpost.c check_sec_ref() has:
                /* We want to process only relocation sections and not .init */
                if (sechdrs[i].sh_type == SHT_RELA) {
			// check here
                } else if (sechdrs[i].sh_type == SHT_REL) {
			// check here
		}

Signed-off-by: Martin Habets <errandir_news@mph.eclipse.co.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-10-11 23:56:54 -07:00
Martin Habets
eba8cefc78 [SPARC32]: Fix sparc32 modpost warnings with sunzilog
Fix this 2.6.19-rc1 build warnings from modpost:

WARNING: vmlinux - Section mismatch: reference to .init.text:sunzilog_console_setup from .data between 'sunzilog_console' (at offset 0x8394) and 'devices_subsys'

Signed-off-by: Martin Habets <errandir_news@mph.eclipse.co.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-10-11 23:56:53 -07:00
Martin Habets
e3096de34c [SPARC32]: Mark srmmu_nocache_init as __init.
Fix these 2.6.19-rc1 build warnings from modpost:

WARNING: vmlinux - Section mismatch: reference to .init.text:__alloc_bootmem from .text between 'srmmu_nocache_init' (at offset 0x1a0f8) and 'srmmu_mmu_info'
WARNING: vmlinux - Section mismatch: reference to .init.text:__alloc_bootmem from .text between 'srmmu_nocache_init' (at offset 0x1a118) and 'srmmu_mmu_info'
WARNING: vmlinux - Section mismatch: reference to .init.text:srmmu_early_allocate_ptable_skeleton from .text between 'srmmu_nocache_init' (at offset 0x1a188) and 'srmmu_mmu_info'

Signed-off-by: Martin Habets <errandir_news@mph.eclipse.co.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-10-11 23:56:52 -07:00
David S. Miller
c2baeb0526 [SPARC32]: pcic.c needs asm/irq_regs.h
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-10-11 23:56:51 -07:00
Ryusuke Sakato
8ae91b9ad8 sh: SH-4A UBC support
A simple patch to enable the UBC on SH-4A.

Signed-off-by: Ryusuke Sakato <sakato@hsdv.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-12 12:16:13 +09:00
Paul Mundt
baf4326e49 sh: interrupt exception handling rework
Kill off interrupt_table for all of the CPU subtypes, we now
default in to stepping in to do_IRQ() for _all_ IRQ exceptions
and counting the spurious ones, rather than simply flipping on
the ones we cared about. This and enabling the IRQ by default
automatically has already uncovered a couple of bugs and IRQs
that weren't being caught, as well as some that are being
generated far too often (SCI Tx Data Empty, for example).

The general rationale is to use a marker for interrupt exceptions,
test for it in the handle_exception() path, and skip out to
do_IRQ() if it's found. Everything else follows the same behaviour
of finding the cached EXPEVT value in r2/r2_bank, we just rip out
the INTEVT read from entry.S entirely (except for in the kGDB NMI
case, which is another matter).

Note that while this changes the do_IRQ() semantics regarding r4
handling, they were fundamentally broken anyways (relying entirely
on r2_bank for the cached code). With this, we do the INTEVT read
from do_IRQ() itself (in the CONFIG_CPU_HAS_INTEVT case), or fall
back on r4 for the muxed IRQ number, which should also be closer
to what SH-2 and SH-2A want anyways.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-12 12:03:04 +09:00
Paul Mundt
8884c4cb8b sh: Default enable R7780RP IRQs.
Now that we've started accounting for spurious IRQs, change the
logic somewhat so that we have a better chance of catching them.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-12 11:56:31 +09:00
Linus Torvalds
c25d518044 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Pass NULL not 0 for pointer value.
  [MIPS] IP27: Make declaration of setup_replication_mask a proper prototype.
  [MIPS] BigSur: More useful defconfig.
  [MIPS] Cleanup definitions of speed_t and tcflag_t.
  [MIPS] Fix compilation warnings in arch/mips/sibyte/bcm1480/smp.c
  [MIPS] Optimize and cleanup get_saved_sp, set_saved_sp
  [MIPS] <asm/irq.h> does not need pt_regs anymore.
  [MIPS] Workaround for bug in gcc -EB / -EL options.
  [MIPS] Fix timer setup for Jazz
2006-10-11 15:30:14 -07:00
Ralf Baechle
9a244b95dd [MIPS] Pass NULL not 0 for pointer value.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-11 19:31:00 +01:00