Commit Graph

29345 Commits

Author SHA1 Message Date
Tomi Valkeinen
9f2906b790 ARM: OMAP: Pandora: use new display drivers
Use new display drivers for OMAP3 Pandora board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:21 +03:00
Tomi Valkeinen
eb11d29e97 ARM: OMAP: OMAP3EVM: use new display drivers
Use new display drivers for OMAP3EVM board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:21 +03:00
Tomi Valkeinen
7a2950ccd6 ARM: OMAP: 3430SDP: use new display drivers
Use new display drivers for 3430SDP board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:21 +03:00
Tomi Valkeinen
6970c01e46 ARM: OMAP: H4: use new display drivers
Use new display drivers for H4 board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:21 +03:00
Tomi Valkeinen
fe0cf7d9f8 ARM: OMAP: cm-t35: use new display drivers
Use new display drivers for cm-t35 board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:21 +03:00
Tomi Valkeinen
5508642379 ARM: OMAP: igep0020: use new display drivers
Use new display drivers for igep0020 board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:21 +03:00
Tomi Valkeinen
07eb40bdac ARM: OMAP: omap3stalker: use new display drivers
Use new display drivers for OMAP3 Stalker board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:20 +03:00
Tomi Valkeinen
f23248d4b7 ARM: OMAP: LDP: use new display drivers
Use new display drivers for LDP board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:20 +03:00
Tomi Valkeinen
09bc6ff2d7 ARM: OMAP: 2430SDP: use new display drivers
Use new display drivers for 2430SDP board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:20 +03:00
Tomi Valkeinen
c78fb21dec ARM: OMAP: devkit8000: use new display drivers
Use new display drivers for devkit8000 board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:20 +03:00
Tomi Valkeinen
5302556cd4 ARM: OMAP: beagle: use new display drivers
Use the new display drivers for Beagleboard.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:20 +03:00
Tomi Valkeinen
2320dc6f9c ARM: OMAP: rx51: use new display drivers
Use the new display drivers for RX51 board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:19 +03:00
Tomi Valkeinen
45a279c5ae ARM: OMAP: overo: use new display drivers
Use the new display drivers for OMAP3 Overo board.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Note that the LCD add-on boards for lcd43 and lcd35 use the same GPIOs
for the panels. This means that both panel devices cannot be probed at
the same time.

DT will handle this correctly, i.e. the DT data will contain the panel
device only for the add-on board that is attached. However, for the
board file we need a hackish solution: We parse the kernel boot command
line, and see whether lcd43 or lcd35 is set as a default display, and
add the given one. Or, if neither is given, default to lcd43.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:19 +03:00
Tomi Valkeinen
20d31345bd ARM: OMAP: 4430SDP: remove picodlp device data
4430SDP board has an option for a PicoDLP mini-projector. PicoDLP cannot
be used at the same time as the second LCD, and there are GPIOs that
need to be set/unset when changing the used display.

Managing that kind of board specific setup is not simple without board
file callbacks. As only some 4430SDP boards actually have the PicoDLP
installed, and 4430SDP boards are not that common in the first place,
let's remove PicoDLP data from the board file.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:19 +03:00
Tomi Valkeinen
7346582dd1 ARM: OMAP: dss-common: use new display drivers
Use the new display drivers for OMAP4 Panda and OMAP4 SDP boards.

The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:19 +03:00
Tomi Valkeinen
488e352b2b ARM: OMAP2+: Add selected display drivers to omap2plus_defconfig
Add some of the most common new display drivers to omap2plus_defconfig
to be built as modules.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:19 +03:00
Tomi Valkeinen
d14b97397a ARM: OMAP2+: Remove legacy DSS initialization for omap4
This is no longer needed as omap4 is now booted using device tree.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2013-08-28 10:23:18 +03:00
Stephen Boyd
bfaddb7d13 msm_serial: Switch clock consumer strings and simplify code
In downstream kernel we've standardized the clock consumer names
that MSM device drivers use. Replace the uart specific clock
names in this driver with the more standard 'core' and 'iface'
names. Also simplify the code by assuming that clk_prepare_enable
and clk_disable_unprepare() will properly check for NULL pointers
(it will because MSM uses the common clock framework).

Cc: David Brown <davidb@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-27 16:22:58 -07:00
Sebastian Andrzej Siewior
2ae847a1b1 usb: musb: am335x: add second port to beagle bone
So I assumed that Beagle bone has only one USB port in host mode because
the micro USB connector had an USB-UART there. I was wrong a little. The
second port runs on host mode, but the micro USB plug is connected to an
internal HUB with two ports: one to the USB-UART and one to musb
instance one.
For that reason, this patch enables both ports: the primary in device
mode only and the second in host mode only.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-27 14:18:44 -05:00
Sebastian Andrzej Siewior
781f179830 usb: musb: am335x-evm: Do not remove the session bit HOST-only mode
This is what I observe:
On the first connect, the musb starts with DEVCTL.Session set. On
disconnect, musb_core calls try_idle. That functions removes the Session
bit signalizing that the session is over (something that only in OTG is
required). A new device, that is plugged, is no longer recognized.
I've setup a timer and checked the DEVCTL register and I haven't seen a
change in VBus and I saw the B-Device bit set. After setting the IDDIG
into A mode and forcing the device to behave like a A device, I didn't
see a change.
Neither VBUS goes to 0b11 nor does a session start request comes.
In the TI-v3.2 kernel they skip to call musb_platform_try_idle() in the
OTG_STATE_A_WAIT_BCON state while not in OTG mode.
Since the second port hast a standard A plug the patch changes the port
to run in host mode only and skips the timer which would remove
DEVCTL.Session so we can reconnect to another device later.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-27 14:18:41 -05:00
Sebastian Andrzej Siewior
c031a7d419 usb: usb: dsps: update code according to the binding document
This relfects the code and dts requires changes due to recent .dts
binding updates:
- use mg prefix for the Metor Graphics specific attributes
- use power in mA not in mA/2 as specifed in the USB2.0 specification
- remove the child node for USB. This is driver specific on won't be
  reflected in the device tree
- use the "mentor" prefix instead of "mg".
- use "dr_mode" istead of "mg,port-mode" for the port mode. The former
  is used by a few other drivers.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-27 14:18:32 -05:00
Sebastian Andrzej Siewior
3b6394b4fa usb: musb: dsps fix the typo in reg-names of the dma node
I forgot to separete the different names in the reg-names property. This
didn't cause anything to fail because the driver does not use the names
and simply relies on the order of the memory offsets in reg.
This patch fixes this in case it is used later.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-27 14:18:17 -05:00
Amit Daniel Kachhap
1e9fec0e40 ARM: EXYNOS: Skip C1 cpuidle state for exynos5440
This patch skips the deep C1(AFTR -Arm off top running) state for
exynos5440 SoC as this soc does not support this state. The cpu's
only allows the basic C0 state.
The C1 state is filtered by re-initialising the driver state_count
value to 1.

Suggested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-08-28 00:51:21 +09:00
Bartlomiej Zolnierkiewicz
08e594fc12 ARM: EXYNOS: always enable PM domains support for EXYNOS4X12
Currently PM domains support will be enabled for EXYNOS4X12 SoCs
only if EXYNOS4210 SoC or EXYNOS5250 SoC support is also enabled.

Fix it by explicitly selecting PM domains support (if PM support
is enabled) by SOC_EXYNOS4212 and SOC_EXYNOS4412 config options.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-08-28 00:48:15 +09:00
Rob Herring
e7dc079608 ARM: highbank: clean-up some unused includes
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-27 07:51:43 -05:00
Marek Szyprowski
10bcdfb8ba ARM: init: add support for reserved memory defined by device tree
Enable reserved memory initialization from device tree.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
2013-08-27 10:53:45 +02:00
Marek Szyprowski
a254738039 drivers: dma-contiguous: clean source code and prepare for device tree
This patch cleans the initialization of dma contiguous framework. The
all-in-one dma_declare_contiguous() function is now separated into
dma_contiguous_reserve_area() which only steals the the memory from
memblock allocator and dma_contiguous_add_device() function, which
assigns given device to the specified reserved memory area. This improves
the flexibility in defining contiguous memory areas and assigning device
to them, because now it is possible to assign more than one device to
the given contiguous memory area. Such split in initialization procedure
is also required for upcoming device tree support.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
2013-08-27 09:18:29 +02:00
Rafael J. Wysocki
7a330a5416 Merge branch 'pm-cpufreq'
* pm-cpufreq: (60 commits)
  cpufreq: pmac32-cpufreq: remove device tree parsing for cpu nodes
  cpufreq: pmac64-cpufreq: remove device tree parsing for cpu nodes
  cpufreq: maple-cpufreq: remove device tree parsing for cpu nodes
  cpufreq: arm_big_little: remove device tree parsing for cpu nodes
  cpufreq: kirkwood-cpufreq: remove device tree parsing for cpu nodes
  cpufreq: spear-cpufreq: remove device tree parsing for cpu nodes
  cpufreq: highbank-cpufreq: remove device tree parsing for cpu nodes
  cpufreq: cpufreq-cpu0: remove device tree parsing for cpu nodes
  cpufreq: imx6q-cpufreq: remove device tree parsing for cpu nodes
  drivers/bus: arm-cci: avoid parsing DT for cpu device nodes
  ARM: mvebu: remove device tree parsing for cpu nodes
  ARM: topology: remove hwid/MPIDR dependency from cpu_capacity
  of/device: add helper to get cpu device node from logical cpu index
  driver/core: cpu: initialize of_node in cpu's device struture
  ARM: DT/kernel: define ARM specific arch_match_cpu_phys_id
  of: move of_get_cpu_node implementation to DT core library
  powerpc: refactor of_get_cpu_node to support other architectures
  openrisc: remove undefined of_get_cpu_node declaration
  microblaze: remove undefined of_get_cpu_node declaration
  cpufreq: fix bad unlock balance on !CONFIG_SMP
  ...
2013-08-27 01:44:40 +02:00
Rafael J. Wysocki
c7878810f2 Merge branch 'pm-cpuidle'
* pm-cpuidle: (25 commits)
  cpuidle: Change struct menu_device field types
  cpuidle: Add a comment warning about possible overflow
  cpuidle: Fix variable domains in get_typical_interval()
  cpuidle: Fix menu_device->intervals type
  cpuidle: CodingStyle: Break up multiple assignments on single line
  cpuidle: Check called function parameter in get_typical_interval()
  cpuidle: Rearrange code and comments in get_typical_interval()
  cpuidle: Ignore interval prediction result when timer is shorter
  cpuidle-kirkwood.c: simplify use of devm_ioremap_resource()
  cpuidle: kirkwood: Make kirkwood_cpuidle_remove function static
  cpuidle: calxeda: Add missing __iomem annotation
  SH: cpuidle: Add missing parameter for cpuidle_register()
  ARM: ux500: cpuidle: Move ux500 cpuidle driver to drivers/cpuidle
  ARM: ux500: cpuidle: Remove pointless include
  ARM: ux500: cpuidle: Instantiate the driver from platform device
  ARM: davinci: cpuidle: Fix target residency
  cpuidle: Add Kconfig.arm and move calxeda, kirkwood and zynq
  cpuidle: Check if device is already registered
  cpuidle: Introduce __cpuidle_device_init()
  cpuidle: Introduce __cpuidle_unregister_device()
  ...
2013-08-27 01:42:55 +02:00
Bjorn Helgaas
1193725f54 Merge branch 'pci/yinghai-assign-unassigned-v6' into next
* pci/yinghai-assign-unassigned-v6:
  PCI: Assign resources for hot-added host bridge more aggressively
  PCI: Move resource reallocation code to non-__init
  PCI: Delay enabling bridges until they're needed
  PCI: Assign resources on a per-bus basis
  PCI: Enable unassigned resource reallocation on per-bus basis
  PCI: Turn on reallocation for unassigned resources with host bridge offset
  PCI: Look for unassigned resources on per-bus basis
  PCI: Drop temporary variable in pci_assign_unassigned_resources()
2013-08-26 15:40:03 -06:00
David S. Miller
b05930f5d1 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
	drivers/net/wireless/iwlwifi/pcie/trans.c
	include/linux/inetdevice.h

The inetdevice.h conflict involves moving the IPV4_DEVCONF values
into a UAPI header, overlapping additions of some new entries.

The iwlwifi conflict is a context overlap.

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-26 16:37:08 -04:00
Boris BREZILLON
8c038e7e14 ARM: at91/dt: define phy available on sama5d3 mother board
This patch describe the phy used on atmel sama5d3 mother board:
 - phy address
 - phy interrupt pin

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-26 16:02:27 -04:00
Sascha Hauer
0429936697 ARM: i.MX: remove sdma script address arrays from platform data
Now that the sdma driver holds the address tables for i.MX25/5 they
are no longer needed in platform_data. Remove them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-26 20:47:16 +05:30
Maxime Ripard
de7dc93555 ARM: sun7i: Enable the A20 clocks in the DTSI
Now that the clock driver knows about the available clocks found on the
A20, we can build up the clock tree from the device tree.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-26 10:51:19 +02:00
Maxime Ripard
98096560eb ARM: sun6i: Enable clock support in the DTSI
Now that the clock driver has support for the A31 clocks, we can add
them to the DTSI and start using them in the relevant hardware blocks.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-26 10:51:18 +02:00
Maxime Ripard
29bb805475 ARM: sun5i: dt: Use the A10s gates in the DTSI
The A10s has only a subset of the A10 gates. Now that the clock driver
has support for this gates set, switch to it in the DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
2013-08-26 10:51:18 +02:00
Jean-Christophe PLAGNIOL-VILLARD
746831d5a1 ARM: at91: at91_dt_defconfig: enable rm9200 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-26 09:58:29 +02:00
Linus Torvalds
1b4757ee6f Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "This round of fixes is smaller than previous: a couple more updates
  for the security fixes, and a one-liner kexec fix"

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7816/1: CONFIG_KUSER_HELPERS: fix help text
  ARM: 7815/1: kexec: offline non panic CPUs on Kdump panic
  ARM: 7819/1: fiq: Cast the first argument of flush_icache_range()
2013-08-25 12:41:37 -07:00
Naveen Krishna Chatradhi
f408f9db7d ARM: dts: add ADC device tree node for exynos5420/5250
Add ADC device tree node for exynos5420 and exynos5250

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-08-26 02:44:30 +09:00
Vikas Sajjan
a81951d965 ARM: dts: Add RTC DT node to Exynos5420 SoC
Adds RTC DT node to Exynos5420 SoC

Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-08-26 02:28:31 +09:00
Vikas Sajjan
73784475fe ARM: dts: Update the "status" property of RTC DT node for Exynos5250 SoC
Moves the RTC DT node's "status" property from exynos5250 board
(arndale & snow) dts files to exynos5250.dtsi, since the bindings
in exynos5250.dtsi depicts the RTC h/w completely.

Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-08-26 02:28:05 +09:00
Vikas Sajjan
24b44d24dc ARM: dts: Fix the RTC DT node name for Exynos5250
Fixes the RTC DT node name for Exynos5250 as per the DT node naming
convention.

Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-08-26 02:28:05 +09:00
Stephen Warren
ae3c99a26c ARM: 7806/1: allow DEBUG_UNCOMPRESS for Tegra
DEBUG_UNCOMPRESS was previously disallowed for Tegra due to tegra.S's
use of global data that was not linked into the decompressor. Solve this
by declaring this symbol in tegra.S when it is being built into the
decompressor. For the kernel proper, leave the declaration in
mach-tegra/common.c as explained in the comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:13:41 +01:00
Hartley Sweeten
d2c215aac5 ARM: 7793/1: debug: use generic option for ep93xx PL10x debug port
The generic option DEBUG_LL_UART_PL01X is now used to select the UART
type for the kernel low-level debugging on the ep93xx platform. This
enables two config options to provide the physical and virtual base
address of the debug UART.

Use the generic options instead of providing platform specific options
to select the debug UART.

UART1 is selected with:  DEBUG_UART_PHYS = 0x808c0000
                         DEBUG_UART_VIRT = 0xfedc0000

UART2 is selected with:  DEBUG_UART_PHYS = 0x808d0000
                         DEBUG_UART_VIRT = 0xfedd0000

UART3 is selected with:  DEBUG_UART_PHYS = 0x808e0000
                         DEBUG_UART_VIRT = 0xfede0000

The selected UART must already be initialized by the bootloader. If it
isn't setup nothing will appear (which might be desired).

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:12 +01:00
Russell King
0dc0e475c5 ARM: debug: move SPEAr debug to generic PL01x code
The SPEAr debug code is a copy of the PL01x debugging code, so rather
than have this pointless code duplication, lets just use the standard
implementation instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:11 +01:00
Russell King
97bd1a48ad ARM: debug: move davinci debug to generic 8250 code
Davinci's debugging is just a copy of the old 8250_32 code with a
different base address.  Incorporate this into the generic 8250
debug code.

Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:10 +01:00
Russell King
f2acf003cd ARM: debug: move keystone debug to generic 8250 code
Keystone's debugging is just a copy of the old 8250_32 code with a
different base address.  Incorporate this into the generic 8250
debug code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:09 +01:00
Russell King
9916688337 ARM: debug: remove DEBUG_ROCKCHIP_UART
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:08 +01:00
Russell King
f8f1279ce0 ARM: debug: provide generic option choices for 8250 and PL01x ports
Provide generic option choices for 8250 and PL01x UART ports; these can
now be selected by UART type rather than asking about the platform.
This means that a kernel configuration user can manually choose the
various parameters of the debug UART without resorting to the platform
having to encode the possible settings.

These two generic options are preferred over further debug entries for
these ports; the existing options which refer back to the 8250 and PL01x
ports are now considered deprecated.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:07 +01:00
Russell King
4e218b9928 ARM: debug: move PL01X debug include into arch/arm/include/debug/
Now that the PL01X debug include can mostly stand alone without
requiring platforms to provide any macros, move it into the debug
directory so it can be directly included.  This allows us to get rid of
a lot of debug-macros include files.

The autodetect case for Versatile Express and the ux500 are left alone;
these are more complicated implementations.

Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:06 +01:00
Russell King
5c972af407 ARM: debug: provide PL01x debug uart phys/virt address configuration options
Move the definition of the UART register addresses out of the platform
specific header files into the Kconfig files.

Acked-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:05 +01:00
Russell King
0b4cccbec6 ARM: debug: add support for word accesses to debug/8250.S
Add 32-bit word access support to debug/8250.S and convert Picoxcell
and SoCFPGA to this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:03 +01:00
Russell King
2facbc8873 ARM: debug: move 8250 debug include into arch/arm/include/debug/
Now that the 8250 debug include can stand alone without requiring
platforms to provide any macros, move it into the debug directory
so it can be directly included.  This allows us to get rid of a lot
of debug-macros include files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:02 +01:00
Russell King
c3faa9b757 ARM: debug: provide 8250 debug uart phys/virt address configuration options
Move the definition of the UART register addresses out of the platform
specific header file into the Kconfig files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:01 +01:00
Russell King
4a00364736 ARM: debug: provide 8250 debug uart register shift configuration option
Move the definition of the UART register shift out of the platform
specific header file into the Kconfig files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:11:00 +01:00
Russell King
7610b607b0 ARM: debug: provide 8250 debug uart flow control configuration option
Move the definition out of the machine class debug-macro.S header
into the Kconfig files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:10:59 +01:00
Russell King
cce278d203 ARM: debug: clean up low level kernel debugging selection
It is silly to bury UART selection under multiple levels of choice
statements, where the top level choice statement will only list
about four entries when a single SoC is selected.  Move the UART
selection up into the top level choice statement as it was always
intended to be.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:10:57 +01:00
Russell King
730cc26fd4 ARM: debug: fix wording error in DEBUG_LL_UART_NONE option help
The DEBUG_LL_UART_NONE option was moved from the top of the list to
the bottom - unfortunately, it still referred to the options "below"
rather than "above".

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:10:56 +01:00
Ard Biesheuvel
09096f6a0e ARM: 7822/1: add workaround for ambiguous C99 stdint.h types
The C99 types uintXX_t that are usually defined in 'stdint.h' are not as
unambiguous on ARM as you would expect. For the types below, there is a
difference on ARM between GCC built for bare metal ARM, GCC built for glibc
and the kernel itself, which results in build errors if you try to build with
-ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h'
in order to use NEON intrinsics)

As the typedefs for these types in 'stdint.h' are based on builtin defines
supplied by GCC, we can tweak these to align with the kernel's idea of those
types, so 'linux/types.h' and 'stdint.h' can be safely included from the same
source file (provided that -ffreestanding is used).

                   int32_t         uint32_t               uintptr_t
bare metal GCC     long            unsigned long          unsigned int
glibc GCC          int             unsigned int           unsigned int
kernel             int             unsigned int           unsigned long

Acked by: Dave Martin <dave.martin@arm.com>

Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-08-25 17:09:46 +01:00
Vladimir Barinov
e0c332c671 [media] ARM: shmobile: Marzen: enable VIN and ADV7180 in defconfig
Add the VIN and ADV7180 drivers to 'marzen_defconfig'.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2013-08-25 07:34:52 -03:00
Vladimir Barinov
7cef5e7fd1 [media] ARM: shmobile: Marzen: add VIN and ADV7180 support
Add ADV7180 platform devices on the Marzen board, configure VIN1/3 pins, and
register VIN1/3 devices with the ADV7180 specific platform data.
[Sergei: removed superfluous tabulation and inserted empty lines in the  macro
definition, updated the copyrights, annotated VIN platform data as '__initdata']

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2013-08-25 07:34:13 -03:00
Vladimir Barinov
4714a0255e [media] ARM: shmobile: r8a7779: add VIN support
Add VIN clocks and platform devices for R8A7779 SoC; add function to register
the VIN platform devices.
[Sergei: added 'id' parameter check to r8a7779_add_vin_device(), used '*pdata'
in *sizeof* operator there, renamed some variables, annotated vin[0-3]_resources
[] and 'vin[0-3]_info' as '__initdata'.]

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2013-08-25 07:33:29 -03:00
Laurent Pinchart
2a4f6b1daf ARM: ep93xx: vision_ep9307: Use MMC CD and RO GPIO
Pass the CD and RO GPIO numbers to the MMC SPI driver and remove the
custom .get_cd() and .get_ro() callback functions.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
2013-08-24 23:45:26 -04:00
Haojian Zhuang
0f102b6cce ARM: mmp: avoid to include head file in mach-mmp
pxa910_set_wake() & mmp2_set_wake() are both declared in head files
of arch/arm/mach-mmp/include/mach directory. If we include these
head files in irq-mmp driver, it blocks the multiplatform build.
So adjust the code.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-08-24 17:44:45 +08:00
Haojian Zhuang
0f374561b5 irqchip: mmp: support irqchip
Support IRQCHIP & CONFIG_MULTI_IRQ_HANDLER in irq-mmp driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Reviewed-by: Daniel Drake <dsd@laptop.org>
2013-08-24 17:42:09 +08:00
Haojian Zhuang
c052d13c08 irqchip: move mmp irq driver
Move irq-mmp driver from mach-mmp directory into irqchip directory.
It's used to support multiple platform.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-08-24 17:39:02 +08:00
Vladimir Barinov
a3fbba0e39 [media] ARM: shmobile: BOCK-W: enable VIN and ML86V7667 in defconfig
Add the VIN and ML86V7667 drivers to 'bockw_defconfig'.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2013-08-24 04:58:39 -03:00
Vladimir Barinov
9c43952d0f [media] ARM: shmobile: BOCK-W: add VIN and ML86V7667 support
Add ML86V7667 platform devices on BOCK-W board, configure VIN0/1 pins, and
register VIN0/1 devices with the ML86V7667 specific platform data.
[Sergei: some macro/comment cleanup; updated the copyrights, removed duplicate
'sh_eth' driver being enabled before registering VIN1 due to a pin conflict,
removed superfluous semicolon after iclink[01]_ml86v7667' initializer.]

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2013-08-24 04:58:38 -03:00
Vladimir Barinov
803c2df217 [media] ARM: shmobile: r8a7778: add VIN support
Add VIN clocks and platform devices on R8A7778 SoC; add function to register
the VIN platform devices.
[Sergei: added 'id' parameter check to r8a7778_add_vin_device(), used '*pdata'
in *sizeof* operator, and added an empty line there; renamed some variables,
annotated 'vin[01]_info' and vin[01]_resources[] as '__initdata'.]

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
2013-08-24 04:58:32 -03:00
Kevin Hilman
d519049cb1 It contains mxs soc changes for 3.12.
- Run savedefconfig on mxs_defconfig to clean it up
 - Fix on mxs_restart() routine for interrupt context calling
 - A few other random updates and cleanups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJSEIhdAAoJEFBXWFqHsHzObxIH/01oTAU3W66NS6sS587KFlqD
 x9SBjFuPqskU41+JumSHD/bi+N969jO4sEBSDg0VG5yM5GM7r0QAlsucNsyrSMqb
 k+Kt2K/dGAVTmvUuHZoT+dgwzPdwRD1Vr1ROpxHFEt9JKhZ6wUR3tTuLEYMmIf9a
 hGweLqQO3Xtv1jCuFvaqsGsxbnkE9fP9LLreaMnd4/bDnsIYgCgKt1hd5hOFawzx
 zvjXC3c0HqSAuB6fISRVPMII640MgNFp3s+UWB8ImMtiL7sdGTwIPq+/viSlgG5C
 iWuaYRgbqqbUZyOn6epEZI304pYy0d7eo6J7wcnnNhGwdrUqyaCV7hLMrs7v9S0=
 =JFhU
 -----END PGP SIGNATURE-----

Merge tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:

It contains mxs soc changes for 3.12.

- Run savedefconfig on mxs_defconfig to clean it up
- Fix on mxs_restart() routine for interrupt context calling
- A few other random updates and cleanups

* tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mxs: pm: Include "pm.h"
  ARM: mxs: Simplify detection of CrystalFontz boards
  ARM: mach-mxs: Remove "TO" string from revision field
  ARM: mxs: Fix BUG() when invoking mxs_restart() from interrupt context
  ARM: mxs: Allow DT clock providers
  ARM: mxs_defconfig: Cleanup mxs_defconfig
2013-08-23 12:06:16 -07:00
Kevin Hilman
334b0f0913 It contains the imx device tree updates for 3.12.
- New pinctrl entry additions for various peripherals
 - Devices enabling for imx6, imx5 and imx27 boards
 - Add missing device nodes like iim, owire, audmux and sram, etc.
 - Various updates on boards like phytec, wandboard and sabresd
 - Consolidate pad macros between imx6q and imx6dl
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJSFjFkAAoJEFBXWFqHsHzOjkcH/3c2IqXrZ/1GAQ8r4fkN1D7h
 eOOiQ8hZriBxgbw72xeYAHTeMx3xZphW9n+fLHjrtqJNDI4yz/XWn2mdf55fFanm
 jQb6bssbRHG4VgHaMuEjzKK4zQDrlSZgcVkOT2Aj0y+Mg7L21xUh9zRW3p2xh33x
 Cg1NDLzFDChQBK/IIA0sHVOtmgn7lflfwlBbR2zvSHE4U4HNheqMCuxb3gB3aWXZ
 VdxDbzQUukIwHrNlTTIV2CN2UOXfUi1Xgk7Xd/PvfAyywWpQnr7KMl9RdK4pxGo9
 6G+Y984sh92jf43cF3uSCWN3+Y1bEQwmfQThoJCDV7sATG6yqblyo2X/cmUwK/c=
 =llVa
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:

It contains the imx device tree updates for 3.12.

- New pinctrl entry additions for various peripherals
- Devices enabling for imx6, imx5 and imx27 boards
- Add missing device nodes like iim, owire, audmux and sram, etc.
- Various updates on boards like phytec, wandboard and sabresd
- Consolidate pad macros between imx6q and imx6dl

* tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits)
  ARM: dts: vf610-twr: enable i2c0 device
  ARM: dts: i.MX51: Add one more I2C2 pinmux entry
  ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
  ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
  ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
  ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
  ARM: dts: i.MX27: Disable AUDMUX in the template
  ARM: dts: wandboard: Add support for SDIO bcm4329
  ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
  ARM: dts: imx53-qsb: Make USBH1 functional
  ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
  ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
  ARM: dts: imx6qdl-sabresd: Add touchscreen support
  ARM: imx: add ocram clock for imx53
  ARM: dts: imx: ocram size is different between imx6q and imx6dl
  ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
  ARM: dts: i.MX27: Remove clock name from CPU node
  ARM: dts: i.MX27: Increase "clock-latency" value
  ARM: dts: i.MX27: Add label to CPU node
  ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-23 11:58:18 -07:00
Paul Walmsley
4514b4d7fc Merge branches 'hwmod_devel_v3.12', 'prcm_devel_v3.12' and 'am33xx_devel_v3.12' into prcm_a_for_v3.12 2013-08-23 12:49:48 -06:00
Kevin Hilman
579673ee1a It contains a bunch of imx soc updates for 3.12.
- Add more ethernet phy fixups for imx6 boards
 - Add some missing imx6q clocks into clock driver
 - Add new clock types fixup mux and div to work around some ugly
   hardware defect
 - Consolidate L2 cache initialization function, so that it can be used
   on more i.MX SoCs
 - Replace magic numbers in mach-imx6q.c with well defined macros
 - Small fixes for imx6q and pllv3 clock drivers
 - Some random updates on imx defconfig files
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJSFi1LAAoJEFBXWFqHsHzOpdgIAKegIwrpKKLnTQI7AunLSi5N
 gOhaR4gu0BcsPejFeqCUh5Hs1zun8+MLoc/ZUtg8CQ7PkpkWSHYFOwfefldG0fLC
 9Xt4SsiVNiOEsYRwtoDdEw5JGykSO0htoPOKJ0q+kIuko8mBeAm8r3J2PldF8XxX
 FnHPndXnt6XYuDTOIjyfMtqDfZYAzT1ClZE1dgm7xnsXexT6fT9hdNyrqZidf4Fq
 sWGxgFc3vQVUCJoO8kGQrlFcrH1BbHH0QtrzvMOvdqBmQw2HFdGS52RC83mymeyi
 gcF3edsYF/fxWUoL1omV7K93TakBA5LWDHmCvDUn626fnbinYr+EIhRPomBEC1Y=
 =wgVh
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:

It contains a bunch of imx soc updates for 3.12.

- Add more ethernet phy fixups for imx6 boards
- Add some missing imx6q clocks into clock driver
- Add new clock types fixup mux and div to work around some ugly
  hardware defect
- Consolidate L2 cache initialization function, so that it can be used
  on more i.MX SoCs
- Replace magic numbers in mach-imx6q.c with well defined macros
- Small fixes for imx6q and pllv3 clock drivers
- Some random updates on imx defconfig files

* tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (33 commits)
  phy: micrel: Add definitions for common Micrel PHY registers
  ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option
  ARM: imx: Move anatop related from board file to anatop driver
  ARM: imx_v6_v7_defconfig: Enable wireless support
  ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig
  ARM: imx_v6_v7_defconfig: Add SATA support
  ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig
  ARM: mx53: Allow suspend/resume
  ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level
  ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX
  ARM: imx6q: add vdoa gate clock
  ARM: imx6q: add the missing cko output selection
  ARM: imx6q: add cko2 clocks
  ARM: imx6q: add spdif gate clock
  ARM: imx: clk-pllv3: improve the timeout waiting method
  ARM: imx6: change some clocks to fixup clocks
  ARM: imx: add common clock support for fixup mux
  ARM: imx: add common clock support for fixup div
  ARM: imx: Select MIGHT_HAVE_CACHE_L2X0
  ARM: imx: fix imx_init_l2cache storage class
  ...
2013-08-23 11:38:51 -07:00
Lokesh Vutla
b84a76ae73 ARM: OMAP: AM33xx: clock: Add RNG clock data
Add clock data for RNG module on AM33xx SoC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 12:38:07 -06:00
Aida Mynzhasova
0f0dd08932 ARM: OMAP: TI81XX: add always-on powerdomain for TI81XX
This patch adds alwon powerdomain support for TI81XX, which is required
for stable functioning of a big number of TI81XX subsystems.

Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:48:42 -06:00
Rajendra Nayak
eeb6603fdd ARM: OMAP4: clock: Lock PLLs in the right sequence
On OMAP4 we have clk_set_rate()s being done for a few
DPLL clock nodes, as part of the clock init code, since
the bootloaders no longer locks these DPLLs.

So we have a clk_set_rate() done for a ABE DPLL node (which
inturn locks it) followed by a clk_set_rate() for the USB DPLL.

With USB DPLL being in bypass, we have this parent->child
relationship thats formed while the clocks get registered.

dpll_abe_ck
    |
    V
dpll_abe_x2_ck
    |
    V
dpll_abe_m3x2_ck
    |
    V
usb_hs_clk_div_ck
    |
    V
dpll_usb_ck

This is because usb_hs_clk_div_ck is bypass clock for dpll_usb_ck.

So with this parent->child relationship in place, a clk_set_rate()
on ABE DPLL results eventually in a clk_set_rate() call on USB DPLL,
because CCF does a clk_change_rate() (as part of clk_set_rate()) on
all downstream clocks resulting from a rate change on the top clock.

So its important that we lock USB DPLL before we lock ABE DPLL.
Without which we see these error logs at boot.
[These error logs will not be seen if using a bootloader that locks
USB DPLL]

[    0.000000] clock: dpll_usb_ck failed transition to 'locked'
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7
[    0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14)
[    0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114)
[    0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8)
[    0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8)
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7
[    0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14)
[    0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114)
[    0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8)
[    0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8)
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7
[    0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14)
[    0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114)
[    0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8)
[    0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8)
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7
[    0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14)
[    0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114)
[    0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8)
[    0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8)
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7
[    0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14)
[    0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114)
[    0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8)
[    0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8)
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7
[    0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14)
[    0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114)
[    0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8)
[    0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8)
[    0.000000] clock: trace_clk_div_ck: could not find divisor for target rate 0 for parent pmd_trace_clk_mux_ck
[    0.000000] Division by zero in kernel.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:48:42 -06:00
Vaibhav Hiremath
1721c70235 ARM: OMAP: AM33XX: hwmod: Add hwmod data for debugSS
In the original hwmod data file, DebugSS entry was disabled,
since we didn't (and do not) have SW to control it.

This patch enables it back with right data, so that it can be
controlled by different ways; and the suggested method it to
have modular driver for debugSS as well.

Refer to the link for more discussion on handling of debugSS -
https://patchwork.kernel.org/patch/2212111/

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:44:09 -06:00
Jon Hunter
127500ccb7 ARM: OMAP2+: Only write the sysconfig on idle when necessary
Currently, whenever we idle a device _idle_sysc() is called and writes to the
devices SYSCONFIG register to set the idle mode. A lot devices are using the
smart-idle mode and so the write to the SYSCONFIG register is programming the
same value that is already stored in the register.

Writes to the devices SYSCONFIG register can be slow, for example, writing to
the DMTIMER SYSCONFIG register takes 3 interface clock cycles and 3 functional
clock cycles. If the DMTIMER is using the slow 32kHz functional clock this can
take ~100us.

Furthermore, during boot on an OMAP4430 panda board, I see that there are 100
calls to _idle_sysc(), however, only 3 out of the 100 calls actually write
the SYSCONFIG register with a new value.

Therefore, to avoid unnecessary writes to device SYSCONFIG registers when
idling the device, only write the value if the value has changed. It should be
safe to do this on idle as the context of the register will never be lost while
the device is active.

Verified that suspend, CORE off and retention states are working with this
change on OMAP3430 Beagle board.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:40:23 -06:00
Ambresh K
7de516a63c ARM: OMAP: DRA7: Enable PM framework initializations
Initialise powerdomains, clockdomains, and hwmod frameworks.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:29:37 -06:00
Ambresh K
90020c7b2c ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC data
Adding the hwmod data for DRA7XX platforms.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:29:13 -06:00
Rajendra Nayak
1d597b07b6 ARM: OMAP: DRA7: Reuse the omap44xx_restart and fix the device instance
The omap44xx_restart used on omap4 and omap5 devices can be reused
on dra7 devices as well. The device instance however is different
across omap5 and dra7 as compared to omap4. So fix this for omap5
as well as dra7.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00
Rajendra Nayak
9a4e301d0c ARM: OMAP: DRA7: powerdomain: Handle missing vc/vp
DRA7 belongs to the omap4plus devices which reuse the omap4_pwrdm_operations
ops for powerdomain control. DRA7 however has no VC/VP while all the
earlier omap4plus devices did.

So use the .pwrdm_has_voltdm() ops to pass this info on to the core.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00
Ambresh K
97dd16b190 ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update header
Add the data file to describe all power domains inside the DRA7XX SoC.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: added generation notation to comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00
Ambresh K
11fadcfab9 ARM: OMAP: DRA7: clockdomain: Add DRA7XX data and update header
Add the data file to describe all clock domains inside the DRA7XX SoC

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: added generation notation to comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00
Ambresh K
a61ef470ea ARM: OMAP: DRA7: PRCM: Add DRA7XX local MPU PRCM regsiters
Add the PRCM MPU registers for DRA7XX platforms

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: added generation notation to comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00
Rajendra Nayak
4f92bab41b ARM: OMAP: DRA7: CM: Add minimal regbit shifts
This header contains minimal regbits that are currently used in code.
This header has traditionally been autogenerated on OMAP4+ devices but
the autogenerated contents are largely (95%) unused and hence to reduce
unsued data in the kernel this header has been cut down (from the autogen
output) to whatever is currently needed. This is done by running a cleanup
script on top of the existing autogen script.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
[paul@pwsan.com: added generation notation in the comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00
Ambresh K
40ca609158 ARM: OMAP: DRA7: CM: Add DRA7XX register defines
Add the new defines for DRA7XX CM registers.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: added generation notation in comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:24:15 -06:00
Ambresh K
da6f388b9d ARM: OMAP: DRA7: PRM: Add DRA7XX register definitions
Add the new defines for DRA7xx prm module registers.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: added generation notation in the comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:04:23 -06:00
Qipan Li
031b8ce01b pinctrl: sirf: add lost atlas6 uart0-no-stream-control pingroup
the old codes defined uart0_nostreamctrl_pins, but missed pingroup
and padmux definition for it. this patch fixes it.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23 08:56:27 +02:00
Josh Wu
afa6a2a726 ARM: at91/dt: sama5d3xek: reduce the ROM code mapping for pmecc lookup table
Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-08-23 14:47:22 +08:00
Josh Wu
8ae599ef58 ARM: at91/dt: sama5d3xek: Enable NFC support in dts
Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-08-23 14:47:21 +08:00
Josh Wu
adc9afb658 ARM: at91/dt: sama5d3xek: remove the useless NFC dt parameters
The NFC driver code doesn't use atmel,has-nfc and atmel,use-nfc-sram.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-08-23 14:46:38 +08:00
Rob Herring
a56a5cf1f2 ARM: highbank: avoid L2 cache smc calls when PL310 is not present
While Midway firmware handles L2 smc calls as nops, the custom smc calls
present a problem when running virtualized Midway guest. They aren't
needed so just avoid calling them.

In the process, cleanup the L2X0 ifdefs and use IS_ENABLED instead.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-22 20:48:42 -05:00
Rob Herring
0b53c11d53 ARM: move outer_cache declaration out of ifdef
Move the outer_cache declaration of the CONFIG_OUTER_CACHE ifdef so that
outer_cache can be used inside IS_ENABLED condition.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
2013-08-22 20:48:41 -05:00
Rob Herring
62b4d60519 ARM: highbank: select ARCH_DMA_ADDR_T_64BIT for LPAE
ECX-2000 has some 64-bit capable DMA and therefore needs dma_addr_t
to be a 64-bit size.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-22 20:48:40 -05:00
Geert Uytterhoeven
bf2206957c Kconfig: Remove hotplug enable hints in CONFIG_KEXEC help texts
commit 40b313608a ("Finally eradicate
CONFIG_HOTPLUG") removed remaining references to CONFIG_HOTPLUG, but missed
a few plain English references in the CONFIG_KEXEC help texts.

Remove them, too.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-22 12:35:01 -07:00
Kevin Hilman
0703150224 DaVinci DT updates for v3.12
----------------------------
 
 This set of patches add ethernet DT nodes
 for DA850 and also remove now unneeded
 specification of UART clock frequency so
 kernel can now boot irrespective of what
 the bootloader setting of UART frequency is.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.10 (GNU/Linux)
 
 iQIcBAABAgAGBQJSFRjpAAoJEGFBu2jqvgRN0n8P/iHP7wG0dp1O4JOgGYWQoSN7
 SXT+cCnwzQoSzuuhHH40ZfGPz+UMiBuvzC77U8gwj77ZMCj0a3thBpTU4MuZKSG3
 ePJL+9571FUH6erAybeCvwAew/3lFYbXcnatRDCyZ6drGv3be02uaYqAtYe6xXdJ
 lO7rS903M/8eIXzlVVwMNr4zC+//EfbpfGtRyibpemN2rwO1EtPYM/Hr7GKjnxRm
 AJ/Z0ODk0Atc/ThSWPzifjEaYnlVh+5VEioVk3HESWTBzWxx0JP+yzK0iWkzRb6g
 rnpFPWTz4doKlqO2nUIFFeqL+nrNGzLD8a/TEncvMQP3seFo/rrqf/5mM4M9zxkB
 rHAA8MHHHElqSsMOvJLBZ81eUhDVj0SnIihZmzKgJF/EzF+My9c4/BQfwSfbogdw
 RaN3/vbdjWenlqWW19tvMqrWiPsHecsolc6kUpRknJhpfk/f5pJjCEGBiWdHHTYh
 qX9yjtwXvxQR2jM/UOTZIIR+En9thWffzeJSo6p9rEr+bPuK+N2U05t8O/KsLom1
 i7FvMFQA5Jg3vHfMZo6gSMgPzFrsPm7yxECllwXbuBs2xYTAXgzSXwttqsGgH8pE
 iUyAGnHgi5ke2b9qTsy5iyWO/1VDFLaY+ohoR7AVKx126wQAkCx4XNz/7yl2YArZ
 10dBn4oxPi+6Zcwk9gbT
 =7jwl
 -----END PGP SIGNATURE-----

Merge tag 'davinci-for-v3.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

From Sekhar Nori:

DaVinci DT updates for v3.12
----------------------------

This set of patches add ethernet DT nodes
for DA850 and also remove now unneeded
specification of UART clock frequency so
kernel can now boot irrespective of what
the bootloader setting of UART frequency is.

* tag 'davinci-for-v3.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da850: do not specify clock_frequency for UART DT node
  ARM: davinci: da850: add DT node for ethernet
  ARM: davinci: da850: add OF_DEV_AUXDATA entry for davinci_emac
  ARM: davinci: da850: add OF_DEV_AUXDATA entry for mdio.
  ARM: davinci: da850: add DT node for mdio device

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22 12:07:33 -07:00
Kevin Hilman
cee7e8bbd6 DaVinci SoC updates for v3.12
-----------------------------
 
 This set of SoC updates contains changes to the
 way UART clock is handled to enabled DT-boot to
 obtain UART clock frequency instead of relying
 on DT-binding being supplied. Similarly handling
 of MDIO clock is fixed to make it easier to support
 MDIO in DT-boot. Finally there is patch to remove
 now unnecessary setting of wake-up capable flag for
 RTC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.10 (GNU/Linux)
 
 iQIcBAABAgAGBQJSFRb7AAoJEGFBu2jqvgRNEqMP/A60R4Zuj5sW7WAnAqySMTzH
 nPFwkuDTelDP1s2TdXgHHN7X6IeIiG0LjH0s/qdoYQbFA9FIoZFxBJ10G/P7hXWe
 R6mFLQFFP/EpdHelw5EGDnsxCrG+7GG68taACqxKdw+gz7FgbLjfpBveCf0+cGD2
 otpLBHa8ohqDwsWj+uxLm4rJaZhZMHZRUsp/omXnRxBLIO8IX1f80P31pM4wx1Mq
 7V2oUs7cv2jMGb/kQ6+bRRKCcLNVBbJ2hRh7fFQ+WWt1nhwURljkNfuw4S31a20t
 IBF4ODVL+LBW3qLiikWcCTZAfHlFUzVAh9LV64ECsJQO+9p/GZYWNAYG6/ylylAU
 W3vpppeuDTEj5/UqVcp71uR4D0wD5L0sD8bYvP4sAoHZ+0peEJxs5oek1SAQ+QiF
 1q+YbTJjWcvQsBEQpw9bXC/oc/fFwpY0TaUHX4GTFfTOV0yueOUnv9wQJQ6WUvfW
 3FjVLLZFFrA0Cgbuk0P6alIED4shzX92vUdnuVGoydeBdBtYCYjAoTend1hGNVzk
 GR1gJUK2lPGSAAytxIkWRIe7zKYRZYfHQAQ0TriWt93JGVdEXASP5d1qI2m+a2Gb
 qWaFlfMVDzaKh35XfquwDE7nL6tHo8Pn9ft1avjeqTStb6ep/DzAg1EEfPtN3Ms3
 X8660xNwOKSYgpJrYRIS
 =e6I8
 -----END PGP SIGNATURE-----

Merge tag 'davinci-for-v3.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

From Sekhar Nori:

DaVinci SoC updates for v3.12
-----------------------------

This set of SoC updates contains changes to the
way UART clock is handled to enabled DT-boot to
obtain UART clock frequency instead of relying
on DT-binding being supplied. Similarly handling
of MDIO clock is fixed to make it easier to support
MDIO in DT-boot. Finally there is patch to remove
now unnecessary setting of wake-up capable flag for
RTC.

* tag 'davinci-for-v3.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: fix clock lookup for mdio device
  ARM: davinci: da8xx: remove hard coding of rtc device wakeup
  ARM: davinci: serial: remove davinci_serial_setup_clk()
  ARM: davinci: serial: get rid of davinci_uart_config
  ARM: davinci: da8xx: remove da8xx_uart_clk_enable
  ARM: davinci: uart: move to devid based clk_get

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22 11:46:36 -07:00
Kevin Hilman
a52552b517 More DT work on AT91:
- sound support for at91sam9x5 family
 - at91sam9n12: touch button, i2c and gpio-keys
 - adding missing pinctrl-names to MCI on at91rm9200 and at91sam9260/9g20
 - adding ARM Performance Monitor Unit (PMU) on sama5d3
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJSFNWxAAoJEAf03oE53VmQRHQH/Rh/nMykzGwgOX71gHW1SPkc
 ShM7Pu5OdCXeQc0wdLlWcxyPyynhCxgLaO+GPEzDeVVw18SArMX+yqceiUSk521L
 rOqIxtjCgJE9BTjdOfz2Xs9O0KdUxHuCH2sodoFlOppxN8HYBXCXwryjrqOXtImF
 svFICn9yC3MvJppyYRfp4pmMZpjB2Ay2nqYnf/Uf59mzwGlHrMSdEC1HtpKGlCI1
 DnVeF16TEoBeT0GL1tpv3G9vKxS13jxRuuMeIOcNfHxfINNfIlZO1EXibUpbS5Ed
 pUZ+BlBLmz9xooilpSmJ7VSh1AcviixI5z2EcniVXcH7ajWsU4ZOuhf+YyqBmZY=
 =gOB4
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt

From Nicolas Ferre:
More DT work on AT91:
- sound support for at91sam9x5 family
- at91sam9n12: touch button, i2c and gpio-keys
- adding missing pinctrl-names to MCI on at91rm9200 and at91sam9260/9g20
- adding ARM Performance Monitor Unit (PMU) on sama5d3

* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: sam9x5ek: add sound configuration
  ARM: at91/dt: sam9x5ek: enable SSC
  ARM: at91/dt: sam9x5ek: add WM8731 codec
  ARM: at91/dt: sam9x5: add SSC DMA parameters
  ARM: at91/dt: add at91rm9200 PQFP package version
  ARM: at91: at91rm9200: set default mmc0 pinctrl-names
  ARM: at91: at91sam9n12: correct pin number of gpio-key
  ARM: at91: at91sam9n12: add qt1070 support
  ARM: at91: at91sam9n12: add pinctrl of TWI
  ARM: at91: Add PMU support for sama5d3
  ARM: at91: at91sam9260: add missing pinctrl-names on mmc

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22 11:33:32 -07:00
Linus Torvalds
1f8b76656b ARM: SoC fixes for 3.11-rc
A handful of fixes for 3.11 are still trickling in. These are:
 - A couple of fixes for older OMAP platforms
 - Another few fixes for at91 (lateish due to European summer vacations)
 - A late-found problem with USB on Tegra, fix is to keep VBUS regulator
   on at all times
 - One fix for Exynos 5440 dealing with CPU detection
 - One MAINTAINERS update
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSFbbrAAoJEIwa5zzehBx3J3EP/3iaagsR0S9Ya8V+11tquVMQ
 5S6xF7BQddJRiM1wVwkApDXHCVEiNfKs2AAh6aFQTZhHF+2hXFY80afFSCon52tx
 same+gTJw5qsuxrDfFTfBwuyv/cAqGnfAx+EV8nHDPk3vcC62xfLbLemvBWFu+sz
 jXwhmbGmqxOffHiAAaXEbz01YYq1BQeRvm9dTXStJGmcyUomG+73DV8CSs2gKUEU
 vC7MRj1yYDRtuwkEKdHN3IDfyWpwzgYi5iS1nL1OI0MP+6Jt2dLa+j7uALXKV+f/
 R3KOkJRXBQ1W+kCd0DbiyORd9sGOM1rzHPYQF0XqtgdoYGzcQ/2B53OlFaoPBkvs
 Y+Z+B3OZZChLeZRy520x5hi5NkdVq3kcH377rND+w01ss4KFfttjb9Y0rpJ6kqaG
 L61ElFF6TGiU5WVU079gR+zVGNKhG4hZrtPvkyfHA9wN7KX5lin0BUuvX7hmFu3o
 bcF5TkcT30hIGSsvwa+DAsAsyirehuClu3QK0Val9OpZJ01Z8h/amFAjVXz/Y6N9
 xQokQ1LsttwBG/rkniahEy00Vda2sE9PXlPzopHclytq5JyiUs6zdR7nUHhyTXIM
 xpvnxV1CrGZGoNr3J9yzdKiGuw6q7kbjsOR7vwY9nH+BniFpG8YDm418UrhsN3cp
 IRo0ZDIIXlcZCyKrRl5F
 =NVob
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A handful of fixes for 3.11 are still trickling in.  These are:
   - A couple of fixes for older OMAP platforms
   - Another few fixes for at91 (lateish due to European summer
     vacations)
   - A late-found problem with USB on Tegra, fix is to keep VBUS
     regulator on at all times
   - One fix for Exynos 5440 dealing with CPU detection
   - One MAINTAINERS update"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: tegra: always enable USB VBUS regulators
  ARM: davinci: nand: specify ecc strength
  ARM: OMAP: rx51: change musb mode to OTG
  ARM: OMAP2: fix musb usage for n8x0
  MAINTAINERS: Update email address for Benoit Cousson
  ARM: at91/DT: fix at91sam9n12ek memory node
  ARM: at91: add missing uart clocks DT entries
  ARM: SAMSUNG: fix to support for missing cpu specific map_io
  ARM: at91/DT: at91sam9x5ek: fix USB host property to enable port C
2013-08-22 10:44:44 -07:00
Kevin Hilman
1ee64e48fa Core ux500 changes for v3.12:
- Add support for restart using the PRCMU
 - Move secondary startup out of INIT section
 - set coherent_dma_mask for DMA40
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQIcBAABAgAGBQJSEoUjAAoJEEEQszewGV1zDvQP/2wdMMY4Y89SgJEbik3laGTY
 WYe2rDXaXomsmALRyyhjbfIa4qhEr70ij9pXw+aEisGVDxUmDPrUKcsUwIfASofQ
 NWjnVDhRdfUPeIfXhMfCMJebuUqqggV/rpY3zsy+4ktBbsYDjqUTcCwWxmGDW/TM
 HyJ6jx9Ifc24M8yW9r+4EheOb6rhKLOtx08QsPwf0S3mh2JoiHr5RM7XV8ng+LPS
 3IcFAxLeNbPu7kgW9mwWaZuQ0G0SPFAT5oxzLJlfKbV94caz85UctP62seHlPdia
 0iZnYj/s5cxj/hYGeRpLr8P55QPdZjgtNtx2+gm9raVxXeeB8PXdVZH8RLn65LQ6
 dy0Fwl9kwL04r3CneUgWcAC9W1GkoBTXlWCrhwYTAHB6ir9TDnbWGoaQTBUYWPJN
 rhPYKstCJqcqL1/OKTiPxSqypPJEeFSR9iyHqjCqVBgCVEZqa/rQ32BIIt/+HHoe
 SoYWS0S4C5oQXcTKvtde3Fs7Zc4MPmF7QjgNaQm71uPtjrSPiiw/He+hTZCHZ2v8
 Z/daPM2kwMIyc7ltTdn9wJNSUnFNc8V/e94L0NYcUDzkTTZz8U5VdOqfcfJJO6aX
 DoOfroUzC9PTO2+QuuzzA6a3z6l79Ykaw8ggm8Mw/jUQn0JDhJ79SNpJbqqTL1a6
 lhz/zV3FFJTGH7cLFyrI
 =Yjww
 -----END PGP SIGNATURE-----

Merge tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc

From Linus Walleij:
Core ux500 changes for v3.12:
- Add support for restart using the PRCMU
- Move secondary startup out of INIT section
- set coherent_dma_mask for DMA40

* tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: set coherent_dma_mask for dma40
  ARM: ux500: remove u8500_secondary_startup from INIT section.
  ARM: ux500: add restart support via prcmu
2013-08-22 09:21:52 -07:00
Kevin Hilman
7ae0cebc58 Enables the standard Nomadik I2C driver for use
on the original Nomadik instead of using a bit-banged
 driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQIcBAABAgAGBQJSEeneAAoJEEEQszewGV1zNPcQAJCmBeQ6xmz5yD149f8EMsM/
 9nI2/cDPpGfP4V/KoJREY45K4v4tsUlZsT28PksdIQHFw+ZjowIzIQQ6AeHrFKpl
 AV1gTkQyXV/Lee4wSh0f7ELbA01+HAbz1P1komdGzHQU9maOtq43bwxlp+iVmxHs
 J7GyF5saFKL124utoY8lhYll9rlTALZT6rV3pv5GnHrDBg8fGqLopzhmAlXkFf6i
 pwwFYEMAUMcv431xEVa7eGAXCccNSIjrulRuJc0bnphMOyOHYTGKyv0dujdq8yQA
 uwkn4eGLS0f+MCBgw3RamtZDl0lH5Rj5LsWk3ZIS23AmEpAnxAMA2/uxG207bHgV
 jAbfgXTp/K7LfA0HfINJZZ1e2RhCpNReNR1ylcaHnlsVTGZJmEgtXauVE76nSRME
 SBV2GPgMsZzU8Wm2K7OFaoxsT5ytL0gxxpOilyKvawxlDv6nSGrtyqYpUYIcWNCL
 zW5/DuWwFGZc7IXmizSBArFhg67BLveO2qDsUrNI+4aQrNIvvaNDiUazAv6CCXAr
 bN9xZ0IpdNKl8nKvuqAEBwrDoYNLNdLY7gaI8aBd5kacrWj0/LzukP+zVG6WqNIb
 bM5oT/O7a4CJO7zZL5bVEnePg5GLPkz3+qGTRuWuaEJ8HW4BBrwlOR4TjocezRt6
 y2c+ThrIWwTX1tq4Kv6W
 =jQFd
 -----END PGP SIGNATURE-----

Merge tag 'nomadik-i2c-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

From Linus Walleij:
Enables the standard Nomadik I2C driver for use
on the original Nomadik instead of using a bit-banged
driver.

* tag 'nomadik-i2c-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: switch to use the Nomadik I2C driver

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22 09:14:26 -07:00
Jingchang Lu
d45393cd32 ARM: dts: vf610-twr: enable i2c0 device
enable i2c0 device on Vybrid VF610 Tower Board

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:30:05 +08:00
Alexander Shiyan
10ed76d706 ARM: dts: i.MX51: Add one more I2C2 pinmux entry
This adds one more I2C2 alternate pinmux entry.
GPIO1_2 <=> SCL
GPIO1_3 <=> SDA

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:30:04 +08:00
Alexander Shiyan
3587814229 ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
This unmix module/pin definitions and reduce indentation for pin
groups, so makes template a bit cleaner.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:30:02 +08:00
Peter Chen
e3c68c864d ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
USB OTG vbus pin needs to be configured as gpio function at
sabresd board.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:30:00 +08:00
Peter Chen
015fa46d80 ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
We enabled USB host 1, so host 1's vbus should be on to let
host 1 work.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:59 +08:00
Alexander Shiyan
a919c69c59 ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
Patch adds AUDMUX routing for Phytec PCM-038 module.
This route i.MX SSI0 (Port 1) to the slave port 4 where MC13783
codec interface is connected.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:57 +08:00
Alexander Shiyan
1c04ab0f0f ARM: dts: i.MX27: Disable AUDMUX in the template
AUDMUX expects additional parameters to be configured correctly,
so turn it off into a template.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:55 +08:00
Tony Prisk
a338be9ad7 ARM: dts: wandboard: Add support for SDIO bcm4329
The wandboard has a Broadcom 4329 WiFi connected via SDIO. This patch
sets the required pins to enable the wifi module.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:54 +08:00
Alexander Shiyan
677e28b1cc ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
External high frequency clock CKIH1 is optional for i.MX51, so move
it setup into boards where it is used.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:53 +08:00
Fabio Estevam
c574fa93af ARM: dts: imx53-qsb: Make USBH1 functional
mx53qsb uses GPIO7_8 to turn on VBUS, so add support for it.

Also specify the PHY type in the device tree.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:51 +08:00
Philipp Zabel
1e44d3f880 ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
This patch enables I2C1 and adds device tree nodes for the EEPROM and the
DA9063 PMIC connected to this I2C bus.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:50 +08:00
Philipp Zabel
9273ee3528 ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:48 +08:00
Fabio Estevam
38501179c9 ARM: dts: imx6qdl-sabresd: Add touchscreen support
mx6 sabresd boards have a egalax touchscreen controller connected via I2C3.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:47 +08:00
Shawn Guo
ea257a0328 ARM: imx: add ocram clock for imx53
Add missing ocram gate clock for imx53 and also represent it in device
tree ocram node.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:46 +08:00
Shawn Guo
951ebf58bf ARM: dts: imx: ocram size is different between imx6q and imx6dl
The ocram on imx6q is 256 KiB while on imx6dl it's 128 KiB.  Let's
have separate node for imx6q and imx6dl.  It also changes imx6q size
0x3f000 to 0x40000 to match the hardware.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Liu Ying <Ying.Liu@freescale.com>
2013-08-22 23:29:44 +08:00
Alexander Shiyan
e9c1786681 ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
Outputs regulator SW1A and SW1A, SW2A and SW2B are connected together,
so it determined as "joined" operation for MC13783. Separate work of
these outputs in this case would be wrong, so we define only one of
the outputs.
Additionally, define the full range of voltages for the CPU (1.2v - 1.52v).

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:43 +08:00
Alexander Shiyan
2885e48ca0 ARM: dts: i.MX27: Remove clock name from CPU node
Clock name is not needed for "cpufreq-cpu0".

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:41 +08:00
Alexander Shiyan
8defcb5376 ARM: dts: i.MX27: Increase "clock-latency" value
i.MX27 CPU can be clocked with a 32 kHz quartz, and not just 32768 Hz,
so increase "clock-latency" value, which will ensure that we use two
clock cycles on frequency change.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:40 +08:00
Alexander Shiyan
48568be649 ARM: dts: i.MX27: Add label to CPU node
Add a label to i.MX27 CPU node. This change allows the reuse this node
in the upper levels of the DTS.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:39 +08:00
Alexander Shiyan
c0b357c042 ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC
Patch removes optional "ptp" clock source for FEC. This clock is
missing in i.MX27.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:38 +08:00
Alexander Shiyan
3c0e2a227e ARM: dts: i.MX27: Using "wdog_ipg_gate" clock source for watchdog
Patch replaces "dummy" clock source for watchdog with "wdog_ipg_gate".

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:36 +08:00
Fabio Estevam
6c30640dc2 ARM: dts: imx6qdl-sabresd: Allow buttons to wake-up the system
This is useful for testing suspend/resume sequence.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:35 +08:00
Shawn Guo
a94f8ecb2f ARM: imx6q: remove board specific CLKO setup
The CLKO is widely used by imx6q board designs to clock audio codec.
Since most codecs accept 24 MHz frequency, let's initially set up CLKO
with OSC24M (cko <-- cko2 <-- osc).  Then those board specific CLKO
setup for audio codec can be removed.

The board dts files also need an update on cko reference in codec node.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:34 +08:00
Shawn Guo
5da826abe9 ARM: dts: imx: use generic DMA bindings for SSI nodes
Updates SSI nodes to adopt generic DMA bindings.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:32 +08:00
Shawn Guo
b7fb7105b2 ARM: dts: imx: add LVDS panel for imx6qdl-sabresd
Add HannStar HSD100PXN1 XGA panel support on LVDS1 port of
imx6qdl-sabresd board.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:31 +08:00
Fabio Estevam
213a8404c4 ARM: dts: imx6q-wandboard: Add sata support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:30 +08:00
Fabio Estevam
2688a32f98 ARM: dts: imx6: Add support for imx6q wandboard
Add support for the imx6q wanboard variant.

Since imx6q/dl are pin to pin compatible, introduce the imx6qdl-wandboard.dtsi
file that contains the common peripheral nodes.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:28 +08:00
Shawn Guo
3fe6373b42 ARM: dts: imx: add tempmon node for imx6q thermal support
Mark ocotp as a syscon node and add tempmon for imx6q thermal support.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:27 +08:00
Shawn Guo
c7aa12a62c ARM: dts: imx: remove old DMA binding data from gpmi node
After mxs-dma driver adopts generic DMA device tree binding, gpmi
channel interrupt number is defined in DMA controller node, and
channel ID is listed in "dmas" property.  So the DMA channel interrupt
number in gpmi node "interrupts" property and fsl,gpmi-dma-channel which
are used by old customized DMA binding can be removed now.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2013-08-22 23:29:26 +08:00
Richard Zhu
0fb1f80426 ARM: dtsi: enable ahci sata on imx6q platforms
Only imx6q has the ahci sata controller, enable
it on imx6q platforms.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:25 +08:00
Alexander Shiyan
98a3e804de ARM: dts: imx27: Add core voltages
This patch adds core voltages for i.MX27 CPUs. Only 266 and 400 MHz modes
is documented in the datasheet, so we add a 266 MHz frequency for conform this.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:23 +08:00
Alexander Shiyan
edd052865d ARM: dts: i.MX51: Add WEIM node
This patch adds the missing (Wireless External Interface Module) WEIM
devicetree node for i.MX51 CPUs.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:22 +08:00
Fabio Estevam
4debd068a5 ARM: dts: imx6dl-wandboard: Add support for UART3
Wandboard has a bluetooth device connected to UART3, so add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:21 +08:00
Fabio Estevam
c3cb6b6b1a ARM: dts: imx6dl-wandboard: Add SDHC1 and SDHC2 ports
Wandboard has a SD card slot on the baseboard connected to SDHC1 and a
BCM4329 (Wifi + Bluetooth chip) connected to SDHC2.

Add support for these ports.

While at it, provide the card detect gpio on SDHC3 and also fix indentation on
MX6QDL_PAD_GPIO_0__CCM_CLKO1 hog pin.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:20 +08:00
Fabio Estevam
5ff88341cf ARM: dts: imx6qdl.dtsi: Add another uart3 pin group
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:18 +08:00
Fabio Estevam
26c3b65da4 ARM: dts: imx6qdl.dtsi: Add usdhc1 pin groups
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:17 +08:00
Huang Shijie
72a5cebfa1 ARM: dts: imx6qdl/imx6sl: add the dma property for uart
Add the dma property for all the uart.

Note: Add the dma property does not mean we enable the dma for this
uart.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:16 +08:00
Matthias Weisser
c770f7c020 ARM: dts: imx25: Make lcdc compatible to imx21 fb
Make lcdc compatible to imx21 fb.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:15 +08:00
Huang Shijie
c2797984ea ARM: dts: imx6qdl: add a new pinctrl for uart3
Add the a new pinctrl for uart3. In the imx6q{dl}-sabreauto boards,
the uart3 is used for Bluetooth.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:13 +08:00
Shawn Guo
b72ce929d2 ARM: dts: add more imx6q/dl pin groups
Add more imx6q/dl pin groups for those supported boards, e.g. sabresd,
sabreauto, arm2.

IPU2 pin groups are added into imx6q.dtsi, since the block is only
available on imx6q.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:12 +08:00
Shawn Guo
c56009b2f6 ARM: dts: imx: share pad macro names between imx6q and imx6dl
The imx6q and imx6dl are two pin-to-pin compatible SoCs.  The same board
design can work with either chip plugged into the socket, e.g. sabresd
and sabreauto boards.

We currently define pin groups in imx6q.dtsi and imx6dl.dtsi
respectively because the pad macro names are different between two
chips.  This brings a maintenance burden on having the same label point
to the same pin group defined in two places.

The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs
pad macro names.  Then the pin groups becomes completely common between
imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the
long term maintenance of imx6q/dt pin settings becomes easier.

Unfortunately, the change brings some dramatic diff stat, but it's all
about DTS file, and the ultimate net diff stat is good.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:11 +08:00
Huang Shijie
51056d9cff ARM: dts: enable the uart2 for imx6q-arm2
enable the uart2 for imx6q-arm2 board.
The uart2 works in the DTE mode, with the RTS/CTS and DMA enabled.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:09 +08:00
Huang Shijie
a0bffd0cac ARM: dts: imx6q{dl}: add a DTE uart pinctrl for uart2
In the arm2 board, the UART2 works in the dte mode.
So add a pinctrl for both the imx6q{dl} boards.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:08 +08:00
Huang Shijie
0b7a76aaa8 ARM: dts: imx6q{dl}: add DTE pads for uart
The uart2 in the imx6q-arm2 board is used as a DTE uart,
this patch adds the necessary DTE pads for uart2.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:07 +08:00
Huang Shijie
6eb85f9196 ARM: dts: imx6sl: add "fsl,imx6q-uart" for uart compatible
In order to enable the DMA for some uart port in imx6sl, we add the
"fsl,imx6q-uart" to the uart's compatible property.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:06 +08:00
Markus Pargmann
38918b7275 ARM: dts: imx27 phyCARD-S, i2c ADC device node
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:05 +08:00
Markus Pargmann
b9d6bfaabc ARM: dts: imx27 phyCARD-S, move i2c1 and owire to rdk
Both buses are not used on the phyCARD-S module. This patch moves them
to the rdk file. Remove ioexpander.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:03 +08:00
Markus Pargmann
51a0102fd0 ARM: dts: imx27 phyCARD-S SOM remove wrong i2c sensor
This sensor was introduced in the original pca100 board file, but
phyCARD-S SOM and RDK do not have a temperature sensor.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:02 +08:00
Fabio Estevam
070bd7e491 ARM: dts: imx: Add the missing cpus node
To make it consistent with the other i.mx SoCs, let's add the cpus nodes.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:01 +08:00
Fabio Estevam
eda5fe8bd7 ARM: dts: imx6dl-wandboard: Add audio support
Wandboard has a sgtl5000 codec.

Add audio support.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:29:00 +08:00
Markus Pargmann
be89e1a0bf ARM: dts: imx27 phyCARD-S remove wrong I2C RTC
Fixup of commit "ARM: dts: Add device tree support for phycard pca100".

Remove wrong I2C RTC node.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:58 +08:00
Alexander Shiyan
f0d8e3f186 ARM: dts: imx27-phytec-phycore-som: Using labels for reusing UART, I2C and FEC
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:57 +08:00
Alexander Shiyan
52303d136c ARM: dts: imx27-phytec-phycore-rdk: Add CAN node
This patch adds CAN (NXP SJA1000) node for Phytec PCM-970 RDK.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:56 +08:00
Alexander Shiyan
cff2a71365 ARM: dts: imx27-phytec-phycore-som: Add SRAM node
This patch adds SRAM node for Phytec PCM-038 module.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:55 +08:00
Alexander Shiyan
984d6fc313 ARM: dts: imx27-phytec-phycore-som: Add WEIM node
This patch adds WEIM node for Phytec PCM-038 module.
Migrate existing on-module NOR-flash as children of WEIM CS0.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:54 +08:00
Alexander Shiyan
0912f59474 ARM: dts: i.MX27: Add WEIM node
This patch adds the missing (Wireless External Interface Module) WEIM
devicetree node for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:53 +08:00
Alexander Shiyan
d36afcd408 ARM: dts: i.MX27: Move IIM node under AIPI2 bus
This patch moves IIM node under AIPI2 bus, since this is proper
location for this module.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:51 +08:00
Huang Shijie
fb72bb2148 ARM: dts: imx: add #dma-cells property for sdma
Add the #dma-cells property for all the sdma in all the imx platforms.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:50 +08:00
Philipp Zabel
964c847a42 ARM i.MX6DL: dts: add clock and mux configuration for LDB
i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect
either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
[shawn.guo: remove "crtcs" property from imx6qdl.dtsi]
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:49 +08:00
Fabio Estevam
fbf970f61e ARM: dts: mx53qsb: Enable VPU support
Enable Video Processing Unit (VPU) support.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:48 +08:00
Philipp Zabel
481fbe1352 ARM: dts: add sram for imx53 and imx6q
This patch enables the On-Chip SRAM (OCRAM) on i.MX53 and i.MX6 SoCs.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:47 +08:00
Markus Pargmann
db890dad41 ARM: dts: Add device tree support for phycard pca100
Board files for Phytec phyCARD-S "System on Module" and "Rapid
Development Kit".

Based on patches from:

Steffen Trumtrar <s.trumtrar@pengutronix.de>:
 - Original patch
 - ARM: dts: Set partition offsets for phycard
 - ARM: dts: Use CSPI1 instead of CSPI2 on phycard pca100
 - ARM: imx27-phytec-phycard-S.dts: resize nand partitions

Jan Luebbe <jlu@pengutronix.de>:
 - ARM: dts: Enable bad block table in NAND

Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:46 +08:00
Markus Pargmann
dc1d0f91cb ARM: dts: imx27 cpufreq-cpu0 frequencies
Set operating-points for imx27. There is no regulator support, so the
voltages are 0. The frequencies should be the same for all imx27 boards,
so it is defined here and can be overwritten if necessary.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:45 +08:00
Markus Pargmann
6a486b7e09 ARM: dts: imx27: Add 1-wire
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:43 +08:00
Markus Pargmann
5e57b241c6 ARM: dts: imx27: Add imx framebuffer device
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:42 +08:00
Fabio Estevam
6189bc34a2 ARM: imx27: Use 'AITC' for the interrupt controller name
On the MX27 Reference Manual the interrupt controller is named AITC:
ARM926EJ-S Interrupt Controller

So use the AITC term instead of AVIC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Origin: id:1334193132-18944-2-git-send-email-festevam@gmail.com
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:41 +08:00
Sascha Hauer
aeaa951ff3 ARM: dts: i.MX51: Add USB host1/2 pinmux entries
This adds pinmux entries for USBH1/2 in ULPI mode.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:40 +08:00
Sascha Hauer
dc071436dc ARM: dts: i.MX51 babbage: Add spi-cs-high property to pmic
The mc13892 driver knows that it needs spi-cs-high, so the mc13892
will work. The dataflash also connected to this bus though can only
be probed when the mc13892 is inactive. Due to driver potential
differences in the probe order we can only make sure the mc13892
is inactive when we put the information into the devicetree.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:39 +08:00
Sascha Hauer
a903182016 ARM: dts: i.MX51: move kpp pinmux entry
For keeping the alphabetical order in the pinmux nodes.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:38 +08:00
Sascha Hauer
80fa058471 ARM: dts: i.MX6: Add i2c and spi aliases
This allows to order the i2c and spi devices correctly.
While at it reorder the aliases entries alphabetically.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:37 +08:00
Sascha Hauer
cf4e577e98 ARM: dts: i.MX53: Add i2c and spi aliases
This allows to order the i2c and spi devices correctly.
While at it reorder the aliases entries alphabetically.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:36 +08:00
Sascha Hauer
e3b73c68b1 ARM: dts: i.MX51: Add i2c and spi aliases
This allows to order the i2c and spi devices correctly.
While at it reorder the aliases entries alphabetically.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:35 +08:00
Sascha Hauer
6a3c0b39e9 ARM: dts: i.MX27: Add i2c aliases
This allows to order the i2c devices correctly.
While at it reorder the aliases entries alphabetically.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:33 +08:00
Sascha Hauer
6ed1a0e573 ARM: dts: i.MX25: Add i2c and spi aliases
This allows to order the i2c and spi devices correctly.
While at it reorder the aliases entries alphabetically.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:32 +08:00
Sascha Hauer
4f3b2a41e2 ARM: dts: i.MX53: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:31 +08:00
Sascha Hauer
6510ea25d1 ARM: dts: i.MX51: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:30 +08:00
Sascha Hauer
684f6a2320 ARM: dts: i.MX25: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:29 +08:00
Sascha Hauer
9c5d5909fc ARM: dts: i.MX31: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:28 +08:00
Sascha Hauer
a82848e0bf ARM: dts: i.MX27: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:27 +08:00
Sascha Hauer
97b108f9a4 ARM: dts: i.MX6qdl: Add i.MX31 compatible to gpt node
The i.MX6 gpt is handled by the i.MX31 gpt driver in the kernel,
so add a corresponding compatible entry.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:26 +08:00
Sascha Hauer
0f225212cc ARM: dts: i.MX6qdl: Add compatible and clock to flexcan nodes
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:25 +08:00
Sascha Hauer
f0741ce730 ARM: dts: i.MX6: sync imx6q and imx6dl pinmux entries
The i.MX6Q and i.MX6DL are pin compatible, so the pinmux entries
should be in sync. This patch systematically adds the pinmux entries
missing from the imx6q to the imx6dl file.
Some name inconsistencies and whitespace damage is fixed along the
way.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:24 +08:00
Alexander Shiyan
6c04ad2297 ARM: dts: imx27: Add kpp devicetree node
This patch adds the missing (Keypad Port) KPP devicetree node
for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:22 +08:00
Alexander Shiyan
999f681897 ARM: dts: imx27-phytec-phycore-som: Define minimal memory layout
Define minimal memory layout for i.MX27 PCM-038 module.
This will help to use appended DTB with non-DT capable bootloaders.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:21 +08:00
Alexander Shiyan
ff1450f65d ARM: dts: imx27: Sort entries by address
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:20 +08:00
Alexander Shiyan
a392d044bd ARM: dts: imx27: Rename PWM devicetree node
i.MX27 have only one PWM, so index from PWM devicetree node removed.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:19 +08:00
Alexander Shiyan
6e228e8019 ARM: dts: imx27: Add AUDMUX devicetree node
This patch adds the missing (Digital Audio MUX) AUDMUX devicetree
node for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:18 +08:00
Alexander Shiyan
e4b6a05625 ARM: dts: imx27: Add SAHARA2 devicetree node
This patch adds the missing (Symmetric/Asymmetric Hashing and Random
Accelerator) SAHARA2 devicetree node for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:17 +08:00
Philippe Reynes
a47b3bfcac ARM: apf27dev: add rtc ds1374 to the device tree
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:16 +08:00
Huang Shijie
9110ede4e0 ARM: dts: imx6qdl-sabresd: enable the SPI NOR
enable the spi nor for imx6q{dl}-sabresd boards.

Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-08-22 23:28:15 +08:00
Huang Shijie
b038a9b886 ARM: dts: imx6q: add a new pinctrl for ecspi1
This new pinctrl is used by the imx6q-sabresd board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-08-22 23:28:14 +08:00
Huang Shijie
4702ca5175 ARM: dts: imx6dl: add a new pinctrl for ecspi1
This new pinctrl is used in the imx6dl-sabresd board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-08-22 23:28:13 +08:00
Kevin Hilman
5f5cc5cd7c Samsung Exynos DT updates for v3.12
- update codec, pmic, usb hub for Arndale
 - add exynos4412-trats 2 board dt
 - update camera, spi, sensor for Trats2
 - update fimc, sensor for Trats
 - add support tmu for exynos5440
 - add support g2d for exynos5250
 - correct camera pinctrl for exynos4x12
 - add support camera subsystem for exynos4
 - add support basic pm domain, fimd, dp for exynos5420
 - add support secure-firmware for OrigenQuad
 - update mfc and add support mfc for exynos5420
 - add usb host node for exynos4
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSETfIAAoJEA0Cl+kVi2xqDigP/Awx/R1A+TGl+/wpkGybuTZJ
 ax6XCVcMNe5HpAWIlwrc5AFmpRsekTx/HmO/XqtjiexnN9d6GyPtK3vNAqPDowgZ
 wzC8iM6quRdEo/dFBuYgmomGZr/oE7Cv/GYTxmO3hjN0L7zU98fFKBNsn1D19086
 WTSYluWG12BA2aN5Ppxkyie6VNXIfHKt4eYM5K+mjjhTZ97e5Oem6xOta+0V5JL6
 vQyWfhhReLF2UfXxmYa53JoXCtJOOBDq/VMsfDj1UfAx3oEiYAybDeYj+gwckhE+
 PKu4qeHiEmh70XNlXG0/STylOdRDifw8ktZJ6bZ1zgcVSRnBKJ8hNpK77MYoVAFx
 DK+zREyQaztrBF/07gGfe6mDb0fIVGujvzfqX/5X1sJjiNvv0k/e7ptJBAmzlhhB
 8pPG2X+Hs7XVPQ2XczcV9fjeUnaqcKfj1QKRsSNzFYg7Tu42CJ9wMDE93O0UCCxR
 r8X/0bfr+7ZxTr6MumfFCwgqv+G+Eg/emVXPVLCR0niw7owFuaFlGg8XR4VibDRC
 8kQe2SOVeiq5LxVpjrZ22hujNOlw4Z6eHxu0RuHvWfhWSP9Jj2edDQVx9wzjaCJ9
 XxZjW+ZUJjl09tYHmoDXdtvDCF5cmoqmXT33VNIzXHXP2lLCwMAn2TOivrj6L7ZH
 stekwdnMYak2Cit9wIqJ
 =VMxb
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

From Kukjin Kim:
Samsung Exynos DT updates for v3.12
- update codec, pmic, usb hub for Arndale
- add exynos4412-trats 2 board dt
- update camera, spi, sensor for Trats2
- update fimc, sensor for Trats
- add support tmu for exynos5440
- add support g2d for exynos5250
- correct camera pinctrl for exynos4x12
- add support camera subsystem for exynos4
- add support basic pm domain, fimd, dp for exynos5420
- add support secure-firmware for OrigenQuad
- update mfc and add support mfc for exynos5420
- add usb host node for exynos4

* tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (38 commits)
  ARM: dts: Add USB host node for Exynos4
  ARM: dts: add audio clock controller for exynos5420
  ARM: dts: Correct the /include entry on exynos5420 dtsi file
  ARM: dts: Add MFC node for exynos 5420
  ARM: dts: Update 5250 MFC node
  ARM: dts: Remove unsused MFC clock from exynos4
  ARM: dts: Update clocks entry in MFC binding documentation
  ARM: dts: Hook up internal PHY on Arndale
  ARM: dts: Enable USB hub on Arndale
  ARM: dts: Add secure-firmware boot support for OrigenQaud board
  ARM: dts: Add pin state information for DP HPD support to Exynos5420
  ARM: dts: Add DP controller DT node to exynos5420 SoC
  ARM: dts: Update DP controller DT Node for Exynos5 based SoCs
  ARM: dts: Add FIMD DT node to exynos5420 DTS files
  ARM: dts: Add basic PM domains for EXYNOS5420
  ARM: dts: Update FIMD DT node for Exynos5 SoCs
  ARM: dts: Move display-timing information inside FIMD DT node for exynos5250
  ARM: dts: Add S5K5BA sensor regulator definitions for Trats board
  ARM: dts: Add Exynos4210 SoC camera port pinctrl nodes
  ARM: dts: Add FIMC nodes for Exynos4210 Trats board
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22 08:25:36 -07:00
Dinh Nguyen
dc76a1adfa phy: micrel: Add definitions for common Micrel PHY registers
Add defines for common Micrel PHY setups so that other platforms
can use them. Update imx61 and sama5 hardware to use the micrel_phy.h
PHY defines.

Also add support for the KSZ9021RLRN PHY.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: netdev@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:54 +08:00
Fabio Estevam
7e463b7c1b ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option
Commit 02502da45 (ASoC: imx-mc13783: Depend on ARCH_ARM) caused the selection of
CONFIG_SND_SOC_IMX_MC13783 to be impossible due to a wrong dependency, which
caused CONFIG_SND_SOC_IMX_MC13783 to be removed after the defconfigs cleanups.

The original selection problem has been fixed by 9f19de649f (ASoC: imx-mc13783:
Make SND_SOC_IMX_MC13783 visible again), so it is possible to select
CONFIG_SND_SOC_IMX_MC13783 again as originally done.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:53 +08:00
Peter Chen
ddcb9aa65a ARM: imx: Move anatop related from board file to anatop driver
Move anatop related (For USB) from board file to anatop driver

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:51 +08:00
Fabio Estevam
692c89add5 ARM: imx_v6_v7_defconfig: Enable wireless support
Wandboard has a Broadcom 4329 chipset connected to SDHC, so turn on the wireless
related options.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:50 +08:00
Fabio Estevam
47c484d059 ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig
Generate imx_v4_v5_defconfig by doing:

make imx_v4_v5_defconfig
make savedefconfig
cp defconfig arch/arm/configs/imx_v4_v5_defconfig

No functional change. The goal here is to cleanup imx_v4_v5_defconfig file to
make easier and cleaner the addition of new entries.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:49 +08:00
Fabio Estevam
bc3059e083 ARM: imx_v6_v7_defconfig: Add SATA support
Let SATA support be built by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:47 +08:00
Fabio Estevam
077cfef91b ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig
Generate imx_v6_v7_defconfig by doing:

make savedefconfig

cp defconfig arch/arm/configs/imx_v6_v7_defconfig

No functional change. The goal here is to cleanup imx_v6_v7_defconfig file to
make easier and cleaner the addition of new entries.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:46 +08:00
Fabio Estevam
547dd1e089 ARM: mx53: Allow suspend/resume
Current imx53_pm_init() implementation is incomplete as it lacks calling
suspend_set_ops().

Use a single imx5_pm_init() function to handle both mx51 and mx53.

This allows mx53 to enter in low-power mode.

Tested on a mx53qsb:

root@freescale /$ echo mem > /sys/power/state
PM: Syncing filesystems ... done.
mmc0: card e624 removed
Freezing user space processes ... (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
Suspending console(s) (use no_console_suspend to debug)

... (Press Power button)

PM: suspend of devices complete after 17.067 msecs
PM: suspend devices took 0.020 seconds
PM: late suspend of devices complete after 0.954 msecs
PM: noirq suspend of devices complete after 1.288 msecs
Disabling non-boot CPUs ...
PM: noirq resume of devices complete after 0.680 msecs
PM: early resume of devices complete after 0.914 msecs
PM: resume of devices complete after 44.955 msecs
PM: resume devices took 0.050 seconds
Restarting tasks ... done.
mmc0: host does not support reading read-only switch. assuming write-enable.
mmc0: new SDHC card at address e624
mmcblk0: mmc0:e624 SU04G 3.69 GiB
 mmcblk0: p1 p2 p3
libphy: 63fec000.etherne:00 - Link is Down
libphy: 63fec000.etherne:00 - Link is Up - 100/Full
root@freescale /$

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:45 +08:00
Fabio Estevam
f36b594f37 ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level
Instead of selecting ARM_CPU_SUSPEND only for mx6, we can select it for
all SoCs from the ARCH_MXC family.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:43 +08:00
Fabio Estevam
df33e91c32 ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX
egalax touchscren controller is present on mx6 sabresd/sabrelite, so let's
enable it by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:42 +08:00
Shawn Guo
97245139a0 ARM: imx6q: add vdoa gate clock
Add the missing vdoa gate clock for imx6q.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:41 +08:00
Shawn Guo
6cd622357d ARM: imx6q: add the missing cko output selection
The clock output on imx6q CCM_CLKO1 pad is not always cko1 clock, and
there is a multiplexer to select between cko1 and cko2.  Add this
missing selection as the clock cko.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:39 +08:00
Shawn Guo
6526bb3cc5 ARM: imx6q: add cko2 clocks
It adds the missing cko2 clocks, including multiplexer, divider and
gate.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:38 +08:00
Shawn Guo
1fa5007b3a ARM: imx6q: add spdif gate clock
It adds the missing spdif gate clock into imx6q clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:37 +08:00
Kevin Hilman
8a75f0a07c samsung cleanup for v3.12
- cleanup non-dt stuff in exynos
 - remove 0x from exynos dt files
 - remove unused codes
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSETUYAAoJEA0Cl+kVi2xqN0oP/RULtQL/DlVgj4TOpvtKood2
 2qMjJ60Vu6uuCYjLGExexFEqjZlnzWb8h4VGvZ2G8drXuBG5CnuKb/PfMZUyxEuo
 2DpAPKe81vLSuXB7+3DGMWxKikDXGDl3ULrjfhe/TzT9qWYNPpZ9BLSW57VXXY7q
 pdsyVC9ma+7g0zheAO7fOeKPvEYi8ShM8JHW/83B6FFhYQA14+hY/CWqEJlUlHJw
 GKXWPmaHlD9jyannM6wciKWKOnCEsWjtF9AIwMtorvp9tc8jld9YizDp6ertSXlK
 NJjC6VkLFxEb3vCO+VGYwqeVIU6IWGVkYNIFkDX2RNvww5cCE+8u92wNd9wFmsrU
 iM6Gfd882PWrkr+TlMEN98bsOJ8AW88r33k5j7tj8dCWruCAwWNqhulOzMqArd/6
 mfIhUbIoW/SR+E5PmG5+JMhil49DDDLU704EIC4rf5q52/wrDCVZOjvzJGZE+0Cd
 PmQo8pu3UlCA7zdmTVn80oQzkA5JpMo4ZNYzqXp8v85w3/7OvyMFCrdSIF9pIRKX
 YVORs9GYDolEq20IZCJ5Enbf7uUx6oKka3r7q/HUUAT3dGMEI6VAL+KsRfbpyiir
 TeVZHQGvEcjXpLeJydZaYzklpan5J3fetdTQ9ssY6MWoaueQj1WbY5Vk11s0xrAR
 GbveCFQeTKW1+ZZxXGHR
 =6l48
 -----END PGP SIGNATURE-----

Merge tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

From Kukjin Kim:
samsung cleanup for v3.12
- cleanup non-dt stuff in exynos
- remove 0x from exynos dt files
- remove unused codes

* tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
  ARM: dts: Remove '0x's from Exynos5440 DTS file
  ARM: dts: Remove '0x's from Exynos5420 DTS file
  ARM: dts: Remove '0x's from Exynos5250 DTS file
  ARM: dts: Remove '0x's from Exynos4x12 DTSI file
  ARM: dts: Remove '0x's from Exynos4210 DTSI file
  ARM: EXYNOS: Cleanup common.h file
  irqchip: exynos: cleanup non-DT stuff in exynos-combiner

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22 08:11:41 -07:00
Mark Brown
c41788c091 Merge remote-tracking branch 'asoc/topic/samsung' into asoc-next 2013-08-22 14:28:49 +01:00
Mark Brown
5388d48047 Merge remote-tracking branch 'asoc/topic/pxa' into asoc-next 2013-08-22 14:28:46 +01:00
Mark Brown
54c1e27d8a Merge remote-tracking branch 'asoc/topic/kirkwood' into asoc-next 2013-08-22 14:28:39 +01:00
Bo Shen
6dd678e866 ARM: at91: sam9n12: enable kernel uncompress info output
The sam9n12 use the same array usart as sam9x5, add it which will
enable output kernel uncompress info:
---8>---
Uncompressing Linux... done, booting the kernel.
---<8---

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-22 12:42:03 +02:00
Bo Shen
acbece315a ARM: at91: sama5: enable kernel uncompress info output
Enable kernel uncompress info output, which will show as following:
---8>---
Uncompressing Linux... done, booting the kernel.
---<8---

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-22 12:41:12 +02:00
Bo Shen
fb941e8487 ARM: at91: include sama5d3.h into hardware.h
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-22 12:29:39 +02:00
Bo Shen
74919d19c7 ARM: at91: sama5d3: add definition for usart base address
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-22 12:28:41 +02:00
Chen Gang
af07219661 ARM: OMAP2: use 'int' instead of 'unsigned' for variable 'gpmc_irq_start'
'gpmc_irq_start' is mostly used as 'int', and for a variable, do not
suggest to only use 'unsigned' as its type, so use 'int' instead of
'unsigned' for variable 'gpmc_irq_start'.

Also it will fix the related issue (dummy the real world failure):

arch/arm/mach-omap2/gpmc.c:728:2: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]

Signed-off-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-22 00:56:26 -07:00
Chen Gang
a04feb0341 ARM: OMAP2: remove useless variable 'ret'
Remove useless variable 'ret', the related warning:

arch/arm/mach-omap2/board-am3517crane.c:113:6: warning: unused variable ‘ret’ -Wunused-variable]

Signed-off-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-22 00:15:17 -07:00
Stephen Warren
30ca2226be ARM: tegra: always enable USB VBUS regulators
This fixes a regression exposed during the merge window by commit
9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that
USB VBUS doesn't get turned on, so USB devices are not detected. This
affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to
which the SSD is connected) and the external port(s) on Seaboard/
Springbank and Whistler.

The Tegra DT as written in v3.11 allows two paths to enable USB VBUS:

1) Via the legacy DT binding for the USB controller; it can directly
   acquire a VBUS GPIO and activate it.

2) Via a regulator for VBUS, which is referenced by the new DT binding
   for the USB controller.

Those two methods both use the same GPIO, and hence whichever of the
USB controller and regulator gets probed first ends up owning the GPIO.
In practice, the USB driver only supports path (1) above, since the
patches to support the new USB binding are not present until v3.12:-(

In practice, the regulator ends up being probed first and owning the
GPIO. Since nothing enables the regulator (the USB driver code is not
yet present), the regulator ends up being turned off. This originally
caused no problem, because the polarity in the regulator definition was
incorrect, so attempting to turn off the regulator actually turned it
on, and everything worked:-(

However, when testing the new USB driver code in v3.12, I noticed the
incorrect polarity and fixed it in commit 9f310de "ARM: tegra: fix VBUS
regulator GPIO polarity in DT". In the context of v3.11, this patch then
caused the USB VBUS to actually turn off, which broke USB ports with VBUS
control. I got this patch included in v3.11-rc1 since it fixed a bug in
device tree (incorrect polarity specification), and hence was suitable to
be included early in the rc series. I evidently did not test the patch at
all, or correctly, in the context of v3.11, and hence did not notice the
issue that I have explained above:-(

Fix this by making the USB VBUS regulators always enabled. This way, if
the regulator owns the GPIO, it will always be turned on, even if there
is no USB driver code to request the regulator be turned on. Even
ignoring this bug, this is a reasonable way to configure the HW anyway.

If this patch is applied to v3.11, it will cause a couple pretty trivial
conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since
the context right above the added lines changed in patches destined for
v3.12.

Reported-by: Kyle McMartin <kmcmarti@redhat.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-21 21:36:19 -07:00
Linus Torvalds
d936d2d452 Bug-fixes:
- On ARM did not have balanced calls to get/put_cpu.
  - Fix to make tboot + Xen + Linux correctly.
  - Fix events VCPU binding issues.
  - Fix a vCPU online race where IPIs are sent to not-yet-online vCPU.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQEcBAABAgAGBQJSFMaJAAoJEFjIrFwIi8fJ+/0H/32rLj60FpKXcPDCvID+9p8T
 XDGnFNttsxyhuzEzetOAd0aLKYKGnUaTDZBHfgSNipGCxjMLYgz84phRmHAYEj8u
 kai1Ag1WjhZilCmImzFvdHFiUwtvKwkeBIL/cZtKr1BetpnuuFsoVnwbH9FVjMpr
 TCg6sUwFq7xRyD1azo/cTLZFeiUqq0aQLw8J72YaapdS3SztHPeDHXlPpmLUdb6+
 hiSYveJMYp2V0SW8g8eLKDJxVr2QdPEfl9WpBzpLlLK8GrNw8BEU6hSOSLzxB7z/
 hDATAuZ5iHiIEi1uGfVjOyDws2ngUhmBKUH5x5iVIZd2P5c/ffLh2ePDVWGO5RI=
 =yMuS
 -----END PGP SIGNATURE-----

Merge tag 'stable/for-linus-3.11-rc6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip

Pull Xen bug-fixes from Konrad Rzeszutek Wilk:
 - On ARM did not have balanced calls to get/put_cpu.
 - Fix to make tboot + Xen + Linux correctly.
 - Fix events VCPU binding issues.
 - Fix a vCPU online race where IPIs are sent to not-yet-online vCPU.

* tag 'stable/for-linus-3.11-rc6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  xen/smp: initialize IPI vectors before marking CPU online
  xen/events: mask events when changing their VCPU binding
  xen/events: initialize local per-cpu mask for all possible events
  x86/xen: do not identity map UNUSABLE regions in the machine E820
  xen/arm: missing put_cpu in xen_percpu_init
2013-08-21 16:38:33 -07:00
Linus Torvalds
69bbe136a9 Fixes for ARM and aarch64.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQIcBAABAgAGBQJSEoS0AAoJEBvWZb6bTYbyE/8P/izUr1XtKBqtVuqVBMewEkeB
 SBgvJ2w681f4d+1waVAEPqWVGKHDvSOQC54sG6Y3fWHKijKGLiQhLaY3Y1WaLlO1
 B+duREwCwHaApjrpYoKhkyGQVpgyIfHBVe8d2TM9Q2bRuYNZEEcOtfdXk+Qfr6WR
 2kN+67ivJzAXvjs0uuRyJtXXq9cemcOnngsAfBlJz+j6UbiEdQ3l569D3wQU1jS2
 lUxxCEdtBDKDXkJUbTYvtJNYR48caqVXhYBTjpmY04207iSHmacUytOXO3rRA3OL
 fFhm/QeKVZND0XrJDUOMFzosWdUVdP5Qd5PtYoV/gEydNJMMpPs+dFKv+RXzrWlm
 2S2PWbFlkFT8yM+xwh6uKnLQ1aj614dkK2vKlp9GwDuwWiaod71C8ouTJvanNHGt
 pWgktFlfD+npSc3QDeXG5QB78pTSeyJfZBeVvA+U/etX+vjdfFWZ3bHMScrAE4DX
 xsdvtfamo0m9v2yZsnKzRWtCQq9No5FRb/c31w7yUzSXNBtyNR0Vft9gmiLo4HYa
 FQ0wC2UPyaKbfYtX0orpWnN3u4vaylGw2HuzK+2Mwi2HL+AMI6Piu//nrTbqb/i+
 1a6OARWvv9BQdbcuzBqznUdcllbmRl94kA5zXPvAz0dOBPQFU4X/t6dkxxH+8JFj
 mA/c2PHEyOtuFDOoqZxE
 =RlHG
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull kvm fixes from Paolo Bonzini:
 "Fixes for ARM and aarch64.

  This pull request is coming a bit later than I would have preferred,
  because I and Gleb happened to have holidays around the same weeks of
  August...  sorry about that"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: ARM: Squash len warning
  arm64: KVM: use 'int' instead of 'u32' for variable 'target' in kvm_host.h.
  arm64: KVM: add missing dsb before invalidating Stage-2 TLBs
  arm64: KVM: perform save/restore of PAR_EL1
  arm64: KVM: fix 2-level page tables unmapping
  ARM: KVM: Fix unaligned unmap_range leak
  ARM: KVM: Fix 64-bit coprocessor handling
2013-08-21 16:35:37 -07:00
Kevin Hilman
fe870ae70b Allwinner sunXi core additions for 3.12, take 2
These patches add machine support for the Allwinner A20 and A31 SoCs
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJSEx+TAAoJEBx+YmzsjxAgN6kP/2aiY4ZfRxXC5yw1RlT9de4I
 iy0uO+sSHevQWYvdL5sRr19kL2P1v4ZPqxZddJzgQVzpXTl9QOQrd0E0VqLgcNOI
 hn+HXK3jY8984xCLHaj7EMKwOtC+7IVx+xkCRqN88D8G9OuVCVx9FJAHFHQzJDK/
 IMfJysuEtTMMxNmNTpGuU/1KE1OrIPr1/a17FZ3KAYjiwyf+7zHsAKQvLjgxRk8/
 c5YZmiRO/DNsJ4qqQVgpfJe10WitXtsUiLNuYge0BrmCj26PxO+MQuzSh3zdLkpN
 1m8egIZ9PVuIkXp1NcRNrYqnT1oEvSL0DOOnTo4rhINQbJXz2l18dsc+J8P3bcSK
 ONeW2vTOYAqb+ThzEUVKiKC2OiPY2jETVVvKaspZiohiLH1ABHchLTufm2/1yw/o
 VXLcI0VHoJG9Qyl6t+78Td9WTu7LxR5odpTGQpkBQEm//mV+nnK07BJbToNa6VeO
 G5mO3+/iRqQsZiZg08OCcKScqHFq9CVpOBx1ArYOKYJM8muzlvkNO19O962pQ1lh
 HymY1Nxg3+78SfiZuUDcuFSYEqWmlgPXw9VWbHAUdpETkBf938l9LqDkwApSkLFD
 UujBAPj5CuFy/KHRMd8Nbp11hThsKQTKe9vtoD8zVuQu6gmIy3gpJK5XXUhhLtsn
 bLnKRF3ZaO0mg8k/13BL
 =MCmi
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-core-for-3.12-2' of https://github.com/mripard/linux into next/soc

Allwinner sunXi core additions for 3.12, take 2

These patches add machine support for the Allwinner A20 and A31 SoCs

* tag 'sunxi-core-for-3.12-2' of https://github.com/mripard/linux:
  ARM: sunxi: Introduce Allwinner A20 support
  ARM: sun6i: Add restart code for the A31
  ARM: sunxi: Add the Allwinner A31 compatible to the machine definition
2013-08-21 16:24:22 -07:00
Kevin Hilman
656d79cafc Allwinner sunXi DT additions for 3.12, take 2
These patches add basic support for:
   - Allwinner A31 and A20 SoCs
   - The Olimex A20-Olinuxino board
   - The Olimex A10s-Olinuxino board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJSEx4lAAoJEBx+YmzsjxAgHPgP/2ztX/PPq/C/iURiz/Igg/zR
 3y7CDoa8ReG/PqeiY3Gq9I6dk8DYbReb8mqA6+HvA0giC8Op+VWnV40k8arlfgkN
 pZ7W68XgX1UXjy+TqKn9Pd3NJWR7XdxwWqpknsW28GLqdj40Xpcm1wPWg+j7jmIq
 RNo619az8CDVzGIzRfQqs7lK31n2ZXHOqz6sSLBO6odEFWabFUADdz0MAIP6r4va
 dk4o2agXF02di2nKPZuULbnbd9iYkoZfeL9pW7s5asAAEMC4l3R02PP9GjB5r+u3
 eUBHOW6qh/jGxFK1vKKXI7Ow+gqFizthQMiGtn9/7RFO94TP0TVLZ8+xsGXDef/C
 Fa5ib5DGlQSKfskXNPNY9X1crpiw9te+7XTdKRAv2y1C/f2HRzwHSXKhercAZA38
 9tyPCJufUorf11NVuu3HO43cqvaJyF6qf6eXeTss08A1i+1yvpTNV94pHHkU16Fv
 Jv2uE2U+JqDd0QPCR7R7ef7JYnYv4IbuJ8fybZyASC+6dXO4bPaEmZsLCzVT6pSA
 eWgV81Iie6GXyl9MMWav0vblYYyRe5zhuIEG4ctXvsxyzlVDWhE6l5/TikoBIQHU
 1mqgf1lJSVo1AC4kmj5A2AQPpkyJG7a4qYPIEVOVWwh5NZrdqarlIakZ0nucEGB5
 fbcBNzKh39vTNbrjfIjY
 =s6CA
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt-for-3.12-2' of https://github.com/mripard/linux into next/dt

Allwinner sunXi DT additions for 3.12, take 2

These patches add basic support for:
  - Allwinner A31 and A20 SoCs
  - The Olimex A20-Olinuxino board
  - The Olimex A10s-Olinuxino board

* tag 'sunxi-dt-for-3.12-2' of https://github.com/mripard/linux:
  ARM: sun7i: Add Olimex A20-Olinuxino-Micro support
  ARM: sun7i: Add Allwinner A20 DTSI
  ARM: sun6i: Add WITS Colombus A31 evaluation kit support
  ARM: sunxi: Add Allwinner A31 DTSI
2013-08-21 16:05:07 -07:00
Maxime Ripard
82abe5294a ARM: sun7i: Add Cubieboard2 Device Tree
The Cubieboard2 is the successor of the first Cubieboard, and shares the
same hardware, except that the Allwinner A10 found initially has been
replaced by an Allwinner A20.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:19 +02:00
Maxime Ripard
6e487da768 ARM: sun7i: a20-olinuxino: Enable the user LED
The A20-olinuxino Micro has a LED connected to the PH2 pin. Use the
gpio-led driver to enable the control over this LED.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:19 +02:00
Maxime Ripard
2fff6ac079 ARM: sun7i: a20-olinuxino: Enable UARTs muxing
Instead of relying on the bootloader to mux the UART pins properly, do
it on our own and register the rightful pins for the A20-olinuxino in
the DT using pinctrl.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:18 +02:00
Maxime Ripard
9f229ba957 ARM: sun7i: DT: Add UART muxing options to the DTSI
The UARTs on the A20 can be muxed to several pins. Add a few options to
the DTSI so that we can start using them in the boards' DT.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:18 +02:00
Maxime Ripard
17eac031b7 ARM: sun7i: Add the PIO controller node to the DTSI
The PIO controller is responsible for the GPIO/muxing/external
interrupts handling. Now that we have support for the A20 pin set in the
pinctrl driver, we can start using it in the DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:17 +02:00
Maxime Ripard
69fb3c047e ARM: sun6i: colombus: Add uart0 muxing
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:17 +02:00
Maxime Ripard
ab4238cd05 ARM: sun6i: Add UART0 muxing options
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:16 +02:00
Maxime Ripard
140e1721d1 ARM: sunxi: dt: Add PIO controller to A31 DTSI
The A31 has a different set of pins than the one found on the A10 and
A13. Now that we have support for the A31 pin set in the pinctrl driver,
we can enable it in the DTSI with its own compatible.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22 00:19:16 +02:00
Viresh Kumar
887708f0ac ARM: timer-sp: Set dynamic irq affinity
When a cpu goes to a deep idle state where its local timer is shutdown, it
notifies the time frame work to use the broadcast timer instead.

Unfortunately, the broadcast device could wake up any CPU, including an idle one
which is not concerned by the wake up at all.

This implies, in the worst case, an idle CPU will wake up to send an IPI to
another idle cpu.

This patch fixes this for ARM platforms using timer-sp, by setting
CLOCK_EVT_FEAT_DYNIRQ feature.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-08-22 00:18:53 +02:00
Kevin Hilman
7a37ffa07b Allwinner sunXi DT additions for 3.12
- Cleanups and few fixes to the DTSI
   - A few additions to the A10s olinuxino board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJSDnZZAAoJEBx+YmzsjxAgdcwP/0VjnGavxzii6FlozvbPvpvf
 iP9P3gFb0CttD3hIU7C6emxOd0gp7XolTBDVYyZ5OT0UFt9GU3jcT29WU6b8h4YH
 EHIbFGlLFWULElmROH4EKj+AxLOjBonv2Lpmr6c03kNtrgqPwo0C4uHyeeDP0PmJ
 KyZbRumhWk8n0UfE6+w7kOVpOJzB5ZYOzDnaCrwwdqFyooCkPVsFAbdgFxYxMGUQ
 x1lyIe6KL4+Tvx7f2syjhznz/1MLUO2uxS3mjKNwYkPpfGcOqm/kNYQURjcMVEiF
 dbaND3IRqqpWrIwqyUuz11fSb9dARu1bIyHjYsXFw6v8M3pL9bugsGP3H5JEboqX
 beh9DEfcqn9Qh9I0uwS39JwWu31Go8ohY+KWjnabGSFQVmwc5Fn5cZpnH/mJXgTp
 1M1iUy1LZpwmO7okPQxgFtsn8Rk6nAcEEESECqKPHrsf5W8kEq3vPj0YOtNd8jOI
 ILtXH4alhYynU4YPX1nfMLbydaUqTYDIaDtAsDxhhMSpf1ngqpqsk24EVhdhNgjY
 g9fxTQqkp+e6cZNQm56nlnf+9LeSNwyUg5Te8fFR+QgFhBEidQ7wpBZU1lRY+kVv
 HtZdpexip/uCeEwILyGf5SuQr5R23Mg/DuH84in0tXAQZGHBX1FJYWYgaOpXlszq
 /dCG1tEUox9R+haeTGPd
 =88Cs
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt-for-3.12' of https://github.com/mripard/linux into next/dt

Allwinner sunXi DT additions for 3.12

  - Cleanups and few fixes to the DTSI
  - A few additions to the A10s olinuxino board

* tag 'sunxi-dt-for-3.12' of https://github.com/mripard/linux:
  ARM: sunxi: dt: Add device tree for Mele A1000
  ARM: sun5i: dt: Fix A13 SoC bus base address
  ARM: sun5i: a13: Remove useless simple-bus reg property
  ARM: sun5i: dt: Fix A10s SoC bus base address
  ARM: sun5i: a10s: Remove useless simple-bus reg property
  ARM: sun4i: dt: Fix A10 SoC bus base address
  ARM: sun4i: a10: Remove useless simple-bus reg property
  ARM: sunxi: make the leds' names conform to the current naming convention
  ARM: sun5i: dt: Add AT24 device on A10S-OLinuXino-Micro
  ARM: sun5i: dt: Enable I2C controllers on A10S-OLinuXino-Micro
  ARM: sun5i: dt: Add I2C controller nodes to the A10S dtsi
  ARM: sun5i: dt: Add I2C muxings for sun5i A10S

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21 14:53:56 -07:00
Kevin Hilman
f7b29518c3 Allwinner sunXi core additions for 3.12
There's not much in this pull request, only a patch removing some dead code.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJSDnOQAAoJEBx+YmzsjxAgqZIQAKdgwJ9+qziDbvlDTnD803Ff
 WexuUps2ycN9scgy/4DdiV99gvJmlSsnxiMOE84IYmnuJwSivjRIwAS9kUfaCxsv
 M0BX99HBX8rcK6jW4Y0WOK/Sb5JsWqiHGn7CCxLIxXMTwRexSwl2FVTn2E2hknV1
 z3/7igr33N/PtSzOSqMDQNTWWg+g9nL+lrEhR/ja2WMcmtqmhiJLJkwJRMRF4t5E
 QIqfyr1gICmIwPEa0P5jPDeVnDrp41b04fUzs8fvFSYt8LGVsshmNdI49/M5C2zm
 UThaIcbTZ/F+23V890xZEme47aRM0w55OgSpuhVaADAchTjsADFnBuItMFMzeMbe
 Ijv3Cs+shXlU6O7iS+Hh/jXXU4GNhQ6IHgENngkP8DEl5+xFtVvRVdz792G+yAWp
 oHbKOdd/52x4oQT88fzXEBJTiq+jRvQNH/ZP19aE94UQtnmG5EWH6E1i2eiYRFJa
 oT6yCbf41hxMwTYAO2gMLuJv7mvHkFZZSpKCEuYduQxw5Cfe9zO2WZTue2E7du3w
 LzPGL9qcDbsP76iD/OBWCuTGXWwwph2AMQ/pi80tHKNnW3TBHmhcw/03H18hPAXL
 1n8suhH7Ny2gVU8CMEqNWiwAFsQ0kukPNYLQlWc1fXcqC7Zn2fi/Ff2fbmGmFymC
 lGY8W/a/eDGFPqmROkS0
 =GRCc
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-core-for-3.12' of https://github.com/mripard/linux into next/soc

Allwinner sunXi core additions for 3.12

There's not much in this pull request, only a patch removing some dead code.

* tag 'sunxi-core-for-3.12' of https://github.com/mripard/linux:
  ARM: sunxi: Remove Makefile.boot file

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21 14:31:45 -07:00
Manjunathappa, Prakash
29864962f7 ARM: davinci: da850: do not specify clock_frequency for UART DT node
DT kernel on da850-evm comes up with garbled UART logs. This is because
of mismatch in actual module clock rate and rate specified(clock-frequency)
in DT blob. kernel should not assume or depend on bootloaders clock
configuration, instead let it find the clock rate at runtime.

Issue discussed here before arriving on this implementation:
"ARM: davinci: da850 evm: update clock rate for UART 1/2 DT nodes"
https://patchwork.kernel.org/patch/2162271/

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:44:58 +05:30
Lad, Prabhakar
dd7deaf218 ARM: davinci: da850: add DT node for ethernet
Add ethernet device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:44:58 +05:30
Lad, Prabhakar
235d8cd999 ARM: davinci: da850: add OF_DEV_AUXDATA entry for davinci_emac
Add OF_DEV_AUXDATA for ethernet davinci_emac driver in da850 board dt
file to use emac clock.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:44:58 +05:30
Lad, Prabhakar
73db595161 ARM: davinci: da850: add OF_DEV_AUXDATA entry for mdio.
Add OF_DEV_AUXDATA for mdio driver in da850 board dt
file to use mdio clock.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:44:57 +05:30
Lad, Prabhakar
609f4bcf81 ARM: davinci: da850: add DT node for mdio device
Add mdio device tree node information to da850 by
providing register details and bus frequency of mdio.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:43:37 +05:30
Lad, Prabhakar
46c1833467 ARM: davinci: fix clock lookup for mdio device
This patch removes the clock alias for mdio device and adds a entry
in clock lookup table, this entry can now be used by both DT and
non-DT case.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:39:01 +05:30
Hebbar Gururaja
79eb16366b ARM: davinci: da8xx: remove hard coding of rtc device wakeup
Since now rtc-omap driver itself calls deice_init_wakeup(dev, true),
duplicate call from the rtc device registration can be removed.

This is basically a partial revert of the prev commit

commit 75c99bb000
Author: Sekhar Nori <nsekhar@ti.com>

    davinci: da8xx/omap-l1: mark RTC as a wakeup source

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:39:00 +05:30
Manjunathappa, Prakash
323761bb75 ARM: davinci: serial: remove davinci_serial_setup_clk()
Get rid of davinci_serial_setup_clk() since its not called
from multiple places now. Instead initialize clock in
davinci_serial_init() itself. This also helps get rid of
"serial_dev" member of struct davinci_soc_info.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Suggested-by: Sekhar Nori <nsekhar@ti.com>
[nsekhar@ti.com: split removal of davinci_serial_setup_clk()
		 into a separate patch.]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:38:59 +05:30
Manjunathappa, Prakash
fcf7157ba3 ARM: davinci: serial: get rid of davinci_uart_config
"struct davinci_uart_config" was introduced to specify
UART ports brought out or enabled on the board. But
none of the boards use it for that purpose and we are
not going to add anymore board files, so remove the
structure.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Suggested-by: Sekhar Nori <nsekhar@ti.com>
[nsekhar@ti.com: split patch to remove davinci_serial_setup_clk()
		 changes.]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:38:59 +05:30
Manjunathappa, Prakash
1ae1c2f91d ARM: davinci: da8xx: remove da8xx_uart_clk_enable
Serial clocks are enabled from of_platform_serial_setup:of_serial.c,
so remove davinci_serial_setup_clk from here.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22 00:38:58 +05:30
Kevin Hilman
bfa664f21b ARM: tegra: core SoC enhancements for 3.12
This branch includes a number of enhancements to core SoC support for
 Tegra devices. The major new features are:
 
 * Adds a new CPU-power-gated cpuidle state for Tegra114.
 * Adds initial system suspend support for Tegra114, initially supporting
   just CPU-power-gating during suspend.
 * Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode
   both gates CPU power, and places the DRAM into self-refresh mode.
 * A new DT-driven PCIe driver to Tegra20/30. The driver is also moved
   from arch/arm/mach-tegra/ to drivers/pci/host/.
 
 The PCIe driver work depends on the following tag from Thomas Petazzoni:
 git://git.infradead.org/linux-mvebu.git mis-3.12.2
 ... which is merged into the middle of this pull request.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSDlwwAAoJEMzrak5tbycxR68QAJZ/Izc9Izj0JH8hmCEvMNfi
 ub1DQfWAy3oXk0ttkk+BMvuyD8JTvBr8LSK8GqjZs//rFGlW81A4NHTvCwoKZjKe
 hgrRgI2B1wj3Um1sp8le9D0klKrTcfmpXrOxH8ALgz0BIpMge8AGZHkV0SrfQa1z
 bKiISFVAw12WJCVrQ2nbzpZGU51lbyJ/+RghttM1a8LuS2P03CZgt2kqiytk3UVK
 uiGEy3sCkjXLFO3EsUvM6ha623S6BumCAYjNfgDowTVKaoEe1r2TD4bFeU6lGcXJ
 mlVTv0Kywazf4Q2gKzkbDz8UQMArW4hok2iILHzz+sf/Rn0hie5XVqhFlbBlcae8
 vyWsHmqvmE9BJAK2G2RLs9cJCTzEpEyAjUWfE3sIIa3ztSguT5+PHndDLR/d76aS
 j8L3FYReICZ1NuNw1JSQPFs9g2EWJbNRiy+8o9O2elsJMpLDBj/FcV6TVpudbBTI
 z7hvN+XSVYUaCVD4e8ma9YoC3VGseiAZvd+Y8hPd2MFBECVPNpy2bOacieU6Bgxh
 zjSBXZ/URxN3rTkv9+F3BLWAOfVmJYN0rKV9YfM/rqpWjc9iQx30m1fRZDnXWhvd
 ps8eFIYsKqc6v9AAugl/RexFy4Laav9eREjb0k2LA8ClLhK/qLLuiisVmKWS/grh
 lX9tzPEG2nZcjxSYaEjz
 =ve9i
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From: Stephen Warren:
ARM: tegra: core SoC enhancements for 3.12

This branch includes a number of enhancements to core SoC support for
Tegra devices. The major new features are:

* Adds a new CPU-power-gated cpuidle state for Tegra114.
* Adds initial system suspend support for Tegra114, initially supporting
  just CPU-power-gating during suspend.
* Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode
  both gates CPU power, and places the DRAM into self-refresh mode.
* A new DT-driven PCIe driver to Tegra20/30. The driver is also moved
  from arch/arm/mach-tegra/ to drivers/pci/host/.

The PCIe driver work depends on the following tag from Thomas Petazzoni:
git://git.infradead.org/linux-mvebu.git mis-3.12.2
... which is merged into the middle of this pull request.

* tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (33 commits)
  ARM: tegra: disable LP2 cpuidle state if PCIe is enabled
  MAINTAINERS: Add myself as Tegra PCIe maintainer
  PCI: tegra: set up PADS_REFCLK_CFG1
  PCI: tegra: Add Tegra 30 PCIe support
  PCI: tegra: Move PCIe driver to drivers/pci/host
  PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms
  ARM: tegra: add LP1 suspend support for Tegra114
  ARM: tegra: add LP1 suspend support for Tegra20
  ARM: tegra: add LP1 suspend support for Tegra30
  ARM: tegra: add common LP1 suspend support
  clk: tegra114: add LP1 suspend/resume support
  ARM: tegra: config the polarity of the request of sys clock
  ARM: tegra: add common resume handling code for LP1 resuming
  ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci
  of: pci: add registry of MSI chips
  PCI: Introduce new MSI chip infrastructure
  PCI: remove ARCH_SUPPORTS_MSI kconfig option
  PCI: use weak functions for MSI arch-specific functions
  ARM: tegra: unify Tegra's Kconfig a bit more
  ARM: tegra: remove the limitation that Tegra114 can't support suspend
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21 10:17:18 -07:00
Thomas Gleixner
cfb6d656d5 Merge branch 'timers/clockevents-next' of git://git.linaro.org/people/dlezcano/clockevents into timers/core
* Support for memory mapped arch_timers
* Trivial fixes to the moxart timer code
* Documentation updates

Trivial conflicts in drivers/clocksource/arm_arch_timer.c. Fixed up
the newly added __cpuinit annotations as well.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-08-21 14:59:23 +02:00
Richard Genoud
90d01929ad ARM: at91/dt: sam9x5ek: add sound configuration
The sam9x5ek board has 2 jacks:
headphone wired on RHPOUT/LHPOUT of the wm8731
line in wired on LLINEIN/RLINEIN of the wm8731

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21 13:33:44 +02:00
Richard Genoud
45b763526e ARM: at91/dt: sam9x5ek: enable SSC
Enable the SSC needed for the WM8731 codec

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21 13:33:10 +02:00
Richard Genoud
4dc6e27cbf ARM: at91/dt: sam9x5ek: add WM8731 codec
The WM8731 codec on sam9x5ek board is on i2c, address 1A

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21 13:32:11 +02:00