* pm-opp: (24 commits)
PM / OPP: Expose _of_get_opp_desc_node as dev_pm_opp API
PM / OPP: Make _find_opp_table_unlocked() static
PM / OPP: Update Documentation to remove RCU specific bits
PM / OPP: Simplify dev_pm_opp_get_max_volt_latency()
PM / OPP: Simplify _opp_set_availability()
PM / OPP: Move away from RCU locking
PM / OPP: Take kref from _find_opp_table()
PM / OPP: Update OPP users to put reference
PM / OPP: Add 'struct kref' to struct dev_pm_opp
PM / OPP: Use dev_pm_opp_get_opp_table() instead of _add_opp_table()
PM / OPP: Take reference of the OPP table while adding/removing OPPs
PM / OPP: Return opp_table from dev_pm_opp_set_*() routines
PM / OPP: Add 'struct kref' to OPP table
PM / OPP: Add per OPP table mutex
PM / OPP: Split out part of _add_opp_table() and _remove_opp_table()
PM / OPP: Don't expose srcu_head to register notifiers
PM / OPP: Rename dev_pm_opp_get_suspend_opp() and return OPP rate
PM / OPP: Don't allocate OPP table from _opp_allocate()
PM / OPP: Rename and split _dev_pm_opp_remove_table()
PM / OPP: Add light weight _opp_free() routine
...
Add constants and callback functions for the dwmac on rk3328 socs.
As can be seen, the base structure is the same, only registers and the
bits in them moved slightly.
Signed-off-by: david.wu <david.wu@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Display panels can be oriented many ways, especially in the embedded
world. The rotation property is a way to describe this orientation.
The counter clockwise direction is chosen because that's what fbdev
and drm use.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Multi-Inno Technology Co.,Ltd is a Hong Kong based company offering
LCD, LCD module products and complete panel solutions.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Rob Herring <robh@kernel.org>
Add support for MIPI DBI compatible controllers.
Interface type C option 1 and 3 are supported (SPI).
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Add common functionality needed by many tinydrm drivers.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thierry Reding <treding@nvidia.com>
tinydrm provides helpers for very simple displays that can use
CMA backed framebuffers and need flushing on changes.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thierry Reding <treding@nvidia.com>
Change module filename from af-rxrpc.ko to rxrpc.ko so as to be consistent
with the other protocol drivers.
Also adjust the documentation to reflect this.
Further, there is no longer a standalone rxkad module, as it has been
merged into the rxrpc core, so get rid of references to that.
Reported-by: Marc Dionne <marc.dionne@auristor.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Long standing issue with JITed programs is that stack traces from
function tracing check whether a given address is kernel code
through {__,}kernel_text_address(), which checks for code in core
kernel, modules and dynamically allocated ftrace trampolines. But
what is still missing is BPF JITed programs (interpreted programs
are not an issue as __bpf_prog_run() will be attributed to them),
thus when a stack trace is triggered, the code walking the stack
won't see any of the JITed ones. The same for address correlation
done from user space via reading /proc/kallsyms. This is read by
tools like perf, but the latter is also useful for permanent live
tracing with eBPF itself in combination with stack maps when other
eBPF types are part of the callchain. See offwaketime example on
dumping stack from a map.
This work tries to tackle that issue by making the addresses and
symbols known to the kernel. The lookup from *kernel_text_address()
is implemented through a latched RB tree that can be read under
RCU in fast-path that is also shared for symbol/size/offset lookup
for a specific given address in kallsyms. The slow-path iteration
through all symbols in the seq file done via RCU list, which holds
a tiny fraction of all exported ksyms, usually below 0.1 percent.
Function symbols are exported as bpf_prog_<tag>, in order to aide
debugging and attribution. This facility is currently enabled for
root-only when bpf_jit_kallsyms is set to 1, and disabled if hardening
is active in any mode. The rationale behind this is that still a lot
of systems ship with world read permissions on kallsyms thus addresses
should not get suddenly exposed for them. If that situation gets
much better in future, we always have the option to change the
default on this. Likewise, unprivileged programs are not allowed
to add entries there either, but that is less of a concern as most
such programs types relevant in this context are for root-only anyway.
If enabled, call graphs and stack traces will then show a correct
attribution; one example is illustrated below, where the trace is
now visible in tooling such as perf script --kallsyms=/proc/kallsyms
and friends.
Before:
7fff8166889d bpf_clone_redirect+0x80007f0020ed (/lib/modules/4.9.0-rc8+/build/vmlinux)
f5d80 __sendmsg_nocancel+0xffff006451f1a007 (/usr/lib64/libc-2.18.so)
After:
7fff816688b7 bpf_clone_redirect+0x80007f002107 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fffa0575728 bpf_prog_33c45a467c9e061a+0x8000600020fb (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fffa07ef1fc cls_bpf_classify+0x8000600020dc (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff81678b68 tc_classify+0x80007f002078 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8164d40b __netif_receive_skb_core+0x80007f0025fb (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8164d718 __netif_receive_skb+0x80007f002018 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8164e565 process_backlog+0x80007f002095 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8164dc71 net_rx_action+0x80007f002231 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff81767461 __softirqentry_text_start+0x80007f0020d1 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff817658ac do_softirq_own_stack+0x80007f00201c (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff810a2c20 do_softirq+0x80007f002050 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff810a2cb5 __local_bh_enable_ip+0x80007f002085 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8168d452 ip_finish_output2+0x80007f002152 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8168ea3d ip_finish_output+0x80007f00217d (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff8168f2af ip_output+0x80007f00203f (/lib/modules/4.9.0-rc8+/build/vmlinux)
[...]
7fff81005854 do_syscall_64+0x80007f002054 (/lib/modules/4.9.0-rc8+/build/vmlinux)
7fff817649eb return_from_SYSCALL_64+0x80007f002000 (/lib/modules/4.9.0-rc8+/build/vmlinux)
f5d80 __sendmsg_nocancel+0xffff01c484812007 (/usr/lib64/libc-2.18.so)
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
The purpose of the KVM_SET_SIGNAL_MASK API is to let userspace "kick"
a VCPU out of KVM_RUN through a POSIX signal. A signal is attached
to a dummy signal handler; by blocking the signal outside KVM_RUN and
unblocking it inside, this possible race is closed:
VCPU thread service thread
--------------------------------------------------------------
check flag
set flag
raise signal
(signal handler does nothing)
KVM_RUN
However, one issue with KVM_SET_SIGNAL_MASK is that it has to take
tsk->sighand->siglock on every KVM_RUN. This lock is often on a
remote NUMA node, because it is on the node of a thread's creator.
Taking this lock can be very expensive if there are many userspace
exits (as is the case for SMP Windows VMs without Hyper-V reference
time counter).
As an alternative, we can put the flag directly in kvm_run so that
KVM can see it:
VCPU thread service thread
--------------------------------------------------------------
raise signal
signal handler
set run->immediate_exit
KVM_RUN
check run->immediate_exit
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This driver requires a GPIO line to be used for the chip select of
each SPI device.
Remove the ep93xx_spi_chip_ops definition from the platform data
and use the spi core GPIO handling for the chip selects.
Fix all the ep93xx platforms that use this driver and remove the
old Documentation.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
If "metadata2" is provided as a table argument when creating/loading a
cache target a more compact metadata format, with separate dirty bits,
is used. "metadata2" improves speed of shutting down a cache target.
Signed-off-by: Joe Thornber <ejt@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
- Add support for phyCORE-AM335x PCM-953 carrier board
- Add power button and charger support for am335x-chiliboard
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAliYq1kRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXO4Uw/9EPQLyrCXt3yWC/LGKJWjyX4UIQnIYqff
J1wYq0ko42yL6LhjloGsDSz+fNtUpkY1/gYjprbWzbHTZpuLMRJU43GJBy0WRkRU
lpuIxocL3Nbwb1FcWBwM+OfE7UNiKL+CTMJxbxrcjB/d7kaUPhSbPsau7jqW3T2x
HBJnuFtdC4rZbPXTIISmt+4YWk3+mo+OCgRogGohhW+qpyMOFhufCqJYwNKyTTaD
Z+I7dbd8sMhSMC53bjGPVqfUamlGdx2JFR5EZktYSaqjpRSaK35yybe8NNfHx5HB
6f62UW/+FgiOE36CZckIze4UEAFol5yIciQ9HLi7+6rrdthCtk8ZBXt+yhG5csuc
pN/czfIZVo6nxEcK5hQqOJngfX1IPfiP96jXe+ZWHBKMhapZ3iTY9tE/9GEXxA9I
bkBY4vREushWGsIUUUkGto0Rm9AgRzsaVuTVkzUNdj3YlRNhC2k/PYIjgeYC+vEF
cDTOtkps5NI254sGfgNABSSNWVQjINFVHAG6rOqxtE4wfk6X/HVu6mr9RlIvYVVg
XtMTxbrSKf2T/EvU8hjHSIFQ2GqbBgG589XpFf7jKiU6K8rYDjhgBnC88qReuxtf
L4INBC6MwpmF3G98Rt4WP599RX1u8gqvyYM6oOf+wjN1D7XJlPlgzoQ6ODQp1Tp6
z1ZeqKh8UJ0=
=TN7G
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.11/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Few more late dts changes for omaps for v4.11 merge window" from Tony Lindgren:
- Add support for phyCORE-AM335x PCM-953 carrier board
- Add power button and charger support for am335x-chiliboard
* tag 'omap-for-v4.11/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-chiliboard: Support charger
ARM: dts: am335x-chiliboard: Support power button
ARM: dts: Add support for phyCORE-AM335x PCM-953 carrier board
The Marvell devices may have many gpio pins, and hence for wakeup
on these out-of-band pins, the chip needs to be told which pin is
to be used for wakeup, using an hci command.
Thus, we read the pin number etc from the device tree node and send
a command to the chip.
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Some onboard BT chips (e.g. Marvell 8997) contain a wakeup pin that
can be connected to a gpio on the CPU side, and can be used to wakeup
the host out-of-band. This can be useful in situations where the
in-band wakeup is not possible or not preferable (e.g. the in-band
wakeup may require the USB host controller to remain active, and
hence consuming more system power during system sleep).
The oob gpio interrupt to be used for wakeup on the CPU side, is
read from the device tree node, (using standard interrupt descriptors).
A devcie tree binding document is also added for the driver. The
compatible string is in compliance with
Documentation/devicetree/bindings/usb/usb-device.txt
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYkydJAAoJEGFBu2jqvgRNwksP/2Y9OR/5srBl0DIq5xNQ/8RP
i0vnddltDuO42ui9ylAve15Z0etTd4Pg5oSOw0VGdkzcPoBWmHwl2ZSpeLPKpwvy
8lVJivuSuQJouNXwx9Il5mq+Z0QrMYKKaQl8yzD8Y5W/zFORsN47n+LVHTflw0+z
tsRoX27JNcYVBJbLFkworWxYpN7s+SIzfjP7yqSsCZSUJPghYtvkoe3M6nYcAByR
XbHSHwFk+doHXVXqrvw718sRdp9pv8VbQ0xP5bdViM0tBblud5CnBTCqRffQa3KV
0ViRrkzA/YfKgTp/8v6+9gBWMx1QFsdNs8jDW8/vCvwwYOYGLPmnq5e17ku3igMd
UskW9P4haPGkGdZLJxfeM8KSffvod3vZDSkkOsv0m7+/djwHOFdtb3CIbjCMwMfM
BBHXK2y7zkIqyvyiMgCrXtwh86aYd2ZFWXzpvaEKH7cVymdJRrPHvhYvz4QCsFHE
7F5HP10QEabeSzX5JO/7tpMp7M7EwqArI6hwfbkpz+2PNm0msPDi7ocfJLoW/o7Q
sF6hgx5PKO9No818eEdaNexpPFLDwzp3t/Gad/y557/LatLnpdoVuJYNpDkNhiY9
aklQpObRniDfd9HkORLJzxyqb9uRIpLldMKb6UN5KJawmmQ9WkPpxoKbREZj4fXv
cyUJJj8Z9KmUqtfBZ2Rm
=ZulM
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.11/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "Enable SATA support on DA850 LCDK" from Sekhar Nori:
* tag 'davinci-for-v4.11/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: enable the SATA node
ARM: dts: da850: add the SATA node
devicetree: bindings: add bindings for ahci-da850
Allow the driver to work with device tree support.
Based on initial patch submission from Peter Fox.
Tested on a imx7d-sdb board connected to a SHT15 board via Mikro Bus.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
add Faraday Technology Corporation as vendor faraday for DT
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation shouldn't have broken links.
sphinx linkcheck builder scans all documents for external links, tries
to open them with urllib2, and writes an overview which ones are broken
and redirected to standard output and to output.txt in the output
directory.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rémy Léone <remy.leone@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
A Japanese translation file contained the incorrect email address for
the linux-api list.
Signed-off-by: Tyler Hicks <tyhicks@canonical.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Add documentation of -DCONFIG_SPARSE_RCU_POINTER.
I started to add documentation of -D__CHECK_ENDIAN__ as well, but
discovered I'm too late; that's now enabled by default.
Signed-off-by: Matthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
* pci/msi:
PCI/MSI: Update MSI/MSI-X bits in PCIEBUS-HOWTO
PCI/MSI: Document pci_alloc_irq_vectors(), deprecate pci_enable_msi()
PCI/MSI: Return -ENOSPC if pci_enable_msi_range() can't get enough vectors
PCI/portdrv: Use pci_irq_alloc_vectors()
PCI/MSI: Check that we have a legacy interrupt line before using it
PCI/MSI: Remove pci_msi_domain_{alloc,free}_irqs()
PCI/MSI: Remove unused pci_msi_create_default_irq_domain()
PCI/MSI: Return failure when msix_setup_entries() fails
PCI/MSI: Remove pci_enable_msi_{exact,range}()
amd-xgbe: Update PCI support to use new IRQ functions
[media] cobalt: use pci_irq_allocate_vectors()
PCI/MSI: Fix msi_capability_init() kernel-doc warnings
Update the MSI/MSI-X bits in PCIEBUS-HOWTO. Stop talking about low-level
details that mention deprecated APIs and concentrate on what service
drivers should do and why.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The goldfish platform code registers the platform device unconditionally
which causes havoc in several ways if the goldfish_pdev_bus driver is
enabled:
- Access to the hardcoded physical memory region, which is either not
available or contains stuff which is completely unrelated.
- Prevents that the interrupt of the serial port can be requested
- In case of a spurious interrupt it goes into a infinite loop in the
interrupt handler of the pdev_bus driver (which needs to be fixed
seperately).
Add a 'goldfish' command line option to make the registration opt-in when
the platform is compiled in.
I'm seriously grumpy about this engineering trainwreck, which has seven
SOBs from Intel developers for 50 lines of code. And none of them figured
out that this is broken. Impressive fail!
Fixes: ddd70cf93d ("goldfish: platform device for x86")
Reported-by: Gabriel C <nix.or.die@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Document pci_alloc_irq_vectors() instead of the deprecated pci_enable_msi()
and pci_enable_msix() APIs.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Add new entry to the RDMA-CM configfs that allows users
to select default TOS for RDMA-CM QPs.
This is useful for users that want to control the TOS for legacy
applications without changing their code.
Application that sets the TOS explicitly using the rdma_set_option
API will continue to work as expected, meaning overriding the configfs
value.
CC: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Majd Dibbiny <majd@mellanox.com>
Reviewed-by: Moni Shoua <monis@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Fix a single letter typo in api-skcipher.rst.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.
Furthermore add myself as a maintainer for this driver.
The datasheet can be found at the manufacturers website, see [1]. All
device-tree exposed configuration features have been tested on a i.MX6
platform with a USB2512B hub.
[1] http://ww1.microchip.com/downloads/en/DeviceDoc/00001692C.pdf
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This driver supports the Lantiq SSC SPI controller in master
mode. This controller is found on Intel (former Lantiq) SoCs like
the Danube, Falcon, xRX200, xRX300.
The hardware uses two hardware FIFOs one for received and one for
transferred bytes. When the driver writes data into the transmit FIFO
the complete word is taken from the FIFO into a shift register. The
data from this shift register is then written to the wire. This driver
uses the interrupts signaling the status of the FIFOs and not the shift
register. It is also possible to use the interrupts for the shift
register, but they will send a signal after every word. When using the
interrupts for the shift register we get a signal when the last word is
written into the shift register and not when it is written to the wire.
After all FIFOs are empty the driver busy waits till the hardware is
not busy any more and returns the transfer status.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Since function tables are a common target for attackers, it's best to keep
them in read-only memory. As such, this makes the CDROM device ops tables
const. This drops additionally n_minors, since it isn't used meaningfully,
and sets the only user of cdrom_dummy_generic_packet explicitly so the
variables can all be const.
Inspired by similar changes in grsecurity/PaX.
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jens Axboe <axboe@fb.com>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJYosRpAAoJEAhfPr2O5OEVAU4P/RB/A9v422J1aFixQ1fPp89P
xRp6m6xj2ln/r/ydl5j3LgSzA6nCSQT4p1jRalFRdpk/FyS4v6wE4RhaIDGW/Q1P
WDwRfcyrUdWIPZR6T0289m8eTHG0w4ewbEHPm5iG5UZQHZsObEpmNJD6mOSm00N4
0JhAmJIccWxIjObIajZizQ9BEUUE+T1PQgDf7QiTHFb3d1UrNXYu/cka8Ys9lafu
kR//BPRxLsCXWWHf45ZHgYH+V214haGcVhtlf1ehALlZQ3wNYZaC7XvH8G795ykR
ayrc77qLj2NROhTG4rvljyOH4L0I1IH0k2bC633FrPpgzOCCqNLBMLwn5YhFN3Z+
QNO2ChxDmZlWcqbepkOmK6IK2HmIulM4AOK0gQa+J4inYM3w2aZD3egaFFsx2I0+
1y7KSKAULNjEZanx80t3rxGw+bnIh80eD3n2ODgAU0spqEsm5cb3C3JIN3qeS8KQ
j6vVawB2+gTRCRIHWDBHnYUzkn2SPINp1bRajuxryH1u5TKgvs02NQB84i9mdNR+
iRpH7Yn8BIuA2w0sGGjbyBYyb6IVFrdx9yS7xsr4CbKYR8tWvEsqRxlN7V16J30M
crxj2OM+yAIXLTSB1bW892WL51JqJRGF3lFnUGS4R4PH9tMvR4YN/PT8yv0wZJC/
SfwwJ38/yZBkZuRSNEpt
=OTHY
-----END PGP SIGNATURE-----
Merge tag 'media/v4.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"A colorspace regression fix in V4L2 core and a CEC core bug that makes
it discard valid messages"
* tag 'media/v4.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] cec: initiator should be the same as the destination for, poll
[media] videodev2.h: go back to limited range Y'CbCr for SRGB and, ADOBERGB
Add a new compatible for sun4i-i2s driver to handle some
SoCs that have a reset line that must be asserted/deasserted.
This new compatible, "allwinner,sun6i-a31-i2s", requires the
property "resets" which should be a phandle to the reset line.
Except these differences, the compatible is identical to previous one
which will not handle a reset line.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
I'm starting document of the raid5-cache feature. Please note this is a
kernel doc instead of a mdadm manual, so I don't add the details about
how to use the feature in mdadm side.
Cc: NeilBrown <neilb@suse.com>
Reviewed-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Shaohua Li <shli@fb.com>
This reverts 'commit 7e0739cd9c ("[media] videodev2.h: fix
sYCC/AdobeYCC default quantization range").
The problem is that many drivers can convert R'G'B' content (often
from sensors) to Y'CbCr, but they all produce limited range Y'CbCr.
To stay backwards compatible the default quantization range for
sRGB and AdobeRGB Y'CbCr encoding should be limited range, not full
range, even though the corresponding standards specify full range.
Update the V4L2_MAP_QUANTIZATION_DEFAULT define accordingly and
also update the documentation.
Fixes: 7e0739cd9c ("[media] videodev2.h: fix sYCC/AdobeYCC default quantization range")
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: <stable@vger.kernel.org> # for v4.9 and up
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
We introduced recently a new compatible to deal with the A64 eMMC
controller, let's document its binding.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
In the case of a single clock source, you don't need names. However,
if the controller has 2 clock sources, you need to name them correctly
so the driver can find the 2nd one. The 2nd clock is for the internal
card detect logic.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
This patch fix some spelling typo found in devicetree/bindings/mmc.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Document the device-tree binding of ZTE MMC host on
ZX296718 SoC.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add fifo-addr property and fifo-watermark-quirk property to
synopsys-dw-mshc bindings. It is intended to provide more
dt interface to support SoCs specific configuration.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Many Motorola phones like droid 4 are using a custom PMIC called CPCAP
or 6556002. We can support it's core features quite easily with regmap_spi
and regmap_irq.
The children of cpcap, such as regulators, ADC and USB, can be just regular
device drivers and defined in the dts file. They get probed as we call
of_platform_populate() at the end of our probe, and then the children
can just call dev_get_regmap(dev.parent, NULL) to get the regmap.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Scott <michael.scott@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch adds documentation for devicetree bindings
for LED support as the subnode of MT6323 PMIC
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The Aspeed SoC Display Controller is presented as a syscon device to
arbitrate access by display and pinmux drivers. Video pinmux
configuration on fifth generation SoCs depends on bits in both the
System Control Unit and the Display Controller.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends
on bits in both the System Control Unit and the LPC Host Controller.
The Aspeed LPC Host Controller is described as a child node of the
LPC host-range syscon device for arbitration of access by the host
controller and pinmux drivers.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Whilst describing a device and not a bus, simple-mfd is modelled on
simple-bus where child nodes are iterated and registered as platform
devices. Some complex devices, e.g. the Aspeed LPC controller, can
benefit from address space mapping such that child nodes can use the
regs property to describe their resource offsets within the
multi-function device.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Silence the "make[1]: Nothing to be done for ..." messages for the
no-op targets in Makefile.sphinx.
Signed-off-by: Jim Davis <jim.epost@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
The UAPI header split failed to update the documentation for the input
event codes; fix things accordingly.
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Device tree documentation for Broadcom Secure Processing Unit
(SPU) crypto hardware.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This patch updates the LM90's devicetree definition to
include the #thermal-sensor-cells property as well as
the sensor constants in include/dt-bindings/thermal/lm90.h.
Cc: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This can be used to easily identify a specific chip on a system with
multiple chips.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
-----BEGIN PGP SIGNATURE-----
iQI4BAABCAAiBQJYncJ7GxxjeXJpbGxlLnBpdGNoZW5Ad2VkZXY0dS5mcgAKCRDn
4OgLHRpJcswfD/0dvIvhI9R9ne/kHUsXbW2tIAIc2vrl/jiEA0O90rinRRjxLyIi
3EacSYpL8PXAh5diNannIw/DrjK0FiHB34jJ1NwMP7CQbYMbfb1SGwp5nmIP676W
4iEaSOJDQu76Vbe5L2O4xHUIJoO1l9cr/bZDPXRachBD8H48ZRZUTx0ujff4LbiG
lEwv1Bk35doTRHgmPErPIB/WOlYdvLaoiCUVe9ME0mEEzCmEjoZorTDwaSBpBAMB
4Z04Lz06iP1aPFUm2VYvK5xMvkFN4tS+6xzWpUOUYj8Tty1YptYI7mQINa69J2NA
O8A/elH39Yv1FYvWgrC2SIS/kbHTR/Bxz6napJ0hK3HasLFCwt7Eq2w/XBxr/Wn9
+02buij0PWKywJfuj7tOiAId5IJW0hhEit2BcBFihwsiDDxix679beQoCZ/WRuW/
kJmR+NLRNByVyKCOP239VobiYWjy8DhDTpH5XGwI7bPTiJuS6G6MCVH3f0tYnFTo
8J3gXp4SH2mw6YzWrL8YtKzFKcLEfXTOGc/GFGQX2URV5Es1/Lw4Nh5lrkbEbVoy
dc/S57Ftdde/56L4lDDbydn7pAU8FbuX2gSewvJRuFyhCBKSyw2JEoy27T7t50pd
hN1JvuNYGQ5HP0Vqa/oe1g1GHnBfxiIOm5THX+Iv+3Y0jM1iUDeVeO4DTQ==
=/fPM
-----END PGP SIGNATURE-----
Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linux
From Cyrille:
"""
This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
"""
Requiring contiguous kernel memory is not a good idea, this is a limited
resource and allocation can fail under normal work loads.
This introduces a .write_sg op that supporting drivers can provide
to DMA directly from dis-contiguous memory and a new entry point
fpga_mgr_buf_load_sg that users can call to directly provide page
lists.
The full matrix of compatibility is provided, either the linear or sg
interface can be used by the user with a driver supporting either
interface.
A notable change for drivers is that the .write op can now be called
multiple times.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add "mediatek,mt2701-nor" for nor flash node's compatible.
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
The MR25 family doesn't support JEDEC, so they need explicit mentioning
in the list of supported spi IDs. This makes it possible to add these
using for example:
compatible = "everspin,mr25h40";
There was already an entry for mr25h256. Move that one out of the "keep
for compatibility" section and put in a new group for Everspin MRAMs.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlhr4PIACgkQUa+KL4f8
d2GQZRAAkx+20eOs11nZcJ2FWzKjAU2BP4gXZZPVmnmigrXu0CTw6juN5Egz0mgz
MyPwIdr2BZtV7GT2ATnEE5jlqmy9SNdMsYkG2hsbbkxk5cUytxwbMs8DN0D7PR0c
f2GdrKZTkPsQxgT2U4owGDnYtCSWYjK8pKBHItFE2HhKTZO+JS/MB0IbxHVuHjD9
YF7sE0FtMn4eOhan7EiJrzCMLMxpT6E7GmObCoIQVF+N/qSSpvYUav8ccXMZpVqk
IJTTDyk32TFRF6LJb/h631JyiC9TEgs6hJPkuIqPVZuV9rKaEXN9mR9+94Y7y7P5
hYWU8BXTks1JSOwm5mvtZ0qEw6IuKxWKY7EKSOM7Vs5qha2ocFHTUN+Y1wjjMLa+
UntG4F4dN+0X+hJ3Lo8R56xlwkdRBPfWuqygo2FOHKha3+L+u07xjn7DYXEQlv9m
ATS2zjF/ynOB8rApFWU5beeTwzMs+lXFw8CJlC3ESxyPQlIXgk7AR9B6ThRSR+uT
I9FMTIoQlmpgFVgNsxxrim8p9OOFenwOI/0mlH/dHhB1bpCgsxOetmDLsR3zQrzN
nFTHyi75zaZs1C1/P9aNdkix31f70rvw6Lsloi3LiRR+aiFHMNgWU0bsLO/QBsrT
R5BuWBbjZc90LxKVUm2eTOUprS9SNXlpB/67gzvMrQlI5IUBUmI=
=1Yep
-----END PGP SIGNATURE-----
Merge tag 'ib-mfd-mtd-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
From Lee Jones:
"""
Immutable branch between MFD and MTD due for the v4.11 merge window
"""
The Qualcomm Datacenter Technologies Falkor v1 CPU may allocate TLB entries
using an incorrect ASID when TTBRx_EL1 is being updated. When the erratum
is triggered, page table entries using the new translation table base
address (BADDR) will be allocated into the TLB using the old ASID. All
circumstances leading to the incorrect ASID being cached in the TLB arise
when software writes TTBRx_EL1[ASID] and TTBRx_EL1[BADDR], a memory
operation is in the process of performing a translation using the specific
TTBRx_EL1 being written, and the memory operation uses a translation table
descriptor designated as non-global. EL2 and EL3 code changing the EL1&0
ASID is not subject to this erratum because hardware is prohibited from
performing translations from an out-of-context translation regime.
Consider the following pseudo code.
write new BADDR and ASID values to TTBRx_EL1
Replacing the above sequence with the one below will ensure that no TLB
entries with an incorrect ASID are used by software.
write reserved value to TTBRx_EL1[ASID]
ISB
write new value to TTBRx_EL1[BADDR]
ISB
write new value to TTBRx_EL1[ASID]
ISB
When the above sequence is used, page table entries using the new BADDR
value may still be incorrectly allocated into the TLB using the reserved
ASID. Yet this will not reduce functionality, since TLB entries incorrectly
tagged with the reserved ASID will never be hit by a later instruction.
Based on work by Shanker Donthineni <shankerd@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Currently CONFIG_TIMER_STATS exposes process information across namespaces:
kernel/time/timer_list.c print_timer():
SEQ_printf(m, ", %s/%d", tmp, timer->start_pid);
/proc/timer_list:
#11: <0000000000000000>, hrtimer_wakeup, S:01, do_nanosleep, cron/2570
Given that the tracer can give the same information, this patch entirely
removes CONFIG_TIMER_STATS.
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: John Stultz <john.stultz@linaro.org>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: linux-doc@vger.kernel.org
Cc: Lai Jiangshan <jiangshanlai@gmail.com>
Cc: Shuah Khan <shuah@kernel.org>
Cc: Xing Gao <xgao01@email.wm.edu>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Jessica Frazelle <me@jessfraz.com>
Cc: kernel-hardening@lists.openwall.com
Cc: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Cc: Petr Mladek <pmladek@suse.com>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Michal Marek <mmarek@suse.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-api@vger.kernel.org
Cc: Arjan van de Ven <arjan@linux.intel.com>
Link: http://lkml.kernel.org/r/20170208192659.GA32582@beast
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Various muxes can aggregate multiple irq lines and provide a control
register to determine the active line. Add bindings for interrupt
controller support.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Peter Rosin <peda@axentia.se>
No hardware seems to actually call .link_reset(), and no driver implements
it as more than a nop stub.
Drop mentions of the callback from everywhere. It's dropped from the
documentation as well, but the doc really needs to be updated to reflect
reality better (e.g., on PCIe, slot reset is the link reset). This will be
done in a later patch.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This is a basic driver for the Zeitec ZET6223 I2C touchscreen
controllers. The driver does not support firmware loading, which is not
required for all tablets which contain this chip.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add the device tree bindings document for the TI CPUFreq/OPP driver
on AM33xx, AM43xx, DRA7xx, and AM57xx SoCs. The operating-points-v2
binding allows us to provide an opp-supported-hw property for each OPP
to define when it is available. This driver is responsible for reading
and parsing registers to determine which OPPs can be selectively enabled
based on the specific SoC in use by matching against the opp-supported-hw
data.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Now that we have a workaround for Hisilicon erratum 161010101, notes
this in the arm64 silicon-errata document.
The new config option is too long to fit in the existing kconfig column,
so this is widened to accomodate it. At the same time, an existing
whitespace error is corrected, and the existing pattern of a line space
between vendors is enforced for recent additions.
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
[Mark: split patch, reword commit message, rework table]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
ZTE's zx2967 I2S controller driver introduces pclk, this
patch documents this fact.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Intel Gemini Lake has the same SMBus host controller than Intel Broxton.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The rename did the wrong thing for this documentation file all those
years ago. Fix that as well as the neglected rename of the platform
data structure.
Fixes: e7065e20d9 ("i2c: Rename last mux driver to standard pattern")
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
List all the current valid compatible strings for the l2cache binding.
This should stop checkpatch.pl from complaining and will hopefully save
someone from having to debug a typo in their dts.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This adds device tree bindings for the Cortina systems Gemini
flash controller, a simple physmap which however need a few
syscon bits to be poked to operate properly.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The current default of 20ms cause some devices, which are slow to
initialize, to not show up during the bus scanning. Change this to the
PCIe spec mandated 100ms and document this in the DT binding.
From PCIe base spec rev 3.0, chapter "6.6.1. Conventional Reset":
To allow components to perform internal initialization, system software
must wait a specified minimum period following the end of a Conventional
Reset of one or more devices before it is permitted to issue
Configuration Requests to those devices.
With a Downstream Port that does not support Link speeds greater than 5.0
GT/s, software must wait a minimum of 100 ms before sending a
Configuration Request to the device immediately below that Port.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses on Qualcomm Technologies processors.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
[will: minimise nesting in l2_cache_associate_cpu_with_cluster]
[will: use kstrtoul for unsigned long, remove redunant .owner setting]
Signed-off-by: Will Deacon <will.deacon@arm.com>
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
SSD1306 needs VBAT when it is wired in charge pump configuration. This
patch adds support to the driver to enable VBAT regulator at init time.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Make reset gpio devicetree property optional. Depending on the board
designing there may not be a dedicated gpio for resetting the
display. Without a proper reset there may be some junk in the display
memory at probe time, so in such a case the display memory is cleared
before turning it on. The devicetree binding document is also updated.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Remove reset-active-low from the devicetree binding document. The actual
implementation has never been there in the driver code and there is no
reason to add it because the gpiod API supports gpio flags, including
GPIO_ACTIVE_LOW, directly trough its own devicetree binding.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
This adds device tree bindings for the Cortina Gemini interrupt
controller. They are pretty standard.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Having a command line option to flip the errata handling for a
particular erratum is a little bit unusual, and it's vastly superior to
pass this in the DT. By common consensus, it's best to kill off the
command line parameter.
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
[Mark: split patch, reword commit message]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward. So, describe it
in the device tree.
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The conflict was an interaction between a bug fix in the
netvsc driver in 'net' and an optimization of the RX path
in 'net-next'.
Signed-off-by: David S. Miller <davem@davemloft.net>
Both of these options are poorly named. The features they provide are
necessary for system security and should not be considered debug only.
Change the names to CONFIG_STRICT_KERNEL_RWX and
CONFIG_STRICT_MODULE_RWX to better describe what these options do.
Signed-off-by: Laura Abbott <labbott@redhat.com>
Acked-by: Jessica Yu <jeyu@redhat.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
There are multiple architectures that support CONFIG_DEBUG_RODATA and
CONFIG_SET_MODULE_RONX. These options also now have the ability to be
turned off at runtime. Move these to an architecture independent
location and make these options def_bool y for almost all of those
arches.
Signed-off-by: Laura Abbott <labbott@redhat.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
This adds device tree bindings for the Cortina Systems Gemini
timer block used in these SoCs.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add the documentation to avoid PHY lane swapping. This is a boolean
entry to notify the phy device drivers that the TX/RX lanes NO need
to be swapped.
The use case for this binding mostly happens after wrong HW
configuration of PHY IC during bootstrap.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Contrary to what the Device Tree binding indicates, the binding for the
PPv2 network device currently doesn't provide any fixed link
functionality. This commit adjusts the Device Tree binding documentation
accordingly.
Reported-by: Russell King - ARM Linux <linux@armlinux.org.uk>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Numerous MIPS KVM fixes, improvements, and features for 4.11, many of
which continue to pave the way for VZ support, the most interesting of
which are:
- Add GVA->HPA page tables for T&E, to cache GVA mappings.
- Generate fast-path TLB refill exception handler which loads host TLB
entries from GVA page table, avoiding repeated guest memory
translation and guest TLB lookups.
- Use uaccess macros when T&E needs to access guest memory, which with
GVA page tables and the Linux TLB refill handler improves robustness
against TLB faults and fixes EVA hosts.
- Use BadInstr/BadInstrP registers when available to obtain instruction
encodings after a synchronous trap.
- Add GPA->HPA page tables to replace the inflexible linear array,
allowing for multiple sparsely arranged memory regions.
- Properly implement dirty page logging.
- Add KVM_CAP_SYNC_MMU support so that changes in GPA mappings become
effective in guests even if they are already running, allowing for
copy-on-write, KSM, idle page tracking, swapping, and guest memory
ballooning.
- Add KVM_CAP_READONLY_MEM support, so writes to specified memory
regions are treated as MMIO.
- Implement proper CP0_EBase support in T&E.
- Expose a few more missing CP0 registers to userland.
- Add KVM_CAP_NR_VCPUS and KVM_CAP_MAX_VCPUS support, and allow up to 8
VCPUs to be created in a VM.
- Various cleanups and dropping of dead and duplicated code.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYlKZeAAoJEGwLaZPeOHZ6ghsQAL4HRU32rA6XKE6gKgRiIPYC
n8iHv2EuUCSKnZyM1a9o1QdJU02bBBB5TPYw+NUsqNClaiRLHsaNZR0TSze4gmcF
NVdnEIOmKluSPnbSXNstqpihJ/p6vzJuh+2eh/EpRuyunzmQ01B6ffjUalKzPtBx
EfgFv1mBnteqLgYZwlJQwj8ogX+Y92TrfdzzazJAom6MFx/lMnigPnUeiaXEG8u6
VrOr/c6Q6lMz4Yfh0xyskJWN4B4zI6PW8/G3SKvKhl8YIRQdtFAv1OfFPaSbdTko
ZdEsFO9UOr0KQu13f10pHAdwRruF7OMQ+3nRDYttdYKzWUYC6pTm77yOG/3+MNdv
KALwaQqJBglaShjuzM8WBI09sDeKgaJ8LYZOttm9Mb+ltwfKsJZPDvba67Kv5266
jkzroKuZeQC6SvAHAlQ7qKgdQr1wrqF3WwjNMmeqNR4Fiw2C3ni/8N39MY/qi7RX
NXQv/fJ6XqM37RC0XMlyu5O+zVWPf0IZ0VdCcl3kkqbvCyXq8B8u6dC+L9+wGb5r
07ZMwnYC93CFeYfrjHu/GsqKqONfAL5Pz13Y/YUlgX0phaLB+yrkq70cFLB4sA8K
KgBwDuD0Qbmdvtcd97qFvp96GMuspIcOkMEiqbD/XrblYnYddehP81Aojdw/GDdp
C62jTny1c/n95ylfbpkC
=lMjW
-----END PGP SIGNATURE-----
Merge tag 'kvm_mips_4.11_1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/kvm-mips into HEAD
KVM: MIPS: GVA/GPA page tables, dirty logging, SYNC_MMU etc
Numerous MIPS KVM fixes, improvements, and features for 4.11, many of
which continue to pave the way for VZ support, the most interesting of
which are:
- Add GVA->HPA page tables for T&E, to cache GVA mappings.
- Generate fast-path TLB refill exception handler which loads host TLB
entries from GVA page table, avoiding repeated guest memory
translation and guest TLB lookups.
- Use uaccess macros when T&E needs to access guest memory, which with
GVA page tables and the Linux TLB refill handler improves robustness
against TLB faults and fixes EVA hosts.
- Use BadInstr/BadInstrP registers when available to obtain instruction
encodings after a synchronous trap.
- Add GPA->HPA page tables to replace the inflexible linear array,
allowing for multiple sparsely arranged memory regions.
- Properly implement dirty page logging.
- Add KVM_CAP_SYNC_MMU support so that changes in GPA mappings become
effective in guests even if they are already running, allowing for
copy-on-write, KSM, idle page tracking, swapping, and guest memory
ballooning.
- Add KVM_CAP_READONLY_MEM support, so writes to specified memory
regions are treated as MMIO.
- Implement proper CP0_EBase support in T&E.
- Expose a few more missing CP0 registers to userland.
- Add KVM_CAP_NR_VCPUS and KVM_CAP_MAX_VCPUS support, and allow up to 8
VCPUs to be created in a VM.
- Various cleanups and dropping of dead and duplicated code.
The big feature this time is support for POWER9 using the radix-tree
MMU for host and guest. This required some changes to arch/powerpc
code, so I talked with Michael Ellerman and he created a topic branch
with this patchset, which I merged into kvm-ppc-next and which Michael
will pull into his tree. Michael also put in some patches from Nick
Piggin which fix bugs in the interrupt vector code in relocatable
kernels when coming from a KVM guest.
Other notable changes include:
* Add the ability to change the size of the hashed page table,
from David Gibson.
* XICS (interrupt controller) emulation fixes and improvements,
from Li Zhong.
* Bug fixes from myself and Thomas Huth.
These patches define some new KVM capabilities and ioctls, but there
should be no conflicts with anything else currently upstream, as far
as I am aware.
Add a hypercall to retrieve the host realtime clock and the TSC value
used to calculate that clock read.
Used to implement clock synchronization between host and guest.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
power domain. Till now, the name of node from DT was used which mostly is just
"power-domain". We need more than that.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYk3brAAoJEME3ZuaGi4PXlLQP/jmi+uKo+1Ofc/X4r5flKuy7
s66sklaVUTFdZVDe7WjR8TW8alau90yM7mXSLi6iQkSBzoRgmkfB1j97PdzKiYj8
TKVGOfQSLcL/PqD0og+4yicPgaD2YfIJyeE5E0k3ETxQDi3+EVxdvcsjNEsYKA3n
V4TuWlTTbdOSRlqQBmH+VvECWMaYrT0Fn2j7lUX4jeAqlAj6NsQ7Ogq8pGPhikmF
rp2e/SMP1ZdylPsmHTTynpLE0PlkQ8Rwz2vYAu0YDL0rTCgqhIqctwZqPJ1pHwHW
/pw6X2nssPz3nzySWAvRQ3oyW2akWMq2Xibuu7RVI+iEj+rR5AeI6UUTZJ8DyY1H
uhzvXLMJ0XgkN5sobC+WUmA8T17s9tsYQHyFIOZdG8RmPwNa8zP4lJmBG4xOyfNG
xAJl/KhGJHIOrDotGpiovf8MqNEn/jPuiSK0jsFo2sLDNhdxJnOkcchAyGIGUGh1
b74TCgtMNTES50BZbWm0ijaSqk10CrI8wgkVomNLXdW7eGLLvISzLD5Fz/SNQev7
OJporWHONEFWWiH90hPns1ENW3KuEK29yZto9KtyojPAgWBCjSN2/X4vjH3h3rTv
Vca8ArtboFmLA1175oqvX+g6BGw4A0iCvQCgrZoTNRZSTwrbC4IEgImtWpg+n6YO
E5CNm5MIGjPlz9tSu1mX
=1AMJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "soc: samsung: pm_domains for v4.11" from Krzysztof Kozłowski:
Improve the PM domains driver for Exynos by displaying a user-friendly name of
power domain. Till now, the name of node from DT was used which mostly is just
"power-domain". We need more than that.
* tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pm_domains: Read domain name from the new label property
soc: samsung: pm_domains: Remove message about failed memory allocation
soc: samsung: pm_domains: Remove unused name field
soc: samsung: pm_domains: Use full names in subdomains registration log
The mv88e6390 ports 9 and 10 supports some additional PHY modes. Add
these modes to the PHY core so they can be used in the binding.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some patches to support two new SoCs: the H2+ and the V3s.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkE5wAAoJEBx+YmzsjxAgPrkP/1ytDjHOhEvHyvBiHJkqrY9u
zMAPbXl7MtUjRqHHq0otmDSbL8dPpWYxKI+5gv4mqTmhppxs3430rRxhP/56fB/g
C4v1mL6LUc/mDcmYhIBxt03Ddq4fZCEbFzZp31r9+CqkduO0+WjsE7NgbUERb33r
NJ/OfWc7k7auJYEtZMCiMwn8Y98EJofw+sNlPtsdtVZw0o96Tspd5xkV83bULN6r
LQnBZMQZgmXrKglJrvCikIQPnVSsEtH0sN3xw4pr4sIuOf5VpHi33LnkJbftEq+V
mJoLWTHODPB1VqH1hzceVHLBwXG3kMtbYGYXPJkTy8/eAVxF9Vj/YRls9+XQtFMc
Pl/1LLP2z2OSIDiR/xMpMUEFtc1++q5TDepVGXdW6A3Dv9qhp/fjlIjLF6aUtbMP
67qNw70rSbCcBw9EQAVG2yPM2MSU9lkwm3bb8MY2usduTBPh7huYbxlChZvATrL0
063rJy4BkVwsm1LKcn7nCedDD6HUwcCwXhlklwWTMjY3AZ6CH0VVb5ynn87UkJPq
fACRA6RvzpDETPzPm/ReasT8u30XKKKdKAd77EqZaYUjKWjvHcZ8oIKahK5MKE6G
I7+3CDZsRZlhz/u6fraQ/iFmLTEogEtDr6x6vp1RFQ8tmtkqgzdGJHsP1oRSG4SW
BUqwz7vd/TtzSJK+vxSt
=YGm1
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Pull "Allwinner core changes for 4.11" from Maxime Ripard:
Some patches to support two new SoCs: the H2+ and the V3s.
* tag 'sunxi-core-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm: sunxi: add support for V3s SoC
ARM: sunxi: add support for H2+ SoC
SoC part of the support for the for Marvell switches with integrated
CPUs based on Armada XP: the SMP support is slightly different.
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWJCa0yMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71bmhAJoCMTBerj+q
dN6aACDT7cfSl8BUwQCfSBNQ2+0r6+naWABhDo7DhPoeOoE=
=XnFS
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.11-2' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu soc for 4.11 (part 2)" from Gregory CLEMENT:
SoC part of the support for the for Marvell switches with integrated
CPUs based on Armada XP: the SMP support is slightly different.
* tag 'mvebu-soc-4.11-2' of git://git.infradead.org/linux-mvebu:
arm: mvebu: support for SMP on 98DX3336 SoC
Support for the audio codec and Mali GPU for the A33
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYmHAxAAoJEBx+YmzsjxAgiG8P/ijFKXwrmqtrk5a3gUvYIZMK
Qw7zFwHAYgijDRKMNOC9TuvRx/5x6k5V/9kT19zavrz9b1lX/PG5XHfVJH4eWD5U
KjTbISJNR2t7uMTiW2Ydree3D/m6AkrulbOF7M9UP8W5dhwbziJ0uOyAMzxIryjl
Q5i3eUg3mUJylGk2SFcX4ANvtTpCPqvUjExRP1hwQSNonVQgaEKg9LKXEdo8o9RT
hlF6yStn8AyNtHX6rzChiv7AxvOoD5vSehEWuWg3O7GTpUX5lWDzNJewlkkJ6aEl
HBzO1Fni6e/TAxXBEeMeQlf6VnFfSjWhkvMEa5OhFB5NeFE+/THTX+tgyidGK6bT
SwW5+YkQp5ZDhnYU40r0WrJwq4rKoJXzzqkjhE2iPng1zqMbMudiQzBXoITNCTC1
zOYCNMun1lg7GbWXC/YolGUe7ORYKhn+bWNQaBPhn1NR6Ck0uNTQZFyCxdDqN3rH
XtC/JKxbkeXNXSAVFe/16yyyp5bk325n7uNxYzFH4ix9ePIUpvvBCzYgzh4EQY3V
OMDPDFsmApV85S+a5U4ZcTe8QVk5PrAmEFGjfO/doMVcduH4TH3kbQz9GvoQtxJv
R73qeTGWzZs1jLo+UovJ9+W8RYGUdlik4G3i0iT5LG4BiLKNmq+YcE8DEPg/C45t
FAByvIheTctIWKeMhQpP
=X2M/
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.11, part 2" from Maxime Ripard:
Support for the audio codec and Mali GPU for the A33
* tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i: sinlinx: Enable audio nodes
ARM: dts: sun8i: parrot: Enable audio nodes
ARM: dts: sun8i: Add audio codec, dai and card for A33
ARM: sun8i: dt: Add mali node
dt-bindings: gpu: Add Mali Utgard bindings
The usual chunk of DT changes, most notably:
- Support for the H2+ and the V3s
- CPUFreq support for the A33
- SPDIF support for the A31 and H3
- New boards: Beelink X2, Lichee Pi One, Lichee Pi Zero,
Orange Pi Zero
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkFCYAAoJEBx+YmzsjxAgljYP/0seq1LEtMtoTeXHP6ZPkrju
7/pHjEwJFZRH98DZ0QMAcUM+fHB0C4h5UadEXCIyzYBO9yeHzm+Hoys4VvpaQasL
6taHz3zJ5T1/si7HyyP16LEwaFeARmSO3aXh4t5195Y2u3BFD+b2i5BpMquCC5CM
XXJmx3Q487bUWjdufUqiSz0gWK1BfKw/eJAawoJbIl9Z6v7wOvE0SQF8ZtIc2eOl
WX9uyNKdYh4PsSC0TxexDeKHNhLh2hJgO1HxYg+DTdyGM144XO0OSuPFtfilROaL
tViKBohffz8A4K5m5iCaDva+P9318iO2xVN91/DFV6VS2XhMRvUrfZRd9kEvuhvu
FJF3KrIZDLRu7tkcHVt9GDjO3CElejMT+qLOGg7t+9nJ+6RjyHUSBs6HIU0Opsu0
Fw7LyHihzDH/m7m87lxUUmC5rSRqMVfuiKwphHYqDzkYEGEnL4kv055rE6cBFGyM
zr7aajpiFgARPXj1XdZQRnz8uC8kySUf2o1oLPdhP3szX41AWBTiBuT7yqMB6qnD
5B8Xj4zTsjEYfwsaWaI8VhbK2UsLgsUlbUXugKfqtjoPTjaWN6zQ3C6030Bov9za
2jo0+187iYp/B/M4DPiH3Kicfntnj4DWRmBt8wCX/PVXS2tD1S617JzugbX/+EZK
PF328UgsT3c1UkccBK9/
=ig5Q
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.11" from Maxime Ripard:
The usual chunk of DT changes, most notably:
- Support for the H2+ and the V3s
- CPUFreq support for the A33
- SPDIF support for the A31 and H3
- New boards: Beelink X2, Lichee Pi One, Lichee Pi Zero,
Orange Pi Zero
* tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (42 commits)
ARM: dts: sun8i-h3: Add SPDIF to the Beelink X2
ARM: dts: sun8i-h3: Add the SPDIF block to the H3
ARM: dts: sun8i-h3: Add SPDIF TX pin to the H3
ARM: dts: sun8i-h3: Add dts for the Beelink X2 STB
ARM: sun8i: sina33: Enable display
ARM: sun8i: a23/a33: Add the oscillators accuracy
ARM: sun8i: a23/a33: Enable the real LOSC and use it
ARM: dts: sunxi: add support for Lichee Pi Zero board
ARM: dts: sunxi: add dtsi file for V3s SoC
ARM: dts: sun6i: sina31s: Enable USB OTG controller in peripheral mode
ARM: dts: sun8i: reference-design: use AXP223 DTSI
ARM: dts: sun8i: parrot: use AXP223 DTSI
ARM: dts: sun8i: sina33: use AXP223 DTSI
ARM: dts: sun8i: a33-olinuxino: use AXP223 DTSI
ARM: dts: add DTSI for AXP223
dt-bindings: power: axp20x-usb: add axp223 compatible
ARM: dts: sun7i: Add wifi dt node on Banana Pro
ARM: dts: sun6i: Add SPDIF to the Mele I7
devicetree: bindings: Add vendor prefix for Shenzhen Xunlong Software
ARM: dts: sun8i-h3: orange-pi-pc: Enable audio codec
...
Add support for Marvell switches with integrated CPUs based on Armada XP
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWJCV2yMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71SkdAJ0S0Drnjneu
0rdBe1D5BsfMyao7pQCgpGRbAwKc6mtY4w78uFxahRUNdxI=
=3/jm
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.11-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT:
Add support for Marvell switches with integrated CPUs based on Armada XP
* tag 'mvebu-dt-4.11-3' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: Add device tree for db-dxbc2 and db-xc3-24g4xg boards
ARM: dts: mvebu: Add device tree for 98DX3236 SoCs
The joys of copy/paste: the example of a virtualization capable GIC
in the DT binding was wrong, and propagated to dozens of platforms.
By having a GICC region that is only 4kB (instead of 8kB), we
end-up not being able to access the GICC_DIR register which is on
the second page.
Oh well. Let's fix the source of the crap before tackling individual
offenders.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Get the firmware's secure-boot status in the kernel boot wrapper and stash
it somewhere that the main kernel image can find.
The efi_get_secureboot() function is extracted from the ARM stub and (a)
generalised so that it can be called from x86 and (b) made to use
efi_call_runtime() so that it can be run in mixed-mode.
For x86, it is stored in boot_params and can be overridden by the boot
loader or kexec. This allows secure-boot mode to be passed on to a new
kernel.
Suggested-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1486380166-31868-5-git-send-email-ard.biesheuvel@linaro.org
[ Small readability edits. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The big things this time around are:
1) support for hw cursor on newer mdp5 devices (snapdragon 820+,
tested on db820c)
2) dsi encoder cleanup
3) gpu dt bindings cleanup so we can get the gpu nodes merged upstream
* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (32 commits)
drm/msm: return -EFAULT if copy_from_user() fails
drm/msm/dsi: Add PHY/PLL for 8x96
drm/msm/dsi: Add new method to calculate 14nm PHY timings
drm/msm/dsi: Move PHY operations out of host
drm/msm/dsi: Reset both PHYs before clock operation for dual DSI
drm/msm/dsi: Pass down use case to PHY
drm/msm/dsi: Return more timings from PHY to host
drm/msm/dsi: Add a PHY op that initializes version specific stuff
drm/msm/dsi: Add 8x96 info in dsi_cfg
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
drm/msm/mdp5: Add support for legacy cursor updates
drm/msm/mdp5: Refactor mdp5_plane_atomic_check
drm/msm/mdp5: Add cursor planes
drm/msm/mdp5: Misc cursor plane bits
drm/msm/mdp5: Configure COLOR3_OUT propagation
drm/msm/mdp5: Use plane helpers to configure src/dst rectangles
drm/msm/mdp5: Prepare CRTC/LM for empty stages
drm/msm/mdp5: Create only as many CRTCs as we need
drm/msm/mdp5: cfg: Change count to unsigned int
drm/msm/mdp5: Create single encoder per interface (INTF)
...
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJYmJDxAAoJEAhfPr2O5OEVFtkQAJHHkcc4H139Fdp0ThGLLLf/
1VWAwQqWb/WmXMqIrE2fIQdEty8za8GvX6gQMsgeDS06GTlxtprnBeH/ZKlwrNR3
akq/mwQPtJhOUe5uuAmgcGUOrIUIRfO0kmY6hZY+92MyxHbUbmSvpV6YHe81eWV1
Emkwc4cMrir3RaCAsn2FgRnFRRpB58oi9TCe89LtLI4zzCMuTzEvEfG7O9u5WCcO
SrhMv05M5XWIvEywoZsKcUW+vBZxZ6QvbG970MY5czW2WRs5GIoOnwskNYpo/bxy
ttKmcgDXD63Wa2JPuEImLm8imyHhquJMKXCFrCRDvSWVw5p+xKDx5lX56cMhJYmr
ZHG32Z7dsG2bfVLY5+L/B+4QhnBYqEehhgh/8oDhrR8POw+71L40aWCq5gC9cHp4
fjNBRxII11i6AEqyMA2Dv+aSyeW3LSYBxV11h5F/Zef5fpa+WMgtHLjKKxRMOnzF
lt81OC5yg3XWBRb4s/4xXghOOmMPFMPCo8LUbo3wB5wGNBtguBBXssZ2HIolrSCA
/NAD01Eb29dRhtRXEqQYAhEuSiuob6ETdn+FktbtUeZl5ZUg7JfZ+A5MqTmH1l1u
Ezl8I42BnkMuSc2gdkWh1eBJfrzNEytiW7EOZO4TMfi00PzlshwusQkXtRTUC5aC
DG5W41QC2PolZnV8XcXs
=nEM8
-----END PGP SIGNATURE-----
Merge tag 'media/v4.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"A few documentation fixes at CEC (with got promoted from staging for
4.10), and one fix on its core."
* tag 'media/v4.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] cec: fix wrong last_la determination
[media] cec-intro.rst: mention the v4l-utils package and CEC utilities
[media] cec rst: remove "This API is not yet finalized" notice
The PCIe controller in HiSilicon Hip06/Hip07 SoCs is not completely
ECAM-compliant. It is non-ECAM only for the RC bus config space; for any
other bus underneath the root bus it does support ECAM access.
Add DT support for the almost-ECAM Hip06/Hip07 controllers.
[bhelgaas: drop dev->of_node test, driver name "hisi-pcie-almost-ecam"]
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Move the document describing PM notifiers (used during system sleep
state transitions) to Documentation/driver-api/pm/, convert it to reST
and update it to use current terminology. Also replace the remaining
references to the old version of it in .txt documents with references
to the new one.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Move the document describing the system sleep state transitions API
for devices to Documentation/driver-api/pm/, convert it to reST and
update it to use current terminology. Also remove the remaining
reference to the old version of it from pm.h.
The new document still contains references to some documents in the
.txt format that will be converted later.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
No need for specifying a list of interrupts in the declaration
of IDU interrupt controller anymore since the kernel can obtain
a number of supported interrupts from the build register.
Also delete support of the second parameter for devices which
are connected to IDU because it is not used anywhere.
Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Suggested by Rob Herring. We still support the old names for
compatibility with downstream android dt files.
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
The original way we determined the gpu version was based on downstream
bindings from android kernel. A cleaner way is to get the version from
the compatible string.
Note that no upstream dtb uses these bindings. But the code still
supports falling back to the legacy bindings (with a warning), so that
we are still compatible with the gpu dt node from android device
kernels.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
The plan is to use the OPP bindings. For now, remove the documentation
for qcom,gpu-pwrlevels, and make the driver fall back to a safe low
clock if the node is not present.
Note that no upstream dtb use this node. For now we keep compatibility
with this node to avoid breaking compatibility with downstream android
dt files.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
In any case where we recurse but don't mention $(MAKE) literally in
the recipe, we need to add a '+' at the start of the command to ensure
that parallel makes and various other options work properly.
Fixes: 609afe6b49 ("Documentation/sphinx: build the media intermediate ...")
Tested-by: Markus Heiser <markus.heiser@darmarit.de>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
As we use redirection to create the SVG file, even a failed conversion
will create the file and 'make' will consider it up-to-date if the
build is retried. We should delete it in case of failure.
Fixes: ec868e4ee2 ("docs-rst: media: build SVG from graphviz files")
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
As $(SHELL) doesn't include the -e option, any loop or other sequence
needs to include explicit checks for failing commands.
Fixes: 609afe6b49 ("Documentation/sphinx: build the media intermediate ...")
Fixes: 606b9ac81a ("doc-rst: generic way to build only sphinx sub-folders")
Fixes: cd21379b16 ("doc-rst: generic way to build PDF of sub-folders")
Tested-by: Markus Heiser <markus.heiser@darmarit.de>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
'uart-has-rtscts' property and 'rts-gpios|cts-gpios' are normally
mutually exclusive, however it is possible for some drivers to have
a dynamic approach, meaning that both properties can be relevant.
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This resolves the merge errors that were reported in linux-next and it
picks up the staging and IIO fixes that we need/want in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The driver is used for Rockchip rk3288-based boards using a configurable
analog output (can be an headphone) and the built-in HDMI audio output
that is part of the RK3288 SoCs and use the Alsa HDMI codec driver. For
some rk3288-based boards the analog output and the hdmi audio are plugged
on the same i2s line, so we have to do the same in the driver by using a
DAI link CPU to multicodecs. This configuration can be found for example
on the Radxa Rock2 or the Firefly-RK3288.
This commit is based on the initial work that was done by Sjoerd Simons
<sjoerd.simons@collabora.com> with some improvements.
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The driver defaults to voltage, not current, type so correct
this in the device tree binding documentation.
Signed-off-by: Hans Holmberg <hans@pixelmunchies.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
