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Author SHA1 Message Date
Linus Torvalds
822ef14e9d ARM: SoC driver updates for v5.9 
A couple of subsystems have their own subsystem maintainers but choose
 to have the code merged through the soc tree as upstream, as the code
 tends to be used across multiple SoCs or has SoC specific drivers itself:
 
  - memory controllers:
      Krzysztof Kozlowski takes ownership of the drivers/memory
      subsystem and its drivers, starting out with a set of cleanup
      patches.
      A larger driver for the Tegra memory controller that was accidentally
      missed for v5.8 is now added.
 
  - reset controllers:
      Only minor updates to drivers/reset this time
 
  - firmware:
      The "turris mox" firmware driver gains support for signed firmware blobs
      The tegra firmware driver gets extended to export some debug information
      Various updates to i.MX firmware drivers, mostly cosmetic
 
  - ARM SCMI/SCPI:
      A new mechanism for platform notifications is added, among a number
      of minor changes.
 
  - optee:
      Probing of the TEE bus is rewritten to better support detection of
      devices that depend on the tee-supplicant user space.
      A new firmware based trusted platform module (fTPM) driver is added
      based on OP-TEE
 
  - SoC attributes:
      A new driver is added to provide a generic soc_device for identifying
      a machine through the SMCCC ARCH_SOC_ID firmware interface rather than
      by probing SoC family specific registers.
      The series also contains some cleanups to the common soc_device code.
 
 There are also a number of updates to SoC specific drivers,
 the main ones are:
 
  - Mediatek cmdq driver gains a few in-kernel interfaces
 
  - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
    support for additional SoC variants
 
  - The Qualcomm GENI core code gains interconnect path voting and
    performance level support, and integrating this into a number of
    device drivers.
 
  - A new driver for Samsung Exynos5800 voltage coupler for
 
  - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
    specific device drivers
 
  - Updates to the TI K3 Ring Accelerator driver
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Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A couple of subsystems have their own subsystem maintainers but choose
  to have the code merged through the soc tree as upstream, as the code
  tends to be used across multiple SoCs or has SoC specific drivers
  itself:

   - memory controllers:

     Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
     and its drivers, starting out with a set of cleanup patches.

     A larger driver for the Tegra memory controller that was
     accidentally missed for v5.8 is now added.

   - reset controllers:

     Only minor updates to drivers/reset this time

   - firmware:

     The "turris mox" firmware driver gains support for signed firmware
     blobs The tegra firmware driver gets extended to export some debug
     information Various updates to i.MX firmware drivers, mostly
     cosmetic

   - ARM SCMI/SCPI:

     A new mechanism for platform notifications is added, among a number
     of minor changes.

   - optee:

     Probing of the TEE bus is rewritten to better support detection of
     devices that depend on the tee-supplicant user space. A new
     firmware based trusted platform module (fTPM) driver is added based
     on OP-TEE

   - SoC attributes:

     A new driver is added to provide a generic soc_device for
     identifying a machine through the SMCCC ARCH_SOC_ID firmware
     interface rather than by probing SoC family specific registers.

     The series also contains some cleanups to the common soc_device
     code.

  There are also a number of updates to SoC specific drivers, the main
  ones are:

   - Mediatek cmdq driver gains a few in-kernel interfaces

   - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
     support for additional SoC variants

   - The Qualcomm GENI core code gains interconnect path voting and
     performance level support, and integrating this into a number of
     device drivers.

   - A new driver for Samsung Exynos5800 voltage coupler for

   - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
     specific device drivers

   - Updates to the TI K3 Ring Accelerator driver"

* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
  soc: qcom: geni: Fix unused label warning
  soc: qcom: smd-rpm: Fix kerneldoc
  memory: jz4780_nemc: Only request IO memory the driver will use
  soc: qcom: pdr: Reorder the PD state indication ack
  MAINTAINERS: Add Git repository for memory controller drivers
  memory: brcmstb_dpfe: Fix language typo
  memory: samsung: exynos5422-dmc: Correct white space issues
  memory: samsung: exynos-srom: Correct alignment
  memory: pl172: Enclose macro argument usage in parenthesis
  memory: of: Correct kerneldoc
  memory: omap-gpmc: Fix language typo
  memory: omap-gpmc: Correct white space issues
  memory: omap-gpmc: Use 'unsigned int' for consistency
  memory: omap-gpmc: Enclose macro argument usage in parenthesis
  memory: omap-gpmc: Correct kerneldoc
  memory: mvebu-devbus: Align with open parenthesis
  memory: mvebu-devbus: Add missing braces to all arms of if statement
  memory: bt1-l2-ctl: Add blank lines after declarations
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  ...
 2020-08-03 19:30:59 -07:00
Stephen Boyd
dd9c697a94 Merge branches 'clk-microchip', 'clk-mmp', 'clk-unused' and 'clk-at91' into clk-next 
- Add support for SAMA7G5 SoC clks
 - Microchip Sparx5 DPLL clk

* clk-microchip:
  clk: sparx5: Add Sparx5 SoC DPLL clock driver
  dt-bindings: clock: sparx5: Add bindings include file

* clk-mmp:
  clk: mmp: avoid missing prototype warning

* clk-unused:
  clk: drop unused function __clk_get_flags

* clk-at91:
  clk: at91: sama7g5: add clock support for sama7g5
  clk: at91: clk-utmi: add utmi support for sama7g5
  clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs
  clk: at91: add macro for pll ids mask
  clk: at91: clk-programmable: add mux_table option
  clk: at91: clk-peripheral: add support for changeable parent rate
  clk: at91: clk-master: add master clock support for SAMA7G5
  clk: at91: clk-generated: add mux_table option
  clk: at91: clk-generated: pass the id of changeable parent at registration
  clk: at91: replace conditional operator with double logical not
  clk: at91: sckc: register slow_rc with accuracy option
  clk: at91: sam9x60: fix main rc oscillator frequency
  clk: at91: sam9x60-pll: use frac when setting frequency
  clk: at91: sam9x60-pll: check fcore against ranges
  clk: at91: sam9x60-pll: use logical or for range check
  clk: at91: clk-sam9x60-pll: fix mul mask
  clk: at91: clk-generated: check best_rate against ranges
  clk: at91: clk-generated: continue if __clk_determine_rate() returns error
  clk: at91: fix possible dead lock in new drivers
 2020-08-03 15:07:18 -07:00
Stephen Boyd
1a91e318c0 Merge branches 'clk-fallthru', 'clk-ingenic', 'clk-tegra', 'clk-sirf' and 'clk-qoriq' into clk-next 
- Add RTC related clks on Ingenic SoCs
 - Support USB PHY clks on Ingenic SoCs

* clk-fallthru:
  clk: davinci: Use fallthrough pseudo-keyword
  clk: imx: Use fallthrough pseudo-keyword

* clk-ingenic:
  clk: X1000: Add support for calculat REFCLK of USB PHY.
  clk: JZ4780: Reformat the code to align it.
  clk: JZ4780: Add functions for enable and disable USB PHY.
  clk: Ingenic: Add RTC related clocks for Ingenic SoCs.
  dt-bindings: clock: Add tabs to align code.
  dt-bindings: clock: Add RTC related clocks for Ingenic SoCs.

* clk-tegra:
  clk: tegra: pll: Improve PLLM enable-state detection

* clk-sirf:
  clk: clk-atlas6: fix return value check in atlas6_clk_init()

* clk-qoriq:
  clk: qoriq: add LS1021A core pll mux options
 2020-08-03 15:07:08 -07:00
Stephen Boyd
53e07424ec Merge branches 'clk-actions', 'clk-rockchip', 'clk-iproc', 'clk-intel' and 'clk-debugfs' into clk-next 
- RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs

* clk-actions:
  MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs
  clk: actions: Add Actions S500 SoC Reset Management Unit support
  dt-bindings: reset: Add binding constants for Actions S500 RMU
  clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoC
  dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC
  clk: actions: Fix h_clk for Actions S500 SoC

* clk-rockchip:
  clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks
  clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"
  clk: rockchip: use separate compatibles for rk3288w-cru
  dt-bindings: clocks: add rk3288w variant compatible
  clk: rockchip: Handle clock tree for rk3288w variant
  clk: rockchip: convert rk3036 pll type to use internal lock status
  clk: rockchip: convert basic pll lock_wait to use regmap_read_poll_timeout
  clk: rockchip: convert rk3399 pll type to use readl_relaxed_poll_timeout

* clk-iproc:
  clk: iproc: round clock rate to the closest

* clk-intel:
  clk: intel: Avoid unnecessary memset by improving code
  clk: intel: Improve locking in the driver
  clk: intel: Use devm_clk_hw_register() instead of clk_hw_register()

* clk-debugfs:
  clk: Add support for enabling/disabling clocks from debugfs
 2020-08-03 15:06:53 -07:00
Stephen Boyd
987106e5f2 Merge branches 'clk-https', 'clk-renesas', 'clk-kconfig', 'clk-amlogic' and 'clk-imx' into clk-next 
* clk-https:
  Replace HTTP links with HTTPS ones: Common CLK framework

* clk-renesas:
  clk: renesas: cpg-mssr: Add r8a774e1 support
  dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
  clk: renesas: Add r8a774e1 CPG Core Clock Definitions
  dt-bindings: power: Add r8a774e1 SYSC power domain definitions
  clk: renesas: rzg2: Mark RWDT clocks as critical
  clk: renesas: rcar-gen3: Mark RWDT clocks as critical
  clk: renesas: cpg-mssr: Mark clocks as critical only if on at boot
  dt-bindings: clock: renesas: cpg: Convert to json-schema

* clk-kconfig:
  clk: hsdk: Fix bad dependency on IOMEM
  clk: Specify IOMEM dependency for HSDK pll driver
  clk: Drop duplicate selection in Kconfig
  clk: AST2600: Add mux for EMMC clock
  clk: mvebu: ARMADA_AP_CPU_CLK needs to select ARMADA_AP_CP_HELPER

* clk-amlogic:
  clk: meson: meson8b: add the vclk2_en gate clock
  clk: meson: meson8b: add the vclk_en gate clock
  clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
  clk: meson: g12a: Add support for NNA CLK source clocks
  dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs

* clk-imx:
  clk: imx: vf610: add CAAM clock
  clk: imx8mp: add mu root clk
 2020-08-03 15:06:45 -07:00
Stephen Boyd
c63e2a7af3 Merge branches 'clk-socfpga', 'clk-doc', 'clk-qcom', 'clk-vc5' and 'clk-bcm' into clk-next 
- Enable CPU clks on Qualcomm IPQ6018 SoCs
 - Enable CPU clks on Qualcomm MSM8996 SoCs
 - GPU clk support for Qualcomm SM8150 and SM8250 SoCs
 - Audio clks on Qualcomm SC7180 SoCs
 - Make defines for bcm63xx-gate clks to use in DT
 - Support gate clks on BCM6318 SoCs
 - Add HDMI clks for BCM2711 SoCs
 - Support BCM2711 SoC firmware clks

* clk-socfpga:
  clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clk
  clk: socfpga: agilex: add nand_x_clk and nand_ecc_clk
  dt-bindings: agilex: add NAND_X_CLK and NAND_ECC_CLK

* clk-doc:
  clk: Clean up kernel-doc errors
  clk: <linux/clk-provider.h>: drop a duplicated word
  clk: add function documentation for clk_hw_round_rate()

* clk-qcom: (38 commits)
  dt-bindings: clock: Fix YAML schemas for LPASS clocks on SC7180
  clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk
  clk: qcom: gcc-sdm660: Add missing modem reset
  clk: qcom: lpass: Add support for LPASS clock controller for SC7180
  clk: qcom: gcc: Add support for GCC LPASS clock for SC7180
  dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7180
  clk: qcom: gdsc: Add support to enable retention of GSDCR
  clk: qcom: Export gdsc_gx_do_nothing_enable() to modules
  clk: qcom: Add graphics clock controller driver for SM8250
  clk: qcom: Add graphics clock controller driver for SM8150
  clk: qcom: add common gdsc_gx_do_nothing_enable for gpucc drivers
  dt-bindings: clock: add SM8250 QCOM Graphics clock bindings
  dt-bindings: clock: add SM8150 QCOM Graphics clock bindings
  dt-bindings: clock: combine qcom,sdm845-gpucc and qcom,sc7180-gpucc
  clk: qcom: gcc: remove unnecessary vco_table from SM8150
  clk: qcom: clk-alpha-pll: use the right PCAL_DONE value for lucid pll
  clk: qcom: clk-alpha-pll: same regs and ops for trion and lucid
  clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL
  clk: qcom: gcc: fix sm8150 GPU and NPU clocks
  dt-bindings: clock: Fix qcom,msm8996-apcc yaml syntax
  ...

* clk-vc5:
  clk: vc5: use a dedicated struct to describe the output drivers
  dt-bindings: clk: versaclock5: convert to yaml
  MAINTAINERS: take over IDT VersaClock 5 clock driver
  dt-bindings: clk: versaclock5: fix 'idt' prefix typos
  clk: vc5: Add memory check to prevent oops
  clk: vc5: fix use of memory after it has been kfree'd
  clk: vc5: Enable addition output configurations of the Versaclock
  dt: Add additional option bindings for IDT VersaClock
  clk: vc5: Allow Versaclock driver to support multiple instances

* clk-bcm: (44 commits)
  clk: bcm2835: Do not use prediv with bcm2711's PLLs
  dt-bindings: arm: bcm: Add a select to the RPI Firmware binding
  clk: bcm: dvp: Add missing module informations
  clk: bcm: rpi: Remove the quirks for the CPU clock
  clk: bcm2835: Don't cache the PLLB rate
  clk: bcm2835: Allow custom CCF flags for the PLLs
  Revert "clk: bcm2835: remove pllb"
  clk: bcm: rpi: Give firmware clocks a name
  clk: bcm: rpi: Discover the firmware clocks
  clk: bcm: rpi: Add an enum for the firmware clocks
  clk: bcm: rpi: Add DT provider for the clocks
  clk: bcm: rpi: Make the PLLB registration function return a clk_hw
  clk: bcm: rpi: Split pllb clock hooks
  clk: bcm: rpi: Rename is_prepared function
  clk: bcm: rpi: Pass the clocks data to the firmware function
  clk: bcm: rpi: Add clock id to data
  clk: bcm: rpi: Create a data structure for the clocks
  clk: bcm: rpi: Use CCF boundaries instead of rolling our own
  clk: bcm: rpi: Make sure the clkdev lookup is removed
  clk: bcm: rpi: Switch to clk_hw_register_clkdev
  ...
 2020-08-03 15:06:16 -07:00
Pavel Machek
54212f5a1b leds: add RGB color option, as that is different from multicolor. 
Multicolor is a bit too abstract. Yes, we can have
Green-Magenta-Ultraviolet LED, but so far all the LEDs we support are
RGB, and not even RGB-White or RGB-Yellow variants emerged.

Multicolor is not a good fit for RGB LED. It does not really know
about LED color.  In particular, there's no way to make LED "white".

Userspace is interested in knowing "this LED can produce arbitrary
color", which not all multicolor LEDs can.

Signed-off-by: Pavel Machek <pavel@ucw.cz>
 2020-08-03 13:26:15 +02:00
Arnd Bergmann
f510ca0527 Qualcomm ARM64 DT additional updates for 5.9 
For SC7180 this adds the necessary properties for blowing fuses in
 qfprom, Coresight fixes, GPU interconnect votes and specifies max speed
 for USB controller.
 
 SM8150 and SM8250 gains Adreno SMMU, the graphics management unit and
 the GPU nodes, to enable headless GPU usage.
 
 SDM845 gains tracing support for deep idle, GPU bus bandwidth scaling
 and DB845c gains the LT9611 HDMI bridge wired up.
 
 MSM8994 gains SMD RPM and SCM support and a new dts for the Sony Xperia
 Z5.
 
 MSM8992 is refactored and modernized and gets support for SCM, SPMI,
 BLSP2 UART and I2C nodes, PMU, RPM clock controller, PSCI and proper CPU
 definitions. Support for the Xiaomi Libra and Microsoft Lumia 950 are
 added.
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Merge tag 'qcom-arm64-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT additional updates for 5.9

For SC7180 this adds the necessary properties for blowing fuses in
qfprom, Coresight fixes, GPU interconnect votes and specifies max speed
for USB controller.

SM8150 and SM8250 gains Adreno SMMU, the graphics management unit and
the GPU nodes, to enable headless GPU usage.

SDM845 gains tracing support for deep idle, GPU bus bandwidth scaling
and DB845c gains the LT9611 HDMI bridge wired up.

MSM8994 gains SMD RPM and SCM support and a new dts for the Sony Xperia
Z5.

MSM8992 is refactored and modernized and gets support for SCM, SPMI,
BLSP2 UART and I2C nodes, PMU, RPM clock controller, PSCI and proper CPU
definitions. Support for the Xiaomi Libra and Microsoft Lumia 950 are
added.

* tag 'qcom-arm64-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits)
  arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
  arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
  arm64: dts: qcom: msm8992: Add RPMCC node
  arm64: dts: qcom: msm8992: Add PSCI support.
  arm64: dts: qcom: msm8992: Add PMU node
  arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
  arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
  arm64: dts: qcom: msm8992: Add a SCM node
  arm64: dts: qcom: msm8992: Add a proper CPU map
  arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
  arm64: dts: qcom: bullhead: Add qcom,msm-id
  arm64: dts: qcom: msm8992: Fix SDHCI1
  arm64: dts: qcom: msm8992: Modernize the DTS style
  arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
  arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
  arm64: dts: qcom: msm8994: Add support for SMD RPM
  arm64: dts: qcom: msm8992: Add a label to rpm-requests
  arm64: dts: qcom: msm8994: Add SCM node
  arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodes
  arm64: dts: qcom: add sm8250 GPU nodes
  ...

Link: https://lore.kernel.org/r/20200730052003.649940-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-07-31 10:41:56 +02:00
Lars Povlsen
4299f85a67 dt-bindings: clock: sparx5: Add bindings include file 
The Sparx5 support 9 different clock outputs. This include file has
defines for each supported clock ordinal.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200727084211.6632-8-lars.povlsen@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-28 18:17:52 -07:00
Jonathan Marek
87b517a804 dt-bindings: power: Add missing rpmpd rpmh regulator level 
Add RPMH_REGULATOR_LEVEL_SVS_L0, used by sm8250.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200709135251.643-13-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-07-27 23:27:03 -07:00
周琰杰 (Zhou Yanjie)
acb3b78de3 dt-bindings: clock: Add tabs to align code. 
The "JZ4780_CLK_LCD0PIXCLK" and the "JZ4780_CLK_LCD1PIXCLK"
in the "jz4780.h" and the new added "JZ4780_CLK_EXCLK_DIV512"
in the previous patch is too long, add tabs to other lines
to align them.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200725051136.58220-3-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-27 18:17:52 -07:00
周琰杰 (Zhou Yanjie)
316810e883 dt-bindings: clock: Add RTC related clocks for Ingenic SoCs. 
Add RTC related clocks bindings for the JZ4780 SoC, the X1000 SoC,
and the X1830 SoC from Ingenic.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200725051136.58220-2-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-27 18:17:52 -07:00
Konrad Dybcio
b538304da7 clk: qcom: gcc-sdm660: Add missing modem reset 
This will be required in order to support the
modem upstream.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200726111215.22361-2-konradybcio@gmail.com
Fixes: f2a76a2955 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-27 15:16:17 -07:00
Stephan Gerhold
34facb0422
ASoC: dt-bindings: q6asm: Add Q6ASM_DAI_{TX_RX, TX, RX} defines 
Right now the direction of a DAI has to be specified as a literal
number in the device tree, e.g.:

	dai@0 {
		reg = <0>;
		direction = <2>;
	};

but this does not make it immediately clear that this is a
playback/RX-only DAI.

Actually, q6asm-dai.c has useful defines for this. Move them to the
dt-bindings header to allow using them in the dts(i) files.
The example above then becomes:

	dai@0 {
		reg = <0>;
		direction = <Q6ASM_DAI_RX>;
	};

which is immediately recognizable as playback/RX-only DAI.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200727082502.2341-1-stephan@gerhold.net
Signed-off-by: Mark Brown <broonie@kernel.org>
 2020-07-27 14:21:09 +01:00
Taniya Das
381cc6f97c dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7180 
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for GCC
LPASS and LPASS Core clock IDs for LPASS client to request for the clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1595606878-2664-3-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-24 13:08:02 -07:00
Arnd Bergmann
cf8182fc9d Texas Instruments K3 SoC DT updates for v5.9 
- Add platforms chipid nodes for am65x and j721e
 - Update latest data sheet values for MMC on am65x
 - Add serdes and usb3 support for j721e
 - Add analog audio support for j721e
 - Add SD card support for am65x
 - Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
 - HTTP links replaced with HTTPS ones
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Merge tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt

Texas Instruments K3 SoC DT updates for v5.9

- Add platforms chipid nodes for am65x and j721e
- Update latest data sheet values for MMC on am65x
- Add serdes and usb3 support for j721e
- Add analog audio support for j721e
- Add SD card support for am65x
- Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
- HTTP links replaced with HTTPS ones

* tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line
  arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0
  arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX
  arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux
  arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes
  dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller
  arm64: dts: ti: k3-am65/j721e-main: rename gic-its node to msi-controller
  arm64: dts: ti: k3-j721e-main: rename smmu node to iommu
  arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones
  arm64: dts: ti: k3-am654-base-board: Add support for SD card
  arm64: dts: ti: k3-am65-main: Add support for sdhci1
  arm64: dts: ti: j721e-common-proc-board: Analog audio support
  arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default
  arm64: dts: ti: k3-am654-main: Update otap-del-sel values
  arm64: dts: ti: k3-j721e-mcu-wakeup: add k3 platforms chipid module node
  arm64: dts: ti: k3-am65-wakeup: add k3 platforms chipid module node

Link: https://lore.kernel.org/r/3b3b9214-769d-ba1b-db5e-44414a8c5756@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-07-24 16:01:43 +02:00
Jonathan Marek
324e0bfcfb dt-bindings: clock: add SM8250 QCOM Graphics clock bindings 
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8250 SoCs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200709135251.643-9-jonathan@marek.ca
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-24 01:51:23 -07:00
Jonathan Marek
f793e45494 dt-bindings: clock: add SM8150 QCOM Graphics clock bindings 
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8150 SoCs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200709135251.643-8-jonathan@marek.ca
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-24 01:51:20 -07:00
Randy Dunlap
80d7f913de dt-bindings: mux: mux.h: drop a duplicated word 
Drop the repeated word "the" in a comment.

Cc: Peter Rosin <peda@axentia.se>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20200719002816.20263-1-rdunlap@infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
 2020-07-23 15:08:47 -06:00
Thomas Gleixner
1b7efaa615 - Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni) 
- Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
 
 - Add support for i.MX TPM driver with ARM64 (Anson Huang)
 
 - Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
 
 - Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
 
 - Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
 
 - Add support for the Ingenic X1000 OST (Zhou Yanjie)
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Merge tag 'timers-v5.9' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core

Pull clock event/surce driver changes from Daniel Lezcano:

  - Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni)
  - Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
  - Add support for i.MX TPM driver with ARM64 (Anson Huang)
  - Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
  - Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
  - Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
  - Add support for the Ingenic X1000 OST (Zhou Yanjie)
 2020-07-23 21:04:05 +02:00
周琰杰 (Zhou Yanjie)
ac756d05c4 dt-bindings: timer: Add Ingenic X1000 OST bindings. 
Add the OST bindings for the X1000 SoC from Ingenic.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200722171804.97559-2-zhouyanjie@wanyeetech.com
 2020-07-23 16:58:09 +02:00
Hanks Chen
b07b616214 pinctrl: mediatek: update pinmux definitions for mt6779 
Add devicetree bindings for Mediatek mt6779 SoC Pin Controller.

Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Andy Teng <andy.teng@mediatek.com>
Signed-off-by: Hanks Chen <hanks.chen@mediatek.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Link: https://lore.kernel.org/r/1595503197-15246-2-git-send-email-hanks.chen@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2020-07-23 15:22:09 +02:00
Arnd Bergmann
9e586c8431 Reset controller updates for v5.9 
This tag moves the reset-simple header out of drivers/reset for use by
 drivers outside of drivers/reset, adds a .reset() callback to
 reset-simple, converts i.MX reset bindings to json-schema, fixes a
 compile warning in the reset-intel-gw driver, and replaces some HTTP
 links with HTTPS ones in comments.
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Merge tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux into arm/drivers

Reset controller updates for v5.9

This tag moves the reset-simple header out of drivers/reset for use by
drivers outside of drivers/reset, adds a .reset() callback to
reset-simple, converts i.MX reset bindings to json-schema, fixes a
compile warning in the reset-intel-gw driver, and replaces some HTTP
links with HTTPS ones in comments.

* tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux:
  reset: Replace HTTP links with HTTPS ones
  reset: intel: fix a compile warning about REG_OFFSET redefined
  dt-bindings: reset: Convert i.MX7 reset to json-schema
  dt-bindings: reset: Convert i.MX reset to json-schema
  reset: simple: Add reset callback
  reset: Move reset-simple header out of drivers/reset

Link: https://lore.kernel.org/r/b718f052e38abbaac599d80645376b75e54aa5bd.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-07-22 22:34:14 +02:00
Lars Povlsen
39c8378a1c dt-bindings: clock: sparx5: Add bindings include file 
The Sparx5 support 9 different clock outputs. This include file has
defines for each supported clock ordinal.

Link: https://lore.kernel.org/r/20200615133242.24911-8-lars.povlsen@microchip.com
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-07-22 22:28:45 +02:00
Arnd Bergmann
d27895a122 i.MX device tree update for 5.9: 
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
 - Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
 - Make tempmon node as child of anatop node according to hardware
   architecture.
 - The vf610-zii device update: configure fiber port to 1000BaseX, add
   switch watchdog, MDIO speed and preamble.
 - A series from Fabio Estevam to update imx6qdl-sabresd and
   imx6q-tbs2910 for using MDIO node and reset-assert-us.
 - Align L2 cache-controller device node name with .yaml schema.
 - Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
 - A series of patches from Shengjiu Wang to enable various audio
   support on i.MX6 devices.
 - Add Gateworks System Controller support for imx6qdl-gw devices.
 - Change default #pwm-cells setting to <3> in the SoC dtsi files.
 - Other small random changes.
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Merge tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree update for 5.9:

- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
  architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
  switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
  imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
  support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.

* tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits)
  ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
  ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
  ARM: dts: imx6q-tbs2910: Pass reset-assert-us
  ARM: dts: imx6q-tbs2910: Add an mdio node
  ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
  ARM: dts: imx6qdl-sabresd: Add an mdio node
  ARM: dts: imx6qdl-gw: add Gateworks System Controller support
  ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
  ARM: dts: vf610-zii-spb4: Add node for switch watchdog
  ARM: dts: colibri-imx6: remove pinctrl-names orphan
  ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
  ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
  ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
  ARM: dts: ZII: update MDIO speed and preamble
  ARM: dts: vfxxx: Add node for CAAM
  ARM: dts: imx6qp-sabresd: enable sata
  ARM: dts: imx6qp-sabreauto: enable sata
  ARM: dts: add Protonic RVT board
  ARM: dts: add Protonic VT7 board
  ARM: dts: add Protonic WD2 board
  ...

Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-07-22 21:46:22 +02:00
Jonathan Cameron
d0d7c5845e Merge branch 'ib-5.8-jz47xx-ts' into HEAD 
Immutable branch may be needed in input for a joystick set that is
dependent on it.
 2020-07-22 14:36:31 +01:00
Cristian Ciocaltea
fac1d443a2 dt-bindings: reset: Add binding constants for Actions S500 RMU 
Add device tree binding constants for Actions Semi S500 SoC Reset
Management Unit (RMU).

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/daf615160b3be9f38dcf7926cc82128c9c2d73e3.1593788312.git.cristian.ciocaltea@gmail.com
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-21 01:50:46 -07:00
Cristian Ciocaltea
1a4ae4138f dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC 
Add the missing APB, DMAC and GPIO clock bindings constants for
Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Link: https://lore.kernel.org/r/67112af4f5bc0cc5e70ce8410feb369cc72972b8.1593788312.git.cristian.ciocaltea@gmail.com
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-21 01:50:46 -07:00
Stephen Boyd
63e95849a7 Merge branch 'clk-imx' into clk-next 
* clk-imx:
  clk: imx: vf610: add CAAM clock
  clk: imx8mp: add mu root clk
 2020-07-21 01:03:16 -07:00
Stephen Boyd
b396b3d206 Merge branch 'clk-amlogic' into clk-next 
* clk-amlogic:
  clk: meson: meson8b: add the vclk2_en gate clock
  clk: meson: meson8b: add the vclk_en gate clock
  clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
  clk: meson: g12a: Add support for NNA CLK source clocks
  dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs
 2020-07-21 01:01:11 -07:00
Stephen Boyd
fca1484576 Merge branch 'clk-renesas' into clk-next 
* clk-renesas:
  clk: renesas: cpg-mssr: Add r8a774e1 support
  dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
  clk: renesas: Add r8a774e1 CPG Core Clock Definitions
  dt-bindings: power: Add r8a774e1 SYSC power domain definitions
 2020-07-21 00:57:38 -07:00
Stephen Boyd
73d6bd7acb Merge branch 'clk-qcom' into clk-next 
* clk-qcom:
  clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845
  ipq806x: gcc: add support for child probe
  clk: qcom: msm8996: Make symbol 'cpu_msm8996_clks' static
  clk: qcom: ipq8074: Add correct index for PCIe clocks
 2020-07-21 00:55:21 -07:00
Sivaprakash Murugesan
044f507dc0 clk: qcom: ipq8074: Add correct index for PCIe clocks 
The PCIe clocks GCC_PCIE0_AXI_S_BRIDGE_CLK, GCC_PCIE0_RCHNG_CLK_SRC,
GCC_PCIE0_RCHNG_CLK are wrongly added to the gcc reset group.

Move them to the gcc clock group.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1594877570-9280-1-git-send-email-sivaprak@codeaurora.org
Fixes: e7fb524cfc ("dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-20 17:38:46 -07:00
Artur Rojek
842247203c dt-bindings: iio/adc: Add touchscreen idx for JZ47xx SoC ADC 
Introduce support for touchscreen channels found in JZ47xx SoCs.

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Tested-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
 2020-07-20 10:27:46 +01:00
Alexander A. Klimov
ffebbecaaa reset: Replace HTTP links with HTTPS ones 
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2020-07-20 11:27:12 +02:00
Kishon Vijay Abraham I
b766e3b0d5 arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux 
The system controller node manages the CTRL_MMR0 region.
Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-07-17 10:35:07 +03:00
Alexander A. Klimov
303d6f62eb arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones 
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-07-17 10:23:48 +03:00
Laurent Pinchart
ef9303fdf4 dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA 
The ZynqMP includes the DisplayPort subsystem with its own DMA engine
called DPDMA. The DPDMA IP comes with 6 individual channels
(4 for display, 2 for audio). This documentation describes DT bindings
of DPDMA.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200717013337.24122-2-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-07-17 11:37:59 +05:30
Dan Murphy
5c7f8ffe74 dt: bindings: Add multicolor class dt bindings documention 
Add DT bindings for the LEDs multicolor class framework.
Add multicolor ID to the color ID list for device tree bindings.

CC: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
 2020-07-15 19:33:04 +02:00
Marian-Cristian Rotariu
ef1c992428 clk: renesas: Add r8a774e1 CPG Core Clock Definitions 
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in
Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's
Manual.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2020-07-13 10:18:05 +02:00
Marian-Cristian Rotariu
e24779649c dt-bindings: power: Add r8a774e1 SYSC power domain definitions 
This patch adds power domain indices for the RZ/G2H (r8a774e1) SoC.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2020-07-13 10:18:05 +02:00
Stephen Boyd
96310398fc Merge branch 'clk-qcom' into clk-next 
* clk-qcom:
  clk: qcom: smd: Add support for MSM8992/4 rpm clocks
  clk: qcom: ipq8074: Add missing clocks for pcie
  dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe
 2020-07-11 09:27:58 -07:00
Konrad Dybcio
b429784499 clk: qcom: smd: Add support for MSM8992/4 rpm clocks 
Add rpm smd clocks, PMIC and bus clocks which are required on MSM8992,
MSM8994 (and APQ variants) for clients to vote on.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200623230018.303776-1-konradybcio@gmail.com
[sboyd@kernel.org: Fixed up binding numbers]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-11 09:19:24 -07:00
Sivaprakash Murugesan
e7fb524cfc dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe 
Add missing clock bindings for PCIe port0 of ipq8074.

Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1593940680-2363-4-git-send-email-sivaprak@codeaurora.org
[sboyd@kernel.org: Clean up commit text subject]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-11 09:10:52 -07:00
Chao Hao
349b00c9c0 dt-bindings: mediatek: Add bindings for MT6779 
This patch adds description for MT6779 IOMMU.

MT6779 has two iommus, they are mm_iommu and apu_iommu which
both use ARM Short-Descriptor translation format.

In addition, mm_iommu and apu_iommu are two independent HW instance
, we need to set them separately.

The MT6779 IOMMU hardware diagram is as below, it is only a brief
diagram about iommu, it don't focus on the part of smi_larb, so
I don't describe the smi_larb detailedly.

			     EMI
			      |
	   --------------------------------------
	   |					|
        MM_IOMMU                            APU_IOMMU
	   |					|
       SMI_COMMOM-----------		     APU_BUS
          |		   |			|
    SMI_LARB(0~11)         |	                |
	  |		   |			|
	  |		   |		   --------------
	  |		   |		   |	 |	|
   Multimedia engine	  CCU		  VPU   MDLA   EMDA

All the connections are hardware fixed, software can not adjust it.

Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Link: https://lore.kernel.org/r/20200703044127.27438-2-chao.hao@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2020-07-10 16:13:10 +02:00
Drew Fustini
27c90e5e48 ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2 
Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lore.kernel.org/r/20200701013320.130441-3-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2020-07-07 12:58:20 +02:00
Mark Brown
8cc31dc941
Merge series "regulator: mt6397: Implement of_map_mode regulator_desc function" from Anand K Mistry <amistry@google.com>: 
This patchset adds support for being able to change regulator modes for
the mt6397 regulator. This is needed to allow the voltage scaling
support in the MT8173 SoC to be used on the elm (Acer Chromebook R13)
and hana (several Lenovo Chromebooks) devices.

Without a of_map_mode implementation, the regulator-allowed-modes
devicetree field is skipped, and attempting to change the regulator mode
results in an error:
[    1.439165] vpca15: mode operation not allowed

Changes in v2:
- Introduce constants in dt-bindings
- Improve conditional readability

Anand K Mistry (4):
  regulator: mt6397: Move buck modes into header file
  dt-bindings: regulator: mt6397: Document valid modes
  regulator: mt6397: Implement of_map_mode
  arm64: dts: mediatek: Update allowed mt6397 regulator modes for elm
    boards

 .../bindings/regulator/mt6397-regulator.txt     |  3 +++
 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi    |  4 +++-
 drivers/regulator/mt6397-regulator.c            | 17 ++++++++++++++---
 .../regulator/mediatek,mt6397-regulator.h       | 15 +++++++++++++++
 4 files changed, 35 insertions(+), 4 deletions(-)
 create mode 100644 include/dt-bindings/regulator/mediatek,mt6397-regulator.h

--
2.27.0.212.ge8ba1cc988-goog

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 2020-07-02 16:45:49 +01:00
Anand K Mistry
6c8b65950b
regulator: da9211: Move buck modes into header file 
This will allow device trees to make use of these constants.

Signed-off-by: Anand K Mistry <amistry@google.com>
Link: https://lore.kernel.org/r/20200702131350.1.I96e67ab7b4568287eb939e8a572cbc03e87f1aa0@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
 2020-07-02 16:20:57 +01:00
Anand K Mistry
1c537b2d72
regulator: mt6397: Move buck modes into header file 
This will allow device trees to make use of these constants.

Signed-off-by: Anand K Mistry <amistry@google.com>
Link: https://lore.kernel.org/r/20200702162231.v2.1.Icf69e2041b1af4548347018186c3ba6310f53e66@changeid
Signed-off-by: Mark Brown <broonie@kernel.org>
 2020-07-02 15:25:45 +01:00
Anurag Kumar Vulisha
cea0f76a48 dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY 
Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
Processing System Gigabit Transceiver which provides PHY capabilities to
USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200629120054.29338-2-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-06-29 18:48:00 +05:30
Stephen Boyd
12ef3933b4 Merge branch 'clk-bcm' into clk-next 
- Make defines for bcm63xx-gate clks to use in DT
 - Support gate clks on BCM6318 SoCs
 - Add HDMI clks for BCM2711 SoCs
 - Support BCM2711 SoC firmware clks

* clk-bcm: (42 commits)
  clk: bcm: dvp: Add missing module informations
  clk: bcm: rpi: Remove the quirks for the CPU clock
  clk: bcm2835: Don't cache the PLLB rate
  clk: bcm2835: Allow custom CCF flags for the PLLs
  Revert "clk: bcm2835: remove pllb"
  clk: bcm: rpi: Give firmware clocks a name
  clk: bcm: rpi: Discover the firmware clocks
  clk: bcm: rpi: Add an enum for the firmware clocks
  clk: bcm: rpi: Add DT provider for the clocks
  clk: bcm: rpi: Make the PLLB registration function return a clk_hw
  clk: bcm: rpi: Split pllb clock hooks
  clk: bcm: rpi: Rename is_prepared function
  clk: bcm: rpi: Pass the clocks data to the firmware function
  clk: bcm: rpi: Add clock id to data
  clk: bcm: rpi: Create a data structure for the clocks
  clk: bcm: rpi: Use CCF boundaries instead of rolling our own
  clk: bcm: rpi: Make sure the clkdev lookup is removed
  clk: bcm: rpi: Switch to clk_hw_register_clkdev
  clk: bcm: rpi: Remove pllb_arm_lookup global pointer
  clk: bcm: rpi: Make sure pllb_arm is removed
  ...
 2020-06-26 11:58:51 -07:00
Stephen Boyd
7aae3c161e Merge branch 'clk-vc5' into clk-next 
* clk-vc5:
  clk: vc5: Enable addition output configurations of the Versaclock
  dt: Add additional option bindings for IDT VersaClock
  clk: vc5: Allow Versaclock driver to support multiple instances
 2020-06-23 12:12:43 -07:00
Andrey Smirnov
018e430834 clk: imx: vf610: add CAAM clock 
According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to gate
CAAM ipg clock.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-imx@nxp.com
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-06-23 15:10:05 +08:00
Adam Ford
34662f6e30 dt: Add additional option bindings for IDT VersaClock 
The VersaClock driver now supports some additional bindings to support
child nodes which can configure optional settings like mode, voltage
and slew.

This patch updates the binding document to describe what is available
in the driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200603154329.31579-2-aford173@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-22 19:04:58 -07:00
Stephen Boyd
ef01ab612b Merge branch 'clk-qcom' into clk-next 
- Enable CPU clks on Qualcomm IPQ6018 SoCs

* clk-qcom:
  clk: qcom: smd: Add support for MSM8936 rpm clocks
  dt-bindings: clock: rpmcc: Document MSM8936 compatible
  clk: qcom: smd: Add support for SDM660 rpm clocks
  clk: qcom: Add ipq6018 apss clock controller
  clk: qcom: Add DT bindings for ipq6018 apss clock controller
  clk: qcom: Add ipq apss pll driver
  dt-bindings: clock: add ipq6018 a53 pll compatible
 2020-06-22 19:02:18 -07:00
Vincent Knecht
59390282b7 clk: qcom: smd: Add support for MSM8936 rpm clocks 
Add missing definition of rpm clk for msm8936 soc (also used by msm8939)

Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20200613072745.1249003-2-vincent.knecht@mailoo.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-22 19:01:25 -07:00
Konrad Dybcio
b608013ac5 clk: qcom: smd: Add support for SDM660 rpm clocks 
Add rpm smd clocks, PMIC and bus clocks which are required on
SDM630/660 (and APQ variants) for clients to vote on.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200622090252.36568-1-konradybcio@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-22 02:11:38 -07:00
Sivaprakash Murugesan
49bcaef86e clk: qcom: Add DT bindings for ipq6018 apss clock controller 
Add dt-binding for ipq6018 apss clock controller

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1592800092-20533-4-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-22 00:21:59 -07:00
Dinh Nguyen
c2710fdf93 dt-bindings: agilex: add NAND_X_CLK and NAND_ECC_CLK 
Add the NAND_X_CLK and NAND_ECC_CLK clocks.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20200616202417.14376-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 19:27:33 -07:00
Álvaro Fernández Rojas
f3cd8c96a9 mips: bmips: add BCM63268 clock definitions 
Add header with BCM63268 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-8-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:24 -07:00
Álvaro Fernández Rojas
ad31e793f2 mips: bmips: add BCM6368 clock definitions 
Add header with BCM6368 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-7-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:24 -07:00
Álvaro Fernández Rojas
fb8fb3f13f mips: bmips: add BCM6362 clock definitions 
Add header with BCM6362 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-6-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:23 -07:00
Álvaro Fernández Rojas
d3499bda4e mips: bmips: add BCM6358 clock definitions 
Add header with BCM6358 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-5-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:23 -07:00
Álvaro Fernández Rojas
92cd8bb27a mips: bmips: add BCM6328 clock definitions 
Add header with BCM6328 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-4-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:23 -07:00
Álvaro Fernández Rojas
020c89c5a9 mips: bmips: add BCM6318 clock definitions 
Add header with BCM6318 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-3-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:23 -07:00
Álvaro Fernández Rojas
c7f03eea07 mips: bmips: add BCM3368 clock definitions 
Add header with BCM3368 definitions in order to be able to include it from
device tree files.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Link: https://lore.kernel.org/r/20200615090231.2932696-2-noltari@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-19 17:03:23 -07:00
Dmitry Shmidt
df06230106 dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs 
This adds the Neural Network Accelerator IP source clocks.

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200610083012.5024-2-narmstrong@baylibre.com
 2020-06-19 17:16:09 +02:00
Jishnu Prakash
d1492bbd47 iio: adc: Add PMIC7 ADC bindings 
Add documentation for PMIC7 ADC peripheral.
For the PMIC7-type PMICs, ADC peripheral is present in HW for the
following PMICs: PMK8350, PM8350, PM8350b, PMR735a and PMR735b.
Of these, only the ADC peripheral on PMK8350 is exposed directly to SW.
If SW needs to communicate with ADCs on other PMICs, it specifies the
PMIC to PMK8350 through the newly added SID register and communication
between PMK8350 ADC and other PMIC ADCs is carried out through
PBS(Programmable Boot Sequence) at the firmware level.

In addition, add definitions for ADC channels and virtual channel
definitions (combination of ADC channel number and PMIC SID number)
per PMIC, to be used by ADC clients for PMIC7.

Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
 2020-06-14 11:49:18 +01:00
Linus Torvalds
2dca74a40e - qcom : 
new controller driver for IPCC
      reorg the of_device data
      add support for ipq6018 platform
 - spreadtrum:
      new sprd controller driver
 - imx:
      implement suspend/resume PM support
 - Misc :
      make pcc driver struct as static
      fix return value in imx_mu_scu
      disable clock before bailout in imx probe
      remove duplicate error mssg in zynqmp probe
      fix header size in imx.scu
      check for null instead of is-err in zynqmp
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Merge tag 'mailbox-v5.8' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:
 "qcom:
   - new controller driver for IPCC
   - reorg the of_device data
   - add support for ipq6018 platform

  spreadtrum:
   - new sprd controller driver

  imx:
   - implement suspend/resume PM support

  misc:
   - make pcc driver struct static
   - fix return value in imx_mu_scu
   - disable clock before bailout in imx probe
   - remove duplicate error mssg in zynqmp probe
   - fix header size in imx.scu
   - check for null instead of is-err in zynqmp"

* tag 'mailbox-v5.8' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom: Add ipq6018 apcs compatible
  mailbox: qcom: Add clock driver name in apcs mailbox driver data
  dt-bindings: mailbox: Add YAML schemas for QCOM APCS global block
  mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag
  mailbox: imx: Add runtime PM callback to handle MU clocks
  mailbox: imx: Add context save/restore for suspend/resume
  MAINTAINERS: Add entry for Qualcomm IPCC driver
  mailbox: Add support for Qualcomm IPCC
  dt-bindings: mailbox: Add devicetree binding for Qcom IPCC
  mailbox: zynqmp-ipi: Fix NULL vs IS_ERR() check in zynqmp_ipi_mbox_probe()
  mailbox: imx-mailbox: fix scu msg header size check
  mailbox: sprd: Add Spreadtrum mailbox driver
  dt-bindings: mailbox: Add the Spreadtrum mailbox documentation
  mailbox: ZynqMP IPI: Delete an error message in zynqmp_ipi_probe()
  mailbox: imx: Disable the clock on devm_mbox_controller_register() failure
  mailbox: imx: Fix return in imx_mu_scu_xlate()
  mailbox: imx: Support runtime PM
  mailbox: pcc: make pcc_mbox_driver static
 2020-06-11 12:42:14 -07:00
Linus Torvalds
6f630784cc This time around we have 4 lines of diff in the core framework, removing a 
function that isn't used anymore. Otherwise the main new thing for the common
 clk framework is that it is selectable in the Kconfig language now. Hopefully
 this will let clk drivers and clk consumers be testable on more than the
 architectures that support the clk framework. The goal is to introduce some
 Kunit tests for the framework.
 
 Outside of the core framework we have the usual set of various driver updates
 and non-critical fixes. The dirstat shows that the new Baikal-T1 driver is the
 largest addition this time around in terms of lines of code. After that the x86
 (Intel), Qualcomm, and Mediatek drivers introduce many lines to support new or
 upcoming SoCs. After that the dirstat shows the usual suspects working on their
 SoC support by fixing minor bugs, correcting data and converting some of their
 DT bindings to YAML.
 
 Core:
  - Allow the COMMON_CLK config to be selectable
 
 New Drivers:
  - Clk driver for Baikal-T1 SoCs
  - Mediatek MT6765 clock support
  - Support for Intel Agilex clks
  - Add support for X1830 and X1000 Ingenic SoC clk controllers
  - Add support for the new Renesas RZ/G1H (R8A7742) SoC
  - Add support for Qualcomm's MSM8939 Generic Clock Controller
 
 Updates:
  - Support IDT VersaClock 5P49V5925
  - Bunch of updates for HSDK clock generation unit (CGU) driver
  - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs
  - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver
  - Enable supply regulators for GPU gdscs on Qualcomm SoCs
  - Add support for Si5342, Si5344 and Si5345 chips
  - Support custom flags in Xilinx zynq firmware
  - Various small fixes to the Xilinx clk driver
  - A single minor rounding fix for the legacy Allwinner clock support
  - A few patches from Abel Vesa as preparation of adding audiomix clock support
    on i.MX
  - A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and clk-pllv3
    drivers
  - Drop dependency on ARM64 for i.MX8M clock driver, to support aarch32 mode on
    aarch64 hardware
  - A series from Peng Fan to improve i.MX8M clock drivers, using composite
    clock for core and bus clk slice
  - Set a better parent clock for flexcan on i.MX6UL to support CiA102 defined
    bit rates
  - A couple changes for EMC frequency scaling on Tegra210
  - Support for CPU frequency scaling on Tegra20/Tegra30
  - New clk gate for CSI test pattern generator on Tegra210
  - Regression fixes for Samsung exynos542x and exynos5433 SoCs
  - Use of fallthrough; attribute for Samsung s3c24xx
  - Updates and fixup HDMI and video clocks on Meson8b
  - Fixup reset polarity on Meson8b
  - Fix GPU glitch free mux switch on Meson gx and g12
  - A minor fix for the currently unused suspend/resume handling on Renesas RZ/A1 and RZ/A2
  - Two more conversions of Renesas DT bindings to json-schema
  - Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This time around we have four lines of diff in the core framework,
  removing a function that isn't used anymore. Otherwise the main new
  thing for the common clk framework is that it is selectable in the
  Kconfig language now. Hopefully this will let clk drivers and clk
  consumers be testable on more than the architectures that support the
  clk framework. The goal is to introduce some Kunit tests for the
  framework.

  Outside of the core framework we have the usual set of various driver
  updates and non-critical fixes. The dirstat shows that the new
  Baikal-T1 driver is the largest addition this time around in terms of
  lines of code. After that the x86 (Intel), Qualcomm, and Mediatek
  drivers introduce many lines to support new or upcoming SoCs. After
  that the dirstat shows the usual suspects working on their SoC support
  by fixing minor bugs, correcting data and converting some of their DT
  bindings to YAML.

  Core:
   - Allow the COMMON_CLK config to be selectable

  New Drivers:
   - Clk driver for Baikal-T1 SoCs
   - Mediatek MT6765 clock support
   - Support for Intel Agilex clks
   - Add support for X1830 and X1000 Ingenic SoC clk controllers
   - Add support for the new Renesas RZ/G1H (R8A7742) SoC
   - Add support for Qualcomm's MSM8939 Generic Clock Controller

  Updates:
   - Support IDT VersaClock 5P49V5925
   - Bunch of updates for HSDK clock generation unit (CGU) driver
   - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs
   - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver
   - Enable supply regulators for GPU gdscs on Qualcomm SoCs
   - Add support for Si5342, Si5344 and Si5345 chips
   - Support custom flags in Xilinx zynq firmware
   - Various small fixes to the Xilinx clk driver
   - A single minor rounding fix for the legacy Allwinner clock support
   - A few patches from Abel Vesa as preparation of adding audiomix
     clock support on i.MX
   - A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and
     clk-pllv3 drivers
   - Drop dependency on ARM64 for i.MX8M clock driver, to support
     aarch32 mode on aarch64 hardware
   - A series from Peng Fan to improve i.MX8M clock drivers, using
     composite clock for core and bus clk slice
   - Set a better parent clock for flexcan on i.MX6UL to support CiA102
     defined bit rates
   - A couple changes for EMC frequency scaling on Tegra210
   - Support for CPU frequency scaling on Tegra20/Tegra30
   - New clk gate for CSI test pattern generator on Tegra210
   - Regression fixes for Samsung exynos542x and exynos5433 SoCs
   - Use of fallthrough; attribute for Samsung s3c24xx
   - Updates and fixup HDMI and video clocks on Meson8b
   - Fixup reset polarity on Meson8b
   - Fix GPU glitch free mux switch on Meson gx and g12
   - A minor fix for the currently unused suspend/resume handling on
     Renesas RZ/A1 and RZ/A2
   - Two more conversions of Renesas DT bindings to json-schema
   - Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (155 commits)
  clk: mediatek: Remove ifr{0,1}_cfg_regs structures
  clk: baikal-t1: remove redundant assignment to variable 'divider'
  clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible"
  dt-bindings: clock: Add a missing include to MMP Audio Clock binding
  dt: Add bindings for IDT VersaClock 5P49V5925
  clk: vc5: Add support for IDT VersaClock 5P49V6965
  clk: Add Baikal-T1 CCU Dividers driver
  clk: Add Baikal-T1 CCU PLLs driver
  dt-bindings: clk: Add Baikal-T1 CCU Dividers binding
  dt-bindings: clk: Add Baikal-T1 CCU PLLs binding
  clk: mediatek: assign the initial value to clk_init_data of mtk_mux
  clk: mediatek: Add MT6765 clock support
  clk: mediatek: add mt6765 clock IDs
  dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC
  dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC
  dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC
  CLK: HSDK: CGU: add support for 148.5MHz clock
  CLK: HSDK: CGU: support PLL bypassing
  CLK: HSDK: CGU: check if PLL is bypassed first
  clk: clk-si5341: Add support for the Si5345 series
  ...
 2020-06-10 11:42:19 -07:00
Linus Torvalds
cf0c97f148 This is the bulk of pin control changes for the v5.8 
kernel cycle.
 
 New drivers:
 
 - Intel Jasper Lake support.
 
 - NXP Freescale i.MX8DXL support.
 
 - Qualcomm SM8250 support.
 
 - Renesas R8A7742 SH-PFC support.
 
 Driver improvements:
 
 - Severe cleanup and modernization of the MCP23s08 driver.
 
 - Mediatek driver modularized.
 
 - Setting config supported in the Meson driver.
 
 - Wakeup support for the Broadcom BCM7211.
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Merge tag 'pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.8 kernel cycle.

  It's just really boring this time. Zero core changes. Just linear
  development, cleanups and misc noncritical fixes. Some new drivers for
  very new Qualcomm and Intel chips.

  New drivers:

   - Intel Jasper Lake support.

   - NXP Freescale i.MX8DXL support.

   - Qualcomm SM8250 support.

   - Renesas R8A7742 SH-PFC support.

  Driver improvements:

   - Severe cleanup and modernization of the MCP23s08 driver.

   - Mediatek driver modularized.

   - Setting config supported in the Meson driver.

   - Wakeup support for the Broadcom BCM7211"

* tag 'pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: sprd: Fix the incorrect pull-up definition
  pinctrl: pxa: pxa2xx: Remove 'pxa2xx_pinctrl_exit()' which is unused and broken
  pinctrl: freescale: imx: Use 'devm_of_iomap()' to avoid a resource leak in case of error in 'imx_pinctrl_probe()'
  pinctrl: freescale: imx: Fix an error handling path in 'imx_pinctrl_probe()'
  pinctrl: sirf: add missing put_device() call in sirfsoc_gpio_probe()
  pinctrl: imxl: Fix an error handling path in 'imx1_pinctrl_core_probe()'
  pinctrl: bcm2835: Add support for wake-up interrupts
  pinctrl: bcm2835: Match BCM7211 compatible string
  dt-bindings: pinctrl: Document optional BCM7211 wake-up interrupts
  dt-bindings: pinctrl: Document 7211 compatible for brcm, bcm2835-gpio.txt
  dt-bindings: pinctrl: stm32: Add missing interrupts property
  pinctrl: at91-pio4: Add COMPILE_TEST support
  pinctrl: Fix return value about devm_platform_ioremap_resource()
  MAINTAINERS: Renesas Pin Controllers are supported
  dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support
  pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2
  pinctrl: ocelot: Remove instance number from pin functions
  pinctrl: ocelot: Always register GPIO driver
  dt-bindings: pinctrl: rockchip: update example
  pinctrl: amd: Add ACPI dependency
  ...
 2020-06-07 16:13:43 -07:00
Linus Torvalds
9aa900c809 Char/Misc driver patches for 5.8-rc1 
Here is the large set of char/misc driver patches for 5.8-rc1
 
 Included in here are:
 	- habanalabs driver updates, loads
 	- mhi bus driver updates
 	- extcon driver updates
 	- clk driver updates (approved by the clock maintainer)
 	- firmware driver updates
 	- fpga driver updates
 	- gnss driver updates
 	- coresight driver updates
 	- interconnect driver updates
 	- parport driver updates (it's still alive!)
 	- nvmem driver updates
 	- soundwire driver updates
 	- visorbus driver updates
 	- w1 driver updates
 	- various misc driver updates
 
 In short, loads of different driver subsystem updates along with the
 drivers as well.
 
 All have been in linux-next for a while with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the large set of char/misc driver patches for 5.8-rc1

  Included in here are:

   - habanalabs driver updates, loads

   - mhi bus driver updates

   - extcon driver updates

   - clk driver updates (approved by the clock maintainer)

   - firmware driver updates

   - fpga driver updates

   - gnss driver updates

   - coresight driver updates

   - interconnect driver updates

   - parport driver updates (it's still alive!)

   - nvmem driver updates

   - soundwire driver updates

   - visorbus driver updates

   - w1 driver updates

   - various misc driver updates

  In short, loads of different driver subsystem updates along with the
  drivers as well.

  All have been in linux-next for a while with no reported issues"

* tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits)
  habanalabs: correctly cast u64 to void*
  habanalabs: initialize variable to default value
  extcon: arizona: Fix runtime PM imbalance on error
  extcon: max14577: Add proper dt-compatible strings
  extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
  extcon: remove redundant assignment to variable idx
  w1: omap-hdq: print dev_err if irq flags are not cleared
  w1: omap-hdq: fix interrupt handling which did show spurious timeouts
  w1: omap-hdq: fix return value to be -1 if there is a timeout
  w1: omap-hdq: cleanup to add missing newline for some dev_dbg
  /dev/mem: Revoke mappings when a driver claims the region
  misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages()
  misc: xilinx-sdfec: cleanup return value in xsdfec_table_write()
  misc: xilinx-sdfec: improve get_user_pages_fast() error handling
  nvmem: qfprom: remove incorrect write support
  habanalabs: handle MMU cache invalidation timeout
  habanalabs: don't allow hard reset with open processes
  habanalabs: GAUDI does not support soft-reset
  habanalabs: add print for soft reset due to event
  habanalabs: improve MMU cache invalidation code
  ...
 2020-06-07 10:59:32 -07:00
Linus Torvalds
e611c0fe31 USB/PHY driver updates for 5.8-rc1 
Here are the large set of USB and PHY driver updates for 5.8-rc1.
 
 Nothing huge, just lots of little things:
 	- USB gadget fixes and additions all over the place
 	- new PHY drivers
 	- PHY driver fixes and updates
 	- XHCI driver updates
 	- musb driver updates
 	- more USB-serial driver ids added
 	- various USB quirks added
 	- thunderbolt minor updates and fixes
 	- typec updates and additions
 
 Full details are in the shortlog.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY driver updates from Greg KH:
 "Here are the large set of USB and PHY driver updates for 5.8-rc1.

  Nothing huge, just lots of little things:

   - USB gadget fixes and additions all over the place

   - new PHY drivers

   - PHY driver fixes and updates

   - XHCI driver updates

   - musb driver updates

   - more USB-serial driver ids added

   - various USB quirks added

   - thunderbolt minor updates and fixes

   - typec updates and additions

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'usb-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (245 commits)
  usb: dwc3: meson-g12a: fix USB2 PHY initialization on G12A and A1 SoCs
  usb: dwc3: meson-g12a: fix error path when fetching the reset line fails
  Revert "dt-bindings: usb: qcom,dwc3: Convert USB DWC3 bindings"
  Revert "dt-bindings: usb: qcom,dwc3: Add compatible for SC7180"
  Revert "dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver"
  USB: serial: ch341: fix lockup of devices with limited prescaler
  USB: serial: ch341: add basis for quirk detection
  CDC-ACM: heed quirk also in error handling
  USB: serial: option: add Telit LE910C1-EUX compositions
  usb: musb: Fix runtime PM imbalance on error
  usb: musb: jz4740: Prevent lockup when CONFIG_SMP is set
  usb: musb: mediatek: add reset FADDR to zero in reset interrupt handle
  usb: musb: use true for 'use_dma'
  usb: musb: start session in resume for host port
  usb: musb: return -ESHUTDOWN in urb when three-strikes error happened
  USB: serial: qcserial: add DW5816e QDL support
  thunderbolt: Add trivial .shutdown
  usb: dwc3: keystone: Turn on USB3 PHY before controller
  dt-bindings: usb: ti,keystone-dwc3.yaml: Add USB3.0 PHY property
  dt-bindings: usb: convert keystone-usb.txt to YAML
  ...
 2020-06-07 09:42:16 -07:00
Linus Torvalds
9d71d3cd9e ARM: DT changes for v5.8 
This is the set of device tree changes, mostly covering new
 hardware support, with 577 patches touching a little over 500
 files.
 
 There are five new Arm SoCs supported in this release, all of
 them for existing SoC families:
 
  - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in
    both NAS devices and Android Set-top-box designs, along
    with the "Horseradish", "Lion Skin" and "Mjolnir" reference
    platforms; the Mele X1000 and Xnano X5 set-top-boxes and
    the Banana Pi BPi-M4 single-board computer.
 
  - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC
    and the iW-RainboW-G21D-Qseven-RZG1H board/SoM
 
  - Rockchips RK3326 -- low-end 64-bit SoC along with the
    Odroid-GO Advance game console
 
 Newly added machines on already supported SoCs are:
 
  - AMLogic S905D based Smartlabs SML-5442TW TV box
 
  - AMLogic S905X3 based ODROID-C4 SBC
 
  - AMLogic S922XH based Beelink GT-King Pro TV box
 
  - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC
 
  - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2"
    and YADRO OpenPower P9 "Nicole"
 
  - Marvell Kirkwood based Check Point L-50 router
 
  - Mediatek MT8173 based Elm/Hana Chromebook laptops
 
  - Microchip SAMA5D2 "Industrial Connectivity Platform"
    reference board
 
  - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit
 
  - Octavo OSDMP15x based Linux Automation MC-1 development board
 
  - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone
 
  - Realtek RTD1295 based Xnano X5 TV Box
 
  - STMicroelectronics STM32MP1 based Stinger96 single-board
    computer and IoT Box
 
  - Samsung Exynos4210 based based Samsung Galaxy S2 phone
 
  - Socionext Uniphier based Akebi96 SBC
 
  - TI Keystone based K2G Evaluation board
 
  - TI am5729 based Beaglebone-AI development board
 
 Include device descriptions for additional hardware support in existing
 SoCs and machines based on all major SoC platforms:
 
  - AMlogic Meson
 
  - Allwinner sunxi
 
  - Arm Juno/VFP/Vexpress/Integrator
 
  - Broadcom bcm283x/bcm2711
 
  - Hisilicon hi6220
 
  - Marvell EBU
 
  - Mediatek MT27xx, MT76xx, MT81xx and MT67xx
 
  - Microchip SAMA5D2
 
  - NXP i.MX6/i.MX7/i.MX8 and Layerscape
 
  - Nvidia Tegra
 
  - Qualcomm Snapdragon
 
  - Renesas r8a77961, r8a7791
 
  - Rockchips RK32xx/RK33xx
 
  - ST-Ericsson ux500
 
  - STMicroelectronics SMT32
 
  - Samsung Exynos and S5PV210
 
  - Socionext Uniphier
 
  - TI OMAP5/DRA7 and Keystone
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "This is the set of device tree changes, mostly covering new hardware
  support, with 577 patches touching a little over 500 files.

  There are five new Arm SoCs supported in this release, all of them for
  existing SoC families:

   - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS
     devices and Android Set-top-box designs, along with the
     "Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the
     Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4
     single-board computer.

   - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and
     the iW-RainboW-G21D-Qseven-RZG1H board/SoM

   - Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO
     Advance game console

  Newly added machines on already supported SoCs are:

   - AMLogic S905D based Smartlabs SML-5442TW TV box

   - AMLogic S905X3 based ODROID-C4 SBC

   - AMLogic S922XH based Beelink GT-King Pro TV box

   - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC

   - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO
     OpenPower P9 "Nicole"

   - Marvell Kirkwood based Check Point L-50 router

   - Mediatek MT8173 based Elm/Hana Chromebook laptops

   - Microchip SAMA5D2 "Industrial Connectivity Platform" reference
     board

   - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit

   - Octavo OSDMP15x based Linux Automation MC-1 development board

   - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone

   - Realtek RTD1295 based Xnano X5 TV Box

   - STMicroelectronics STM32MP1 based Stinger96 single-board computer
     and IoT Box

   - Samsung Exynos4210 based based Samsung Galaxy S2 phone

   - Socionext Uniphier based Akebi96 SBC

   - TI Keystone based K2G Evaluation board

   - TI am5729 based Beaglebone-AI development board

  Include device descriptions for additional hardware support in
  existing SoCs and machines based on all major SoC platforms:

   - AMlogic Meson

   - Allwinner sunxi

   - Arm Juno/VFP/Vexpress/Integrator

   - Broadcom bcm283x/bcm2711

   - Hisilicon hi6220

   - Marvell EBU

   - Mediatek MT27xx, MT76xx, MT81xx and MT67xx

   - Microchip SAMA5D2

   - NXP i.MX6/i.MX7/i.MX8 and Layerscape

   - Nvidia Tegra

   - Qualcomm Snapdragon

   - Renesas r8a77961, r8a7791

   - Rockchips RK32xx/RK33xx

   - ST-Ericsson ux500

   - STMicroelectronics SMT32

   - Samsung Exynos and S5PV210

   - Socionext Uniphier

   - TI OMAP5/DRA7 and Keystone"

* tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits)
  ARM: dts: keystone: Rename "msmram" node to "sram"
  arm: dts: mt2712: add uart APDMA to device tree
  arm64: dts: mt8183: add mmc node
  arm64: dts: mt2712: add ethernet device node
  arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1
  ARM: dts: mmp3: Add the fifth SD HCI
  ARM: dts: berlin*: Fix up the SDHCI node names
  ARM: dts: mmp3: Fix USB & USB PHY node names
  ARM: dts: mmp3: Fix L2 cache controller node name
  ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property
  ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property
  ARM: dts: pxa910: Fix the gpio interrupt cell number
  ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property
  ARM: dts: pxa168: Fix the gpio interrupt cell number
  ARM: dts: pxa168: Add missing address/size cells to i2c nodes
  ARM: dts: dove: Fix interrupt controller node name
  ARM: dts: kirkwood: Fix interrupt controller node name
  arm64: dts: Add SC9863A emmc and sd card nodes
  arm64: dts: Add SC9863A clock nodes
  arm64: dts: mt6358: add PMIC MT6358 related nodes
  ...
 2020-06-04 20:02:14 -07:00
Stephen Boyd
166e4b4841 Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into clk-next 
- Support IDT VersaClock 5P49V5925
 - Bunch of updates for HSDK clock generation unit (CGU) driver
 - New clk driver for Baikal-T1 SoCs

* clk-vc5:
  dt: Add bindings for IDT VersaClock 5P49V5925
  clk: vc5: Add support for IDT VersaClock 5P49V6965

* clk-hsdk:
  CLK: HSDK: CGU: add support for 148.5MHz clock
  CLK: HSDK: CGU: support PLL bypassing
  CLK: HSDK: CGU: check if PLL is bypassed first

* clk-mediatek:
  clk: mediatek: assign the initial value to clk_init_data of mtk_mux
  clk: mediatek: Add MT6765 clock support
  clk: mediatek: add mt6765 clock IDs
  dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC
  dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC
  dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC

* clk-baikal:
  clk: Add Baikal-T1 CCU Dividers driver
  clk: Add Baikal-T1 CCU PLLs driver
  dt-bindings: clk: Add Baikal-T1 CCU Dividers binding
  dt-bindings: clk: Add Baikal-T1 CCU PLLs binding
 2020-06-01 13:00:56 -07:00
Stephen Boyd
5debcd01e2 Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-silabs' into clk-next 
- Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs
 - Add support for X1830 and X1000 Ingenic SoC clk controllers
 - Add support for Qualcomm's MSM8939 Generic Clock Controller
 - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver
 - Enable supply regulators for GPU gdscs on Qualcomm SoCs
 - Add support for Si5342, Si5344 and Si5345 chips

* clk-mmp:
  clk: mmp2: Add audio clock controller driver
  dt-bindings: clock: Add Marvell MMP Audio Clock Controller binding
  clk: mmp2: Add support for power islands
  dt-bindings: marvell,mmp2: Add ids for the power domains
  dt-bindings: clock: Make marvell,mmp2-clock a power controller
  clk: mmp2: Add the audio clock
  clk: mmp2: Add the I2S clocks
  clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init()
  clk: mmp2: Move thermal register defines up a bit
  dt-bindings: marvell,mmp2: Add clock id for the Audio clock
  dt-bindings: marvell,mmp2: Add clock id for the I2S clocks
  clk: mmp: frac: Allow setting bits other than the numerator/denominator
  clk: mmp: frac: Do not lose last 4 digits of precision

* clk-intel:
  clk: intel: remove redundant initialization of variable rate64
  clk: intel: Add CGU clock driver for a new SoC
  dt-bindings: clk: intel: Add bindings document & header file for CGU

* clk-ingenic:
  clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused
  clk: X1000: Add FIXDIV for SSI clock of X1000.
  dt-bindings: clock: Add and reorder ABI for X1000.
  clk: Ingenic: Add CGU driver for X1830.
  dt-bindings: clock: Add X1830 clock bindings.
  clk: Ingenic: Adjust cgu code to make it compatible with X1830.
  clk: Ingenic: Remove unnecessary spinlock when reading registers.

* clk-qcom:
  clk: qcom: Add missing msm8998 ufs_unipro_core_clk_src
  dt-bindings: clock: Add YAML schemas for QCOM A53 PLL
  clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock Controller
  clk: qcom: gcc: Add support for Secure control source clock
  dt-bindings: clock: Add gcc_sec_ctrl_clk_src clock ID
  clk: qcom: gcc: Add support for a new frequency for SC7180
  clk: qcom: Add DT bindings for MSM8939 GCC
  clk: qcom: gcc: Add missing UFS clocks for SM8150
  clk: qcom: gcc: Add GPU and NPU clocks for SM8150
  clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc
  clk: qcom: gdsc: Handle GDSC regulator supplies
  clk: qcom: msm8916: Fix the address location of pll->config_reg

* clk-silabs:
  clk: clk-si5341: Add support for the Si5345 series
 2020-06-01 13:00:28 -07:00
Stephen Boyd
b6f3162d0e Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2600' into clk-next 
* clk-unisoc:
  clk: sprd: add mipi_csi_xx gate clocks
  clk: sprd: add dt-bindings include for mipi_csi_xx clocks
  dt-bindings: clk: sprd: add mipi_csi_xx clocks for SC9863A
  clk: sprd: check its parent status before reading gate clock
  clk: sprd: return correct type of value for _sprd_pll_recalc_rate
  clk: sprd: mark the local clock symbols static

* clk-trivial:
  clk: versatile: remove redundant assignment to pointer clk
  clk: clk-xgene: Fix a typo in Kconfig
  clk: Remove unused inline function clk_debug_reparent

* clk-bcm:
  clk: bcm2835: Constify struct debugfs_reg32
  clk: bcm2835: Remove casting to bcm2835_clk_register
  clk: bcm2835: Fix return type of bcm2835_register_gate

* clk-st:
  clk: clk-flexgen: fix clock-critical handling

* clk-ast2600:
  clk: ast2600: Fix AHB clock divider for A1
 2020-06-01 13:00:21 -07:00
Stephen Boyd
8c88e568b5 Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' and 'clk-ti' into clk-next 
- Support custom flags in Xilinx zynq firmware
 - Various small fixes to the Xilinx clk driver
 - Support for Intel Agilex clks

* clk-tegra:
  clk: tegra: Add Tegra210 CSI TPG clock gate
  clk: tegra30: Use custom CCLK implementation
  clk: tegra20: Use custom CCLK implementation
  clk: tegra: cclk: Add helpers for handling PLLX rate changes
  clk: tegra: pll: Add pre/post rate-change hooks
  clk: tegra: Add custom CCLK implementation
  clk: tegra: Remove the old emc_mux clock for Tegra210
  clk: tegra: Implement Tegra210 EMC clock
  clk: tegra: Export functions for EMC clock scaling
  clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210
  clk: tegra: Rename Tegra124 EMC clock source file
  dt-bindings: clock: tegra: Add clock ID for CSI TPG clock

* clk-imx:
  clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice
  clk: imx: add imx8m_clk_hw_composite_bus
  clk: imx: add mux ops for i.MX8M composite clk
  clk: imx8m: migrate A53 clk root to use composite core
  clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code
  clk: imx8mp: Define gates for pll1/2 fixed dividers
  clk: imx: imx8mp: fix pll mux bit
  clk: imx8m: drop clk_hw_set_parent for A53
  dt-bindings: clocks: imx8mp: Add ids for audiomix clocks
  clk: imx: Add helpers for passing the device as argument
  clk: imx: pll14xx: Add the device as argument when registering
  clk: imx: gate2: Allow single bit gating clock
  clk: imx: clk-pllv3: Use readl_relaxed_poll_timeout() for PLL lock wait
  clk: imx: clk-sscg-pll: Remove unnecessary blank lines
  clk: imx: drop the dependency on ARM64 for i.MX8M
  clk: imx7ulp: make it easy to change ARM core clk
  clk: imx: imx6ul: change flexcan clock to support CiA bitrates

* clk-zynq:
  clk: zynqmp: Make zynqmp_clk_get_max_divisor static
  clk: zynqmp: Update fraction clock check from custom type flags
  clk: zynqmp: Add support for custom type flags
  clk: zynqmp: fix memory leak in zynqmp_register_clocks
  clk: zynqmp: Fix invalid clock name queries
  clk: zynqmp: Fix divider2 calculation
  clk: zynqmp: Limit bestdiv with maxdiv

* clk-socfpga:
  clk: socfpga: agilex: add clock driver for the Agilex platform
  dt-bindings: documentation: add clock bindings information for Agilex
  clk: socfpga: add const to _ops data structures
  clk: socfpga: remove clk_ops enable/disable methods
  clk: socfpga: stratix10: use new parent data scheme

* clk-at91:
  clk: at91: allow setting all PMC clock parents via DT
  clk: at91: allow setting PCKx parent via DT
  clk: at91: optimize pmc data allocation
  clk: at91: pmc: decrement node's refcount
  clk: at91: pmc: do not continue if compatible not located
  clk: at91: Add peripheral clock for PTC

* clk-ti:
  clk: ti: dra7: remove two unused symbols
  clk: ti: dra7xx: fix RNG clock parent
  clk: ti: dra7xx: mark MCAN clock as DRA76x only
  clk: ti: dra7xx: fix gpu clkctrl parent
  clk: ti: omap5: Add proper parent clocks for l4-secure clocks
  clk: ti: omap4: Add proper parent clocks for l4-secure clocks
  clk: ti: composite: fix memory leak
 2020-06-01 13:00:00 -07:00
Stephen Boyd
3a57530b7d Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung' and 'clk-allwinner' into clk-next 
- Allow the COMMON_CLK config to be selectable

* clk-selectable:
  clk: Move HAVE_CLK config out of architecture layer
  MIPS: Loongson64: Drop asm/clock.h include
  ARM: mmp: Remove legacy clk code
  clk: Allow the common clk framework to be selectable
  mmc: meson-mx-sdio: Depend on OF_ADDRESS and not just OF
  MIPS: Remove redundant CLKDEV_LOOKUP selects
  h8300: Remove redundant CLKDEV_LOOKUP selects
  arm64: tegra: Remove redundant CLKDEV_LOOKUP selects
  ARM: Remove redundant CLKDEV_LOOKUP selects
  ARM: Remove redundant COMMON_CLK selects

* clk-amlogic:
  clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers
  clk: meson: meson8b: Make the CCF use the glitch-free VPU mux
  clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits
  clk: meson: meson8b: Fix the polarity of the RESET_N lines
  clk: meson: meson8b: Fix the first parent of vid_pll_in_sel
  clk: meson: g12a: Prepare the GPU clock tree to change at runtime
  clk: meson: gxbb: Prepare the GPU clock tree to change at runtime
  clk: meson: meson8b: make the hdmi_sys clock tree mutable
  clk: meson8b: export the HDMI system clock

* clk-renesas:
  dt-bindings: clock: renesas: mstp: Convert to json-schema
  dt-bindings: clock: renesas: div6: Convert to json-schema
  clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling
  clk: renesas: rcar-gen2: Remove superfluous CLK_RENESAS_DIV6 selects
  clk: renesas: cpg-mssr: Add R8A7742 support
  dt-bindings: clock: renesas: cpg-mssr: Document r8a7742 binding
  clk: renesas: Add r8a7742 CPG Core Clock Definitions
  dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros
  MAINTAINERS: Add DT Bindings for Renesas Clock Generators
  clk: renesas: r9a06g032: Fix some typo in comments
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add r8a77961 support

* clk-samsung:
  clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1
  ARM/SAMSUNG EXYNOS ARM ARCHITECTURES: Use fallthrough;
  clk: samsung: Fix CLK_SMMU_FIMCL3 clock name on Exynos542x
  clk: samsung: Mark top ISP and CAM clocks on Exynos542x as critical

* clk-allwinner:
  clk: sunxi: Fix incorrect usage of round_down()
 2020-06-01 12:59:46 -07:00
Manivannan Sadhasivam
a01822e94e dt-bindings: mailbox: Add devicetree binding for Qcom IPCC 
Add devicetree YAML binding for Qualcomm Inter-Processor Communication
Controller (IPCC) block.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2020-05-30 18:10:27 -05:00
Serge Semin
11ea09b9e2 dt-bindings: clk: Add Baikal-T1 CCU Dividers binding 
After being gained by the CCU PLLs the signals must be transformed to
be suitable for the clock-consumers. This is done by a set of dividers
embedded into the CCU. A first block of dividers is used to create
reference clocks for AXI-bus of high-speed peripheral IP-cores of the
chip. The second block dividers alter the PLLs output signals to be then
consumed by SoC peripheral devices. Both block DT nodes are ordinary
clock-providers with standard set of properties supported. But in addition
to that each clock provider can be used to reset the corresponding clock
domain. This makes the AXI-bus and System Devices CCU DT nodes to be also
reset-providers.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-mips@vger.kernel.org
Link: https://lore.kernel.org/r/20200526222056.18072-3-Sergey.Semin@baikalelectronics.ru
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-30 11:04:35 -07:00
Serge Semin
aec6adc560 dt-bindings: clk: Add Baikal-T1 CCU PLLs binding 
Baikal-T1 Clocks Control Unit is responsible for transformation of a
signal coming from an external oscillator into clocks of various
frequencies to propagate them then to the corresponding clocks
consumers (either individual IP-blocks or clock domains). In order
to create a set of high-frequency clocks the external signal is
firstly handled by the embedded into CCU PLLs. So the corresponding
dts-node is just a normal clock-provider node with standard set of
properties. Note as being part of the Baikal-T1 System Controller its
DT node is supposed to be a child the system controller node.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-mips@vger.kernel.org
Link: https://lore.kernel.org/r/20200526222056.18072-2-Sergey.Semin@baikalelectronics.ru
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-30 11:04:34 -07:00
Mars Cheng
eb7beb65ac clk: mediatek: add mt6765 clock IDs 
Add MT6765 clock dt-bindings, include topckgen, apmixedsys,
infracfg, mcucfg and subsystem clocks.

Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Owen Chen <owen.chen@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1582278742-1626-5-git-send-email-macpaul.lin@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-28 21:23:04 -07:00
Jeffrey Hugo
b1e8d713e6 clk: qcom: Add missing msm8998 ufs_unipro_core_clk_src 
ufs_unipro_core_clk_src is required to allow UFS to clock scale for power
savings.

Fixes: b5f5f525c5 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lkml.kernel.org/r/20200528142205.44003-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-28 16:52:25 -07:00
周琰杰 (Zhou Yanjie)
424c85e1ff dt-bindings: clock: Add and reorder ABI for X1000. 
1.The SSI clock of X1000 not like JZ4770 and JZ4780, they are not
  directly derived from the output of SSIPLL, but from the clock
  obtained by dividing the frequency by 2. "X1000_CLK_SSIPLL_DIV2"
  is added for this purpose, it must between "X1000_CLK_SSIPLL"
  and "X1000_CLK_SSIMUX", otherwise an error will occurs when
  initializing the clock. These ABIs are only used for X1000, and
  I'm sure that no other devicetree out there is using these ABIs,
  so we should be able to reorder them.
2.Clocks of LCD, OTG, EMC, EFUSE, OST, TCU are also added.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200528031549.13846-7-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-28 16:13:19 -07:00
周琰杰 (Zhou Yanjie)
9a618e6f8c dt-bindings: clock: Add X1830 clock bindings. 
Add the clock bindings for the X1830 Soc from Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200528031549.13846-5-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-28 16:13:19 -07:00
Lubomir Rintel
e787c5b725 dt-bindings: clock: Add Marvell MMP Audio Clock Controller binding 
This describes the bindings for a controller that generates master and bit
clocks for the I2S interface.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200519224151.2074597-13-lkundrak@v3.sk
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-27 17:55:12 -07:00
Lubomir Rintel
17d43046fd dt-bindings: marvell,mmp2: Add ids for the power domains 
On MMP2 the audio and GPU blocks are on separate power islands. On MMP3
the camera block's power is also controlled separately.

Add the numbers that we could use to refer to the power domains for
respective power islands from the device tree.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200519224151.2074597-11-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-27 17:55:12 -07:00
Lubomir Rintel
c227df7a09 dt-bindings: marvell,mmp2: Add clock id for the Audio clock 
This clocks the Audio block.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200519224151.2074597-5-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-27 17:55:11 -07:00
Lubomir Rintel
edcec4a869 dt-bindings: marvell,mmp2: Add clock id for the I2S clocks 
There are two of these on a MMP2.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200519224151.2074597-4-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-27 17:55:11 -07:00
Chunyan Zhang
d7160288f9 clk: sprd: add dt-bindings include for mipi_csi_xx clocks 
mipi_csi_xx clocks are used by camera sensors.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200527053638.31439-4-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 23:41:14 -07:00
Michał Mirosław
03a1ee1dad clk: at91: allow setting all PMC clock parents via DT 
We need to have clocks accessible via phandle to select them
as peripheral clock parent using assigned-clock-parents in DT.
Add support for PLLACK/PLLBCK/AUDIOPLLCK clocks where available.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lkml.kernel.org/r/fa39cc10dab8341ea4bc2b7152be9217b2cd34a5.1588630999.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 20:22:50 -07:00
Michał Mirosław
99767cd440 clk: at91: allow setting PCKx parent via DT 
This exposes PROGx clocks for use in assigned-clocks DeviceTree property
for selecting PCKx parent clock.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lkml.kernel.org/r/0054532c00163ddf405dad658b32f0d7d97fcc8e.1588630999.git.mirq-linux@rere.qmqm.pl
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 20:22:43 -07:00
Taniya Das
3005b17c5e dt-bindings: clock: Add gcc_sec_ctrl_clk_src clock ID 
The gcc_sec_ctrl_clk_src clock is required to be controlled by the
secure controller driver.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1589709861-27580-3-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 19:22:05 -07:00
Dinh Nguyen
6b3c59780e dt-bindings: documentation: add clock bindings information for Agilex 
Document the Agilex clock bindings, and add the clock header file. The
clock header is an enumeration of all the different clocks on the Agilex
platform.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-4-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 19:13:05 -07:00
Rahul Tanwar
e2266f4c38 dt-bindings: clk: intel: Add bindings document & header file for CGU 
Clock generation unit(CGU) is a clock controller IP of Intel's Lightning
Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock
controller driver of LGM.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
Link: https://lkml.kernel.org/r/8dce2be13195aab20c6b11fca6af0fffe22d5241.1587102634.git.rahul.tanwar@linux.intel.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 18:47:20 -07:00
Arnd Bergmann
34a07a8da3 arm64: dts: Amlogic updates for v5.8 
Highlights:
 - new boards :Beelink GT-King Pro (G12B SoC), Smartlabs SML-5442TW
   (S905D), Hardkernel ODROID-C4 (SM1)
 - audio: support for GX-family SoCs
 - audio: internal DAC support
 - use the new USB control driver for GXL and GXM
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Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.8

Highlights:
- new boards :Beelink GT-King Pro (G12B SoC), Smartlabs SML-5442TW
  (S905D), Hardkernel ODROID-C4 (SM1)
- audio: support for GX-family SoCs
- audio: internal DAC support
- use the new USB control driver for GXL and GXM

* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (33 commits)
  arm64: dts: meson-g12b-gtking-pro: add initial device-tree
  dt-bindings: arm: amlogic: add support for the Beelink GT-King Pro
  arm64: dts: meson-g12b-gtking: add initial device-tree
  dt-bindings: arm: amlogic: add support for the Beelink GT-King
  arm64: dts: meson: convert ugoos-am6 to common w400 dtsi
  arm64: dts: meson: add ethernet interrupt to wetek dtsi
  arm64: dts: meson: add support for the Smartlabs SML-5442TW
  dt-bindings: arm: amlogic: add support for the Smartlabs SML-5442TW
  dt-bindings: add vendor prefix for Smartlabs LLC
  arm64: dts: meson: g12: add internal DAC glue
  arm64: dts: meson: g12: add internal DAC
  arm64: dts: meson: libretech-pc: add internal DAC support
  arm64: dts: meson: libretech-ac: add internal DAC support
  arm64: dts: meson: libretech-cc: add internal DAC support
  arm64: dts: meson: p230-q200: add internal DAC support
  arm64: dts: meson: gxl: add acodec support
  arm64: dts: meson-sm1: add support for Hardkernel ODROID-C4
  dt-bindings: arm: amlogic: add odroid-c4 bindings
  arm64: dts: meson-sm1: add cpu thermal nodes
  arm64: dts: meson-g12b: move G12B thermal nodes to meson-g12b.dtsi
  ...

Link: https://lore.kernel.org/r/5ec6f56a.1c69fb81.fc5d5.9ca6@mx.google.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-26 00:20:16 +02:00
Arnd Bergmann
7b972f3830 i.MX drivers update for 5.8: 
- Optimize imx-scu driver to use one TX and one RX instead of four for
   talking to SCU.
 - Fix one possible message header corruption where the response is
   longer than the request.
 - Move System Control defines into dt-bindings header, so that DT can
   use them as well.
 - A couple of small fixups.
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Merge tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.8:

- Optimize imx-scu driver to use one TX and one RX instead of four for
  talking to SCU.
- Fix one possible message header corruption where the response is
  longer than the request.
- Move System Control defines into dt-bindings header, so that DT can
  use them as well.
- A couple of small fixups.

* tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  firmware: imx: scu: Fix possible memory leak in imx_scu_probe()
  dt-bindings: firmware: imx: Add more system controls and PM clock types
  dt-bindings: firmware: imx: Move system control into dt-binding headfile
  firmware: imx: scu: Fix corruption of header
  firmware: imx-scu: Support one TX and one RX
  soc: imx8m: No need to put node when of_find_compatible_node() failed

Link: https://lore.kernel.org/r/20200523032516.11016-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-26 00:00:47 +02:00
Arnd Bergmann
9ffc30a66d media: tegra: Changes for v5.8-rc1 
This contains a V4L2 video capture driver for Tegra210.
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Merge tag 'tegra-for-5.8-media' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

media: tegra: Changes for v5.8-rc1

This contains a V4L2 video capture driver for Tegra210.

* tag 'tegra-for-5.8-media' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  media: tegra-video: Do not enable COMPILE_TEST
  MAINTAINERS: correct path in TEGRA VIDEO DRIVER
  media: tegra-video: Make tegra210_video_formats static
  MAINTAINERS: Add Tegra Video driver section
  media: tegra-video: Add Tegra210 Video input driver
  dt-bindings: i2c: tegra: Document Tegra210 VI I2C
  dt-bindings: tegra: Add VI and CSI bindings
  dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
  dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
  dt-bindings: clock: tegra: Remove PMC clock IDs
  dt-bindings: clock: tegra: Add clock ID for CSI TPG clock

Link: https://lore.kernel.org/r/20200515145311.1580134-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-25 23:28:35 +02:00
Arnd Bergmann
502afe7f04 Qualcomm driver updates for v5.8 
This contains a large set of cleanups, bug fixes, general improvements
 and documentation fixes for the RPMH driver. It adds a debugfs mechanism
 for inspecting Command DB. Socinfo got the "soc_id" attribute defines
 and definitions for a various variants of MSM8939.
 
 RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH
 had to be reverted due to a compilation issue when tracing is enabled.
 
 RPMHPD gained power-domains for the SM8250 voltage corners.
 
 The SCM driver gained fixes for two build warnings and the SMP2P had an
 unnecessary error print removed.
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Merge tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.8

This contains a large set of cleanups, bug fixes, general improvements
and documentation fixes for the RPMH driver. It adds a debugfs mechanism
for inspecting Command DB. Socinfo got the "soc_id" attribute defines
and definitions for a various variants of MSM8939.

RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH
had to be reverted due to a compilation issue when tracing is enabled.

RPMHPD gained power-domains for the SM8250 voltage corners.

The SCM driver gained fixes for two build warnings and the SMP2P had an
unnecessary error print removed.

* tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (42 commits)
  Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module"
  soc: qcom: rpmh-rsc: Remove the pm_lock
  soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lock
  kernel/cpu_pm: Fix uninitted local in cpu_pm
  soc: qcom: rpmh-rsc: We aren't notified of our own failure w/ NOTIFY_BAD
  soc: qcom: rpmh-rsc: Correctly ignore CPU_CLUSTER_PM notifications
  firmware: qcom_scm-legacy: Replace zero-length array with flexible-array
  soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()
  soc: qcom: rpmh-rsc: Factor "tcs_reg_addr" and "tcs_cmd_addr" calculation
  soc: qcom: socinfo: add msm8936/39 and apq8036/39 soc ids
  soc: qcom: aoss: Add SM8250 compatible
  soc: qcom: pdr: Remove impossible error condition
  soc: qcom: rpmh: Dirt can only make you dirtier, not cleaner
  soc: qcom: rpmhpd: Add SM8250 power domains
  firmware: qcom_scm: fix bogous abuse of dma-direct internals
  dt-bindings: soc: qcom: apr: Use generic node names for APR services
  firmware: qcom_scm: Remove unneeded conversion to bool
  soc: qcom: cmd-db: Properly endian swap the slv_id for debugfs
  soc: qcom: cmd-db: Use 5 digits for printing address
  soc: qcom: cmd-db: Cast sizeof() to int to silence field width warning
  ...

Link: https://lore.kernel.org/r/20200519052533.1250024-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-25 23:19:06 +02:00
Arnd Bergmann
0417a5c6a4 Reset controller updates for v5.8 
This tag adds support for i.MX8MP and i.MX8MN SoCs to the i.MX7 reset
 controller driver, extends the Hi6220 reset driver to support the AO
 reset controller used to bring the Mali450 GPU out of reset, and adds
 a define for the internal DAC reset line on Amlogic GXL SoCs.
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Merge tag 'reset-for-v5.8' of git://git.pengutronix.de/pza/linux into arm/drivers

Reset controller updates for v5.8

This tag adds support for i.MX8MP and i.MX8MN SoCs to the i.MX7 reset
controller driver, extends the Hi6220 reset driver to support the AO
reset controller used to bring the Mali450 GPU out of reset, and adds
a define for the internal DAC reset line on Amlogic GXL SoCs.

* tag 'reset-for-v5.8' of git://git.pengutronix.de/pza/linux:
  reset: hi6220: Add support for AO reset controller
  reset: imx7: Add support for i.MX8MP SoC
  dt-bindings: reset: imx7: Document usage on i.MX8MP SoC
  dt-bindings: reset: imx7: Add support for i.MX8MN
  dt-bindings: reset: meson: add gxl internal dac reset

Link: https://lore.kernel.org/r/20200515143844.GA17201@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-25 17:01:34 +02:00
Arnd Bergmann
93f9fb1e4a soc: amlogic: driver updates for v5.8 
- support GX SoCs in the EE power-controller driver
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Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers

soc: amlogic: driver updates for v5.8
- support GX SoCs in the EE power-controller driver

* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs
  soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2
  dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs
  dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2

Link: https://lore.kernel.org/r/5ec6f570.1c69fb81.a3753.711b@mx.google.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-25 16:58:09 +02:00
Arnd Bergmann
f0c59fd97c New soc variant the rk3326 which is essentially a px30 with only one 
display controller and a new board using it, the Odroid Advance Go.
 sdcard regulator for the rockpro64 and a lot of devicetree fixes
 making the dt-binding check a lot happier.
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Merge tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New soc variant the rk3326 which is essentially a px30 with only one
display controller and a new board using it, the Odroid Advance Go.
sdcard regulator for the rockpro64 and a lot of devicetree fixes
making the dt-binding check a lot happier.

* tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
  arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on rk3326-odroid-go2
  arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position on rk3399
  arm64: dts: rockchip: add bus-width properties to mmc nodes for px30
  arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc emmc node
  arm64: dts: rockchip: rename and label gpio-led subnodes
  arm64: dts: rockchip: fix defines in pd_vio node for rk3399
  arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-orangepi
  arm64: dts: rockchip: fix rtl8211e nodename for rk3399-orangepi
  arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-nanopi4
  arm64: dts: rockchip: fix rtl8211e nodename for rk3399-nanopi4
  arm64: dts: rockchip: fix rtl8211f nodename for rk3328 Beelink A1
  arm64: dts: rockchip: fix phy nodename for rk3328
  include: dt-bindings: rockchip: remove unused defines
  arm64: dts: rockchip: replace RK_FUNC defines in rk3326-odroid-go2
  arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399
  arm64: dts: rockchip: remove #sound-dai-cells from &spdif node of rk3399-hugsun-x99.dts
  arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node of rk3399-pinebook-pro.dts
  arm64: dts: rockchip: add Odroid Advance Go
  dt-bindings: Add binding for Hardkernel Odroid Go Advance
  arm64: dts: rockchip: add core devicetree for rk3326
  ...

Link: https://lore.kernel.org/r/1970481.V9vR1fIhX2@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-21 23:14:11 +02:00
Arnd Bergmann
22c328b1bc dt-bindings: Changes for v5.8-rc1 
This adds bindings for the CSI TPG clock on Tegra210, moves various
 clocks from the clock and reset controller to the PMC where their
 controls really are, adds bindings for the external memory controller
 and video capture controller on Tegra210, as well as CPU frequency
 scaling on Tegra20 and Tegra30.
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Merge tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.8-rc1

This adds bindings for the CSI TPG clock on Tegra210, moves various
clocks from the clock and reset controller to the PMC where their
controls really are, adds bindings for the external memory controller
and video capture controller on Tegra210, as well as CPU frequency
scaling on Tegra20 and Tegra30.

* tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: i2c: tegra: Document Tegra210 VI I2C
  dt-bindings: tegra: Add VI and CSI bindings
  dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
  dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
  dt-bindings: clock: tegra: Remove PMC clock IDs
  dt-bindings: clock: tegra: Add clock ID for CSI TPG clock

Link: https://lore.kernel.org/r/20200515145311.1580134-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-21 22:30:18 +02:00
Arnd Bergmann
de12d92147 Renesas ARM DT updates for v5.8 (take two) 
- Initial support for the Renesas RZ/G1H SoC on the iWave RainboW
     Qseven SOM (G21M) and board (G21D),
   - Support for the AISTARVISION MIPI Adapter V2.1 camera board on the
     Silicon Linux EK874 RZ/G2E evaluation kit.
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Merge tag 'renesas-arm-dt-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.8 (take two)

  - Initial support for the Renesas RZ/G1H SoC on the iWave RainboW
    Qseven SOM (G21M) and board (G21D),
  - Support for the AISTARVISION MIPI Adapter V2.1 camera board on the
    Silicon Linux EK874 RZ/G2E evaluation kit.

* tag 'renesas-arm-dt-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a774c0-cat874: Add support for AISTARVISION MIPI Adapter V2.1
  ARM: dts: r8a7742: Add GPIO nodes
  ARM: dts: r8a7742: Add [H]SCIF{A|B} support
  ARM: dts: r8a7742: Add IRQC support
  ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H
  ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM
  ARM: dts: r8a7742: Initial SoC device tree
  clk: renesas: Add r8a7742 CPG Core Clock Definitions
  dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros

Link: https://lore.kernel.org/r/20200515100547.14671-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-05-21 16:02:12 +02:00
Peng Fan
8c83a8ff4d clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code 
Use imx8m_clk_hw_composite_core to simpliy clks that belong to
core clk slice.

Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-05-20 09:26:48 +08:00
Peng Fan
77f5d2d973 clk: imx8mp: Define gates for pll1/2 fixed dividers 
Inspried from
commit e8688fe8df ("clk: imx8mn: Define gates for pll1/2 fixed dividers")

On imx8mp there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2
each with their own gate. Only one of these gates (the one "dividing" by
one) is currently defined and it's incorrectly set as the parent of all
the fixed-factor dividers.

Add the other 8 gates to the clock tree between sys_pll1/2_bypass and
the fixed dividers.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-05-20 09:26:45 +08:00
Martin Blumenstingl
cc9ca02a40 dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs 
The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
  VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"

Add a new compatible string and adjust the reset line expectations for
these SoCs.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200515204709.1505498-3-martin.blumenstingl@googlemail.com
 2020-05-19 16:02:14 -07:00
Martin Blumenstingl
18dfc0bf81 dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2 
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very
similar to what G12A still uses. The (known) differences are:
- Meson8 doesn't use any reset lines at all
- Meson8b and Meson8m2 use the same reset lines, which are different
  from what the 64-bit SoCs use
- there is no "vapb" clock on the older SoCs
- amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but
  only the power management related registers

Add a new compatible string and adjust clock and reset line expectations
for each SoC.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200515204709.1505498-2-martin.blumenstingl@googlemail.com
 2020-05-19 16:02:14 -07:00
Dilip Kota
c5d3cdad68 dt-bindings: phy: Add PHY_TYPE_XPCS definition 
Add definition for Ethernet PCS phy type.

Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/6091f0d2a1046f1e3656d9e33b6cc433d5465eaf.1589868358.git.eswara.kota@linux.intel.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 2020-05-19 20:26:06 +05:30
Johan Jonker
d09855bdd8 include: dt-bindings: rockchip: remove unused defines 
The Rockchip dtsi and dts files have been bulk-converted for the
remaining raw gpio numbers into their descriptive counterparts and
also got rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x
mappings, so remove the unused defines in 'rockchip.h' to prevent
that someone start using them again.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200512203524.7317-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2020-05-18 23:39:31 +02:00
Bryan O'Donoghue
4c71d6abc4 clk: qcom: Add DT bindings for MSM8939 GCC 
Add compatible strings and the include files for the MSM8939 GCC.

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Vincent Knecht <vincent.knecht@mailoo.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lkml.kernel.org/r/20200512115023.2856617-2-bryan.odonoghue@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-14 14:31:33 -07:00
Dong Aisheng
88d93afd77 dt-bindings: firmware: imx: Add more system controls and PM clock types 
Add more system controls and PM clock types for usage.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-05-13 16:19:39 +08:00
Dong Aisheng
755a739794 dt-bindings: firmware: imx: Move system control into dt-binding headfile 
i.MX8 SoCs DTS file needs system control macro definitions, so move them
into dt-binding headfile, then include/linux/firmware/imx/types.h can be
removed and those drivers using it should be changed accordingly.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-05-13 16:19:23 +08:00
Joseph Lo
cd4d6f3575 clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210 
Introduce the low jitter path of PLLP and PLLMB which can be used as EMC
clock source.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2020-05-12 22:48:41 +02:00
Sowjanya Komatineni
796705bcb1 dt-bindings: clock: tegra: Add clock ID for CSI TPG clock 
Tegra210 uses PLLD out internally for CSI TPG. This patch adds a clock
ID for this CSI TPG clock from PLLD.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2020-05-12 22:47:14 +02:00
Sowjanya Komatineni
c958540525 dt-bindings: clock: tegra: Remove PMC clock IDs 
clk_out_1, clk_out_2, clk_out_3, blink are part of Tegra PMC block so
these clocks should be provided by the Tegra PMC. IDs for these clocks
have been defined in dt-bindings/soc/tegra-pmc.h.

This patch removes the IDs for these clocks from the Tegra clock device
tree bindings.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2020-05-12 22:47:14 +02:00
Jerome Brunet
3a5fc2520b dt-bindings: reset: meson: add gxl internal dac reset 
Add the reset line of the internal DAC found on the amlogic gxl SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2020-05-06 12:03:43 +02:00
Anson Huang
c4e181d6fe dt-bindings: reset: imx7: Document usage on i.MX8MP SoC 
The driver now supports i.MX8MP, so update bindings accordingly.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2020-05-06 12:03:43 +02:00
Anson Huang
ecd910f442 dt-bindings: reset: imx7: Add support for i.MX8MN 
i.MX8MN can reuse i.MX8MQ's reset driver, update the compatible
property and related info to support i.MX8MN.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2020-05-06 12:03:43 +02:00
Abel Vesa
849af490b6 dt-bindings: clocks: imx8mp: Add ids for audiomix clocks 
Add all the clock ids for the audiomix clocks.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-04-29 10:01:57 +08:00
Leonard Crestez
4b54bf4763 interconnect: imx: Add platform driver for imx8mn 
Add a platform driver for the i.MX8MN SoC describing bus topology, based
on internal documentation.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lore.kernel.org/r/338a5409ce88811ba6c940ba06441db3faa8c187.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-04-28 20:03:02 +03:00
Leonard Crestez
63fc8029b3 interconnect: imx: Add platform driver for imx8mq 
Add a platform driver for the i.MX8MQ SoC describing bus topology,
based on internal documentation.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Link: https://lore.kernel.org/r/864310d1f2599c3bd621e70b77028a6e89f6410e.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-04-28 20:03:02 +03:00
Leonard Crestez
2c1966af07 interconnect: imx: Add platform driver for imx8mm 
Add a platform driver for the i.MX8MM SoC describing bus topology.

Bandwidth adjustments is currently only supported on the DDRC and main
NOC. Scaling for the vpu/gpu/display NICs could be added in the future.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lore.kernel.org/r/b14eef179dbd837a486619724b8033490f49db72.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-04-28 20:03:02 +03:00
Lad Prabhakar
41b2df22fa clk: renesas: Add r8a7742 CPG Core Clock Definitions 
Add all RZ/G1H Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2a ("List of Clocks [RZ/G1H]") of the RZ/G1 Hardware User's
Manual.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2020-04-28 09:54:25 +02:00
Lad Prabhakar
58f7381c97 dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros 
Add power domain indices for RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2020-04-28 09:54:12 +02:00
Bjorn Andersson
64016bb88e soc: qcom: rpmhpd: Add SM8250 power domains 
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200415062154.741179-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-04-20 23:31:48 -07:00
Anson Huang
f9a8744dde pinctrl: imx: Add imx8dxl driver 
i.MX8DXL contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2020-04-16 14:21:22 +02:00
Peng Fan
260dab4478 clk: imx7ulp: make it easy to change ARM core clk 
ARM clk could only source from divcore or hsrun_divcore.

Follow what we already used on i.MX7D and i.MX8M SoCs, use
imx_clk_hw_cpu API. When ARM core is running normaly,
whether divcore or hwrun_divcore will finally source
from SPLL_PFD0. However SPLL_PFD0 is marked with CLK_SET_GATE,
so we need to disable SPLL_PFD0, when configure the rate.
So add CORE and HSRUN_CORE virtual clk to make it easy to
configure the clk using imx_clk_hw_cpu API.

Since CORE and HSRUN_CORE already marked with CLK_IS_CRITICAL, no
need to set ARM as CLK_IS_CRITICAL. And when set the rate of ARM clk,
prograting it the parent with CLK_SET_RATE_PARENT will finally set
the SPLL_PFD0 clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-04-14 21:35:58 +08:00
Martin Blumenstingl
778fb6b729 clk: meson8b: export the HDMI system clock 
Export the HDMI system clock (used by the HDMI transmitter) so it can be
used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200330234535.3327513-2-martin.blumenstingl@googlemail.com
 2020-04-14 14:28:34 +02:00
Andreas Färber
378788120b dt-bindings: reset: rtd1295: Add SB2 reset 
Add a constant for reset3 SB2, based on downstream crt_sys_reg.h.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: James Tai <james.tai@realtek.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
 2020-04-12 23:59:30 +02:00
Andreas Färber
63313c1ceb dt-bindings: reset: Add Realtek RTD1195 
Add a header with symbolic reset indices for Realtek RTD1195 SoC.
Naming was derived from BSP register description headers.

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: James Tai <james.tai@realtek.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
 2020-04-12 23:59:24 +02:00
Linus Torvalds
eab4002660 RISC-V Patches for the 5.7 Merge Window, Part 1 
This tag contains the patches I'd like to target for 5.7.  It has a handful of
 new features:
 
 * Partial support for the Kendryte K210.  There are still a few outstanding
   issues that I have patches for, but I don't actually have a board to test
   them so they're not included yet.
 * SBI v0.2 support.
 * Fixes to support for building with LLVM-based toolchains.  The resulting
   images are known not to boot yet.
 
 This builds and boots for me.  There is one merge conflict, it's just a Kconfig
 merge issue.  I can publish a resolved branch if you'd like.
 
 I don't anticipate a part two, but I'll probably have something early in the
 RCs to finish up the K210 support.
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Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:
 "This contains a handful of new features:

   - Partial support for the Kendryte K210.

     There are still a few outstanding issues that I have patches for,
     but I don't actually have a board to test them so they're not
     included yet.

   - SBI v0.2 support.

   - Fixes to support for building with LLVM-based toolchains. The
     resulting images are known not to boot yet.

  I don't anticipate a part two, but I'll probably have something early
  in the RCs to finish up the K210 support"

* tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (38 commits)
  riscv: create a loader.bin boot image for Kendryte SoC
  riscv: Kendryte K210 default config
  riscv: Add Kendryte K210 device tree
  riscv: Select required drivers for Kendryte SOC
  riscv: Add Kendryte K210 SoC support
  riscv: Add SOC early init support
  riscv: Unaligned load/store handling for M_MODE
  RISC-V: Support cpu hotplug
  RISC-V: Add supported for ordered booting method using HSM
  RISC-V: Add SBI HSM extension definitions
  RISC-V: Export SBI error to linux error mapping function
  RISC-V: Add cpu_ops and modify default booting method
  RISC-V: Move relocate and few other functions out of __init
  RISC-V: Implement new SBI v0.2 extensions
  RISC-V: Introduce a new config for SBI v0.1
  RISC-V: Add SBI v0.2 extension definitions
  RISC-V: Add basic support for SBI v0.2
  RISC-V: Mark existing SBI as 0.1 SBI.
  riscv: Use macro definition instead of magic number
  riscv: Add support to dump the kernel page tables
  ...
 2020-04-09 10:51:30 -07:00
Linus Torvalds
38e2c63ec3 LED tree changes for 5.7-rc1. 
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Merge tag 'leds-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds

Pull LED updates from Pavel Machek:
 "One new driver, some driver changes, and some late minute cleanups --
  but those are just whitespace so should be okay.

  There are some major changes being prepared (multicolor, triggers) so
  the next release likely will be more interesting"

* tag 'leds-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds:
  leds: core: Fix warning message when init_data
  leds: make functions easier to understand
  leds: sort Makefile entries
  leds: old enums are not really applicable to new code
  leds: ip30: label power LED as such
  leds: lm3532: make bitfield 'enabled' unsigned
  leds: leds-pwm: Replace zero-length array with flexible-array member
  leds: leds-is31fl32xx: Replace zero-length array with flexible-array member
  leds: pwm: remove useless pwm_period_ns
  leds: pwm: remove header
  leds: pwm: convert to atomic PWM API
  leds: pwm: simplify if condition
  leds: add SGI IP30 led support
  leds: lm3697: fix spelling mistake "To" -> "Too"
  leds: leds-bd2802: remove set but not used variable 'pdata'
  leds: ns2: Convert to GPIO descriptors
  leds: ns2: Absorb platform data
 2020-04-07 19:41:12 -07:00
Pavel Machek
4b37883a8c leds: make functions easier to understand 
Group LED functions according to functionality, and add some
explaining comments.

Signed-off-by: Pavel Machek <pavel@ucw.cz>
 2020-04-06 22:57:21 +02:00
Linus Torvalds
3476195651 There's not much to see in the core framework this time around. Instead the 
majority of the diff is the normal collection of driver additions for new SoCs
 and non-critical clk data fixes and updates. The framework must be middle aged.
 
 The two biggest directories in the diffstat show that the Qualcomm and Unisoc
 support added a handful of big drivers for new SoCs but that's not really the
 whole story because those new drivers tend to add large numbers of lines of clk
 data. There's a handful of AT91 clk drivers added this time around too and a
 bunch of improvements to drivers like the i.MX driver. All around lots of
 updates and fixes in various clk drivers which is good to see.
 
 The core framework has only one real major change which has been baking in next
 for the past couple months. It fixes the framework so that it stops caching a
 clk's phase when the phase clk_op returns an error. Before this change we would
 consider some negative errno as a phase and that just doesn't make sense.
 
 Core:
  - Don't show clk phase when it is invalid
 
 New Drivers:
  - Add support for Unisoc SC9863A clks
  - Qualcomm SM8250 RPMh and MSM8976 RPM clks
  - Qualcomm SM8250 Global Clock Controller (GCC) support
  - Qualcomm SC7180 Modem Clock Controller (MSS CC) support
  - EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs
  - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and at91sam9g45 SoCs
 
 Updates:
  - GPU GX GDSC support on Qualcomm sc7180
  - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers
  - A series from Anson to convert i.MX8 clock bindings to json-schema
  - Update i.MX pll14xx driver to include new frequency entries for pll1443x table,
    and return error for invalid PLL type
  - Add missing of_node_put() call for a number of i.MX clock drivers
  - Drop flag CLK_IS_CRITICAL from 'A53_CORE' mux clock, as we already
    have the flag on its child cpu clock
  - Fix a53 cpu clock for i.MX8 drivers to get it source from ARM PLL
    via CORE_SEL slice, and source from A53 CCM clk root when we need to
    change ARM PLL frequency. Thus, we can support core running above
    1GHz safely
  - Update i.MX pfdv2 driver to check zero rate and use determine_rate for
    getting the best rate
  - Add CLKO2 for imx8mm, SNVS clock for imx8mn, and PXP clock for imx7d
  - Remove PMC clks from Tegra clk driver
  - Improved clock/reset handling for the Renesas R-Car USB2 Clock Selector
  - Conversion to json-schema of the Renesas CPG/MSSR DT bindings
  - Add Crypto clocks on Renesas R-Car M3-W/W+, M3-N, E3, and D3
  - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car H3, M3-W/W+, and M3-N
  - Update Amlogic audio clock gate hierarchy for meson8 and gxbb
  - Update Amlogic g12a spicc clock sources
  - Support for Ingenic X1000 TCU clks
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "There's not much to see in the core framework this time around.
  Instead the majority of the diff is the normal collection of driver
  additions for new SoCs and non-critical clk data fixes and updates.
  The framework must be middle aged.

  The two biggest directories in the diffstat show that the Qualcomm and
  Unisoc support added a handful of big drivers for new SoCs but that's
  not really the whole story because those new drivers tend to add large
  numbers of lines of clk data. There's a handful of AT91 clk drivers
  added this time around too and a bunch of improvements to drivers like
  the i.MX driver. All around lots of updates and fixes in various clk
  drivers which is good to see.

  The core framework has only one real major change which has been
  baking in next for the past couple months. It fixes the framework so
  that it stops caching a clk's phase when the phase clk_op returns an
  error. Before this change we would consider some negative errno as a
  phase and that just doesn't make sense.

  Core:
   - Don't show clk phase when it is invalid

  New Drivers:
   - Add support for Unisoc SC9863A clks
   - Qualcomm SM8250 RPMh and MSM8976 RPM clks
   - Qualcomm SM8250 Global Clock Controller (GCC) support
   - Qualcomm SC7180 Modem Clock Controller (MSS CC) support
   - EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs
   - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and
     at91sam9g45 SoCs

  Updates:
   - GPU GX GDSC support on Qualcomm sc7180
   - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers
   - A series from Anson to convert i.MX8 clock bindings to json-schema
   - Update i.MX pll14xx driver to include new frequency entries for
     pll1443x table, and return error for invalid PLL type
   - Add missing of_node_put() call for a number of i.MX clock drivers
   - Drop flag CLK_IS_CRITICAL from 'A53_CORE' mux clock, as we already
     have the flag on its child cpu clock
   - Fix a53 cpu clock for i.MX8 drivers to get it source from ARM PLL
     via CORE_SEL slice, and source from A53 CCM clk root when we need
     to change ARM PLL frequency. Thus, we can support core running
     above 1GHz safely
   - Update i.MX pfdv2 driver to check zero rate and use determine_rate
     for getting the best rate
   - Add CLKO2 for imx8mm, SNVS clock for imx8mn, and PXP clock for
     imx7d
   - Remove PMC clks from Tegra clk driver
   - Improved clock/reset handling for the Renesas R-Car USB2 Clock
     Selector
   - Conversion to json-schema of the Renesas CPG/MSSR DT bindings
   - Add Crypto clocks on Renesas R-Car M3-W/W+, M3-N, E3, and D3
   - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car H3, M3-W/W+, and
     M3-N
   - Update Amlogic audio clock gate hierarchy for meson8 and gxbb
   - Update Amlogic g12a spicc clock sources
   - Support for Ingenic X1000 TCU clks"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (146 commits)
  clk: sprd: fix to get a correct ibias of pll
  dt-bindings: imx8mm-clock: Fix the file path
  dt-bindings: imx8mq-clock: Fix the file path
  clk: qcom: rpmh: Drop unnecessary semicolons
  clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd()
  clk: tegra: Use NULL for pointer initialization
  clk: sprd: add clocks support for SC9863A
  clk: sprd: support to get regmap from parent node
  clk: sprd: Add macros for referencing parents without strings
  clk: sprd: Add dt-bindings include file for SC9863A
  dt-bindings: clk: sprd: add bindings for sc9863a clock controller
  dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific
  clk: sprd: add gate for pll clocks
  MAINTAINERS: dt: update reference for arm-integrator.txt
  clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks
  clk: mmp2: Add clock for fifth SD HCI on MMP3
  dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3
  clk: mmp2: Add clocks for the thermal sensors
  dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors
  clk: mmp2: add the GPU clocks
  ...
 2020-04-05 10:43:32 -07:00
Linus Torvalds
854e80bcfd ARM: devicetree updates for v5.7 
Most of the commits are for additional hardware support and minor fixes
 for existing machines for all the usual platforms: qcom, amlogic, at91,
 gemini, mediatek, ti, socfpga, i.mx, layerscape, uniphier, rockchip,
 exynos, ux500, mvebu, tegra, stm32, renesas, sunxi, broadcom, omap,
 and versatile.
 
 The conversion of binding files to machine-readable yaml format
 continues, along with fixes found during the validation.
 Andre Przywara takes over maintainership for the old Calxeda Highbank
 platform and provides a number of updates.
 
 The OMAP2+ platforms see a continued move from platform data into
 dts files, for many devices that relied on a mix of auxiliary data
 in addition to the DT description
 
 A moderate number of new SoCs and machines are added, here is a full
 list:
 
 - Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865
   (SM8250) is the current high-end phone chip, and IPQ6018 is a new
   WiFi-6 router chip.
 
 - Mediatek MT8516 application processor SoC for voice assistants, along
   with the "pumpkin" development board
 
 - NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an
   evaluation board.
 
 - Kontron "sl28" board family based on NXP LS1028A
 
 - Eleven variations of the new i.MX6 TechNexion Pico board, combining
   the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7
   SoM carriers
 
 - Three additional variants of the Toradex Colibri board family, all
   based on versions of the NXP i.MX7.
 
 - The Pinebook Pro laptop based on Rockchip RK3399
 
 - Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based on
   the ST-Ericsson u8500 platform
 
 - DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on
   STMicroelectronics stm32mp157
 
 - Renesas M3ULCB starter kit for R-Car M3-W+
 
 - Hoperun HiHope development board with Renesas RZ/G2M
 
 - Pine64 PineTab tablet and PinePhone phone, both based on Allwinner A64
 
 - Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner A20
 
 - PocketBook Touch Lux 3 ebook reader, based on Allwinner A13
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "Most of the commits are for additional hardware support and minor
  fixes for existing machines for all the usual platforms: qcom,
  amlogic, at91, gemini, mediatek, ti, socfpga, i.mx, layerscape,
  uniphier, rockchip, exynos, ux500, mvebu, tegra, stm32, renesas,
  sunxi, broadcom, omap, and versatile.

  The conversion of binding files to machine-readable yaml format
  continues, along with fixes found during the validation. Andre
  Przywara takes over maintainership for the old Calxeda Highbank
  platform and provides a number of updates.

  The OMAP2+ platforms see a continued move from platform data into dts
  files, for many devices that relied on a mix of auxiliary data in
  addition to the DT description

  A moderate number of new SoCs and machines are added, here is a full
  list:

   - Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865
     (SM8250) is the current high-end phone chip, and IPQ6018 is a new
     WiFi-6 router chip.

   - Mediatek MT8516 application processor SoC for voice assistants,
     along with the "pumpkin" development board

   - NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an
     evaluation board.

   - Kontron "sl28" board family based on NXP LS1028A

   - Eleven variations of the new i.MX6 TechNexion Pico board, combining
     the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7
     SoM carriers

   - Three additional variants of the Toradex Colibri board family, all
     based on versions of the NXP i.MX7.

   - The Pinebook Pro laptop based on Rockchip RK3399

   - Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based
     on the ST-Ericsson u8500 platform

   - DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on
     STMicroelectronics stm32mp157

   - Renesas M3ULCB starter kit for R-Car M3-W+

   - Hoperun HiHope development board with Renesas RZ/G2M

   - Pine64 PineTab tablet and PinePhone phone, both based on Allwinner
     A64

   - Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner
     A20

   - PocketBook Touch Lux 3 ebook reader, based on Allwinner A13"

* tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (520 commits)
  ARM: dts: ux500: Fix missing node renames
  arm64: dts: Revert "specify console via command line"
  MAINTAINERS: Update Calxeda Highbank maintainership
  arm: dts: calxeda: Group port-phys and sgpio-gpio items
  arm: dts: calxeda: Fix interrupt grouping
  arm: dts: calxeda: Provide UART clock
  arm: dts: calxeda: Basic DT file fixes
  arm64: dts: specify console via command line
  ARM: dts: at91: sama5d27_wlsom1_ek: add USB device node
  ARM: dts: gemini: Add thermal zone to DIR-685
  ARM: dts: gemini: Rename IDE nodes
  ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes
  arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes
  arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node
  arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADC
  arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0
  arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADC
  arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes
  arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node
  arm64: dts: khadas-vim3: add SPIFC controller node
  ...
 2020-04-03 15:22:05 -07:00
Stephen Boyd
28ecaf1c30 Merge branches 'clk-unisoc', 'clk-tegra', 'clk-qcom' and 'clk-imx' into clk-next 
- Add support for Unisoc SC9863A clks
 - GPU GX GDSC support on Qualcomm sc7180
 - Qualcomm SM8250 RPMh and MSM8976 RPM clks
 - Qualcomm SM8250 Global Clock Controller (GCC) support
 - Qualcomm SC7180 Modem Clock Controller (MSS CC) support

* clk-unisoc:
  clk: sprd: fix to get a correct ibias of pll
  clk: sprd: add clocks support for SC9863A
  clk: sprd: support to get regmap from parent node
  clk: sprd: Add macros for referencing parents without strings
  clk: sprd: Add dt-bindings include file for SC9863A
  dt-bindings: clk: sprd: add bindings for sc9863a clock controller
  dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific
  clk: sprd: add gate for pll clocks

* clk-tegra:
  clk: tegra: Use NULL for pointer initialization
  clk: tegra: Remove audio clocks configuration from clock driver
  clk: tegra: Remove tegra_pmc_clk_init along with clk ids
  clk: tegra: Remove CLK_M_DIV fixed clocks
  clk: tegra: Fix Tegra PMC clock out parents
  clk: tegra: Add Tegra OSC to clock lookup
  clk: tegra: Add support for OSC_DIV fixed clocks
  dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
  dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
  dt-bindings: tegra: Convert Tegra PMC bindings to YAML
  dt-bindings: clock: tegra: Add IDs for OSC clocks

* clk-qcom: (21 commits)
  clk: qcom: rpmh: Drop unnecessary semicolons
  clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd()
  clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
  ipq806x: gcc: Added the enable regs and mask for PRNG
  clk: qcom: Add modem clock controller driver for SC7180
  clk: qcom: gcc: Add support for modem clocks in GCC
  dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
  clk: qcom: clk-rpm: add missing rpm clk for ipq806x
  clk: qcom: gcc: Add global clock controller driver for SM8250
  dt-bindings: clock: Add SM8250 GCC clock bindings
  clk: qcom: clk-alpha-pll: Add support for controlling Lucid PLLs
  clk: qcom: clk-alpha-pll: Refactor trion PLL
  clk: qcom: clk-alpha-pll: Use common names for defines
  dt-bindings: clock: rpmcc: Document msm8976 compatible
  clk: qcom: smd: Add support for MSM8976 rpm clocks
  clk: qcom: clk-rpmh: Wait for completion when enabling clocks
  clk: qcom: rpmh: Add support for RPMH clocks on SM8250
  dt-bindings: clock: Add RPMHCC bindings for SM8250
  clk: qcom: alpha-pll: Make error prints more informative
  clk: qcom: gpucc: Add support for GX GDSC for SC7180
  ...

* clk-imx: (43 commits)
  dt-bindings: imx8mm-clock: Fix the file path
  dt-bindings: imx8mq-clock: Fix the file path
  clk: imx: clk-gate2: Pass the device to the register function
  clk: imx7d: Add PXP clock
  clk: imx8mq: A53 core clock no need to be critical
  clk: imx8mp: A53 core clock no need to be critical
  clk: imx8mm: A53 core clock no need to be critical
  clk: imx8mn: A53 core clock no need to be critical
  clk: imx: pllv4: use prepare/unprepare
  clk: imx: pfdv2: determine best parent rate
  clk: imx: pfdv2: switch to use determine_rate
  clk: imx: Fix division by zero warning on pfdv2
  clk: imx: clk-sscg-pll: Drop unnecessary initialization
  clk: imx: pll14xx: Return error if pll type is invalid
  clk: imx: imx8mp: fix a53 cpu clock
  clk: imx: imx8mn: fix a53 cpu clock
  clk: imx: imx8mm: fix a53 cpu clock
  clk: imx: imx8mq: fix a53 cpu clock
  clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock
  clk: imx8mn: Remove unused includes
  ...
 2020-04-03 15:10:19 -07:00
Stephen Boyd
53a2cc5cc3 Merge branches 'clk-ti', 'clk-ingenic', 'clk-typo', 'clk-at91', 'clk-mmp2' and 'clk-arm-icst' into clk-next 
- EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs
 - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and at91sam9g45 SoCs
 - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers

* clk-ti:
  clk: keystone: Add new driver to handle syscon based clocks
  dt-bindings: clock: Add binding documentation for TI EHRPWM TBCLK

* clk-ingenic:
  clk: ingenic/TCU: Fix round_rate returning error
  clk: ingenic/jz4770: Exit with error if CGU init failed
  clk: JZ4780: Add function for enable the second core.
  clk: Ingenic: Add support for TCU of X1000.

* clk-typo:
  clk: Fix trivia typo in comment exlusive => exclusive

* clk-at91:
  clk: at91: add at91rm9200 pmc driver
  clk: at91: add at91sam9n12 pmc driver
  clk: at91: add sama5d3 pmc driver
  clk: at91: add at91sam9g45 pmc driver
  clk: at91: usb: introduce num_parents in driver's structure
  clk: at91: usb: use proper usbs_mask
  clk: at91: sam9x60: fix usb clock parents
  clk: at91: usb: continue if clk_hw_round_rate() return zero
  clk: at91: sam9x60: Don't use audio PLL

* clk-mmp2:
  clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks
  clk: mmp2: Add clock for fifth SD HCI on MMP3
  dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3
  clk: mmp2: Add clocks for the thermal sensors
  dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors
  clk: mmp2: add the GPU clocks
  dt-bindings: marvell,mmp2: Add clock ids for the GPU clocks
  clk: mmp2: Add PLLs that are available on MMP3
  dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLs
  clk: mmp2: Check for MMP3
  dt-bindings: clock: Add MMP3 compatible string
  clk: mmp2: Stop pretending PLL outputs are constant
  clk: mmp2: Add support for PLL clock sources
  dt-bindings: clock: Convert marvell,mmp2-clock to json-schema
  clk: mmp2: Constify some strings
  clk: mmp2: Remove a unused prototype

* clk-arm-icst:
  MAINTAINERS: dt: update reference for arm-integrator.txt
  clk: versatile: Add device tree probing for IM-PD1 clocks
  clk: versatile: Export icst_clk_setup()
  dt-bindings: clock: Create YAML schema for ICST clocks
 2020-04-03 15:09:55 -07:00
Stephen Boyd
2d11e9a1fd Merge branches 'clk-phase-errors', 'clk-amlogic', 'clk-renesas' and 'clk-allwinner' into clk-next 
- Don't show clk phase when it is invalid

* clk-phase-errors:
  clk: rockchip: fix mmc get phase
  clk: Fix phase init check
  clk: Bail out when calculating phase fails during clk registration
  clk: Move rate and accuracy recalc to mostly consumer APIs
  clk: Use 'parent' to shorten lines in __clk_core_init()
  clk: Don't cache errors from clk_ops::get_phase()

* clk-amlogic:
  clk: meson: meson8b: set audio output clock hierarchy
  clk: meson: g12a: add support for the SPICC SCLK Source clocks
  dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs
  clk: meson: gxbb: set audio output clock hierarchy
  clk: meson: gxbb: add the gxl internal dac gate
  dt-bindings: clk: meson: add the gxl internal dac gate

* clk-renesas:
  dt-bindings: clock: renesas: cpg-mssr: Convert to json-schema
  clk: renesas: rcar-usb2-clock-sel: Add reset_control
  clk: renesas: rcar-usb2-clock-sel: Add multiple clocks management
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add power-domains and resets properties
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix clock[-name]s properties
  clk: renesas: Remove use of ARCH_R8A7795
  clk: renesas: r8a77965: Add RPC clocks
  clk: renesas: r8a7796: Add RPC clocks
  clk: renesas: r8a7795: Add RPC clocks
  clk: renesas: rcar-gen3: Add CCREE clocks

* clk-allwinner:
  clk: sunxi-ng: sun8i-de2: Sort structures
  clk: sunxi-ng: sun8i-de2: Add R40 specific quirks
  clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T
  clk: sunxi-ng: sun8i-de2: Don't reuse A83T resets
  clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate core
  clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64
  clk: sunxi-ng: sun8i-de2: Split out H5 definitions
  clk: sunxi-ng: a64: Export MBUS clock
 2020-04-03 15:09:32 -07:00
Linus Torvalds
d18292dc07 ARM: driver updates 
These are the usual updates for SoC specific device drivers and related
 subsystems that don't have their own top-level maintainers:
 
 - ARM SCMI/SCPI updates to allow pluggable transport layers
 
 - TEE subsystem cleanups
 
 - A new driver for the Amlogic secure power domain controller
 
 - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and
   TI OMAP2+ sysc drivers.
 
 - Qualcomm SoC driver updates, including a new library module for
   "protection domain" notifications
 
 - Lots of smaller bugfixes and cleanups in other drivers
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "These are the usual updates for SoC specific device drivers and
  related subsystems that don't have their own top-level maintainers:

   - ARM SCMI/SCPI updates to allow pluggable transport layers

   - TEE subsystem cleanups

   - A new driver for the Amlogic secure power domain controller

   - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU
     and TI OMAP2+ sysc drivers.

   - Qualcomm SoC driver updates, including a new library module for
     "protection domain" notifications

   - Lots of smaller bugfixes and cleanups in other drivers"

* tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits)
  soc: fsl: qe: fix sparse warnings for ucc_slow.c
  soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
  soc: fsl: qe: fix sparse warnings for ucc_fast.c
  soc: fsl: qe: fix sparse warnings for qe_ic.c
  soc: fsl: qe: fix sparse warnings for ucc.c
  soc: fsl: qe: fix sparse warning for qe_common.c
  soc: fsl: qe: fix sparse warnings for qe.c
  soc: qcom: Fix QCOM_APR dependencies
  soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
  soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
  firmware: imx: add COMPILE_TEST for IMX_SCU driver
  soc: imx: gpc: fix power up sequencing
  soc: imx: increase build coverage for imx8m soc driver
  soc: qcom: apr: Add avs/audio tracking functionality
  dt-bindings: soc: qcom: apr: Add protection domain bindings
  soc: qcom: Introduce Protection Domain Restart helpers
  devicetree: bindings: firmware: add ipq806x to qcom_scm
  memory: tegra: Correct debugfs clk rate-range on Tegra124
  memory: tegra: Correct debugfs clk rate-range on Tegra30
  memory: tegra: Correct debugfs clk rate-range on Tegra20
  ...
 2020-04-03 15:05:35 -07:00
Linus Torvalds
0e8fb69f28 ARM: SoC updates 
The code changes are mostly for 32-bit platforms and include:
 
 - Lots of updates for the Nvidia Tegra platform, including
   cpuidle, pmc, and dt-binding changes
 
 - Microchip at91 power management updates for the recently added
   sam9x60 SoC
 
 - Treewide setup_irq deprecation by afzal mohammed
 
 - STMicroelectronics stm32 gains earlycon support
 
 - Renesas platforms with Cortex-A9 can now use the global timer
 
 - Some TI OMAP2+ platforms gain cpuidle support
 
 - Various cleanups for the i.MX6 and Orion platforms, as well as
   Kconfig files across all platforms
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "The code changes are mostly for 32-bit platforms and include:

   - Lots of updates for the Nvidia Tegra platform, including cpuidle,
     pmc, and dt-binding changes

   - Microchip at91 power management updates for the recently added
     sam9x60 SoC

   - Treewide setup_irq deprecation by afzal mohammed

   - STMicroelectronics stm32 gains earlycon support

   - Renesas platforms with Cortex-A9 can now use the global timer

   - Some TI OMAP2+ platforms gain cpuidle support

   - Various cleanups for the i.MX6 and Orion platforms, as well as
     Kconfig files across all platforms"

* tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
  ARM: qcom: Add support for IPQ40xx
  ARM: mmp: replace setup_irq() by request_irq()
  ARM: cns3xxx: replace setup_irq() by request_irq()
  ARM: spear: replace setup_irq() by request_irq()
  ARM: ep93xx: Replace setup_irq() by request_irq()
  ARM: iop32x: replace setup_irq() by request_irq()
  arm: mach-dove: Mark dove_io_desc as __maybe_unused
  ARM: orion: replace setup_irq() by request_irq()
  ARM: debug: stm32: add UART early console support for STM32MP1
  ARM: debug: stm32: add UART early console support for STM32H7
  ARM: debug: stm32: add UART early console configuration for STM32F7
  ARM: debug: stm32: add UART early console configuration for STM32F4
  cpuidle: tegra: Disable CC6 state if LP2 unavailable
  cpuidle: tegra: Squash Tegra114 driver into the common driver
  cpuidle: tegra: Squash Tegra30 driver into the common driver
  cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
  ARM: tegra: cpuidle: Remove unnecessary memory barrier
  ARM: tegra: cpuidle: Make abort_flag atomic
  ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
  ARM: tegra: Make outer_disable() open-coded
  ...
 2020-04-03 15:02:35 -07:00
Arnd Bergmann
8bdbf16908 Merge branch 'arm/late' into arm/dt 
Include originally "late" updates for OMAP and Qualcomm,
now that it's not late any more.

* arm/late: (122 commits)
  ARM: OMAP2+: Drop legacy platform data for ti81xx edma
  ARM: dts: Configure interconnect target module for ti816x edma
  ARM: dts: Configure interconnect target module for dm814x tptc3
  ARM: dts: Configure interconnect target module for dm814x tptc2
  ARM: dts: Configure interconnect target module for dm814x tptc1
  ARM: dts: Configure interconnect target module for dm814x tptc0
  ARM: dts: Configure interconnect target module for dm814x tpcc
  ARM: OMAP2+: Drop legacy platform data for dm814x cpsw
  ARM: dts: Configure interconnect target module for dm814x cpsw
  clk: ti: Fix dm814x clkctrl for ethernet
  arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware
  arm64: dts: sdm845: add IPA information
  arm64: dts: qcom: db845c: add analog audio support
  arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s
  arm64: dts: qcom: c630: Enable audio support
  arm64: dts: qcom: sdm845: add apr nodes
  arm64: dts: qcom: sdm845: add slimbus nodes
  arm64: dts: qcom: sc7180: Update reg names for SDHC
  arm64: dts: qcom: qcs404: Enable CQE support for eMMC
  arm64: dts: msm8916: Add fastrpc node
  ...
 2020-04-03 22:45:37 +02:00
Linus Torvalds
0ad5b053d4 Char/Misc driver patches for 5.7-rc1 
Here is the big set of char/misc/other driver patches for 5.7-rc1.
 
 Lots of things in here, and it's later than expected due to some reverts
 to resolve some reported issues.  All is now clean with no reported
 problems in linux-next.
 
 Included in here is:
 	- interconnect updates
 	- mei driver updates
 	- uio updates
 	- nvmem driver updates
 	- soundwire updates
 	- binderfs updates
 	- coresight updates
 	- habanalabs updates
 	- mhi new bus type and core
 	- extcon driver updates
 	- some Kconfig cleanups
 	- other small misc driver cleanups and updates
 
 As mentioned, all have been in linux-next for a while, and with the last
 two reverts, all is calm and good.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char/misc/other driver patches for 5.7-rc1.

  Lots of things in here, and it's later than expected due to some
  reverts to resolve some reported issues. All is now clean with no
  reported problems in linux-next.

  Included in here is:
   - interconnect updates
   - mei driver updates
   - uio updates
   - nvmem driver updates
   - soundwire updates
   - binderfs updates
   - coresight updates
   - habanalabs updates
   - mhi new bus type and core
   - extcon driver updates
   - some Kconfig cleanups
   - other small misc driver cleanups and updates

  As mentioned, all have been in linux-next for a while, and with the
  last two reverts, all is calm and good"

* tag 'char-misc-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (174 commits)
  Revert "driver core: platform: Initialize dma_parms for platform devices"
  Revert "amba: Initialize dma_parms for amba devices"
  amba: Initialize dma_parms for amba devices
  driver core: platform: Initialize dma_parms for platform devices
  bus: mhi: core: Drop the references to mhi_dev in mhi_destroy_device()
  bus: mhi: core: Initialize bhie field in mhi_cntrl for RDDM capture
  bus: mhi: core: Add support for reading MHI info from device
  misc: rtsx: set correct pcr_ops for rts522A
  speakup: misc: Use dynamic minor numbers for speakup devices
  mei: me: add cedar fork device ids
  coresight: do not use the BIT() macro in the UAPI header
  Documentation: provide IBM contacts for embargoed hardware
  nvmem: core: remove nvmem_sysfs_get_groups()
  nvmem: core: use is_bin_visible for permissions
  nvmem: core: use device_register and device_unregister
  nvmem: core: add root_only member to nvmem device struct
  extcon: axp288: Add wakeup support
  extcon: Mark extcon_get_edev_name() function as exported symbol
  extcon: palmas: Hide error messages if gpio returns -EPROBE_DEFER
  dt-bindings: extcon: usbc-cros-ec: convert extcon-usbc-cros-ec.txt to yaml format
  ...
 2020-04-03 13:22:40 -07:00
Damien Le Moal
5ba568f57f
riscv: Add Kendryte K210 device tree 
Add a generic device tree for Kendryte K210 SoC based boards. This is
for now a very simple device tree describing the core elements of the
SoC. This is suitable (and tested) for the Kendryte KD233 development
board, the Sipeed MAIX M1 Dan Dock board and the Sipeed MAIXDUINO board.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
 2020-04-03 10:50:15 -07:00
Linus Torvalds
848960e576 sound updates for 5.7-rc1 
This became again a busy development cycle. There are a few ALSA
 core updates (merely API cleanups and sparse fixes), while majority
 of other changes are found in ASoC scene.
 
 Here are some highlights:
 
 * ALSA core:
 - More helper macros for sparse warning fixes (e.g. bitwise types)
 - Slight optimization of PCM OSS locks
 - Make common handling for PCM / compress buffers (for SOF)
 
 * ASoC:
 - Lots of code refactoring and modernization for (still ongoing)
   componentization works
 - Conversion of SND_SOC_ALL_CODECS to use imply
 - Continued refactoring and fixing of the Intel SOF/SST support,
   including the initial (but still incomplete) SoundWire support
 - SoundWire and more advanced clocking support for Realtek RT5682
 - Support for amlogic GX, Meson 8, Meson 8B and T9015 DAC, Broadcom
   DSL/PON, Ingenic JZ4760 and JZ4770, Realtek RL6231, and TI TAS2563
   and TLV320ADCX140
 
 * HD-audio:
 - Optimizations in HDMI jack handling
 - A few new quirks and fixups for Realtek codecs
 
 * USB-audio:
 - Delayed registration support
 - New quirks for Motu, Kingston, Presonus
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Merge tag 'sound-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "This became again a busy development cycle.  There are few ALSA core
  updates (merely API cleanups and sparse fixes), with the majority of
  other changes are found in ASoC scene.

  Here are some highlights:

  ALSA core:
   - More helper macros for sparse warning fixes (e.g. bitwise types)
   - Slight optimization of PCM OSS locks
   - Make common handling for PCM / compress buffers (for SOF)

  ASoC:
   - Lots of code refactoring and modernization for (still ongoing)
     componentization works
   - Conversion of SND_SOC_ALL_CODECS to use imply
   - Continued refactoring and fixing of the Intel SOF/SST support,
     including the initial (but still incomplete) SoundWire support
   - SoundWire and more advanced clocking support for Realtek RT5682
   - Support for amlogic GX, Meson 8, Meson 8B and T9015 DAC, Broadcom
     DSL/PON, Ingenic JZ4760 and JZ4770, Realtek RL6231, and TI TAS2563
     and TLV320ADCX140

  HD-audio:
   - Optimizations in HDMI jack handling
   - A few new quirks and fixups for Realtek codecs

  USB-audio:
   - Delayed registration support
   - New quirks for Motu, Kingston, Presonus"

* tag 'sound-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits)
  ALSA: usb-audio: Fix case when USB MIDI interface has more than one extra endpoint descriptor
  Revert "ALSA: uapi: Drop asound.h inclusion from asoc.h"
  ALSA: hda/realtek - Remove now-unnecessary XPS 13 headphone noise fixups
  ALSA: hda/realtek - Set principled PC Beep configuration for ALC256
  ALSA: doc: Document PC Beep Hidden Register on Realtek ALC256
  ALSA: hda/realtek - a fake key event is triggered by running shutup
  ALSA: hda: default enable CA0132 DSP support
  ASoC: amd: acp3x-pcm-dma: clean up two indentation issues
  ASoC: tlv320adcx140: Remove undocumented property
  ASoC: Intel: sof_sdw: Add Volteer support with RT5682 SNDW helper function
  ASoC: Intel: common: add match table for TGL RT5682 SoundWire driver
  ASoC: Intel: boards: add sof_sdw machine driver
  ASoC: Intel: soc-acpi: update topology and driver name for SoundWire platforms
  ASoC: rt5682: move DAI clock registry to I2S mode
  ASoC: pxa: magician: convert to use i2c_new_client_device()
  ASoC: SOF: Intel: hda-ctrl: add reset cycle before parsing capabilities
  Asoc: SOF: Intel: hda: check SoundWire wakeen interrupt in irq thread
  ASoC: SOF: Intel: hda: add WAKEEN interrupt support for SoundWire
  ASoC: SOF: Intel: hda: add parameter to control SoundWire clock stop quirks
  ASoC: SOF: Intel: hda: merge IPC, stream and SoundWire interrupt handlers
  ...
 2020-04-02 15:50:04 -07:00
Linus Torvalds
063d194224 media updates for v5.7-rc1 
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Merge tag 'media/v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - New sensor driver: imx219

 - Support for some new pixelformats

 - Support for Sun8i SoC

 - Added more codecs to meson vdec driver

 - Prepare for removing the legacy usbvision driver by moving it to
   staging. This driver has issues and use legacy core APIs. If nobody
   steps up to address those, it is time for its retirement.

 - Several cleanups and improvements on drivers, with the addition of
   new supported boards

* tag 'media/v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (236 commits)
  media: venus: firmware: Ignore secure call error on first resume
  media: mtk-vpu: load vpu firmware from the new location
  media: i2c: video-i2c: fix build errors due to 'imply hwmon'
  media: MAINTAINERS: add myself to co-maintain Hantro G1/G2 for i.MX8MQ
  media: hantro: add initial i.MX8MQ support
  media: dt-bindings: Document i.MX8MQ VPU bindings
  media: vivid: fix incorrect PA assignment to HDMI outputs
  media: hantro: Add linux-rockchip mailing list to MAINTAINERS
  media: cedrus: h264: Fix 4K decoding on H6
  media: siano: Use scnprintf() for avoiding potential buffer overflow
  media: rc: Use scnprintf() for avoiding potential buffer overflow
  media: allegro: create new struct for channel parameters
  media: allegro: move mail definitions to separate file
  media: allegro: pass buffers through firmware
  media: allegro: verify source and destination buffer in VCU response
  media: allegro: handle dependency of bitrate and bitrate_peak
  media: allegro: read bitrate mode directly from control
  media: allegro: make QP configurable
  media: allegro: make frame rate configurable
  media: allegro: skip filler data if possible
  ...
 2020-03-30 13:42:05 -07:00
Mark Brown
1c521d7e62
Merge branch 'asoc-5.7' into asoc-next 2020-03-27 17:29:20 +00:00
Arnd Bergmann
4287ec9afa arm64: dts: Amlogic updates for v5.7 (round 2) 
- G12[ab]: add SPI support, enable on odroid-n2
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Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.7 (round 2)
- G12[ab]: add SPI support, enable on odroid-n2

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node
  arm64: dts: khadas-vim3: add SPIFC controller node
  arm64: dts: meson-g12: add the SPIFC nodes
  arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width
  arm64: dts: meson-g12-common: add spicc controller nodes
  dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs
  dt-bindings: clk: meson: add the gxl internal dac gate

Link: https://lore.kernel.org/r/7hftdyhfq4.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-03-25 22:30:26 +01:00
Arnd Bergmann
a95e12db9e i.MX arm64 DTS update for 5.7: 
- New support for Kontron LS1028A based boards and NXP i.MX8MP EVK.
  - Add Ethernet PHY reset GPIO for imx8mm-evk and imx8mq-evk board.
  - Add gpio-fan, thermal and Ethernet support for imx8mq-phanbell board.
  - Add SNVS clock description to pwrkey device for i.MX8 SoCs.
  - A number of updates on librem5-devkit board to add audio, proximity
    sensor, lsm9ds1 mount matrix support, and improve WoWWAN, DVFS, SD
    devices as well.
  - A series of patches from Anson Huang to update i.MX8 EVK boards
    for support of I2C PCA6416, thermal, GPIO LED, OPP table etc.
  - Add PCIe device nodes for LX2160A and LS1028A SoC.
  - Add FSPI deivce support for LX2160A evaluation boards.
  - Add EEPROM and LTC3882 regulator support for lx2160a-cex7 board.
  - Other small and random updates on LS1028A and i.MX8 support.
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Merge tag 'imx-dt64-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 DTS update for 5.7:

 - New support for Kontron LS1028A based boards and NXP i.MX8MP EVK.
 - Add Ethernet PHY reset GPIO for imx8mm-evk and imx8mq-evk board.
 - Add gpio-fan, thermal and Ethernet support for imx8mq-phanbell board.
 - Add SNVS clock description to pwrkey device for i.MX8 SoCs.
 - A number of updates on librem5-devkit board to add audio, proximity
   sensor, lsm9ds1 mount matrix support, and improve WoWWAN, DVFS, SD
   devices as well.
 - A series of patches from Anson Huang to update i.MX8 EVK boards
   for support of I2C PCA6416, thermal, GPIO LED, OPP table etc.
 - Add PCIe device nodes for LX2160A and LS1028A SoC.
 - Add FSPI deivce support for LX2160A evaluation boards.
 - Add EEPROM and LTC3882 regulator support for lx2160a-cex7 board.
 - Other small and random updates on LS1028A and i.MX8 support.

* tag 'imx-dt64-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits)
  arm64: dts: ls1028a: disable the felix switch by default
  arm64: dts: imx8mp: Add snvs clock to powerkey
  arm64: dts: imx8mn: Add snvs clock to powerkey
  arm64: dts: ls1028a: Add PCIe controller DT nodes
  arm64: dts: ls1028a: sl28: add support for variant 2
  arm64: dts: ls1028a: sl28: expose switch ports in KBox A-230-LS
  arm64: dts: ls1028a: sl28: fix on-board EEPROMS
  arm64: dts: freescale: sl28: add SPI flash
  arm64: dts: imx8m: fix aips dts node
  arm64: dts: imx8mn: Add CPU thermal zone support
  arm64: dts: imx8mm: Add thermal zone support
  arm64: dts: imx8mq-phanbell: Fix Ethernet PHY post-reset duration
  arm64: dts: enable fspi in imx8mm dts
  arm64: dts: imx8mn: align name for crypto child nodes
  arm64: dts: lx2160aqds: Add FSPI node properties
  arm64: dts: lx2160ardb: Update FSPI node properties
  arm64: dts: imx8mq-phanbell: Add gpio-fan/thermal support
  arm64: dts: layerscape: add iommu-map property to pci nodes
  arm64: dts: imx8mp-evk: Enable pca6416 on i2c3 bus
  arm64: dts: imx8mp-evk: Add i2c3 support
  ...

Link: https://lore.kernel.org/r/20200318051918.32579-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-03-25 22:22:48 +01:00
Arnd Bergmann
993330e000 soc: drivers: Amlogic updates for v5.7 
- Add secure power domain controller
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Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers

soc: drivers: Amlogic updates for v5.7
- Add secure power domain controller

* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  dt-bindings: power: Fix dt_binding_check error
  soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM
  soc: amlogic: Add support for Secure power domains controller
  dt-bindings: power: add Amlogic secure power domains bindings
  firmware: meson_sm: Add secure power domain support

Link: https://lore.kernel.org/r/7hpndcugoo.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2020-03-25 13:33:49 +01:00
Chunyan Zhang
be7ef655be clk: sprd: Add dt-bindings include file for SC9863A 
This file defines all SC9863A clock indexes, it should be included in the
device tree in which there's device using the clocks.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200304072730.9193-5-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-24 19:03:56 -07:00
Greg Kroah-Hartman
baca54d956 Merge 5.6-rc7 into char-misc-next 
We need the char/misc driver fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2020-03-23 07:59:38 +01:00
Mike Leach
b39b46fb9c dt-bindings: arm: Adds CoreSight CTI hardware definitions 
Adds new coresight-cti.yaml file describing the bindings required to define
CTI in the device trees.

Adds an include file to dt-bindings/arm to define constants describing
common signal functionality used in CoreSight and generic usage.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200320165303.13681-6-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2020-03-21 11:32:19 +01:00
Lubomir Rintel
c2ca122a0a dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3 
There's one extra SDHCI on MMP3, used by the internal SD card on OLPC
XO-4. Add a clock for it.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-16-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 18:19:40 -07:00
Lubomir Rintel
41a8632049 dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors 
There seems to be a single thermal sensor block on MMP2 and a couple
more on MMP3. Add definitions for their respective clocks.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-14-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 18:19:40 -07:00
Lubomir Rintel
e3142226fe dt-bindings: marvell,mmp2: Add clock ids for the GPU clocks 
MMP2 has a single GC860 core while MMP3 has a GC2000 and a GC300.
On both platforms there's an AXI bus interface clock that's common for
all GPUs and each GPU core has a separate clock.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-12-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 18:19:40 -07:00
Lubomir Rintel
4d6da655d1 dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLs 
MMP3 variant provides some more clocks. Add respective IDs.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200309194254.29009-9-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 18:19:32 -07:00
Wesley Cheng
8411aa5059 clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150 
This adds the USB3 PIPE clock and GDSC structures, so
that the USB driver can vote for these resources to be
enabled/disabled when required.  Both are needed for SS
and HS USB paths to operate properly.  The GDSC will
allow the USB system to be brought out of reset, while
the PIPE clock is needed for data transactions between
the PHY and controller.

Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Link: https://lkml.kernel.org/r/1584478412-7798-2-git-send-email-wcheng@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 16:33:56 -07:00
Taniya Das
53624f9b75 dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings 
The Modem Subsystem clock provider have a bunch of generic properties
that are needed in a device tree. Add a YAML schemas for those.

Add clock ids for GCC MSS and MSS clocks which are required to bring
the modem out of reset.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1584596131-22741-2-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 16:27:58 -07:00
Tony Lindgren
a7cbd5cb41 Drop legacy platform data for omaps for v5.7 
This series of changes continues dropping legacy platform data for
 omaps by updating devices to probe with ti-sysc interconnect target
 module driver:
 
 - Update omap4, omap5, am437x, and dra7 display subsystem (DSS)
   to probe with device tree data only
 
 - Update am335x, am437x and dra7 to probe EDMA to probe with
   device tree data only
 
 - Drop legacy platform data for am335x and am437x PRUSS as the
   current code just keeps the devices in reset
 
 - Drop legacy platform data for omap4 DSP and IPU as the current
   code just keeps the devices in reset
 
 - Configure am437x and dra7 PRU-ICSS to probe with device tree
   data
 
 For the dropped omap4 DSP and IPU platform data, there will be patches
 coming later on to configure the accelerators using the omap remoteproc
 bindings so hopefully folks can actually use these devices eventually.
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Merge tag 'omap-for-v5.7/ti-sysc-drop-pdata-signed' into ti81xx

Drop legacy platform data for omaps for v5.7

This series of changes continues dropping legacy platform data for
omaps by updating devices to probe with ti-sysc interconnect target
module driver:

- Update omap4, omap5, am437x, and dra7 display subsystem (DSS)
  to probe with device tree data only

- Update am335x, am437x and dra7 to probe EDMA to probe with
  device tree data only

- Drop legacy platform data for am335x and am437x PRUSS as the
  current code just keeps the devices in reset

- Drop legacy platform data for omap4 DSP and IPU as the current
  code just keeps the devices in reset

- Configure am437x and dra7 PRU-ICSS to probe with device tree
  data

For the dropped omap4 DSP and IPU platform data, there will be patches
coming later on to configure the accelerators using the omap remoteproc
bindings so hopefully folks can actually use these devices eventually.
 2020-03-17 09:48:39 -07:00
Tony Lindgren
1bf4b15b19 clk: ti: Fix dm814x clkctrl for ethernet 
We are missing alwon ethernet clock for dm814x and this prevents us
from probing the CPSW with device tree only data. Looks like Ethernet
currently only works if it has been enabled in the bootloader.

Looks like relying on the bootloader clocks is not an issue with the
mainline kernel currently, but it will be an issue when configuring
CPSW Ethernet to probe with device tree data only as we will be managing
the clocks.

Fixes: 26ca2e9738 ("clk: ti: dm814: add clkctrl clock data")
Cc: linux-clk@vger.kernel.org
Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2020-03-17 09:45:24 -07:00
Laurent Pinchart
4ae9afbaae clk: imx7d: Add PXP clock 
The PXP has a single CCGR clock gate, gating both the IPG_CLK_ROOT and
the MAIN_AXI_CLK_ROOT. Add a single clock to cover both.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-03-16 08:56:59 +08:00
Ansuel Smith
eec152734b clk: qcom: clk-rpm: add missing rpm clk for ipq806x 
Add missing definition of rpm clk for ipq806x soc

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20200310143756.244-1-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-13 13:56:31 -07:00
Javier Martinez Canillas
a080a92a6f media: partial revert of "[media] tvp5150: add HW input connectors support" 
Commit f7b4b54e63 ("[media] tvp5150: add HW input connectors support")
added input signals support for the tvp5150, but the approach was found
to be incorrect so the corresponding DT binding commit 82c2ffeb21
("[media] tvp5150: document input connectors DT bindings") was reverted.

This left the driver with an undocumented (and wrong) DT parsing logic,
so lets get rid of this code as well until the input connectors support
is implemented properly.

It's a partial revert due other patches added on top of mentioned commit
not allowing the commit to be reverted cleanly anymore. But all the code
related to the DT parsing logic and input entities creation are removed.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[m.felsch@pengutronix.de: rm TVP5150_INPUT_NUM define]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
 2020-03-12 16:35:59 +01:00
Marco Felsch
a5a8cb966a media: dt-bindings: display: add sdtv-standards defines 
Add defines which can be included to easily describe the supported
standard tv norms 'sdtv-standards' within the device tree.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
 2020-03-12 16:29:29 +01:00
Taniya Das
98394efb48 dt-bindings: clock: Add SM8250 GCC clock bindings 
Add device tree bindings for global clock controller on SM8250 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lkml.kernel.org/r/20200224045003.3783838-5-vkoul@kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-09 15:14:56 -07:00
Roger Quadros
4d0dd3802e dt-bindings: bus: ti-sysc: Add support for PRUSS SYSC type 
The PRUSS module has a SYSCFG which is unique. The SYSCFG
has two additional unique fields called STANDBY_INIT and
SUB_MWAIT in addition to regular IDLE_MODE and STANDBY_MODE
fields. Add the bindings for this new sysc type.

Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2020-03-04 07:52:50 -08:00
Sibi Sankar
7a077f7fda dt-bindings: interconnect: Add OSM L3 DT bindings 
Add bindings for Operating State Manager (OSM) L3 interconnect provider
on SDM845 SoCs.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200227105632.15041-3-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-03-03 19:02:52 +02:00
Odelu Kukatla
c77af39bdb dt-bindings: interconnect: Add Qualcomm SC7180 DT bindings 
The Qualcomm SC7180 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1583241493-21212-2-git-send-email-okukatla@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-03-03 19:02:52 +02:00
David Dai
aae57773fb interconnect: qcom: sdm845: Split qnodes into their respective NoCs 
In order to better represent the hardware and its different Network-On-Chip
devices, split the sdm845 provider driver into NoC specific providers.
Remove duplicate functionality already provided by the icc rpmh and
bcm voter drivers to calculate and commit bandwidth requests to hardware.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200209183411.17195-6-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-02-28 12:11:40 +02:00
Peng Fan
7ab2272101 clk: imx: imx8mp: fix a53 cpu clock 
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root
signoff timing is 1Ghz, however the A53 core which sources from CCM
root could run above 1GHz which voilates the CCM.

There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.

The A53 CCM clk root should only be used when need to change ARM PLL
frequency.

Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Mark arm_a53_core as critical clk

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-24 15:39:56 +08:00
Peng Fan
c69def8898 clk: imx: imx8mn: fix a53 cpu clock 
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root
signoff timing is 1Ghz, however the A53 core which sources from CCM
root could run above 1GHz which voilates the CCM.

There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.

The A53 CCM clk root should only be used when need to change ARM PLL
frequency.

Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Mark arm_a53_core as critical clk.

Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-24 15:39:56 +08:00
Peng Fan
d3b70cd87e clk: imx: imx8mm: fix a53 cpu clock 
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root
signoff timing is 1Ghz, however the A53 core which sources from CCM
root could run above 1GHz which voilates the CCM.

There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.

The A53 CCM clk root should only be used when need to change ARM PLL
frequency.

Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Mark arm_a53_core as critical clock

Fixes: ba5625c3e2 ("clk: imx: Add clock driver support for imx8mm")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-24 15:39:56 +08:00
Peng Fan
d6fb02f054 clk: imx: imx8mq: fix a53 cpu clock 
The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root
signoff timing is 1Ghz, however the A53 core which sources from CCM
root could run above 1GHz which violates the CCM.

There is a CORE_SEL slice before A53 core, we need to configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.

The A53 CCM clk root should only be used when need to change ARM PLL
frequency.

Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Mark arm_a53_core as critical clock

Fixes: db27e40b27 ("clk: imx8mq: Add the missing ARM clock")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-24 15:39:56 +08:00
Anson Huang
c267bd443f clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock 
On i.MX8MP, internal HDMI 27M clock is actually 24MHz, so rename
the IMX8MP_CLK_HDMI_27M to IMX8MP_CLK_HDMI_24M.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-24 10:08:36 +08:00
Jerome Brunet
bd56e593da
ASoC: meson: g12a: add toacodec dt-binding documentation 
Add the DT bindings and documentation of the internal audio DAC glue found
on Amlogic g12a and sm1 SoC families

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200221153607.1585499-2-jbrunet@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2020-02-21 16:39:04 +00:00
Neil Armstrong
42be7c41a5 dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs 
Add clock ids used by the SPICC Controllers of the G12A and compatible SoCs

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
 2020-02-19 18:40:00 +01:00
Sowjanya Komatineni
cd88f16792 dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock 
Tegra PMC has blink functionality that allows 32 kHz clock out to
blink pin of the Tegra.

This patch adds id for this blink clock to use for enabling or
disabling blink output through device tree.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2020-02-17 10:09:19 +01:00
Sowjanya Komatineni
f85fa3198d dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings 
Tegra PMC has 3 clocks clk_out_1, clk_out_2, and clk_out_3.

This patch documents PMC clock bindings and adds a header defining
Tegra PMC clock ids.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2020-02-17 10:07:39 +01:00
Sowjanya Komatineni
e5377ab288 dt-bindings: clock: tegra: Add IDs for OSC clocks 
Tegra has OSC, OSC_DIV2 and OSC_DIV4 clocks from OSC pads which are
the possible parents of Tegra PMC clocks clk_out_1, clk_out_2, and
clk_out_3 for Tegra30 through Tegra210.

So, this patch adds ids for these clocks.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2020-02-17 10:04:35 +01:00
Anson Huang
5eb4025704 clk: imx8mn: Fix incorrect clock defines 
IMX8MN_CLK_I2C4 and IMX8MN_CLK_UART1's index definitions are incorrect,
fix them.

Fixes: 1e80936a42 ("dt-bindings: imx: Add clock binding doc for i.MX8MN")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-17 15:18:00 +08:00
Fabio Estevam
9c07ae6983 clk: imx8mm: Add CLKO2 support 
Add CLKO2 support, which is useful for debugging purposes.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-17 13:49:38 +08:00
Jianxin Pan
165b5fb294 dt-bindings: power: add Amlogic secure power domains bindings 
Add the bindings for the Amlogic Secure power domains, controlling the
secure power domains.

The bindings targets the Amlogic A1 and C1 compatible SoCs, in which the
power domain registers are in secure world.

Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1579087831-94965-3-git-send-email-jianxin.pan@amlogic.com
 2020-02-14 11:37:34 -08:00
Peng Fan
33db2ce73e clk: imx: imx8mn: use imx8m_clk_hw_composite_core 
Use imx8m_clk_hw_composite_core to simplify code.

Add new definitions, and X_SRC/CG/DIV will be alias to the new
definitions for backwards compatibility

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-14 10:49:41 +08:00
Peng Fan
811e4171d0 clk: imx: imx8mm: use imx8m_clk_hw_composite_core 
Use imx8m_clk_hw_composite_core to simplify code.

Add new definitions, and X_SRC/CG/DIV will be alias to the new
definitions for backwards compatibility

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-14 10:49:38 +08:00
Peng Fan
7a8d3b90bd clk: imx: imx8mq: use imx8m_clk_hw_composite_core 
Use imx8m_clk_hw_composite_core to simplify code.

Add new definitions, and X_SRC/CG/DIV will be alias to the new
definitions for backwards compatibility

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-14 10:49:35 +08:00
Jerome Brunet
06b7282438
ASoC: meson: aiu: add audio output dt-bindings 
Add the dt-bindings and documentation of the AIU audio controller.
This component provides most of the audio outputs found on the Amlogic
Gx SoC family.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200213155159.3235792-4-jbrunet@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2020-02-13 20:57:21 +00:00
Jerome Brunet
306e59cc32 dt-bindings: clk: meson: add the gxl internal dac gate 
Add the gxl ACODEC clock id to the gxbb clock controller bindings

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
 2020-02-13 17:19:22 +01:00
Horia Geantă
d2d46dfaa7 dt-bindings: clock: imx8mn: add SNVS clock 
Add macro for the SNVS clock of the i.MX8MN.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-02-13 11:08:30 +08:00
Taniya Das
fdd373a4e0 dt-bindings: clock: Add RPMHCC bindings for SM8250 
Add bindings and update documentation for clock rpmh driver on SM8250.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Link: https://lkml.kernel.org/r/1579905147-12142-2-git-send-email-vnkgutta@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-02-12 15:24:55 -08:00
Taniya Das
04ac0ad7e8 dt-bindings: clk: qcom: Add support for GPU GX GDSCR 
In the cases where the GPU SW requires to use the GX GDSCR add
support for the same.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1581307266-26989-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-02-12 15:04:10 -08:00
Jernej Skrabec
1de8493069
clk: sunxi-ng: a64: Export MBUS clock 
MBUS clock will be referenced in MBUS controller node.

Export it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
 2020-02-11 07:49:14 +01:00
Linus Torvalds
4ef1a30c6b ARM: SoC: late updates 
This is some material that we picked up into our tree late, or that had
 more complex dependencies on more than one topic branch that makes sense
 to keep separately.
 
  - TI support for secure accelerators and hwrng on OMAP4/5
 
  - TI camera changes for dra7 and am437x and SGX improvement due to better
    reset control support on am335x, am437x and dra7
 
  - Davinci moves to proper clocksource on DM365, and regulator/audio
    improvements for DM365 and DM644x eval boards
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC late updates from Olof Johansson:
 "This is some material that we picked up into our tree late, or that
  had more complex dependencies on more than one topic branch that makes
  sense to keep separately.

   - TI support for secure accelerators and hwrng on OMAP4/5

   - TI camera changes for dra7 and am437x and SGX improvement due to
     better reset control support on am335x, am437x and dra7

   - Davinci moves to proper clocksource on DM365, and regulator/audio
     improvements for DM365 and DM644x eval boards"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
  ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
  ARM: dts: Configure interconnect target module for am437x sgx
  ARM: dts: Configure sgx for dra7
  ARM: dts: Configure rstctrl reset for am335x SGX
  ARM: dts: dra7: Add ti-sysc node for VPE
  ARM: dts: dra7: add vpe clkctrl node
  ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
  ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
  ARM: dts: am43xx: add support for clkout1 clock
  arm: dts: dra76-evm: Add CAL and OV5640 nodes
  arm: dtsi: dra76x: Add CAL dtsi node
  arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
  ARM: dts: DRA72: Add CAL dtsi node
  ARM: dts: dra7-l4: Add ti-sysc node for CAM
  ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
  ARM: dts: dra7: add cam clkctrl node
  ARM: OMAP2+: Drop legacy platform data for omap4 des
  ARM: OMAP2+: Drop legacy platform data for omap4 sham
  ARM: OMAP2+: Drop legacy platform data for omap4 aes
  ...
 2020-02-08 14:17:27 -08:00
Linus Torvalds
eab3540562 ARM: SoC-related driver updates 
Various driver updates for platforms:
 
  - Nvidia: Fuse support for Tegra194, continued memory controller pieces
    for Tegra30
 
  - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC
 
  - NXP/FSL: i.MX8MP SoC driver pieces
 
  - TI Keystone: ring accelerator driver
 
  - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.
 
  - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
    communication for power management
 
  - Overall support patch set for cpuidle on more complex hierarchies
    (PSCI-based)
 
 + Misc cleanups, refactorings of Marvell, TI, other platforms.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - Nvidia: Fuse support for Tegra194, continued memory controller
     pieces for Tegra30

   - NXP/FSL: Refactorings of QuickEngine drivers to support
     ARM/ARM64/PPC

   - NXP/FSL: i.MX8MP SoC driver pieces

   - TI Keystone: ring accelerator driver

   - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

   - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
     communication for power management

   - Overall support patch set for cpuidle on more complex hierarchies
     (PSCI-based)

  and misc cleanups, refactorings of Marvell, TI, other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
  drivers: soc: xilinx: Use mailbox IPI callback
  dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
  drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
  MAINTAINERS: Add brcmstb PCIe controller entry
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  soc/tegra: regulators: Do nothing if voltage is unchanged
  memory: tegra: Correct reset value of xusb_hostr
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  bus: tegra-aconnect: Remove PM_CLK dependency
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  ...
 2020-02-08 14:04:19 -08:00
Linus Torvalds
1afa9c3b7c ARM: Device-tree updates 
New SoCs:
 
  - Atmel/Microchip SAM9X60 (ARM926 SoC)
 
  - OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all variants
    of it with different GPU/media IP configurations.
 
  - ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)
 
  - ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of db8500)
 
  - Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)
 
  - Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)
 
 New boards:
 
  - Allwinner
   + Emlid Neutis SoM (H3 variant)
   + Libre Computer ALL-H3-IT
   + PineH64 Model B
 
  - Amlogic
   + Libretech Amlogic GX PC (s905d and s912-based variants)
 
  - Atmel/Microchip:
   + Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)
 
  - Marvell:
   + Armada 385-based SolidRun Clearfog GTR
 
  - NXP:
   + Gateworks GW59xx boards based on i.MX6/6Q/6QDL
   + Tolino Shine 3 eBook reader (i.MX6sl)
   + Embedded Artists COM (i.MX7ULP)
   + SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
   + Google Coral Edge TPU (i.MX8MQ)
 
  - Rockchip
   + Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
   + Radxa Rock Pi N10 (RK3399Pro-based)
   + VMARC RK3399Pro SOM
 
  - ST
   + Reference boards for stm32mp15
 
  - ST Ericsson
   + Samsung Galaxy S III mini (GT-I8190)
   + HREF520 reference board for DB8520
 
  - TI OMAP
   + Gen1 Amazon Echo (OMAP3630-based)
 
  - Qualcomm
   + Inforce 6640 Single Board Computer (msm8996-based)
   + SC7180 IDP (SC7180-based)
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "New SoCs:

   - Atmel/Microchip SAM9X60 (ARM926 SoC)

   - OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all
     variants of it with different GPU/media IP configurations.

   - ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)

   - ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of
     db8500)

   - Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)

   - Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)

  New boards:

   - Allwinner:
      + Emlid Neutis SoM (H3 variant)
      + Libre Computer ALL-H3-IT
      + PineH64 Model B

   - Amlogic:
      + Libretech Amlogic GX PC (s905d and s912-based variants)

   - Atmel/Microchip:
      + Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)

   - Marvell:
      + Armada 385-based SolidRun Clearfog GTR

   - NXP:
      + Gateworks GW59xx boards based on i.MX6/6Q/6QDL
      + Tolino Shine 3 eBook reader (i.MX6sl)
      + Embedded Artists COM (i.MX7ULP)
      + SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
      + Google Coral Edge TPU (i.MX8MQ)

   - Rockchip:
      + Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
      + Radxa Rock Pi N10 (RK3399Pro-based)
      + VMARC RK3399Pro SOM

   - ST:
      + Reference boards for stm32mp15

   - ST Ericsson:
      + Samsung Galaxy S III mini (GT-I8190)
      + HREF520 reference board for DB8520

   - TI OMAP:
      + Gen1 Amazon Echo (OMAP3630-based)

   - Qualcomm:
      + Inforce 6640 Single Board Computer (msm8996-based)
      + SC7180 IDP (SC7180-based)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (623 commits)
  dt-bindings: fix compilation error of the example in marvell,mmp3-hsic-phy.yaml
  arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera
  arm64: dts: ti: k3-am65-main Add CAL node
  arm64: dts: ti: k3-j721e-main: Add McASP nodes
  arm64: dts: ti: k3-am654-main: Add McASP nodes
  arm64: dts: ti: k3-j721e: DMA support
  arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss
  arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation
  arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS
  arm64: dts: ti: k3-am65: DMA support
  arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss
  arm64: dts: ti: k3-am65-main: Correct main NAVSS representation
  ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
  ARM: dts: aspeed: rainier: Switch PSUs to unknown version
  arm64: dts: rockchip: Kill off "simple-panel" compatibles
  ARM: dts: rockchip: Kill off "simple-panel" compatibles
  arm64: dts: rockchip: rename dwmmc node names to mmc
  ARM: dts: rockchip: rename dwmmc node names to mmc
  arm64: dts: exynos: Rename Samsung and Exynos to lowercase
  arm64: dts: uniphier: add reset-names to NAND controller node
  ...
 2020-02-08 13:58:44 -08:00
Linus Torvalds
b34f01f76a linux-watchdog 5.6-rc1 tag 
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Merge tag 'linux-watchdog-5.6-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add IT8786 chipset ID

 - addition of sam9x60 compatible watchdog

 - da9062 improvements

 - fix UAF in reboot notifier handling in watchdog core code

 - other fixes and small improvements

* tag 'linux-watchdog-5.6-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  watchdog: da9062: make restart handler atomic safe
  watchdog: mtk_wdt: mt2712: Add reset controller
  watchdog: mtk_wdt: mt8183: Add reset controller
  dt-bindings: mediatek: mt2712: Add #reset-cells
  dt-bindings: mediatek: mt8183: Add #reset-cells
  dt-bindings: watchdog: da9062: add suspend disable option
  watchdog: it87_wdt: add IT8786 ID
  watchdog: dw_wdt: ping watchdog to reset countdown before start
  watchdog: fix UAF in reboot notifier handling in watchdog core code
  watchdog: cadence: Skip printing pointer value
  watchdog: qcom: Use platform_get_irq_optional() for bark irq
  watchdog: da9062: add power management ops
  watchdog: make DesignWare watchdog allow users to set bigger timeout value
  drivers: watchdog: stm32_iwdg: set WDOG_HW_RUNNING at probe
  watchdog: sama5d4_wdt: addition of sam9x60 compatible watchdog
 2020-02-07 12:30:16 -08:00
Linus Torvalds
f4a6365ae8 There are a few changes to the core framework this time around, in addition to 
the normal collection of driver updates to support new SoCs, fix incorrect
 data, and convert various drivers to clk_hw based APIs.
 
 In the core, we allow clk_ops::init() to return an error code now so that we
 can fail clk registration if the callback does something like fail to allocate
 memory. We also add a new "terminate" clk_op so that things done in
 clk_ops::init() can be undone, e.g. free memory. We also spit out a warning now
 when critical clks fail to enable and we support changing clk rates and
 enable/disable state through debugfs when developers compile the kernel
 themselves.
 
 On the driver front, we get support for what seems like a lot of Qualcomm and
 NXP SoCs given that those vendors dominate the diffstat. There are a couple new
 drivers for Xilinx and Amlogic SoCs too. The updates are all small things like
 fixing the way glitch free muxes switch parents, avoiding div-by-zero problems,
 or fixing data like parent names. See the updates section below for more
 details.
 
 Finally, the "basic" clk types have been converted to support specifying
 parents with clk_hw pointers. This work includes an overhaul of the fixed-rate
 clk type to be more modern by using clk_hw APIs.
 
 Core:
  - Let clk_ops::init() return an error code
  - Add a clk_ops::terminate() callback to undo clk_ops::init()
  - Warn about critical clks that fail to enable or prepare
  - Support dangerous debugfs actions on clks with dead code
 
 New Drivers:
  - Support for Xilinx Versal platform clks
  - Display clk controller on qcom sc7180
  - Video clk controller on qcom sc7180
  - Graphics clk controller on qcom sc7180
  - CPU PLLs for qcom msm8916
  - Move qcom msm8974 gfx3d clk to RPM control
  - Display port clk support on qcom sdm845 SoCs
  - Global clk controller on qcom ipq6018
  - Add a driver for BCLK of Freescale SAI cores
  - Add cam, vpe and sgx clock support for TI dra7
  - Add aess clock support for TI omap5
  - Enable clks for CPUfreq on Allwinner A64 SoCs
  - Add Amlogic meson8b DDR clock controller
  - Add input clocks to Amlogic meson8b controllers
  - Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2
  - i.MX8MP clk driver support
 
 Updates:
  - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs
  - Detect more PRMCU variants in ux500 driver
  - Adjust the composite clk type to new way of describing clk parents
  - Fixes for clk controllers on qcom msm8998 SoCs
  - Fix gmac main clock for TI dra7
  - Move TI dra7-atl clock header to correct location
  - Fix hidden node name dependency on TI clkctrl clocks
  - Fix Amlogic meson8b mali clock update using the glitch free mux
  - Fix Amlogic pll driver division by zero at init
  - Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config symbols
  - Switch more i.MX clk drivers to clk_hw based APIs
  - Disable non-functional divider between pll4_audio_div and
    pll4_post_div on imx6q
  - Fix watchdog2 clock name typo in imx7ulp clock driver
  - Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M SoCs
  - Suppress bind attrs for i.MX8M clock driver
  - Add a big comment in imx8qxp-lpcg driver to tell why
    devm_platform_ioremap_resource() shouldn't be used for the driver
  - A correction on i.MX8MN usb1_ctrl parent clock setting
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "There are a few changes to the core framework this time around, in
  addition to the normal collection of driver updates to support new
  SoCs, fix incorrect data, and convert various drivers to clk_hw based
  APIs.

  In the core, we allow clk_ops::init() to return an error code now so
  that we can fail clk registration if the callback does something like
  fail to allocate memory. We also add a new "terminate" clk_op so that
  things done in clk_ops::init() can be undone, e.g. free memory. We
  also spit out a warning now when critical clks fail to enable and we
  support changing clk rates and enable/disable state through debugfs
  when developers compile the kernel themselves.

  On the driver front, we get support for what seems like a lot of
  Qualcomm and NXP SoCs given that those vendors dominate the diffstat.
  There are a couple new drivers for Xilinx and Amlogic SoCs too. The
  updates are all small things like fixing the way glitch free muxes
  switch parents, avoiding div-by-zero problems, or fixing data like
  parent names. See the updates section below for more details.

  Finally, the "basic" clk types have been converted to support
  specifying parents with clk_hw pointers. This work includes an
  overhaul of the fixed-rate clk type to be more modern by using clk_hw
  APIs.

  Core:
   - Let clk_ops::init() return an error code
   - Add a clk_ops::terminate() callback to undo clk_ops::init()
   - Warn about critical clks that fail to enable or prepare
   - Support dangerous debugfs actions on clks with dead code

  New Drivers:
   - Support for Xilinx Versal platform clks
   - Display clk controller on qcom sc7180
   - Video clk controller on qcom sc7180
   - Graphics clk controller on qcom sc7180
   - CPU PLLs for qcom msm8916
   - Move qcom msm8974 gfx3d clk to RPM control
   - Display port clk support on qcom sdm845 SoCs
   - Global clk controller on qcom ipq6018
   - Add a driver for BCLK of Freescale SAI cores
   - Add cam, vpe and sgx clock support for TI dra7
   - Add aess clock support for TI omap5
   - Enable clks for CPUfreq on Allwinner A64 SoCs
   - Add Amlogic meson8b DDR clock controller
   - Add input clocks to Amlogic meson8b controllers
   - Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2
   - i.MX8MP clk driver support

  Updates:
   - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw
     based APIs
   - Detect more PRMCU variants in ux500 driver
   - Adjust the composite clk type to new way of describing clk parents
   - Fixes for clk controllers on qcom msm8998 SoCs
   - Fix gmac main clock for TI dra7
   - Move TI dra7-atl clock header to correct location
   - Fix hidden node name dependency on TI clkctrl clocks
   - Fix Amlogic meson8b mali clock update using the glitch free mux
   - Fix Amlogic pll driver division by zero at init
   - Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config
     symbols
   - Switch more i.MX clk drivers to clk_hw based APIs
   - Disable non-functional divider between pll4_audio_div and
     pll4_post_div on imx6q
   - Fix watchdog2 clock name typo in imx7ulp clock driver
   - Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M
     SoCs
   - Suppress bind attrs for i.MX8M clock driver
   - Add a big comment in imx8qxp-lpcg driver to tell why
     devm_platform_ioremap_resource() shouldn't be used for the driver
   - A correction on i.MX8MN usb1_ctrl parent clock setting"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (140 commits)
  dt/bindings: clk: fsl,plldig: Drop 'bindings' from schema id
  clk: ls1028a: Fix warning on clamp() usage
  clk: qoriq: add ls1088a hwaccel clocks support
  clk: ls1028a: Add clock driver for Display output interface
  dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
  clk: fsl-sai: new driver
  dt-bindings: clock: document the fsl-sai driver
  clk: composite: add _register_composite_pdata() variants
  clk: qcom: rpmh: Sort OF match table
  dt-bindings: fix warnings in validation of qcom,gcc.yaml
  dt-binding: fix compilation error of the example in qcom,gcc.yaml
  clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
  clk: zynqmp: Fix divider calculation
  clk: zynqmp: Add support for get max divider
  clk: zynqmp: Warn user if clock user are more than allowed
  clk: zynqmp: Extend driver for versal
  dt-bindings: clock: Add bindings for versal clock driver
  clk: ti: clkctrl: Fix hidden dependency to node name
  clk: ti: add clkctrl data dra7 sgx
  clk: ti: omap5: Add missing AESS clock
  ...
 2020-02-03 22:10:18 +00:00
Stephen Boyd
db865ee447 Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', 'clk-freescale' and 'clk-qoriq' into clk-next 
- Support for Xilinx Versal platform clks
 - Display clk controller on qcom sc7180
 - Video clk controller on qcom sc7180
 - Graphics clk controller on qcom sc7180
 - CPU PLLs for qcom msm8916
 - Fixes for clk controllers on qcom msm8998 SoCs
 - Move qcom msm8974 gfx3d clk to RPM control
 - Display port clk support on qcom sdm845 SoCs
 - Global clk controller on qcom ipq6018
 - Adjust composite clk to new way of describing clk parents
 - Add a driver for BCLK of Freescale SAI cores

* clk-imx: (32 commits)
  clk: imx: Add support for i.MX8MP clock driver
  dt-bindings: imx: Add clock binding doc for i.MX8MP
  clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API
  clk: imx: imx8mq: Switch to clk_hw based API
  clk: imx: imx8mm: Switch to clk_hw based API
  clk: imx: imx8mn: Switch to clk_hw based API
  clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API
  clk: imx: gate3: Switch to clk_hw based API
  clk: imx: add hw API imx_clk_hw_mux2_flags
  clk: imx: add imx_unregister_hw_clocks
  clk: imx: clk-composite-8m: Switch to clk_hw based API
  clk: imx: clk-pll14xx: Switch to clk_hw based API
  clk: imx7up: Rename the clks to hws
  clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based
  clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based
  clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based
  clk: imx: Rename sccg and frac pll register to suggest clk_hw
  clk: imx: imx7ulp composite: Rename to show is clk_hw based
  clk: imx: pllv2: Switch to clk_hw based API
  clk: imx: pllv1: Switch to clk_hw based API
  ...

* clk-ti:
  clk: ti: clkctrl: Fix hidden dependency to node name
  clk: ti: add clkctrl data dra7 sgx
  clk: ti: omap5: Add missing AESS clock
  clk: ti: dra7: fix parent for gmac_clkctrl
  clk: ti: dra7: add vpe clkctrl data
  clk: ti: dra7: add cam clkctrl data
  dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock

* clk-xilinx:
  clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
  clk: zynqmp: Fix divider calculation
  clk: zynqmp: Add support for get max divider
  clk: zynqmp: Warn user if clock user are more than allowed
  clk: zynqmp: Extend driver for versal
  dt-bindings: clock: Add bindings for versal clock driver

* clk-nvidia:
  clk: tegra20/30: Explicitly set parent clock for Video Decoder
  clk: tegra20/30: Don't pre-initialize displays parent clock
  clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation
  clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe()
  clk: tegra: Mark fuse clock as critical

* clk-qcom: (35 commits)
  clk: qcom: rpmh: Sort OF match table
  dt-bindings: fix warnings in validation of qcom,gcc.yaml
  dt-binding: fix compilation error of the example in qcom,gcc.yaml
  clk: qcom: Add ipq6018 Global Clock Controller support
  clk: qcom: Add DT bindings for ipq6018 gcc clock controller
  clk: qcom: gcc-msm8996: Fix parent for CLKREF clocks
  clk: qcom: rpmh: Add IPA clock for SC7180
  clk: qcom: rpmh: skip undefined clocks when registering
  clk: qcom: Add video clock controller driver for SC7180
  dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings
  dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings
  clk: qcom: Add graphics clock controller driver for SC7180
  dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings
  dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings
  clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent
  clk: qcom: Add display clock controller driver for SC7180
  dt-bindings: clock: Introduce QCOM sc7180 display clock bindings
  dt-bindings: clock: Add YAML schemas for the QCOM DISPCC clock bindings
  clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration
  clk: qcom: alpha-pll: Remove useless read from set rate
  ...

* clk-freescale:
  clk: fsl-sai: new driver
  dt-bindings: clock: document the fsl-sai driver
  clk: composite: add _register_composite_pdata() variants

* clk-qoriq:
  clk: qoriq: add ls1088a hwaccel clocks support
  clk: ls1028a: Add clock driver for Display output interface
  dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
 2020-01-31 13:14:26 -08:00
Stephen Boyd
6e7a9f0c4e Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', 'clk-amlogic' and 'clk-allwinner' into clk-next 
- Support dangerous debugfs actions on clks with dead code
 - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs

* clk-debugfs-danger:
  clk: Add support for setting clk_rate via debugfs

* clk-basic-hw:
  clk: divider: Add support for specifying parents via DT/pointers
  clk: gate: Add support for specifying parents via DT/pointers
  clk: mux: Add support for specifying parents via DT/pointers
  clk: asm9260: Use parent accuracy in fixed rate clk
  clk: fixed-rate: Document that accuracy isn't a rate
  clk: fixed-rate: Add clk flags for parent accuracy
  clk: fixed-rate: Add support for specifying parents via DT/pointers
  clk: fixed-rate: Document accuracy member
  clk: fixed-rate: Move to_clk_fixed_rate() to C file
  clk: fixed-rate: Remove clk_register_fixed_rate_with_accuracy()
  clk: fixed-rate: Convert to clk_hw based APIs
  clk: gpio: Use DT way of specifying parents

* clk-renesas:
  clk: renesas: Prepare for split of R-Car H3 config symbol
  dt-bindings: clock: renesas: cpg-mssr: Fix r8a774b1 typo
  clk: renesas: r7s9210: Add SPIBSC clock
  clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks
  clk: renesas: Remove use of ARCH_R8A7796
  clk: renesas: rcar-gen2: Change multipliers and dividers to u8

* clk-amlogic:
  clk: clarify that clk_set_rate() does updates from top to bottom
  clk: meson: meson8b: make the CCF use the glitch-free mali mux
  clk: meson: pll: Fix by 0 division in __pll_params_to_rate()
  clk: meson: g12a: fix missing uart2 in regmap table
  clk: meson: meson8b: use of_clk_hw_register to register the clocks
  clk: meson: meson8b: don't register the XTAL clock when provided via OF
  clk: meson: meson8b: change references to the XTAL clock to use [fw_]name
  clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier
  clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller
  dt-bindings: clock: meson8b: add the clock inputs
  dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding

* clk-allwinner:
  clk: sunxi: a23/a33: Export the MIPI PLL
  clk: sunxi: a31: Export the MIPI PLL
  clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS
  clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock
  clk: sunxi-ng: r40: Export MBUS clock
  clk: sunxi: use of_device_get_match_data
 2020-01-31 13:12:14 -08:00
Linus Torvalds
701a9c8092 Char/Misc driver changes for 5.6-rc1 
Here is the big char/misc/whatever driver changes for 5.6-rc1
 
 Included in here are loads of things from a variety of different driver
 subsystems:
 	- soundwire updates
 	- binder updates
 	- nvmem updates
 	- firmware drivers updates
 	- extcon driver updates
 	- various misc driver updates
 	- fpga driver updates
 	- interconnect subsystem and driver updates
 	- bus driver updates
 	- uio driver updates
 	- mei driver updates
 	- w1 driver cleanups
 	- various other small driver updates
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big char/misc/whatever driver changes for 5.6-rc1

  Included in here are loads of things from a variety of different
  driver subsystems:
   - soundwire updates
   - binder updates
   - nvmem updates
   - firmware drivers updates
   - extcon driver updates
   - various misc driver updates
   - fpga driver updates
   - interconnect subsystem and driver updates
   - bus driver updates
   - uio driver updates
   - mei driver updates
   - w1 driver cleanups
   - various other small driver updates

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (86 commits)
  mei: me: add jasper point DID
  char: hpet: Use flexible-array member
  binder: fix log spam for existing debugfs file creation.
  mei: me: add comet point (lake) H device ids
  nvmem: add QTI SDAM driver
  dt-bindings: nvmem: add binding for QTI SPMI SDAM
  dt-bindings: imx-ocotp: Add i.MX8MP compatible
  dt-bindings: soundwire: fix example
  soundwire: cadence: fix kernel-doc parameter descriptions
  soundwire: intel: report slave_ids for each link to SOF driver
  siox: Use the correct style for SPDX License Identifier
  w1: omap-hdq: Simplify driver with PM runtime autosuspend
  firmware: stratix10-svc: Remove unneeded semicolon
  firmware: google: Probe for a GSMI handler in firmware
  firmware: google: Unregister driver_info on failure and exit in gsmi
  firmware: google: Release devices before unregistering the bus
  slimbus: qcom: add missed clk_disable_unprepare in remove
  slimbus: Use the correct style for SPDX License Identifier
  slimbus: qcom-ngd-ctrl: Use dma_request_chan() instead dma_request_slave_channel()
  dt-bindings: SLIMBus: add slim devices optional properties
  ...
 2020-01-29 10:35:54 -08:00
Linus Torvalds
aac9662671 USB/Thunderbolt/PHY driver updates for 5.6-rc1 
Here is the big USB and Thunderbolt and PHY driver updates for 5.6-rc1.
 
 With the advent of USB4, "Thunderbolt" has really become USB4, so the
 renaming of the Kconfig option and starting to share subsystem code has
 begun, hence both subsystems coming in through the same tree here.
 
 PHY driver updates also touched USB drivers, so that is coming in
 through here as well.
 
 Major stuff included in here are:
 	- USB 4 initial support added (i.e. Thunderbolt)
 	- musb driver updates
 	- USB gadget driver updates
 	- PHY driver updates
 	- USB PHY driver updates
 	- lots of USB serial stuff fixed up
 	- USB typec updates
 	- USB-IP fixes
 	- lots of other smaller USB driver updates
 
 All of these have been in linux-next for a while now (the usb-serial
 tree is already tested in linux-next on its own before merged into
 here), with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/Thunderbolt/PHY driver updates from Greg KH:
 "Here is the big USB and Thunderbolt and PHY driver updates for
  5.6-rc1.

  With the advent of USB4, "Thunderbolt" has really become USB4, so the
  renaming of the Kconfig option and starting to share subsystem code
  has begun, hence both subsystems coming in through the same tree here.

  PHY driver updates also touched USB drivers, so that is coming in
  through here as well.

  Major stuff included in here are:
   - USB 4 initial support added (i.e. Thunderbolt)
   - musb driver updates
   - USB gadget driver updates
   - PHY driver updates
   - USB PHY driver updates
   - lots of USB serial stuff fixed up
   - USB typec updates
   - USB-IP fixes
   - lots of other smaller USB driver updates

  All of these have been in linux-next for a while now (the usb-serial
  tree is already tested in linux-next on its own before merged into
  here), with no reported issues"

[ Removed an incorrect compile test enablement for PHY_EXYNOS5250_SATA
  that causes configuration warnings    - Linus ]

* tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (207 commits)
  Doc: ABI: add usb charger uevent
  usb: phy: show USB charger type for user
  usb: cdns3: fix spelling mistake and rework grammar in text
  usb: phy: phy-gpio-vbus-usb: Convert to GPIO descriptors
  USB: serial: cyberjack: fix spelling mistake "To" -> "Too"
  USB: serial: ir-usb: simplify endpoint check
  USB: serial: ir-usb: make set_termios synchronous
  USB: serial: ir-usb: fix IrLAP framing
  USB: serial: ir-usb: fix link-speed handling
  USB: serial: ir-usb: add missing endpoint sanity check
  usb: typec: fusb302: fix "op-sink-microwatt" default that was in mW
  usb: typec: wcove: fix "op-sink-microwatt" default that was in mW
  usb: dwc3: pci: add ID for the Intel Comet Lake -V variant
  usb: typec: tcpci: mask event interrupts when remove driver
  usb: host: xhci-tegra: set MODULE_FIRMWARE for tegra186
  usb: chipidea: add inline for ci_hdrc_host_driver_init if host is not defined
  usb: chipidea: handle single role for usb role class
  usb: musb: fix spelling mistake: "periperal" -> "peripheral"
  phy: ti: j721e-wiz: Fix build error without CONFIG_OF_ADDRESS
  USB: usbfs: Always unlink URBs in reverse order
  ...
 2020-01-29 10:09:44 -08:00
Linus Torvalds
abb22e44cf - Depromote debug print on the db8500 platform (Linus Walleij) 
- Fix compilation warning when compiling with make W=1 (Amit Kucheria)
 
 - Code cleanup and refactoring, regmap conversion and add hwmon
   support on Qoriq (Andrey Smirnov)
 
 - Add an idle injection cpu cooling device and its documentation,
   rename the cpu_cooling device to cpufreq_cooling device (Daniel
   Lezcano)
 
 - Convert unexported functions to static, add the __init annotation in
   the thermal-of code and remove the pointless wrapper functions
   (Daniel Lezcano)
 
 - Fix register offset for Armada XP and register reset bit
   initialization (Zak Hays)
 
 - Enable hwmon on the rockchip (Stefan Schaeckeler)
 
 - Add the thermal sensor for the H6/H5/H3/A64/A83T/R40 sun8i platform
   and their device tree bindings, followed by a fix for the ths number
   and the sparse warnings (Yangtao Li)
 
 - Code cleansup for the sun8i and hwmon support (Yangtao Li)
 
 - Silent some messages which are misleading given the changes made in
   the previous version on generic-adc (Martin Blumenstingl)
 
 - Rename exynos to Exynos (Krzysztof Kozlowski)
 
 - Add the bcm2711 thermal driver with the device tree bindings (Stefan
   Wahren)
 
 - Use usleep_range() instead of udelay() as the call is always done in
   a sleep-able context (Geert Uytterhoeven)
 
 - Do code cleanup and re-organization to set the scene for a new
   process for the brcmstb (Florian Fainelli)
 
 - Fix bindings check issues on brcm (Stefan Wahren)
 
 - Add Jasper Lake support on int340x (Nivedita Swaminathan)
 
 - Add Comet Lake support on intel pch (Gayatri Kammela)
 
 - Fix unmatched pci_release_region() on x86 (Chuhong Yuan)
 
 - Remove temperature boundaries for rcar and rcar3 (Niklas Söderlund)
 
 - Fix return value to -ENODEV when thermal_zone_of_sensor_register()
   is called with the of-node is missing (Peter Mamonov)
 
 - Code cleanup, interrupt bouncing, and better support on stm32
   (Pascal Paillet)
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Merge tag 'thermal-v5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux

Pull thermal updates from Daniel Lezcano:

 - Depromote debug print on the db8500 platform (Linus Walleij)

 - Fix compilation warning when compiling with make W=1 (Amit Kucheria)

 - Code cleanup and refactoring, regmap conversion and add hwmon support
   on Qoriq (Andrey Smirnov)

 - Add an idle injection cpu cooling device and its documentation,
   rename the cpu_cooling device to cpufreq_cooling device (Daniel
   Lezcano)

 - Convert unexported functions to static, add the __init annotation in
   the thermal-of code and remove the pointless wrapper functions
   (Daniel Lezcano)

 - Fix register offset for Armada XP and register reset bit
   initialization (Zak Hays)

 - Enable hwmon on the rockchip (Stefan Schaeckeler)

 - Add the thermal sensor for the H6/H5/H3/A64/A83T/R40 sun8i platform
   and their device tree bindings, followed by a fix for the ths number
   and the sparse warnings (Yangtao Li)

 - Code cleansup for the sun8i and hwmon support (Yangtao Li)

 - Silent some messages which are misleading given the changes made in
   the previous version on generic-adc (Martin Blumenstingl)

 - Rename exynos to Exynos (Krzysztof Kozlowski)

 - Add the bcm2711 thermal driver with the device tree bindings (Stefan
   Wahren)

 - Use usleep_range() instead of udelay() as the call is always done in
   a sleep-able context (Geert Uytterhoeven)

 - Do code cleanup and re-organization to set the scene for a new
   process for the brcmstb (Florian Fainelli)

 - Fix bindings check issues on brcm (Stefan Wahren)

 - Add Jasper Lake support on int340x (Nivedita Swaminathan)

 - Add Comet Lake support on intel pch (Gayatri Kammela)

 - Fix unmatched pci_release_region() on x86 (Chuhong Yuan)

 - Remove temperature boundaries for rcar and rcar3 (Niklas Söderlund)

 - Fix return value to -ENODEV when thermal_zone_of_sensor_register() is
   called with the of-node is missing (Peter Mamonov)

 - Code cleanup, interrupt bouncing, and better support on stm32 (Pascal
   Paillet)

* tag 'thermal-v5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (66 commits)
  thermal: stm32: Fix low threshold interrupt flood
  thermal: stm32: Improve temperature computing
  thermal: stm32: Handle multiple trip points
  thermal: stm32: Disable interrupts at probe
  thermal: stm32: Rework sensor mode management
  thermal: stm32: Fix icifr register name
  thermal: of: Make thermal_zone_of_sensor_register return -ENODEV if a sensor OF node is missing
  thermal: rcar_gen3_thermal: Remove temperature bound
  thermal: rcar_thermal: Remove temperature bound
  thermal: intel: intel_pch_thermal: Add Comet Lake (CML) platform support
  thermal: intel: Fix unmatched pci_release_region
  thermal: int340x: processor_thermal: Add Jasper Lake support
  dt-bindings: brcm,avs-ro-thermal: Fix binding check issues
  thermal: brcmstb_thermal: Register different ops per process
  thermal: brcmstb_thermal: Restructure interrupt registration
  thermal: brcmstb_thermal: Add 16nm process thermal parameters
  dt-bindings: thermal: Define BCM7216 thermal sensor compatible
  thermal: brcmstb_thermal: Prepare to support a different process
  thermal: brcmstb_thermal: Do not use DT coefficients
  thermal: rcar_thermal: Use usleep_range() instead of udelay()
  ...
 2020-01-28 16:31:08 -08:00
Linus Torvalds
3d3b44a61a The interrupt departement provides: 
- A mechanism to shield isolated tasks from managed interrupts:
 
    The affinity of managed interrupts is completely controlled by the
    kernel and user space has no influence on them. The reason is that
    the automatically assigned affinity correlates to the multi-queue
    CPU handling of block devices.
 
    If the generated affinity mask spaws both housekeeping and isolated CPUs
    the interrupt could be routed to an isolated CPU which would then be
    disturbed by I/O submitted by a housekeeping CPU.
 
    The new mechamism ensures that as long as one housekeeping CPU is online
    in the assigned affinity mask the interrupt is routed to a housekeeping
    CPU.
 
    If there is no online housekeeping CPU in the affinity mask, then the
    interrupt is routed to an isolated CPU to keep the device queue intact,
    but unless the isolated CPU submits I/O by itself these interrupts are
    not raised.
 
  - A small addon to the device tree irqdomain core code to avoid
    duplication in irq chip drivers
 
  - Conversion of the SiFive PLIC to hierarchical domains
 
  - The usual pile of new irq chip drivers: SiFive GPIO, Aspeed SCI, NXP
    INTMUX, Meson A1 GPIO
 
  - The first cut of support for the new ARM GICv4.1
 
  - The usual pile of fixes and improvements in core and driver code
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Merge tag 'irq-core-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq updates from Thomas Gleixner:
 "The interrupt departement provides:

   - A mechanism to shield isolated tasks from managed interrupts:

     The affinity of managed interrupts is completely controlled by the
     kernel and user space has no influence on them. The reason is that
     the automatically assigned affinity correlates to the multi-queue
     CPU handling of block devices.

     If the generated affinity mask spaws both housekeeping and isolated
     CPUs the interrupt could be routed to an isolated CPU which would
     then be disturbed by I/O submitted by a housekeeping CPU.

     The new mechamism ensures that as long as one housekeeping CPU is
     online in the assigned affinity mask the interrupt is routed to a
     housekeeping CPU.

     If there is no online housekeeping CPU in the affinity mask, then
     the interrupt is routed to an isolated CPU to keep the device queue
     intact, but unless the isolated CPU submits I/O by itself these
     interrupts are not raised.

   - A small addon to the device tree irqdomain core code to avoid
     duplication in irq chip drivers

   - Conversion of the SiFive PLIC to hierarchical domains

   - The usual pile of new irq chip drivers: SiFive GPIO, Aspeed SCI,
     NXP INTMUX, Meson A1 GPIO

   - The first cut of support for the new ARM GICv4.1

   - The usual pile of fixes and improvements in core and driver code"

* tag 'irq-core-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (33 commits)
  genirq, sched/isolation: Isolate from handling managed interrupts
  irqchip/gic-v4.1: Allow direct invalidation of VLPIs
  irqchip/gic-v4.1: Suppress per-VLPI doorbell
  irqchip/gic-v4.1: Add VPE INVALL callback
  irqchip/gic-v4.1: Add VPE eviction callback
  irqchip/gic-v4.1: Add VPE residency callback
  irqchip/gic-v4.1: Add mask/unmask doorbell callbacks
  irqchip/gic-v4.1: Plumb skeletal VPE irqchip
  irqchip/gic-v4.1: Implement the v4.1 flavour of VMOVP
  irqchip/gic-v4.1: Don't use the VPE proxy if RVPEID is set
  irqchip/gic-v4.1: Implement the v4.1 flavour of VMAPP
  irqchip/gic-v4.1: VPE table (aka GICR_VPROPBASER) allocation
  irqchip/gic-v3: Add GICv4.1 VPEID size discovery
  irqchip/gic-v3: Detect GICv4.1 supporting RVPEID
  irqchip/gic-v3-its: Fix get_vlpi_map() breakage with doorbells
  irqdomain: Fix a memory leak in irq_domain_push_irq()
  irqchip: Add NXP INTMUX interrupt multiplexer support
  dt-bindings: interrupt-controller: Add binding for NXP INTMUX interrupt multiplexer
  irqchip: Define EXYNOS_IRQ_COMBINER
  irqchip/meson-gpio: Add support for meson a1 SoCs
  ...
 2020-01-27 17:22:21 -08:00
Linus Torvalds
a5b871c91d dmaengine updates for v5.6-rc1 
- Core:
    - Support for dynamic channels
    - Removal of various slave wrappers
    - Make few slave request APIs as private to dmaengine
    - Symlinks between channels and slaves
    - Support for hotplug of controllers
    - Support for metadata_ops for dma_async_tx_descriptor
    - Reporting DMA cached data amount
    - Virtual dma channel locking updates
 
  - New drivers/device/feature support support:
    - Driver for Intel data accelerators
    - Driver for TI K3 UDMA
    - Driver for PLX DMA engine
    - Driver for hisilicon Kunpeng DMA engine
    - Support for eDMA support for QorIQ LS1028A in fsl edma driver
    - Support for cyclic dma in sun4i driver
    - Support for X1830 in JZ4780 driver
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Merge tag 'dmaengine-5.6-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This time we have a bunch of core changes to support dynamic channels,
  hotplug of controllers, new apis for metadata ops etc along with new
  drivers for Intel data accelerators, TI K3 UDMA, PLX DMA engine and
  hisilicon Kunpeng DMA engine. Also usual assorted updates to drivers.

  Core:
   - Support for dynamic channels
   - Removal of various slave wrappers
   - Make few slave request APIs as private to dmaengine
   - Symlinks between channels and slaves
   - Support for hotplug of controllers
   - Support for metadata_ops for dma_async_tx_descriptor
   - Reporting DMA cached data amount
   - Virtual dma channel locking updates

  New drivers/device/feature support support:
   - Driver for Intel data accelerators
   - Driver for TI K3 UDMA
   - Driver for PLX DMA engine
   - Driver for hisilicon Kunpeng DMA engine
   - Support for eDMA support for QorIQ LS1028A in fsl edma driver
   - Support for cyclic dma in sun4i driver
   - Support for X1830 in JZ4780 driver"

* tag 'dmaengine-5.6-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (62 commits)
  dmaengine: Create symlinks between DMA channels and slaves
  dmaengine: hisilicon: Add Kunpeng DMA engine support
  dmaengine: idxd: add char driver to expose submission portal to userland
  dmaengine: idxd: connect idxd to dmaengine subsystem
  dmaengine: idxd: add descriptor manipulation routines
  dmaengine: idxd: add sysfs ABI for idxd driver
  dmaengine: idxd: add configuration component of driver
  dmaengine: idxd: Init and probe for Intel data accelerators
  dmaengine: add support to dynamic register/unregister of channels
  dmaengine: break out channel registration
  x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction
  dmaengine: ti: k3-udma: fix spelling mistake "limted" -> "limited"
  dmaengine: s3c24xx-dma: fix spelling mistake "to" -> "too"
  dmaengine: Move dma_get_{,any_}slave_channel() to private dmaengine.h
  dmaengine: Remove dma_request_slave_channel_compat() wrapper
  dmaengine: Remove dma_device_satisfies_mask() wrapper
  dt-bindings: fsl-imx-sdma: Add i.MX8MM/i.MX8MN/i.MX8MP compatible string
  dmaengine: zynqmp_dma: fix burst length configuration
  dmaengine: sun4i: Add support for cyclic requests with dedicated DMA
  dmaengine: fsl-qdma: fix duplicated argument to &&
  ...
 2020-01-27 10:55:50 -08:00
yong.liang
fe42cc30a9 dt-bindings: mediatek: mt2712: Add #reset-cells 
Add #reset-cells and update mtk-wdt.txt

Signed-off-by: yong.liang <yong.liang@mediatek.com>
Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck7@gmail.com>
Link: https://lore.kernel.org/r/20200115085828.27791-3-yong.liang@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
 2020-01-27 15:55:48 +01:00
yong.liang
f43f97a0fc dt-bindings: mediatek: mt8183: Add #reset-cells 
Add #reset-cells property and update example

Signed-off-by: yong.liang <yong.liang@mediatek.com>
Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck7@gmail.com>
Link: https://lore.kernel.org/r/20200115085828.27791-2-yong.liang@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
 2020-01-27 15:55:48 +01:00
Krzysztof Kozlowski
ca07ee4e3d thermal: exynos: Rename Samsung and Exynos to lowercase 
Fix up inconsistent usage of upper and lowercase letters in "Samsung"
and "Exynos" names.

"SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked
names.  Therefore they should be written with lowercase letters starting
with capital letter.

The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.

Although advertisement materials usually use uppercase "SAMSUNG", the
lowercase version is used in all legal aspects (e.g. on Wikipedia and in
privacy/legal statements on
https://www.samsung.com/semiconductor/privacy-global/).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200104152107.11407-7-krzk@kernel.org
 2020-01-27 10:24:32 +01:00
Rajan Vaja
352546805a dt-bindings: clock: Add bindings for versal clock driver 
Add documentation to describe Xilinx Versal clock driver
bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1575527759-26452-2-git-send-email-rajan.vaja@xilinx.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-23 13:21:50 -08:00
Tony Lindgren
723a567f43 ARM: dts: Add missing omap5 secure clocks 
The secure clocks on omap5 are similar to what we already have for dra7
with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in
"Table 3-1044. CORE_CM_CORE Registers Mapping Summary".

The secure clocks are part of the l4per clock manager. As the l4per
clock manager has now two clock domains as children, let's also update
the l4per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.

Compared to omap4, omap5 has more clocks working in hardare autogating
mode.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2020-01-23 08:22:57 -08:00
Tony Lindgren
cfcbc2dbb7 ARM: dts: Add missing omap4 secure clocks 
The secure clocks on omap4 are similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table
3-1346 L4PER_CM2 Registers Mapping Summary".

The secure clocks are part of the l4_per clock manager. As the l4_per
clock manager has now two clock domains as children, let's also update
the l4_per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2020-01-23 08:20:17 -08:00
Greg Kroah-Hartman
10d3e38c79 interconnect patches for 5.6 
Here are the interconnect patches for the 5.6-rc1 merge window.
 
 - New core helper functions for some common functionalities in drivers.
 - Improvements in the information exposed via debugfs.
 - Basic tracepoints support.
 - New interconnect driver for msm8916 platforms.
 - Misc fixes.
 
 Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
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Merge tag 'icc-5.6-rc1' of https://git.linaro.org/people/georgi.djakov/linux into char-misc-next

Georgi writes:

interconnect patches for 5.6

Here are the interconnect patches for the 5.6-rc1 merge window.

- New core helper functions for some common functionalities in drivers.
- Improvements in the information exposed via debugfs.
- Basic tracepoints support.
- New interconnect driver for msm8916 platforms.
- Misc fixes.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

* tag 'icc-5.6-rc1' of https://git.linaro.org/people/georgi.djakov/linux:
  interconnect: qcom: Add MSM8916 interconnect provider driver
  dt-bindings: interconnect: Add Qualcomm MSM8916 DT bindings
  interconnect: Check for valid path in icc_set_bw()
  interconnect: Print the tag in the debugfs summary
  interconnect: Add interconnect_graph file to debugfs
  interconnect: qcom: Use the standard aggregate function
  interconnect: Add a common standard aggregate function
  interconnect: Add basic tracepoints
  interconnect: Add a name to struct icc_path
  interconnect: Move internal structs into a separate file
  interconnect: qcom: Use the new common helper for node removal
  interconnect: Add a common helper for removing all nodes
 2020-01-22 10:04:39 +01:00
Greg Kroah-Hartman
dd7d99dc68 Merge 5.5-rc7 into usb-next 
We need the USB fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2020-01-21 19:36:59 +01:00
Olof Johansson
684415d0de cmdq: 
- clean ups of unused code and debuggability
 - add cmdq_instruction to make the function call interface more readable
 - add functions for polling and providing info for the user of cmdq
 
 scpsys:
 - add bindings for MT6765
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Merge tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

cmdq:
- clean ups of unused code and debuggability
- add cmdq_instruction to make the function call interface more readable
- add functions for polling and providing info for the user of cmdq

scpsys:
- add bindings for MT6765

* tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
  soc: mediatek: cmdq: add polling function
  soc: mediatek: cmdq: define the instruction struct
  soc: mediatek: cmdq: remove OR opertaion from err return

Link: https://lore.kernel.org/r/9b365e76-e346-f813-d750-d7cfd0d16e4e@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
 2020-01-20 11:26:10 -08:00
Eddie James
5350a237b4 dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller 
Document the Aspeed SCU interrupt controller and add an include file
for the interrupts it provides.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/1579123790-6894-2-git-send-email-eajames@linux.ibm.com
 2020-01-20 19:10:03 +00:00
Tony Lindgren
957ad44ff5 clk: ti: add clkctrl data dra7 sgx 
This is similar to what we have for omap5 except the gpu_cm address is
different, the mux clocks have one more source option, and there's no
divider clock.

Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "gpu-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.

For accessing the GPU, we also need to configure the interconnect target
module for GPU similar to what we have for omap5, I'll send that change
separately.

Cc: Benoit Parrot <bparrot@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-01-20 09:43:44 +02:00
Tony Lindgren
364975eeb4 clk: ti: omap5: Add missing AESS clock 
Looks like we're missing AESS clock for omap5. This is similar to what
omap4 has.

Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-01-20 09:42:48 +02:00
Benoit Parrot
7dfd5e619d clk: ti: dra7: add vpe clkctrl data 
Add clkctrl data for VPE.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-01-20 09:39:52 +02:00
Benoit Parrot
7054c14f05 clk: ti: dra7: add cam clkctrl data 
Add clkctrl data for CAM domain.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-01-20 09:36:50 +02:00
Peter Ujfalusi
8e28918a85 dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock 
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2020-01-20 09:34:37 +02:00
Jyri Sarha
8a79db5e83 dt-bindings: phy: Add PHY_TYPE_DP definition 
Add definition for DisplayPort phy type.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 2020-01-17 10:54:35 +05:30
Olof Johansson
a0be47376f ARM: dts: Amlogic updates for v5.6 
- add DDR clock controller
 - GPU OPP updates
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Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

ARM: dts: Amlogic updates for v5.6
- add DDR clock controller
- GPU OPP updates

* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP
  ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP
  ARM: dts: meson8b: fix the clock controller compatible string
  ARM: dts: meson8b: add the DDR clock controller
  ARM: dts: meson8: add the DDR clock controller
  ARM: dts: meson: provide the XTAL clock using a fixed-clock
  dt-bindings: clock: meson8b: add the clock inputs
  dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding

Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
 2020-01-16 15:47:10 -08:00
Olof Johansson
333505a406 Qualcomm driver updates for v5.6 
* SCM major refactoring and cleanup
 * Properly flag active only power domains as active only
 * Add SC7180 and SM8150 RPMH power domains
 * Return EPROBE_DEFER from QMI if packet family is not yet available
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Merge tag 'qcom-drivers-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.6

* SCM major refactoring and cleanup
* Properly flag active only power domains as active only
* Add SC7180 and SM8150 RPMH power domains
* Return EPROBE_DEFER from QMI if packet family is not yet available

* tag 'qcom-drivers-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
  firmware: qcom_scm: Dynamically support SMCCC and legacy conventions
  firmware: qcom_scm: Remove thin wrappers
  firmware: qcom_scm: Order functions, definitions by service/command
  firmware: qcom_scm-32: Add device argument to atomic calls
  firmware: qcom_scm-32: Create common legacy atomic call
  firmware: qcom_scm-32: Move SMCCC register filling to qcom_scm_call
  firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls
  firmware: qcom_scm-32: Add funcnum IDs
  firmware: qcom_scm-32: Use SMC arch wrappers
  firmware: qcom_scm-64: Improve SMC convention detection
  firmware: qcom_scm-64: Move SMC register filling to qcom_scm_call_smccc
  firmware: qcom_scm-64: Add SCM results struct
  firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc
  firmware: qcom_scm-64: Make SMC macros less magical
  firmware: qcom_scm: Remove unused qcom_scm_get_version
  firmware: qcom_scm: Apply consistent naming scheme to command IDs
  firmware: qcom_scm: Rename macros and structures
  soc: qcom: rpmhpd: Set 'active_only' for active only power domains
  firmware: scm: Add stubs for OCMEM and restore_sec_cfg_available
  dt-bindings: power: rpmpd: Convert rpmpd bindings to yaml
  ...

Link: https://lore.kernel.org/r/20200113204405.GD3325@yoga
Signed-off-by: Olof Johansson <olof@lixom.net>
 2020-01-16 15:45:36 -08:00
Olof Johansson
e64d0098dd dt-bindings: Changes for v5.6-rc1 
This contains a conversion of the Tegra124 EMC bindings to json-schema
 as well as the addition of the bindings for the memory subsystem found
 on Tegra186 and Tegra194.
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Merge tag 'tegra-for-5.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.6-rc1

This contains a conversion of the Tegra124 EMC bindings to json-schema
as well as the addition of the bindings for the memory subsystem found
on Tegra186 and Tegra194.

* tag 'tegra-for-5.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: memory: Add Tegra186 memory subsystem
  dt-bindings: memory: Add Tegra194 memory controller header
  dt-bindings: memory: Add Tegra186 memory client IDs
  dt-bindings: memory-controller: Convert Tegra124 EMC to json-schema

Link: https://lore.kernel.org/r/20200111003553.2411874-1-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
 2020-01-16 10:40:04 -08:00
Anson Huang
1088691447 dt-bindings: imx: Add clock binding doc for i.MX8MP 
Add the clock binding doc for i.MX8MP.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2020-01-12 14:07:34 +08:00
Mars Cheng
56f6737167 dt-bindings: mediatek: add MT6765 power dt-bindings 
This adds power dt-bindings for MT6765

Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Owen Chen <owen.chen@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
 2020-01-10 11:00:36 +01:00
Sricharan R
d15b1ff1bd clk: qcom: Add DT bindings for ipq6018 gcc clock controller 
Add the compatible strings and the include file for ipq6018
gcc clock controller.

Co-developed-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org>
Signed-off-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org>
Co-developed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lkml.kernel.org/r/1578557121-423-2-git-send-email-sricharan@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-09 12:42:54 -08:00
Thierry Reding
a213f9f1c3 dt-bindings: memory: Add Tegra194 memory controller header 
This header contains definitions for the memory controller found on
NVIDIA Tegra194 SoCs, such as the stream IDs used for the ARM SMMU and
the IDs used to identify the various memory clients.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
 2020-01-09 19:10:27 +01:00
Thierry Reding
96b0239bbd dt-bindings: memory: Add Tegra186 memory client IDs 
Add IDs for the memory clients found on NVIDIA Tegra186 SoCs. This will
be used to describe interconnect paths from devices to system memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
 2020-01-09 19:10:04 +01:00
Georgi Djakov
ebb37bd064 dt-bindings: interconnect: Add Qualcomm MSM8916 DT bindings 
The Qualcomm MSM8916 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 2020-01-07 09:30:09 +02:00
Lubomir Rintel
247aa9e4d2 dt-bindings: marvell,mmp2: Add clock ids for the HSIC clocks 
There are two USB HSIC controllers on MMP2 and MMP3.

Link: https://lore.kernel.org/r/20191220065314.237624-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
 2020-01-06 09:33:12 -08:00
Taniya Das
4cc62ebd0c dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings 
Add device tree bindings for video clock controller for
Qualcomm Technology Inc's SC7180 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1577428714-17766-6-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-04 23:25:01 -08:00
Taniya Das
468e727d18 dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings 
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SC7180 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1577428714-17766-3-git-send-email-tdas@codeaurora.org
[sboyd@kernel.org: Indicate sc7180 in commit subject]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-04 23:24:28 -08:00
Maxime Ripard
9c232d324b
clk: sunxi: a23/a33: Export the MIPI PLL 
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings
headers.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
 2020-01-04 09:45:19 +01:00
Maxime Ripard
a655ede064
clk: sunxi: a31: Export the MIPI PLL 
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings
headers.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
 2020-01-04 09:45:09 +01:00
Vasily Khoruzhick
a9b5c67178
clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS 
Export CLK_CPUX so we can reference it in CPU node.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
 2020-01-04 09:18:08 +01:00
Chen-Yu Tsai
b406cadbc8
clk: sunxi-ng: r40: Export MBUS clock 
The MBUS clock needs to be referenced in the MBUS device node.
Export it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
 2020-01-03 10:37:14 +01:00
Tomer Maimon
a5df0d4e9d dt-bindings: reset: Add binding constants for NPCM7xx reset controller 
Add device tree binding constants for Nuvoton BMC NPCM7xx
reset controller.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2020-01-02 12:25:05 +01:00
Taniya Das
75616da712 dt-bindings: clock: Introduce QCOM sc7180 display clock bindings 
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SC7180 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1573812245-23827-3-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Add sc7180 to subject]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-12-23 22:30:10 -08:00
Jeffrey Hugo
db2c7c0a04 clk: qcom: Add missing msm8998 gcc_bimc_gfx_clk 
gcc_bimc_gfx_clk is a required clock for booting the GPU and GPU SMMU.

Fixes: 4807c71cc6 (arm64: dts: Add msm8998 SoC and MTP board support)
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lkml.kernel.org/r/20191217164913.4783-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-12-23 18:24:48 -08:00
周琰杰 (Zhou Yanjie)
b98900548b dt-bindings: dmaengine: Add X1830 bindings. 
Add the dmaengine bindings for the X1830 Soc from Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/1576591140-125668-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2019-12-23 13:12:49 +05:30
Jeffrey Hugo
e6494bf65a dt-bindings: clock: Add support for the MSM8998 mmcc 
Document the multimedia clock controller found on MSM8998.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1576596018-10140-1-git-send-email-jhugo@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-12-18 21:37:40 -08:00
Taniya Das
c1079b4ec1 clk: qcom: dispcc: Add support for display port clocks 
SDM845 dispcc supports RCG and CBCRs for display port, so add support for
the same.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/20190731182713.8123-3-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-12-18 21:24:13 -08:00
Sibi Sankar
52a4cb577b dt-bindings: power: Add rpmh power-domain bindings for sc7180 
Add RPMH power-domain bindings for the SC7180 family of SoCs.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e7f99ca4e-47d442f4-b923-4eea-b812-898e5476beab-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-11 23:27:56 -08:00
Sibi Sankar
18ec173d56 dt-bindings: power: Add rpmh power-domain bindings for SM8150 
Add RPMH power-domain bindings for the SM8150 family of SoCs.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e7f99ad2b-2bce2fac-2f02-4b3f-ac64-09942f7251ea-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-11 23:26:14 -08:00
Martin Blumenstingl
51b6fe7e66 dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding 
Amlogic Meson8, Meson8b and Meson8m2 SoCs have a DDR clock controller in
the MMCBUS registers. There is no public documentation on this, but the
GPL u-boot sources from the Amlogic BSP show that:
- it uses the same XTAL input as the main clock controller
- it contains a PLL which seems to be implemented just like the other
  PLLs in this SoC
- there is a power-of-two PLL post-divider

Add the documentation and header file for this DDR clock controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
 2019-12-11 14:06:27 +01:00
Martin Blumenstingl
4881873f4c dt-bindings: reset: meson8b: fix duplicate reset IDs 
According to the public S805 datasheet the RESET2 register uses the
following bits for the PIC_DC, PSC and NAND reset lines:
- PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3)
- PSC is at bit 4 (meaning: RESET_VD_RMEM + 4)
- NAND is at bit 5 (meaning: RESET_VD_RMEM + 4)

Update the reset IDs of these three reset lines so they don't conflict
with PIC_DC and map to the actual hardware reset lines.

Fixes: 79795e20a1 ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
 2019-12-09 15:21:20 -08:00
Linus Torvalds
eb275167d1 ARM: Device-tree updates 
As always, the bulk of updates. Some of the news this cycle:
 
 New SoC descriptions:
  - Broadcom BCM2711
  - Amlogic Meson A1 and G12
  - Freescale S32V234
  - Marvell Armada AP807/AP807-quad and CP115
  - Realtek RTD1293 and RTD1296
  - Rockchip RK3308
 
 New boards and platforms:
  - Allwinner: NanoPi Duo2
  - Amlogic: Ugoos am6
  - Atmel at91: Overkiz Kizbox2/4
  - Broadcom: RPi4, Luxul XWC-2000
  - Marvell: New Espressobin flavor
  - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
    E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
    OPOS6ULDev
  - Renesas: Salvator-XS
  - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "As always, the bulk of updates.  Some of the news this cycle:

  New SoC descriptions:
   - Broadcom BCM2711
   - Amlogic Meson A1 and G12
   - Freescale S32V234
   - Marvell Armada AP807/AP807-quad and CP115
   - Realtek RTD1293 and RTD1296
   - Rockchip RK3308

  New boards and platforms:
   - Allwinner: NanoPi Duo2
   - Amlogic: Ugoos am6
   - Atmel at91: Overkiz Kizbox2/4
   - Broadcom: RPi4, Luxul XWC-2000
   - Marvell: New Espressobin flavor
   - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
     E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
     OPOS6ULDev
   - Renesas: Salvator-XS
   - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (653 commits)
  ARM: dts: logicpd-torpedo: Disable USB Host
  arm: dts: mt6323: add keys, power-controller, rtc and codec
  arm64: dts: mt8183: add systimer0 device node
  dt-bindings: mediatek: update bindings for MT8183 systimer
  arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
  arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
  arm64: dts: rockchip: Add Beelink A1
  dt-bindings: ARM: rockchip: Add Beelink A1
  arm64: dts: rockchip: Add RK3328 audio pipelines
  arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
  arm64: dts: ti: k3-j721e-main: add USB controller nodes
  ARM: dts: aspeed-g6: Add timer description
  ARM: dts: aspeed: ast2600evb: Enable i2c buses
  ARM: dts: at91: add a dts and dtsi file for kizbox2 based boards
  dt-bindings: arm: at91: Document Kizbox2-2 board binding
  arm64: dts: meson-gx: fix i2c compatible
  arm64: dts: meson-gx: cec node should be disabled by default
  arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
  arm64: dts: meson-gxm: fix gpu irq order
  arm64: dts: meson-g12a: fix gpu irq order
  ...
 2019-12-05 12:09:47 -08:00
Linus Torvalds
ec939e4c94 ARM: SoC-related driver updates 
Various driver updates for platforms:
 
  - A larger set of work on Tegra 2/3 around memory controller and
  regulator features, some fuse cleanups, etc..
 
  - MMP platform drivers, in particular for USB PHY, and other smaller
  additions.
 
  - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
  and ASV (adaptive voltage), allowing the platform to run at more
  optimal operating points.
 
  - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
 
  - Clock/reset control driver for TI/OMAP
 
  - Meson-A1 reset controller support
 
  - Qualcomm sdm845 and sda845 SoC IDs for socinfo
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - A larger set of work on Tegra 2/3 around memory controller and
     regulator features, some fuse cleanups, etc..

   - MMP platform drivers, in particular for USB PHY, and other smaller
     additions.

   - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
     and ASV (adaptive voltage), allowing the platform to run at more
     optimal operating points.

   - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas

   - Clock/reset control driver for TI/OMAP

   - Meson-A1 reset controller support

   - Qualcomm sdm845 and sda845 SoC IDs for socinfo"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
  firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
  soc: fsl: add RCPM driver
  dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
  memory: tegra: Consolidate registers definition into common header
  memory: tegra: Ensure timing control debug features are disabled
  memory: tegra: Introduce Tegra30 EMC driver
  memory: tegra: Do not handle error from wait_for_completion_timeout()
  memory: tegra: Increase handshake timeout on Tegra20
  memory: tegra: Print a brief info message about EMC timings
  memory: tegra: Pre-configure debug register on Tegra20
  memory: tegra: Include io.h instead of iopoll.h
  memory: tegra: Adapt for Tegra20 clock driver changes
  memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
  memory: tegra: Add gr2d and gr3d to DRM IOMMU group
  memory: tegra: Set DMA mask based on supported address bits
  soc: at91: Add Atmel SFR SN (Serial Number) support
  memory: atmel-ebi: switch to SPDX license identifiers
  memory: atmel-ebi: move NUM_CS definition inside EBI driver
  soc: mediatek: Refactor bus protection control
  soc: mediatek: Refactor sram control
  ...
 2019-12-05 11:43:31 -08:00
Linus Torvalds
a5255bc316 dmaengine updates for v5.5-rc1 
- New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC,
    Freescale dpaa2 qDMA
  - Support for X1000 in JZ4780
  - Xilinx dma updates and support for Xilinx AXI MCDM controller
  - New bindings for rcar R8A774B1
  - Minor updates to dw, dma-jz4780, ti-edma, sprd drivers
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Merge tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "Here are the changes this time around, couple of new drivers and
  updates to few more:

   - New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC,
     Freescale dpaa2 qDMA

   - Support for X1000 in JZ4780

   - Xilinx dma updates and support for Xilinx AXI MCDM controller

   - New bindings for rcar R8A774B1

   - Minor updates to dw, dma-jz4780, ti-edma, sprd drivers"

* tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (61 commits)
  dmaengine: Fix Kconfig indentation
  dmaengine: sf-pdma: move macro to header file
  dmaengine: sf-pdma: replace /** with /* for non-function comment
  dmaengine: ti: edma: fix missed failure handling
  dmaengine: mmp_pdma: add missed of_dma_controller_free
  dmaengine: mmp_tdma: add missed of_dma_controller_free
  dmaengine: sprd: Add wrap address support for link-list mode
  MAINTAINERS: Add Green as SiFive PDMA driver maintainer
  dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00
  dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
  dmaengine: zx: remove: removed dmam_pool_destroy
  dmaengine: mediatek: hsdma_probe: fixed a memory leak when devm_request_irq fails
  dmaengine: iop-adma: clean up an indentation issue
  dmaengine: milbeaut-xdmac: remove redundant error log
  dmaengine: milbeaut-hdmac: remove redundant error log
  dmaengine: dma-jz4780: add missed clk_disable_unprepare in remove
  dmaengine: JZ4780: Add support for the X1000.
  dt-bindings: dmaengine: Add X1000 bindings.
  dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support
  dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle
  ...
 2019-12-02 11:00:19 -08:00