Commit Graph

13 Commits

Author SHA1 Message Date
Andy Shevchenko
ee4c71f577 pinctrl: tigerlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-17-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:28 +02:00
Andy Shevchenko
34393c3678 pinctrl: intel: Switch to use exported namespace
We already have a few symbols exported in the namespace.
Let's do the same for others (except PM for now).

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 19:21:38 +03:00
Andy Shevchenko
f72a86236a pinctrl: tigerlake: Replace TGL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
Use INTEL_COMMUNITY_GPPS() common macro instead custom TGL_COMMUNITY().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27 21:17:55 +02:00
Andy Shevchenko
1177ca3a0b pinctrl: tigerlake: Deduplicate COMMUNITY macro code
Define a common COMMUNITY macro and supply a variant to it.
This removes some verbosity in macros.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-10-26 14:54:12 +03:00
Andy Shevchenko
6f66db29e2 pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID"
It appears that last minute change moved ACPI ID of Alder Lake-M
to the INTC1055, which is already in the driver.

This ID on the other hand will be used elsewhere.

This reverts commit 258435a1c8.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-02-15 19:02:46 +02:00
Andy Shevchenko
2f658f7a39 pinctrl: tigerlake: Fix GPIO mapping for newer version of software
The software mapping for GPIO, which initially comes from Microsoft,
is subject to change by respective Windows and firmware developers.
Due to the above the driver had been written and published way ahead
of the schedule, and thus the numbering schema used in it is outdated.

Fix the numbering schema in accordance with the real products on market.

Fixes: 653d96455e ("pinctrl: tigerlake: Add support for Tiger Lake-H")
Reported-and-tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Reported-by: Riccardo Mori <patacca@autistici.org>
Reported-and-tested-by: Lovesh <lovesh.bond@gmail.com>
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=213463
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=213579
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=213857
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2021-08-04 18:47:50 +03:00
Andy Shevchenko
258435a1c8 pinctrl: tigerlake: Add Alder Lake-M ACPI ID
Intel Alder Lake-M PCH has the same GPIO hardware than Tiger Lake-LP
PCH but the ACPI ID is different. Add this new ACPI ID to the list of
supported devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2021-05-25 16:26:38 +03:00
Andy Shevchenko
0e793a4e28 pinctrl: tigerlake: Add Alder Lake-P ACPI ID
Intel Alder Lake-P PCH has the same GPIO hardware than Tiger Lake-LP
PCH but the ACPI ID is different. Add this new ACPI ID to the list of
supported devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2021-01-08 16:04:50 +02:00
Andy Shevchenko
cb8cc18508 pinctrl: tigerlake: Fix register offsets for TGL-H variant
It appears that almost traditionally the H variants have some deviations
in the register offsets in comparison to LP ones. This is the case for
Intel Tiger Lake as well. Fix register offsets for TGL-H variant.

Fixes: 653d96455e ("pinctrl: tigerlake: Add support for Tiger Lake-H")
Reported-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20200929110306.40852-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-30 11:43:56 +02:00
Mika Westerberg
653d96455e pinctrl: tigerlake: Add support for Tiger Lake-H
Intel Tiger Lake-H has different pin layout than the -LP variant
so add support for this to the existing Tiger Lake driver.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-29 17:39:06 +03:00
Andy Shevchenko
d4b41f8bb2 pinctrl: tigerlake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Mika Westerberg
cd0a32371d pinctrl: tigerlake: Tiger Lake uses _HID enumeration
Turns out that Tiger Lake GPIO will be enumerated using _HID method where
there is only a single ACPI device and multiple BARs so rework the driver
to support that scheme instead.

Fixes: c9ccf71fc8 ("pinctrl: intel: Add Intel Tiger Lake pin controller support")
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-01-16 13:30:40 +02:00
Andy Shevchenko
c9ccf71fc8 pinctrl: intel: Add Intel Tiger Lake pin controller support
This driver adds pinctrl/GPIO support for Intel Tiger Lake SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-30 16:05:18 +02:00