Commit Graph

28954 Commits

Author SHA1 Message Date
Christian König
ba0b2275a6 drm/amdgpu: use memcpy_to/fromio for UVD fw upload
Also use the firmware size from the header instead of calculating it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:06 -04:00
Rex Zhu
39a5830a05 drm/amd/powerplay: delete useless code in iceland_hwmgr.c.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:06 -04:00
Alex Deucher
70a033d25b drm/radeon: switch UVD code to use UVD_NO_OP for padding
Replace packet2's with packet0 writes to UVD_NO_OP.  The
value written to UVD_NO_OP does not matter.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:05 -04:00
Alex Deucher
c8b4f288f4 drm/amdgpu: switch UVD code to use UVD_NO_OP for padding
Replace packet2's with packet0 writes to UVD_NO_OP.  The
value written to UVD_NO_OP does not matter.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:05 -04:00
Alex Deucher
4d6bdbad25 drm/radeon: add support for UVD_NO_OP register
Writes to this register are the preferred way to do NOPs.

Bump the driver version as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:04 -04:00
Alex Deucher
8dd31d74ac drm/amdgpu: add support for UVD_NO_OP register
Writes to this register are the preferred way to do NOPs.

Bump the driver version as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:04 -04:00
Alex Deucher
a22f803cd2 drm/amdgpu: fix VCE ib alignment value
The VCE rings only require single dword alignment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24 16:25:03 -04:00
Alex Deucher
c4795ca642 drm/amdgpu: fix IB alignment for UVD
According to the hw team, it should be 16, not 8.

Cc: Peter Fang <peter.fang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-08-24 16:25:02 -04:00
Tom St Denis
1b5836492d drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()
If the ring isn't ready lets print out which ring name
to help debugging.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:07 -04:00
Heinrich Schuchardt
ddbbd3be96 drm/radeon: remove dead code, si_mc_load_microcode (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:07 -04:00
Heinrich Schuchardt
6e4b070ea1 drm/radeon/cik: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:06 -04:00
Heinrich Schuchardt
bb1800caf7 drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.c
if (a == NULL || a->b == NULL)
leads to a NULL pointer dereference if a == NULL.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:05 -04:00
Heinrich Schuchardt
d36f3e048e drm/amd/powerplay: avoid NULL pointer dereference
if (a == NULL || a->b == NULL)
leads to a NULL pointer dereference if a == NULL.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:05 -04:00
Heinrich Schuchardt
887656f0b7 drm/amdgpu/gmc8: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:04 -04:00
Heinrich Schuchardt
5c0eb98e48 drm/amdgpu/gmc7: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.

v2: agd: remove unused variable

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:48:04 -04:00
Alexandre Demers
5da25cd575 drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs()
Fixed indentation for readability.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23 13:47:56 -04:00
Alexandre Demers
dfaf2291ab drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos.
We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.

Being there, fix typos in comments and improved readability.

I haven't looked at other DCEs, the mask may also be wrong for them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:25 -04:00
Christian König
99e124f402 drm/amdgpu: cleanup amdgpu_vm_bo_update params
Make it more obvious what we are doing here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:24 -04:00
Christian König
6369f6f133 drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are
obviously mutual exclusive. So stop adding a dummy entry without effect when
both are specified.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:24 -04:00
Christian König
faceaf6a73 drm/amdgpu: cleanup amdgpu_ttm_placement_init
Make it more clear what this function does. No intendet functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:23 -04:00
Christian König
1fdc0b76ea drm/amdgpu: fix lru size grouping v2
Adding a BO can make it the insertion point for larger sizes as well.

v2: add a comment about the guard structure.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:23 -04:00
Tom St Denis
8cc5e80641 drm/amd/powerplay: Tidy up cz_hwmgr.c
Clean up whitespace and formatting.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:22 -04:00
Marek Olšák
83a59b6338 drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONS
For profiling.

v2: really bump the minor version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:21 -04:00
Chunming Zhou
53cdccd520 drm/amdgpu: recover vram bo from shadow after gpu reset V2
V2:
1. don't directly submit to many jobs at the same time.
2. delete unrelated printk.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:21 -04:00
Chunming Zhou
0c4e7fa561 drm/amdgpu: link all shadow bo V2
V2:
1. use mutex instead of spinlock for shadow list, since its process could
sleep.
2. move list_del to bo destroy phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:20 -04:00
Chunming Zhou
4c7e885506 drm/amdgpu: update pt shadow while updating pt V2
V2:
move shadow parameter to amdgpu_pte_update_params.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: minutemaidpark@hotmail.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:20 -04:00
Chunming Zhou
6557e3d294 drm/amdgpu: update pd shadow while updating pd V2
V2:
Checking if shadow is valid.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:19 -04:00
Chunming Zhou
20f4eff1c8 drm/amdgpu: sync bo and shadow V3
Use shadow flag to judge which direction to sync.
V2:
Don't need bo pin, so remove it.

V3:
1. Split to two functions, one is backup_to_shadow, another is
restore_from_shadow.
2. Clean up previous shadow direction difinitions.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:18 -04:00
Chunming Zhou
e24db98529 drm/amdgpu: add direct submision option for copy_buffer
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:18 -04:00
Chunming Zhou
3ad81f167e drm/amdgpu: add need backup function V2
V2:
add checking if need backup in amdgpu_bo_create.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:33:22 -04:00
jimqu
abc8c1ce48 drm/amd/amdgpu: S3 resumed failed after 4-5 times loop
Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff
and read pcie pid is 0xffff.
The issue is caused by VCE reset when update cg setting. according to HW programming
guide, adjust update VCE cg sequence.
The patch apply to VCE2.0.

Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:32:55 -04:00
Flora Cui
27798e07ed drm/amdgpu: use domain's gpu_offset for start addr
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:32:38 -04:00
Flora Cui
32ab75f076 drm/amdgpu: update gart_pin_size only if the bo is pined to GTT
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:31:36 -04:00
Flora Cui
408778e8e9 drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()
abort if the bo is pined to other domain already

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:31:19 -04:00
Flora Cui
c632d79943 amdgpu: move ttm stuff to amdgpu_ttm.h
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:30:58 -04:00
Rex Zhu
2a702ccd9a drm/amd/powerplay: enable power containment features for tonga.
v2: fix build error introduced when fix code style problems.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-19 12:28:38 -04:00
Tom St Denis
e9f11dc80a drm/amd/amdgpu: Add more debugfs config data
Adds family and external_rev_id to config data

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-17 15:43:20 -04:00
Emily Deng
041aa65805 drm/amdgpu: Hardcode virtual DCE vblank / scanout position return values
For virtual display feature, by hardcoding 0 for the vblank counter and
-EINVAL for the scanout position return value, we signal to the core DRM code that there are
no hardware counters we can use for these.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-17 15:42:50 -04:00
Tom St Denis
89a8f30900 drm/amd/amdgpu: Add more config data for debugfs
Adds rev_id as well as cg/pg flags to help debug runtime.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:45:05 -04:00
Christian König
6681c5eba1 drm/amdgpu: fix coding style in amdgpu_object.c
Just a few 80 chars problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:44:55 -04:00
Christian König
afef8b8f99 drm/amdgpu: add function pointer to the pte_update_params
Remember what function to call while planning the commands instead
of figuring it our later on.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:44:45 -04:00
Christian König
96105e5375 drm/amdgpu: stop splitting PTE commands into smaller ones
It doesn't make much sense to create bigger commands first which we then need
to split into smaller one again. Just make sure the commands we create aren't
to big in the first place.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:44:34 -04:00
Christian König
dc157c6daa drm/amdgpu: remove AMDGPU_VM_NO_FLUSH define
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:44:20 -04:00
Christian König
de9ea7bd36 drm/amdgpu: cleanup the write_pte implementations
We don't need the gart mapping handling here any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:44:10 -04:00
Christian König
b7fc2cbd5e drm/amdgpu: remove pages_addr handling from the VM code
Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:43:59 -04:00
Christian König
b0456f9306 drm/amdgpu: write PTEs directly into the IB.
Write the PTEs at the end of the IB instead of directly into the SDMA commands.
This can save quite some CPU cycles building the entries.

This doesn't change the DW estimation because PTEs where embedded into the IB
before as well. It just moves them to the end of the IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:43:44 -04:00
Chunming Zhou
478feaf6cc drm/amdgpu: add shadow flag V2
Indicate if need to sync between bo and shadow, where sync to where.
V2:
Rename to backup_shadow

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:43:14 -04:00
Chunming Zhou
1baa439fb2 drm/amdgpu: allocate shadow for pd/pt bo V2
The pd/pt shadow bo will be used to backup page table, when gpu reset
happens, we can restore the page table by them.
V2:
Free shadow bo.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:42:53 -04:00
Chunming Zhou
14fd833efa drm/amdgpu: validate shadow as well when validating bo
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:42:33 -04:00
Chunming Zhou
e7893c4bd3 drm/amdgpu: add shadow bo support V2
shadow bo is the shadow of a bo, which is always in GTT,
which can be used to backup the original bo.
V2:
reference shadow parent, shadow bo will be freed by who allocted him.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:40:01 -04:00