Commit Graph

450 Commits

Author SHA1 Message Date
Daniel Vetter
b47cf66f31 intel-gtt: drop dcache support for i830 and later
i830_check_flags already disallows it, so no need to implement it
in the write_entry function. Seems to be a remnant from i810 support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 20:14:41 +00:00
Chris Wilson
c64f7ba5f1 agp/intel: Remove confusion of stolen entries not stolen memory
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:43:18 +00:00
Chris Wilson
1b6064d79b agp/intel: Remove the artificial cap on stolen size
Now that the stolen memory does not also steal entries from the GTT, we
can use all the memory the BIOS set aside for the GPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 15:42:59 +00:00
Chris Wilson
e624ae8e0d Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
2010-11-22 08:51:36 +00:00
Arnd Bergmann
451a3c24b0 BKL: remove extraneous #include <smp_lock.h>
The big kernel lock has been removed from all these files at some point,
leaving only the #include.

Remove this too as a cleanup.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-11-17 08:59:32 -08:00
Chris Wilson
c94f28c383 Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
	drivers/gpu/drm/i915/intel_ringbuffer.c
2010-11-15 06:49:30 +00:00
Dave Airlie
91839fd577 Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
  drm/i915: Fix LVDS fixed-mode regression from 219adae1
  drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
  drm/i915: Avoid might_fault during pwrite whilst holding our mutex
  agp/intel: fix cache control for sandybridge
  agp/intel: restore cache behavior on sandybridge
  drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge
  drm/i915: Fix KMS regression on Sandybridge/CPT
  i915: reprogram power monitoring registers on resume
  drm/i915: SNB BLT workaround
  drm/i915: Fix the graphics frequency clamping at init and when IPS is active.
  drm/i915: Allow powersave modparam to be adjusted at runtime.
  drm/i915: Apply big hammer to serialise buffer access between rings
  drm/i915: opregion_setup: iounmap correct address
  drm/i915: Flush read-only buffers from the active list upon idle as well
  i915: signedness bug in check_overlay_src()
  drm/i915: Fix typo from "Enable DisplayPort Audio"
2010-11-09 13:26:13 +10:00
Zhenyu Wang
16a02cf08a agp/intel: fix cache control for sandybridge
This is broken from 97ef1bdd0b.
Let's set the correct bit for LLC+MLC and LLC only.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-04 09:39:50 +00:00
Zhenyu Wang
8d0f567082 agp/intel: restore cache behavior on sandybridge
This restores cache behavior for default AGP_USER_MEMORY as
uncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.
I've seen different cache behavior on one sandybridge desktop CPU vs.
another mobile CPU. Until we figure out how to detect the real cache
config, restore back to the original behavior now.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-04 09:39:28 +00:00
Zhenyu Wang
897ef19251 agp/intel: restore cache behavior on sandybridge
This restores cache behavior for default AGP_USER_MEMORY as
uncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.
I've seen different cache behavior on one sandybridge desktop CPU vs.
another mobile CPU. Until we figure out how to detect the real cache
config, restore back to the original behavior now.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-02 10:05:47 +00:00
Zhenyu Wang
d110852513 agp/intel: fix cache control for sandybridge
This is broken from 97ef1bdd0b.
Let's set the correct bit for LLC+MLC and LLC only.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-02 10:05:46 +00:00
Chris Wilson
100519e2f1 agp/intel: the GMCH is always enabled for integrated processor graphics
... and trying to set the bit is ineffectual.

Fixes the regression from e380f60 which detected that we were trying to
do undefined operations on the I830_GMCH_CTRL.

Reported-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-31 12:31:31 +00:00
Chris Wilson
e380f60b22 agp/intel: Sandybridge doesn't require GMCH enabling
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 20:30:44 +01:00
Kyle McMartin
6a915c2bf0 parisc-agp: fix missing slab.h include
Commit 338e4fab added a missing kfree if the alloc_pci_dev failed
but forgot to include <linux/slab.h> for the definition of
kfree.

Signed-off-by: Kyle McMartin <kyle@redhat.com>
2010-10-29 13:26:48 -04:00
Linus Torvalds
e430426654 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
  parisc: add tty driver to PDC console
  drivers/parisc/iosapic.c: Remove unnecessary kzalloc cast
  parisc: remove homegrown L1_CACHE_ALIGN macro
  arch/parisc: Removing undead ifdef CONFIG_PA20
  parisc: unwind - optimise linked-list searches for modules
  parisc: change to new flag variable
  drivers/char/agp/parisc-agp.c: eliminate memory leak
  parisc: kill __do_IRQ
  parisc: convert eisa interrupts to flow handlers
  parisc: convert gsc and dino pci interrupts to flow handlers
  parisc: convert suckyio interrupts to flow handlers
  parisc: convert iosapic interrupts to proper flow handlers
  parisc: convert cpu interrupts to proper flow handlers
  parisc: lay groundwork for killing __do_IRQ
  parisc: add prlimit64 syscall
  parisc: squelch warning when using dev_get_stats
2010-10-28 09:24:14 -07:00
Daniel Vetter
201728429d intel-gtt: maximize ggtt size on platforms that support this
On VT-d supporting platforms the GGTT is allocated in a stolen mem
section separate from graphcis stolen mem. The GMCH register contains
a bitfield specifying the size of that region. Docs suggest that this
region can only be used for GGTT and PPGTT. Hence ensure that the
PPGTT is disabled and use the complete area for the GGTT.

Unfortunately the graphics core on G33/Pineview can't cope with really
large GTTs and the BIOS usually enables the maximum of 512MB. So
don't bother with maximizing the GTT on these platforms.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-27 23:31:07 +01:00
Daniel Vetter
b3eafc5af0 intel-gtt: save PGETBL_CTL later in the setup process
... and switch to a more classical store-reg-on-suspend, restore-on-resume
way of doing things. Obviously this is just preparation for the future,
the code is not there at all, yet.

This is needed because the next patch adjusts this register and everything
in it (not just the pagetable address) needs to be restored on resume.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-27 23:31:06 +01:00
Linus Torvalds
c48c43e422 Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (476 commits)
  vmwgfx: Implement a proper GMR eviction mechanism
  drm/radeon/kms: fix r6xx/7xx 1D tiling CS checker v2
  drm/radeon/kms: properly compute group_size on 6xx/7xx
  drm/radeon/kms: fix 2D tile height alignment in the r600 CS checker
  drm/radeon/kms/evergreen: set the clear state to the blit state
  drm/radeon/kms: don't poll dac load detect.
  gpu: Add Intel GMA500(Poulsbo) Stub Driver
  drm/radeon/kms: MC vram map needs to be >= pci aperture size
  drm/radeon/kms: implement display watermark support for evergreen
  drm/radeon/kms/evergreen: add some additional safe regs v2
  drm/radeon/r600: fix tiling issues in CS checker.
  drm/i915: Move gpu_write_list to per-ring
  drm/i915: Invalidate the to-ring, flush the old-ring when updating domains
  drm/i915/ringbuffer: Write the value passed in to the tail register
  agp/intel: Restore valid PTE bit for Sandybridge after bdd3072
  drm/i915: Fix flushing regression from 9af90d19f
  drm/i915/sdvo: Remove unused encoding member
  i915: enable AVI infoframe for intel_hdmi.c [v4]
  drm/i915: Fix current fb blocking for page flip
  drm/i915: IS_IRONLAKE is synonymous with gen == 5
  ...

Fix up conflicts in
 - drivers/gpu/drm/i915/{i915_gem.c, i915/intel_overlay.c}: due to the
   new simplified stack-based kmap_atomic() interface
 - drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: added .llseek entry due to BKL
   removal cleanups.
2010-10-26 18:57:59 -07:00
Linus Torvalds
229aebb873 Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
  Update broken web addresses in arch directory.
  Update broken web addresses in the kernel.
  Revert "drivers/usb: Remove unnecessary return's from void functions" for musb gadget
  Revert "Fix typo: configuation => configuration" partially
  ida: document IDA_BITMAP_LONGS calculation
  ext2: fix a typo on comment in ext2/inode.c
  drivers/scsi: Remove unnecessary casts of private_data
  drivers/s390: Remove unnecessary casts of private_data
  net/sunrpc/rpc_pipe.c: Remove unnecessary casts of private_data
  drivers/infiniband: Remove unnecessary casts of private_data
  drivers/gpu/drm: Remove unnecessary casts of private_data
  kernel/pm_qos_params.c: Remove unnecessary casts of private_data
  fs/ecryptfs: Remove unnecessary casts of private_data
  fs/seq_file.c: Remove unnecessary casts of private_data
  arm: uengine.c: remove C99 comments
  arm: scoop.c: remove C99 comments
  Fix typo configue => configure in comments
  Fix typo: configuation => configuration
  Fix typo interrest[ing|ed] => interest[ing|ed]
  Fix various typos of valid in comments
  ...

Fix up trivial conflicts in:
	drivers/char/ipmi/ipmi_si_intf.c
	drivers/usb/gadget/rndis.c
	net/irda/irnet/irnet_ppp.c
2010-10-24 13:41:39 -07:00
Chris Wilson
85ccc35b7e agp/intel: Restore valid PTE bit for Sandybridge after bdd3072
In cleaning up the mask functions in bdd3072, the setting of the PTE
valid bit was dropped for Sandybridge.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-22 15:04:09 +01:00
Julia Lawall
338e4fab3d drivers/char/agp/parisc-agp.c: eliminate memory leak
alloc_pci_dev allocates some memory, so that memory should be freed before
leaving the function in an error case.

A simplified version of the semantic match that finds this problem is:
(http://coccinelle.lip6.fr/)

// <smpl>
@r exists@
local idexpression x;
expression E;
identifier f1;
iterator I;
@@

x = alloc_pci_dev(...);
<... when != x
     when != true (x == NULL || ...)
     when != if (...) { <+...x...+> }
     when != I (...) { <+...x...+> }
(
 x == NULL
|
 x == E
|
 x->f1
)
...>
* return ...;
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Dan Carpenter <error27@gmail.com>
Dave Airlie <airlied@linux.ie>
Cc: Helge Deller <deller@gmx.de>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kyle McMartin <kyle@redhat.com>
2010-10-21 21:03:47 -04:00
Linus Torvalds
2f0384e5fc Merge branch 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, amd_nb: Enable GART support for AMD family 0x15 CPUs
  x86, amd: Use compute unit information to determine thread siblings
  x86, amd: Extract compute unit information for AMD CPUs
  x86, amd: Add support for CPUID topology extension of AMD CPUs
  x86, nmi: Support NMI watchdog on newer AMD CPU families
  x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs
  x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NB
  x86, k8-gart: Decouple handling of garts and northbridges
  x86, cacheinfo: Fix dependency of AMD L3 CID
  x86, kvm: add new AMD SVM feature bits
  x86, cpu: Fix allowed CPUID bits for KVM guests
  x86, cpu: Update AMD CPUID feature bits
  x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
  x86, AMD: Remove needless CPU family check (for L3 cache info)
  x86, tsc: Remove CPU frequency calibration on AMD
2010-10-21 13:01:08 -07:00
Chris Wilson
3dde04b015 agp/intel: Also add B43.1 to list of supported devices
This was a missing piece from 41a5142 that dropped recognition of the
AGP module for the second B43 variant.

Reported-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-10-19 09:20:04 +01:00
Francisco Jerez
f6086134d0 agp/amd-k7: Allow binding user memory to the AGP GART.
TTM-based DRM drivers need to be able to bind user memory to the AGP
aperture. This patch fixes the "[TTM] AGP Bind memory failed." errors
and the subsequent fallout seen with the nouveau driver.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Grzesiek Sójka <pld@pfu.pl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-19 14:12:32 +10:00
Justin P. Mattock
631dd1a885 Update broken web addresses in the kernel.
The patch below updates broken web addresses in the kernel

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Finn Thain <fthain@telegraphics.com.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Dimitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Acked-by: Ben Pfaff <blp@cs.stanford.edu>
Acked-by: Hans J. Koch <hjk@linutronix.de>
Reviewed-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-10-18 11:03:14 +02:00
Ingo Molnar
3d8a1a6a8a Merge branch 'amd-iommu/2.6.37' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into core/iommu 2010-10-13 15:44:24 +02:00
Jan Beulich
e61cb0d5fd some clean up to intel-gtt.c
In commit e517a5e970 the call to
map_page_into_agp() got removed from intel_i830_setup_flush(), but the
counterpart call from intel_i830_fini_flush() to unmap_page_from_agp()
was left in place.

Additionally, the page allocated here never gets its physical address
used for sending to hardware, so there's no need to allocate it with
GFP_DMA32. Nor is __GFP_ZERO really necessary, as the page is used
only to store data to force flushing of some internal processor state.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-24 14:22:12 +01:00
Daniel Vetter
ae83dd5c7d intel-gtt add a cleanup function for chipset specific stuff
The old code didn't clean up the i830 chipset flush page. And it
looks nicer.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:40:41 +01:00
Daniel Vetter
22533b494f intel-gtt: store the dma mask size in intel_gtt_driver
Storing this explicitly makes for clearer code and hopefully
less further confusion.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:40:28 +01:00
Daniel Vetter
0af9e92e77 intel-gtt: clean up gtt size reporting
Consolidate everything in intel-gtt.c and also kill the export
of intel_max_stolen.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:40:06 +01:00
Daniel Vetter
aaa6259119 agp: kill agp_(unmap|map)_memory
DMA remapping was only used by the intel-gtt driver. With that
code now folded into the driver, kill the agp generic support for
it.

Cc: Dave Airlie <airlied@linux.ie>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:39:52 +01:00
Daniel Vetter
e9b1cc81c2 intel-gtt: consolidate fake_agp driver structs
They're now all the same.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:39:19 +01:00
Daniel Vetter
1b263f2466 intel-gtt: move chipset flush to the gtt driver struct
This is the last differentiator between the different fake agp drivers.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:37:31 +01:00
Daniel Vetter
bdd30729b6 intel-gtt: kill mask_memory functions
That indirection mess can now go. Add a dummy i81x gtt_driver to
avoid a NULL pointer check.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:37:18 +01:00
Daniel Vetter
90cb149e1a intel-gtt: generic (insert|remove)_entries for sandybridge
Like before, but now with the added bonus of being able to kill
quite a bit of no-longer userful code (the old dmar support stuff).

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:37:05 +01:00
Daniel Vetter
450f2b3d51 intel-gtt: generic (insert|remove)_entries for g33/i965
Like for the i915.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:36:52 +01:00
Daniel Vetter
fefaa70f0c intel-gtt: generic (insert|remove)_entries for i915
Beef up the generic version to support dmar. Otherwise like for the i830.

v2: Don't try to DMA remap on resume for already remapped pages.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:36:38 +01:00
Daniel Vetter
5cbecafce4 intel-gtt: generic (insert|remove)_entries for i830
Well, not all too generic because it does not yet support dmar.
Add a new function check_flags to ensure that non-gem code does
not try to screw us over.

v2: Beautify i830_check_flags with an idea from Chris Wilson.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:36:25 +01:00
Daniel Vetter
a87aa5cc00 agp: kill agp_(map|unmap)_page
Only used to remap the scratch page. Now that intel-gtt does this
itself, kill the support code.

Cc: Dave Airlie <airlied@linux.ie>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:36:11 +01:00
Daniel Vetter
d0b6dc4b93 intel-gtt: drop agp scratch page support stuff
intel-gtt.c now handles the scratch page itself, so drop all that
was just there to support it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:35:58 +01:00
Daniel Vetter
97ef1bdd0b intel-gtt: introduce pte write function for gen6
Like for i830. intel_i9xx_configure is now unused, so kill it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:35:44 +01:00
Daniel Vetter
a6963596a1 intel-gtt: introduce pte write function for g33/i965/gm45
Like for the i830.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:35:31 +01:00
Daniel Vetter
351bb278d2 intel-gtt: introduce pte write function for i8xx/i915/i945
And put it to use in the gtt configuration code that writes
the scratch page addr in all gtt ptes. This makes intel_i830_configure
generic, hence rename it to intel_fake_agp_configure.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:35:18 +01:00
Daniel Vetter
0e87d2b06c intel-gtt: initialize our own scratch page
The intel gtt fake agp driver is the only agp driver to use dma
address remapping. So it makes sense to fold this code back into the
only user (and thus reduce the reliance on the agp code).

This patch does the first step by initializing (and remapping) the
scratch page in a new function intel_gtt_setup_scratch_page.
Unfortunately intel_gtt_cleanup had to move to avoid a forward
declaration. The new scratch page is not yet used, though.

v2: Refactor out scratch page teardown.  Suggested by Chris Wilson on
irc. This makes it clear what's going on and results in a nice
symmetry between setup and teardown.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:30:21 +01:00
Chris Wilson
e9e5f8e8d3 Merge branch 'drm-intel-fixes' into HEAD
Conflicts:
	drivers/char/agp/intel-agp.c
	drivers/gpu/drm/i915/intel_crt.c
2010-09-21 11:19:32 +01:00
Andreas Herrmann
23ac4ae827 x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NB
The file names are somehow misleading as the code is not specific to
AMD K8 CPUs anymore. The files accomodate code for other AMD CPU
northbridges as well.

Same is true for the config option which is valid for AMD CPU
northbridges in general and not specific to K8.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100917160343.GD4958@loge.amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-09-20 14:22:58 -07:00
Andreas Herrmann
900f9ac9f1 x86, k8-gart: Decouple handling of garts and northbridges
So far we only provide num_k8_northbridges. This is required in
different areas (e.g. L3 cache index disable, GART). But not all AMD
CPUs provide a GART. Thus it is useful to split off the GART handling
from the generic caching of AMD northbridge misc devices.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100917160254.GC4958@loge.amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-09-17 13:26:21 -07:00
Chris Wilson
41a5142891 drm/i915,agp/intel: Add second set of PCI-IDs for B43
There is a second revision of B43 (a desktop gen4 part) floating around,
functionally equivalent to the original B43, so simply add the new
PCI-IDs.

Bugzilla: https://bugs.freedesktop.org/show_bugs.cgi?id=30221
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-09-17 08:22:30 +01:00
Chris Wilson
3f08e4ef80 agp/intel: Fix resume regression from 2d2430cf
On i915 [EeePCs] something scribles over the registers during suspend
and resume so we must save a copy of the PGETBL_CTL register programmed
by the BIOS and restore that upon resume.

Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-14 21:13:13 +01:00
Chris Wilson
b1c5b0f8cc agp/intel: Remove redundant setting of gtt_mappable_entries
Two calls enter, only one will leave.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-14 21:13:12 +01:00