Commit Graph

131 Commits

Author SHA1 Message Date
Matt Ranostay
e27ecef8a8 phy: ti: phy-j721e-wiz: add j784s4-wiz-10g module support
Add support for j784s4-wiz-10g device which has two core reference
clocks (e.g core_ref_clk, core_ref1_clk) which requires an additional
mux selection option.

Acked-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Link: https://lore.kernel.org/r/20221015201123.195477-3-mranostay@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-10-17 10:59:11 +05:30
Dan Carpenter
a270cc137b phy: ti: phy-j721e-wiz: fix reference leaks in wiz_probe()
These two error paths need to call of_node_put(child_node) before
returning.

Fixes: edd473d429 ("phy: ti: phy-j721e-wiz: add support for j7200-wiz-10g")
Fixes: 7ae14cf581 ("phy: ti: j721e-wiz: Implement DisplayPort mode to the wiz driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/YyxFI8aW23IC/21U@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-24 11:59:37 +05:30
Matt Ranostay
1fbef61bea phy: ti: phy-j721e-wiz: stop name conflict if multiple serdes are initialized
When multiple serdes instances are initialized the first will succeed but
additional will conflict over clocks names and probing fails.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20220909200026.3422-1-mranostay@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20 12:16:52 +05:30
Siddharth Vadapalli
af96579dc3 phy: ti: gmii-sel: Add support for CPSW5G GMII SEL in J7200
Each of the CPSW5G ports in J7200 support additional modes like QSGMII.
Add a new compatible for J7200 to support the additional modes.

In TI's J7200, each of the CPSW5G ethernet interfaces can act as a
QSGMII or QSGMII-SUB port. The QSGMII interface is responsible for
performing auto-negotiation between the MAC and the PHY while the rest of
the interfaces are designated as QSGMII-SUB interfaces, indicating that
they will not be taking part in the auto-negotiation process.

To indicate the interface which will serve as the main QSGMII interface,
add a property "ti,qsgmii-main-ports", whose value indicates the
port number of the interface which shall serve as the main QSGMII
interface. The rest of the interfaces are then assigned QSGMII-SUB mode by
default. The property "ti,qsgmii-main-ports" is used to configure the
CTRLMMR_ENETx_CTRL register.

Depending on the device, it is possible for more than one QSGMII main port
to exist. Thus, the property "ti,qsgmii-main-ports" is defined as an array
of values in order to reuse the property for other devices.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20220912085650.83263-4-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-13 23:10:26 +05:30
Roger Quadros
86d11e225e phy: ti: phy-j721e-wiz: set PMA_CMN_REFCLK_DIG_DIV based on reflk rate
For J7200-SR2.0 and AM64 we don't model Common refclock divider as
a clock divider as the divisor rate is fixed based on operating
reference clock frequency. We just program the recommended value
into the register. This simplifies the device tree and implementation
a lot.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-8-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 10:42:58 +05:30
Roger Quadros
edd473d429 phy: ti: phy-j721e-wiz: add support for j7200-wiz-10g
j7200-wiz-10g supports 2 reference clocks. However, the
control bits for these clocks is in a separate register that
sits in the System Control register space. Handle that register.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-7-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 10:42:58 +05:30
Tanmay Patil
b64a85fb8f phy: ti: phy-j721e-wiz.c: Add usxgmii support in wiz driver
Changes the wiz_p_mac_div_sel() and wiz_mode_select() to
configure serdes for USXGMII.

Adds the support to configure mac_src_sel, refclk_sel and
rxfclk_sel in the LANECTL register and configures the serdes for
usxgmii.

[rogerq] Fix MAC_SRC_SEL to 0x3 for USXGMII as per CSL code.

Signed-off-by: Tanmay Patil <t-patil@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-4-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 10:42:57 +05:30
Siddharth Vadapalli
27ecdd07e3 phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
Select the same mac divider for SGMII too as the one being used for
QSGMII.

Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-2-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 10:42:57 +05:30
Linus Torvalds
c1c76700a0 SPDX changes for 6.0-rc1
Here is the set of SPDX comment updates for 6.0-rc1.
 
 Nothing huge here, just a number of updated SPDX license tags and
 cleanups based on the review of a number of common patterns in GPLv2
 boilerplate text.  Also included in here are a few other minor updates,
 2 USB files, and one Documentation file update to get the SPDX lines
 correct.
 
 All of these have been in the linux-next tree for a very long time.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx

Pull SPDX updates from Greg KH:
 "Here is the set of SPDX comment updates for 6.0-rc1.

  Nothing huge here, just a number of updated SPDX license tags and
  cleanups based on the review of a number of common patterns in GPLv2
  boilerplate text.

  Also included in here are a few other minor updates, two USB files,
  and one Documentation file update to get the SPDX lines correct.

  All of these have been in the linux-next tree for a very long time"

* tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits)
  Documentation: samsung-s3c24xx: Add blank line after SPDX directive
  x86/crypto: Remove stray comment terminator
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
  ...
2022-08-04 12:12:54 -07:00
Andy Shevchenko
d4a0a189b7 phy: ti: tusb1210: Don't check for write errors when powering on
On some platforms, like Intel Merrifield, the writing values during power on
may timeout:

   tusb1210 dwc3.0.auto.ulpi: error -110 writing val 0x41 to reg 0x80
   phy phy-dwc3.0.auto.ulpi.0: phy poweron failed --> -110
   dwc3 dwc3.0.auto: error -ETIMEDOUT: failed to initialize core
   dwc3: probe of dwc3.0.auto failed with error -110

which effectively fails the probe of the USB controller.
Drop the check as it was before the culprit commit (see Fixes tag).

Fixes: 09a3512681 ("phy: ti: tusb1210: Improve ulpi_read()/_write() error checking")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Ferry Toth <fntoth@gmail.com>
Link: https://lore.kernel.org/r/20220613160848.82746-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-05 10:57:32 +05:30
Roger Quadros
4daa43e92e phy: ti: phy-j721e-wiz: use OF data for device specific data
Move device specific data into OF data structure so it
is easier to maintain and we can get rid of if statements.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Matt Ranostay <mranostay@ti.com>
Link: https://lore.kernel.org/r/20220526064121.27625-1-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-16 17:33:43 -07:00
Thomas Gleixner
2aec85b26f treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Miaoqian Lin
ce88613e5b phy: ti: Add missing pm_runtime_disable() in serdes_am654_probe
The pm_runtime_enable() will increase power disable depth.
If the probe fails, we should use pm_runtime_disable() to balance
pm_runtime_enable().
Add missing pm_runtime_disable() for serdes_am654_probe().

Fixes: 71e2f5c5c2 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220301025853.1911-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-14 10:38:58 +05:30
Miaoqian Lin
3588060bef phy: ti: omap-usb2: Fix error handling in omap_usb2_enable_clocks
The corresponding API for clk_prepare_enable is clk_disable_unprepare.
Make sure that the clock is unprepared on exit by changing clk_disable
to clk_disable_unprepare.

Fixes: ed31ee7cf1 ("phy: ti: usb2: Fix logic on -EPROBE_DEFER")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220318105748.19532-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13 15:03:39 +05:30
Christophe JAILLET
a9f17d0c07 phy: ti: tusb1210: Fix an error handling path in tusb1210_probe()
tusb1210_probe_charger_detect() must be undone by a corresponding
tusb1210_remove_charger_detect() in the error handling path, as already
done in the remove function.

Fixes: 48969a5623 ("phy: ti: tusb1210: Add charger detection")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/07c4926c42243cedb3b6067a241bb486fdda01b5.1648991162.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 23:07:11 +05:30
Lv Ruyi
751ee15da5 phy: ti: Fix missing of_node_put in ti_pipe3_get_sysctrl()
of_parse_phandle() returns node pointer with refcount incremented, use
of_node_put() on it to decrease refcount when done.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn>
Link: https://lore.kernel.org/r/20220408095617.2495234-1-lv.ruyi@zte.com.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 22:45:31 +05:30
Hans de Goede
b541f9e59a phy: ti: tusb1210: Make tusb1210_chg_det_states static
Make tusb1210_chg_det_states static, fixing the following sparse warning:

drivers/phy/ti/phy-tusb1210.c:158:12: sparse: sparse:
 symbol 'tusb1210_chg_det_states' was not declared. Should it be static?

Fixes: 48969a5623 ("phy: ti: tusb1210: Add charger detection")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220411135440.558394-1-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11 20:09:53 +05:30
Stephan Gerhold
48969a5623 phy: ti: tusb1210: Add charger detection
Some Android x86 tablets with a Bay Trail (BYT) SoC and a Crystal Cove
PMIC, which does not support charger-detection, rely on a TUSB1211
phy for charger-detection.

Add support for charger detection on TUSB1211 phy-s and export
the information about the detected charger through the standard
power_supply class interface. power_supply class charger IC drivers
like the bq24190_charger.c driver will then pick this up and set
their input_current_limit based on this.

Note the "linux,phy_charger_detect" property used to enable this is
a special kernel-internal (so not part of the dt-bindings) property
used by dwc3 platform code to indicate that the phy needs to do
charger-detection.

Changes by Hans de Goede:
- Use "linux,phy_charger_detect" property to enable charger-detect
- Switch from a linear flow to a state-machine, with retries on
  ulpi communication errors
- Use SW_CONTROL bit to disable the FSM when detection is finished
- Do a phy-reset on disconnect to work around the phy often refusing
  ulpi_read()/_write() commands after a disconnect
- Use power_supply_reg_notifier() for Vbus monitoring
- Export the detection result through a power_supply class device

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Co-developed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-10-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Hans de Goede
df37c99815 phy: ti: tusb1210: Add a delay between power-on and restoring the phy-parameters
Now that we actually log errors on ulpi_write failures it becomes clear
that the ulpi_write() restoring the phy-parameters on power-on is failing
after a suspend/resume add a short delay after driving the cs line high
to fix this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-9-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Hans de Goede
cb7d21b44f phy: ti: tusb1210: Drop tusb->vendor_specific2 != 0 check from tusb1210_power_on()
Since commit eb445a15fa ("phy: tusb1210: use bitmasks to set
VENDOR_SPECIFIC2") tusb->vendor_specific2 always contains a valid value
so there no need to check that it is set.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-8-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Hans de Goede
09a3512681 phy: ti: tusb1210: Improve ulpi_read()/_write() error checking
ulpi_read() and ulpi_write() calls can fail. Add wrapper functions to log
errors when this happens and add error checking to the read + write of
the phy parameters from the TUSB1210_VENDOR_SPECIFIC2 register.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20220213130524.18748-7-hdegoede@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25 14:28:07 +05:30
Kishon Vijay Abraham I
6d1e6bcb31 phy: ti: Fix missing sentinel for clk_div_table
_get_table_maxdiv() tries to access "clk_div_table" array out of bound
defined in phy-j721e-wiz.c. Add a sentinel entry to prevent
the following global-out-of-bounds error reported by enabling KASAN.

[    9.552392] BUG: KASAN: global-out-of-bounds in _get_maxdiv+0xc0/0x148
[    9.558948] Read of size 4 at addr ffff8000095b25a4 by task kworker/u4:1/38
[    9.565926]
[    9.567441] CPU: 1 PID: 38 Comm: kworker/u4:1 Not tainted 5.16.0-116492-gdaadb3bd0e8d-dirty #360
[    9.576242] Hardware name: Texas Instruments J721e EVM (DT)
[    9.581832] Workqueue: events_unbound deferred_probe_work_func
[    9.587708] Call trace:
[    9.590174]  dump_backtrace+0x20c/0x218
[    9.594038]  show_stack+0x18/0x68
[    9.597375]  dump_stack_lvl+0x9c/0xd8
[    9.601062]  print_address_description.constprop.0+0x78/0x334
[    9.606830]  kasan_report+0x1f0/0x260
[    9.610517]  __asan_load4+0x9c/0xd8
[    9.614030]  _get_maxdiv+0xc0/0x148
[    9.617540]  divider_determine_rate+0x88/0x488
[    9.622005]  divider_round_rate_parent+0xc8/0x124
[    9.626729]  wiz_clk_div_round_rate+0x54/0x68
[    9.631113]  clk_core_determine_round_nolock+0x124/0x158
[    9.636448]  clk_core_round_rate_nolock+0x68/0x138
[    9.641260]  clk_core_set_rate_nolock+0x268/0x3a8
[    9.645987]  clk_set_rate+0x50/0xa8
[    9.649499]  cdns_sierra_phy_init+0x88/0x248
[    9.653794]  phy_init+0x98/0x108
[    9.657046]  cdns_pcie_enable_phy+0xa0/0x170
[    9.661340]  cdns_pcie_init_phy+0x250/0x2b0
[    9.665546]  j721e_pcie_probe+0x4b8/0x798
[    9.669579]  platform_probe+0x8c/0x108
[    9.673350]  really_probe+0x114/0x630
[    9.677037]  __driver_probe_device+0x18c/0x220
[    9.681505]  driver_probe_device+0xac/0x150
[    9.685712]  __device_attach_driver+0xec/0x170
[    9.690178]  bus_for_each_drv+0xf0/0x158
[    9.694124]  __device_attach+0x184/0x210
[    9.698070]  device_initial_probe+0x14/0x20
[    9.702277]  bus_probe_device+0xec/0x100
[    9.706223]  deferred_probe_work_func+0x124/0x180
[    9.710951]  process_one_work+0x4b0/0xbc0
[    9.714983]  worker_thread+0x74/0x5d0
[    9.718668]  kthread+0x214/0x230
[    9.721919]  ret_from_fork+0x10/0x20
[    9.725520]
[    9.727032] The buggy address belongs to the variable:
[    9.732183]  clk_div_table+0x24/0x440

Fixes: 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Cc: stable@vger.kernel.org # v5.10+
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20220117110108.4117-1-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-01-24 09:33:33 +05:30
Greg Kroah-Hartman
e75a58db41 phy-for-5.17
- New support:
         - Qualcomm eDP PHY driver
 	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
 	- Lan966x ethernet serdes PHY driver
 	- Support for uniphier NXI & Pro4 SoC
         - Qualcomm SM6350 USB2 support
 	- Amlogic Meson8 HDMI TX PHY driver
 	- Rockchip rk3568 usb2 support
 	- Intel Thunder Bay eMMC PHY driver
 	- Freescale IMX8 PCIe phy driver
 
   - Updates:
 	- Cadence Sierra driver updates for multilink configurations
         - Bcm usb2 updates for Phy reg space
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Merge tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.17

  - New support:
        - Qualcomm eDP PHY driver
	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
	- Lan966x ethernet serdes PHY driver
	- Support for uniphier NXI & Pro4 SoC
        - Qualcomm SM6350 USB2 support
	- Amlogic Meson8 HDMI TX PHY driver
	- Rockchip rk3568 usb2 support
	- Intel Thunder Bay eMMC PHY driver
	- Freescale IMX8 PCIe phy driver

  - Updates:
	- Cadence Sierra driver updates for multilink configurations
        - Bcm usb2 updates for Phy reg space

* tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
  phy: cadence: Sierra: Add support for derived reference clock output
  dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
  phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
  phy: cadence: Sierra: Add support for PHY multilink configurations
  phy: cadence: Sierra: Fix to get correct parent for mux clocks
  phy: cadence: Sierra: Update single link PCIe register configuration
  phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
  phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
  phy: cadence: Sierra: Add PHY PCS common register configurations
  phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
  phy: cadence: Sierra: Add support to get SSC type from device tree
  dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
  dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
  phy: cadence: Sierra: Prepare driver to add support for multilink configurations
  phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
  phy: mediatek: Fix missing check in mtk_mipi_tx_probe
  phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
  phy: phy-mtk-tphy: use new io helpers to access register
  phy: phy-mtk-xsphy: use new io helpers to access register
  phy: mediatek: add helpers to update bits of registers
  ...
2021-12-30 14:02:16 +01:00
Miaoqian Lin
16c57fff83 phy: ti: Use IS_ERR_OR_NULL() to clean code
Use IS_ERR_OR_NULL() to make the code cleaner.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20211212142226.23674-1-linmq006@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 13:10:03 +05:30
Vinod Koul
7947113fd0 phy: ti: omap-usb2: Fix the kernel-doc style
The documentation uses incorrect style, so fix that.

drivers/phy/ti/phy-omap-usb2.c:102: warning: Function parameter or member 'comparator' not described in 'omap_usb2_set_comparator'

While at it, use a single line for function description

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20211120061531.410771-2-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 10:38:24 +05:30
Vinod Koul
466b1516e7 phy: ti: tusb1210: Fix the kernel-doc warn
The comment is not kernel-doc one and starts with /**, so fix that.

drivers/phy/ti/phy-tusb1210.c:16: warning: expecting prototype for tusb1210.c(). Prototype was for TUSB1210_VENDOR_SPECIFIC2() instead

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20211116103951.34482-6-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-20 11:33:23 +05:30
Randy Dunlap
7adaf921b6 phy: ti: report 2 non-kernel-doc comments
Do not use "/**" to begin a non-kernel-doc comment.
Fixes these build warnings:

drivers/phy/ti/phy-am654-serdes.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * PCIe SERDES driver for AM654x SoC

drivers/phy/ti/phy-j721e-wiz.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Wrapper driver for SERDES used in J721E

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20211115030559.13994-1-rdunlap@infradead.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-16 15:31:30 +05:30
Dan Carpenter
8d55027f4e phy: ti: gmii-sel: check of_get_address() for failure
Smatch complains that if of_get_address() returns NULL, then "size"
isn't initialized.  Also it would lead to an Oops.

Fixes: 7f78322cdd ("phy: ti: gmii-sel: retrieve ports number and base offset from dt")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210914110038.GB11657@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Tony Lindgren
7481f91f1d phy: phy-twl4030-usb: Disable PHY for suspend
Since commit 88d26136a2 ("PM: Prevent runtime suspend during system
resume"), PM runtime will not let devices idle during system suspend.

This is because of the pm_runtime_get_noresume() call done in
device_prepare() that is not released until at device_complete() after
resume.

We must now disable the USB PHY in suspend if no USB cable is connected.

Cc: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210727104512.52968-1-tony@atomide.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06 17:32:51 +05:30
Greg Kroah-Hartman
5471a81235 phy-for-5.14 version 2
- Updates:
         - Yaml conversion for renesas,rcar-gen3 pcie phy and
           rockchip-usb-phy bindings
         - Support for devm_phy_get() taking NULL phy name
 
   - New support:
         - PCIe phy for Qualcomm IPQ60xx
         - PCIe phy for Qualcomm SDX55
         - USB phy for RK3308
         - CAN transceivers phy for TI TCAN104x
         - Innosilicon-based CSI dphy for rockchip
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Merge tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.14 version 2

  - Updates:
        - Yaml conversion for renesas,rcar-gen3 pcie phy and
          rockchip-usb-phy bindings
        - Support for devm_phy_get() taking NULL phy name

  - New support:
        - PCIe phy for Qualcomm IPQ60xx
        - PCIe phy for Qualcomm SDX55
        - USB phy for RK3308
        - CAN transceivers phy for TI TCAN104x
        - Innosilicon-based CSI dphy for rockchip

* tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (36 commits)
  phy: Revert "phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'"
  phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe()
  phy: uniphier-pcie: Fix updating phy parameters
  phy/rockchip: add Innosilicon-based CSI dphy
  dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy
  phy: rockchip: remove redundant initialization of pointer cfg
  phy: phy-can-transceiver: Add support for generic CAN transceiver driver
  dt-bindings: phy: Add binding for TI TCAN104x CAN transceivers
  phy: core: Reword the comment specifying the units of max_link_rate to be Mbps
  phy: phy-mtk-hdmi: Remove redundant dev_err call in mtk_hdmi_phy_probe()
  phy: phy-mtk-mipi-dsi: Remove redundant dev_err call in mtk_mipi_tx_probe()
  phy: phy-mmp3-hsic: Remove redundant dev_err call in mmp3_hsic_phy_probe()
  phy: bcm-ns-usb3: Remove redundant dev_err call in bcm_ns_usb3_mdio_probe()
  MAINTAINERS: update marvell,armada-3700-utmi-phy.yaml reference
  phy: phy-twl4030-usb: use DEVICE_ATTR_RO macro
  dt-bindings: phy: convert rockchip-usb-phy.txt to YAML
  phy: phy-rockchip-inno-usb2: add support for RK3308 USB phy
  dt-bindings: phy: rockchip-inno-usb2: add compatible for rk3308 USB phy
  phy: stm32: manage optional vbus regulator on phy_power_on/off
  dt-bindings: phy: add vbus-supply optional property to phy-stm32-usbphyc
  ...
2021-06-23 10:33:34 +02:00
Christophe JAILLET
f7eedcb853 phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe()
Add an error handling path in the probe to release some resources, as
already done in the remove function.

Fixes: 609adde838 ("phy: Add a driver for dm816x USB PHY")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/ac5136881f6bdec50be19b3bf73b3bc1b15ef1f1.1622898974.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-21 12:04:18 +05:30
Yang Li
b8203ec7f5 phy: ti: Fix an error code in wiz_probe()
When the code execute this if statement, the value of ret is 0.
However, we can see from the dev_err() log that the value of
ret should be -EINVAL.

Clean up smatch warning:

drivers/phy/ti/phy-j721e-wiz.c:1216 wiz_probe() warn: missing error code 'ret'

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Fixes: c9f9eba066 ("phy: ti: j721e-wiz: Manage typec-gpio-dir")
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/1621939832-65535-1-git-send-email-yang.lee@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-05-31 14:11:44 +05:30
YueHaibing
f0afa23568 phy: phy-twl4030-usb: use DEVICE_ATTR_RO macro
Use DEVICE_ATTR_RO helper instead of plain DEVICE_ATTR,
which makes the code a bit shorter and easier to read.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20210520135132.37628-1-yuehaibing@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-05-31 14:08:58 +05:30
Vinod Koul
ed917b028d phy: Revert "phy: ti: j721e-wiz: add missing of_node_put"
This reverts commit 00f2e6f668 ("phy: ti: j721e-wiz: add missing of_node_put")
as it erroneously adds the of_node_put() as incorrect place.

Reported-by: Junlin Yang <yangjunlin@yulong.com>
Link: https://lore.kernel.org/r/20210408062914.3813102-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-16 07:27:37 +02:00
Shixin Liu
76b4538736 phy: ti: j721e-wiz: Add missing include linux/slab.h
When compiling with CONFIG_PHY_J721E_WIZ, Hulk Robot reported:

drivers/phy/ti/phy-j721e-wiz.c: In function ‘wiz_mux_clk_register’:
drivers/phy/ti/phy-j721e-wiz.c:659:17: error: implicit declaration of function ‘kzalloc’; did you mean ‘vzalloc’? [-Werror=implicit-function-declaration]
  659 |  parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL);
      |                 ^~~~~~~
      |                 vzalloc
drivers/phy/ti/phy-j721e-wiz.c:659:15: warning: assignment to ‘const char **’ from ‘int’ makes pointer from integer without a cast [-Wint-conversion]
  659 |  parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL);
      |               ^
drivers/phy/ti/phy-j721e-wiz.c:697:2: error: implicit declaration of function ‘kfree’; did you mean ‘vfree’? [-Werror=implicit-function-declaration]
  697 |  kfree(parent_names);
      |  ^~~~~
      |  vfre

Fixes: 040cbe7687 ("phy: ti: j721e-wiz: Model the internal clocks without device tree input")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Shixin Liu <liushixin2@huawei.com>
Link: https://lore.kernel.org/r/20210408012829.432938-1-liushixin2@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-16 07:27:33 +02:00
Yang Yingliang
e1723d8b87 phy: phy-twl4030-usb: Fix possible use-after-free in twl4030_usb_remove()
This driver's remove path calls cancel_delayed_work(). However, that
function does not wait until the work function finishes. This means
that the callback function may still be running after the driver's
remove function has finished, which would result in a use-after-free.

Fix by calling cancel_delayed_work_sync(), which ensures that
the work is properly cancelled, no longer running, and unable
to re-schedule itself.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20210407092716.3270248-1-yangyingliang@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-16 07:27:19 +02:00
Kishon Vijay Abraham I
36a813839c phy: ti: j721e-wiz: Configure 'p_standard_mode' only for DP/QSGMII
Configure 'p_standard_mode' only for DP/QSGMII as for other modes
it's not used as per the programming sequence. Add "continue" in the
else to prevent random value from being written to p_standard_mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210331131417.15596-1-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31 21:11:46 +05:30
Faiz Abbas
725c7b8d30 phy: ti: j721e-wiz: Do not configure wiz if its already configured
Serdes lanes might be shared between multiple cores in some usecases
and its not possible to lock PLLs for both the lanes independently
by the two cores. This requires a bootloader to configure both the
lanes at early boot time.

To handle this case, skip all configuration if any of the lanes has
already been enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210330110138.24356-2-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31 16:45:47 +05:30
Kishon Vijay Abraham I
3fb9545657 phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode
"serdes" node (child node of WIZ) can have sub-nodes for representing links
or it can have sub-nodes for representing the various clocks within the
serdes. Instead of trying to read "reg" from every child node used for
assigning "lane_phy_type", read only if the child node's name is "phy"
or "link" subnode.
Ideally all PHY dt nodes should have node name as "phy", however
existing devicetree used "link" as subnode. So in order to maintain old
DT compatibility get PHY properties for "phy" or "link" subnode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210319124128.13308-5-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31 16:43:20 +05:30
Kishon Vijay Abraham I
f7eb147d30 phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create()
Invoke wiz_init() before configuring anything else in Sierra/Torrent
(invoked as part of of_platform_device_create()). wiz_init() resets the
SERDES device and any configuration done in the probe() of
Sierra/Torrent will be lost. In order to prevent SERDES configuration
from getting reset, invoke wiz_init() immediately before invoking
of_platform_device_create().

Fixes: 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Swapnil Jakhade <sjakhade@cadence.com>
Cc: <stable@vger.kernel.org> # v5.10
Link: https://lore.kernel.org/r/20210319124128.13308-3-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31 16:42:51 +05:30
Yang Li
f26fde369c phy: ti: j721e-wiz: add missing call to of_node_put()
In one of the error paths of the for_each_child_of_node() loop in
of_property_read_u32, add missing call to of_node_put().

Fix the following coccicheck warning:
./drivers/phy/ti/phy-j721e-wiz.c:786:1-23: WARNING: Function
"for_each_child_of_node" should have of_node_put() before return around
line 795.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/1614244674-66556-1-git-send-email-yang.lee@linux.alibaba.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:35:17 +05:30
Kishon Vijay Abraham I
488209909b phy: ti: j721e-wiz: Add support for configuring QSGMII
Configure MAC clock dividers required for QSGMII to be functional.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/1614838096-32291-3-git-send-email-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:34:14 +05:30
Kishon Vijay Abraham I
9e405f87b6 phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m>
cmn_refclk_<p/m> lines in Torrent SERDES is used for connecting external
reference clock. cmn_refclk_<p/m> can also be configured to output the
reference clock. In order to drive the refclk out from the SERDES
(Cadence Torrent), PHY_EN_REFCLK should be set in SERDES_RST of WIZ.
Model PHY_EN_REFCLK as a clock, so that platforms like AM642 EVM can
enable it.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210310120840.16447-6-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:33:38 +05:30
Kishon Vijay Abraham I
040cbe7687 phy: ti: j721e-wiz: Model the internal clocks without device tree input
commit 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module
present in TI J721E SoC") modeled the internal clocks depending on the
subnodes that are populated in device tree. However recent discussions
in the mailing list [1] suggested to just add #clock cells in the parent
DT node and model the clocks within the driver.

Model the mux clocks without device tree input for AM64x SoC. Don't
remove the earlier design since DT nodes for J7200 and J721e are already
upstreamed.

[1] -> http://lore.kernel.org/r/20210108025943.GA1790601@robh.at.kernel.org

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210310120840.16447-5-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:33:22 +05:30
Kishon Vijay Abraham I
6ecac2f8ff phy: ti: j721e-wiz: Configure full rate divider for AM64
The frequency of the txmclk between PCIe and SERDES has
changed to 250MHz from 500MHz. Configure full rate divider
for AM64 accordingly.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210310120840.16447-4-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:33:21 +05:30
Kishon Vijay Abraham I
7e52a39f19 phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup
commit 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module
present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in
wiz. However during cleanup, it removed only the MUX clock provider.
Remove the DIVIDER clock provider here.

Fixes: 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210310120840.16447-3-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:33:18 +05:30
Kishon Vijay Abraham I
549cb1ae3e phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_sel
Both "struct wiz_clk_div_sel" and "struct wiz_clk_mux_sel" are static
data that is common for all wiz instances. Including
"struct regmap_field" for each of the wiz instances can yield undesirable
results. Move "struct regmap_field" out of "struct wiz_clk_div_sel" and
"struct wiz_clk_mux_sel" and make them point to constant data.

So far no issues are observed since both these structures are not
accessed outside the probe.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210310120840.16447-2-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30 23:33:14 +05:30
Junlin Yang
00f2e6f668 phy: ti: j721e-wiz: add missing of_node_put
Fix OF node leaks by calling of_node_put in
for_each_child_of_node when the cycle returns.

Generated by: scripts/coccinelle/iterators/for_each_child.cocci

Signed-off-by: Junlin Yang <yangjunlin@yulong.com>
Link: https://lore.kernel.org/r/20210216082739.1414-1-angkery@163.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-15 15:35:32 +05:30
Liam Beguin
eb445a15fa phy: tusb1210: use bitmasks to set VENDOR_SPECIFIC2
Start by reading the content of the VENDOR_SPECIFIC2 register and update
each bit field based on device properties when defined.

The use of bit masks prevents fields from overriding each other and
enables users to clear bits which are set by default, like datapolarity
in this instance.

Signed-off-by: Liam Beguin <lvb@xiphos.com>
Link: https://lore.kernel.org/r/20201211191241.21306-1-liambeguin@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-12 15:33:05 +05:30
Chunfeng Yun
79caf207d6 phy: ti: convert to devm_platform_ioremap_resource(_byname)
Use devm_platform_ioremap_resource(_byname) to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1604642930-29019-17-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16 12:47:48 +05:30