Commit Graph

222469 Commits

Author SHA1 Message Date
Alex Deucher
b08ebe7e77 drm/radeon/kms: properly print ontario chip id
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-16 14:56:45 +10:00
Alex Deucher
b4183e301a drm/radeon/kms: fix vram start calculation on ontario (v2)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-16 14:55:45 +10:00
Dave Airlie
ca9693a173 Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into drm-core-next
* 'nouveau/drm-nouveau-next' of ../drm-nouveau-next: (93 commits)
  drm/nv50: fix a couple of vm init issues
  drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.
  drm/nouveau: kick vram functions out into an "engine"
  drm/nouveau: allow gpuobj vinst to be a virtual address when necessary
  drm/nv50: tidy up PCIEGART implementation
  drm/nv50: enable non-contig vram allocations where requested
  drm/nv50: enable 4KiB pages for small vram allocations
  drm/nv50: implement global channel address space on new VM code
  drm/nv50: implement BAR1/BAR3 management on top of new VM code
  drm/nv50: import new vm code
  drm/nv50: implement custom vram mm
  drm/nouveau: Avoid potential race between nouveau_fence_update() and context takedown.
  drm/nouveau: fix use of drm_mm_node in semaphore object
  drm/nouveau: wrap calls to ttm_bo_validate()
  drm/nouveau: no need to zero dma objects, we fill them completely anyway
  drm/nouveau: introduce a util function to wait on reg != val
  drm/nouveau: implicitly insert non-DMA objects into RAMHT
  drm/nouveau: make fifo.create_context() responsible for mapping control regs
  drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU.
  drm/nouveau: Use WC memory on the AGP GART.
  ...
2010-12-16 14:49:02 +10:00
Ben Skeggs
b921bae2ee drm/ttm: delay freeing of old node during move_memcpy until after iounmap
Drivers using their own implementation of io_mem_reserve/io_mem_free are
likely to store the tracking information for the map in mem.mm_node, so
it can't be freed while still mapped.

Signed-off-by: Ben Skeggs<bskeggs@redhat.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-16 14:47:46 +10:00
Dave Airlie
99ee7fac18 drm/radeon: add initial tracepoint support.
this adds a bo create, and fence seq tracking tracepoints.

This is just an initial set to play around with, we should investigate
what others we need would be useful.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-16 14:37:47 +10:00
Francisco Jerez
c45aadabb9 drm/nv50: fix a couple of vm init issues
Fixes overwriting the first page table entry when testing that the PRAMIN
BAR can be correctly read/written, and adds an additional bar flush after
poking the BAR3 control regs.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-16 10:34:43 +10:00
Francisco Jerez
fd70b6cd78 drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 15:53:04 +10:00
Ben Skeggs
60d2a88ae8 drm/nouveau: kick vram functions out into an "engine"
NVC0 will be able to share some of nv50's paths this way.  This also makes
it the card-specific vram code responsible for deciding if a given set
of tile_flags is valid, rather than duplicating the allowed types in
nv50_vram.c and nouveau_gem.c

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:20 +10:00
Ben Skeggs
34cf01bc4b drm/nouveau: allow gpuobj vinst to be a virtual address when necessary
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:19 +10:00
Ben Skeggs
b571fe21f5 drm/nv50: tidy up PCIEGART implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:17 +10:00
Ben Skeggs
5f6fdca570 drm/nv50: enable non-contig vram allocations where requested
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:16 +10:00
Ben Skeggs
bfd83aca5a drm/nv50: enable 4KiB pages for small vram allocations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:15 +10:00
Ben Skeggs
4c13614298 drm/nv50: implement global channel address space on new VM code
As of this commit, it's guaranteed that if an object is in VRAM that its
GPU virtual address will be constant.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:13 +10:00
Ben Skeggs
f869ef8823 drm/nv50: implement BAR1/BAR3 management on top of new VM code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:12 +10:00
Ben Skeggs
a11c3198c9 drm/nv50: import new vm code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:10 +10:00
Ben Skeggs
573a2a37e8 drm/nv50: implement custom vram mm
This is required on nv50 as we need to be able to have more precise control
over physical VRAM allocations to avoid buffer corruption when using
buffers of mixed memory types.

This removes some nasty overallocation/alignment that we were previously
using to "control" this problem.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:07 +10:00
Francisco Jerez
937c3471cc drm/nouveau: Avoid potential race between nouveau_fence_update() and context takedown.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:01:02 +01:00
Ben Skeggs
a8b214f007 drm/nouveau: fix use of drm_mm_node in semaphore object
At some point in the future, this bo won't necessarily be backed by
a drm_mm_node, so use the start/size fields of the ttm_mem_reg instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:38 +01:00
Ben Skeggs
7a45d764a8 drm/nouveau: wrap calls to ttm_bo_validate()
This will be used later to fixup bo.offset with a buffer's fixed GPU
virtual address.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:37 +01:00
Ben Skeggs
a0fd9b9f68 drm/nouveau: no need to zero dma objects, we fill them completely anyway
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:37 +01:00
Ben Skeggs
12fb952507 drm/nouveau: introduce a util function to wait on reg != val
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:36 +01:00
Ben Skeggs
ceac30999d drm/nouveau: implicitly insert non-DMA objects into RAMHT
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:35 +01:00
Ben Skeggs
d908175cca drm/nouveau: make fifo.create_context() responsible for mapping control regs
The regs belong to PFIFO, they're different for pretty much the same
generations we need different PFIFO control for, and NVC0 is going
to be even more different than the rest.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:34 +01:00
Francisco Jerez
395a31ec7e drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU.
Sleeping doesn't pay off for very short delays in comparison with the
minimum granularity of schedule_timeout().

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:33 +01:00
Francisco Jerez
a3d487ea54 drm/nouveau: Use WC memory on the AGP GART.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:32 +01:00
Francisco Jerez
6dccd311dd drm/nouveau: Synchronize with the user channel before GPU object destruction.
There have been reports of PFIFO cache errors during context take down
(fdo bug 31637). They are caused by some GPU objects being taken out
while the channel is still potentially processing commands. Make sure
that all the previous rendering has landed before releasing a GPU
object.

Reported-by: Grzesiek Sójka <pld@pfu.pl>
Reported-by: Patrice Mandin <patmandin@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:23 +01:00
Francisco Jerez
38cf189fa1 drm/nv04-nv10: Don't re-enable FIFO access multiple times after IRQ dispatch.
nvxx_graph_isr is already taking care of it. In some cases this
could've made you miss PGRAPH interrupts (e.g. when you were supposed
to get several IRQs of the same kind in a row).

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:20 +01:00
Francisco Jerez
ca130c2267 drm/nv04-nv40: Give "gpuobj->cinst" the same meaning as on nv50.
No functional changes, just simplify some code paths a bit.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:09 +01:00
Francisco Jerez
2e5702aff3 drm/nouveau: fabricate DCB encoder table for iMac G4
In typical Apple fashion there's no standard information about what
encoders are present on this machine, this patch adds a quirk to
provide it.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:12:01 +10:00
Ben Skeggs
7f4a195fcb drm/nouveau: tidy up and extend dma object creation interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:59 +10:00
Ben Skeggs
6d6c5a157a drm/nouveau: remove some useless GETPARAMs
These have been unused since UMS support was ripped out, so lets remove
them completely.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:57 +10:00
Ben Skeggs
2cb3d3b6c6 drm/nv84: fix minor issues in PCRYPT implementation
Fix running of destroy_context() when create_context() has never been
called for the channel, and fill in engine's tlb_flush() function pointer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:56 +10:00
Ben Skeggs
7b4808bb6e drm/nouveau: remove dummy page use from PCI(E)GART, use PTE present instead
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:54 +10:00
Ben Skeggs
9fea1bcbff drm/nv50: fix 0x100c90 init for NVAF
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:52 +10:00
Ben Skeggs
20f63afe98 drm/nv50: allocate page for unknown PFB object in nv50_fb.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:50 +10:00
Ben Skeggs
e41115d0ad drm/nouveau: rework gpu-specific instmem interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:48 +10:00
Ben Skeggs
dc1e5c0dbf drm/nouveau: simplify gpuobj suspend/resume
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:47 +10:00
Ben Skeggs
fce2bad0ee drm/nv50: rework PGPIO IRQ handling and hotplug detection
Allows callers to install their own handlers for when a GPIO line
changes state (such as for hotplug detect).

This also fixes a bug where we weren't acknowledging the GPIO IRQ
until after the bottom half had run, causing a severe IRQ storm
in some cases.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:45 +10:00
Ben Skeggs
e4cbadcaaa drm/nv04-nv40: unregister irq handler on destroy
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:43 +10:00
Ben Skeggs
274fec93cd drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c files
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:41 +10:00
Ben Skeggs
5178d40dff drm/nouveau: move PFIFO ISR into nv04_fifo.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:39 +10:00
Ben Skeggs
25b85783da drm/nv04-nv40: register vblank isr
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:38 +10:00
Ben Skeggs
8cbe71a6e7 drm/nouveau: move bitfield/enum helpers to nouveau_util.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:36 +10:00
Ben Skeggs
19b7fc7bf5 drm/nv50: use register/unregister functionality for PDISPLAY ISR
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:34 +10:00
Ben Skeggs
2cbd4c8185 drm/nv50: move GPIO ISR to nv50_gpio.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:32 +10:00
Ben Skeggs
d7facf9dc5 drm/nv84: move PCRYPT ISR out of nouveau_irq.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:30 +10:00
Ben Skeggs
8f8a54482b drm/nouveau: allow irq handlers to be installed by engine-specific code
Lets start to clean up this mess!

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:29 +10:00
Ben Skeggs
a169f09b96 drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:27 +10:00
Ben Skeggs
aa2c2e8039 drm/nv50: fix compute object class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:25 +10:00
Francisco Jerez
23c45e8ed2 drm/nouveau: Fix sleep while atomic in nouveau_bo_fence().
Reported-by: Pekka Paalanen <pq@iki.fi>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:23 +10:00