When the clocking registers are not overriden some of the registers are
not writable.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Cc: stable@kernel.org
On WM8994 class devices only the analogue portions of the CODEC require
VMID so when running digital only paths we can leave VMID disabled.
On some earlier devices the FLL uses VMID so we don't use DAPM reference
counting alone, we maintain an internal reference count which is also
enabled and disabled by the FLL startup.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Currently this does not actually do anything, it is being introduced in
order to facilitate additional power optimisations for current generation
devices.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
sound/soc/codecs/wm8750.c:784:2: warning: missing braces around initializer
sound/soc/codecs/wm8750.c:784:2: warning: (near initialization for ‘wm8750_spi_ids[2].name’)
It's because struct spi_device_id.name is a char array, not a pointer,
while the driver initializes explicitly with 0.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The module device table for of_device_id should use "of" type.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This error would have no effect on current silicon revisions, the fall
through case has the same behaviour.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
No meaningful runtime impact but is more in line with other CODECs and
will support further work.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
As we had no id_table only the driver name would be matched against
meaning that WM8987 devices wouldn't be bound.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Without this, request_irq on subsequent device initialization fails, and
the codec cannot be used.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This closes the small race between a status being read in response to an
interrupt and clearing the interrupt, meaning that if the status changes
between those periods we might not get a reassertion of the interrupt.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
For marketing reasons the part will be called WM8996. In order to avoid
user confusion rename the driver to reflect this.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Cache handling in this driver is broken. The chip has 16-bit registers, yet the
register numbers also increase by 2 per register, i.e. there are only
even-numbered registers. The cache in this driver, though, simply increments
register numbers, so it does need some mapping as seen in
sgtl5000_restore_regs(), note the '>> 1':
snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL,
cache[SGTL5000_CHIP_LINREG_CTRL >> 1]);
That, of course, won't work with snd_soc_update_bits(). (Thus, we won't even
notice the missing register 0x1c in the default regs which shifted all follwing
registers to wrong values.) Noticed on the MX28EVK where enabling the regulators
simply locked up the chip.
Refactor the routines and use a properly sized default_regs array which matches
the register layout of the underlying chip, i.e. create a truly flat cache.
This also saves some code which should make up for the bigger array a little.
When soc-core will somewhen have another cache type which handles a step size,
this conversion will also ease the transition.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Dong Aisheng <b29396@freescale.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
The WM1250-EV1 board has an ID chip on it, check the board ID and display
the board revision during startup.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Some devices can have performance optimized by setting different offsets
for left and right channels.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Later WM8994 devices implement a new DC servo readback mode with the
register used to access the offset moved to register 0x59. Implement
support for this and enable it on the appropriate devices.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
It adds device tree probe support for sgtl5000 driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This does not function correctly in all circumstances so disable the
periodic updates unconditionally for stable; a future patch will reenable
where appropriate.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Tested with the famous "hey, look! this compiles" test plan.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Acked by: Grant Likely <grant.likely@secretlab.ca>
* 'next/devel2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (47 commits)
OMAP: Add debugfs node to show the summary of all clocks
OMAP2+: hwmod: Follow the recommended PRCM module enable sequence
OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code
OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming
OMAP2+: PM: idle clkdms only if already in idle
OMAP2+: clockdomain: add clkdm_in_hwsup()
OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework
OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition()
OMAP4: hwmod: Introduce the module control in hwmod control
OMAP4: cm: Add two new APIs for modulemode control
OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure
OMAP4: hwmod data: Add PRM context register offset
OMAP4: prm: Remove deprecated functions
OMAP4: prm: Replace warm reset API with the offset based version
OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros
OMAP: hwmod: Wait the idle status to be disabled
OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros
OMAP2+: hwmod: Init clkdm field at boot time
OMAP4: hwmod data: Add clock domain attribute
OMAP4: clock data: Add missing divider selection for auxclks
...
