- Add new cpufreq driver for the MediaTek MT6779 platform called
mediatek-hw along with corresponding DT bindings (Hector.Yuan).
- Add DCVS interrupt support to the qcom-cpufreq-hw driver (Thara
Gopinath).
- Make the qcom-cpufreq-hw driver set the dvfs_possible_from_any_cpu
policy flag (Taniya Das).
- Blocklist more Qualcomm platforms in cpufreq-dt-platdev (Bjorn
Andersson).
- Make the vexpress cpufreq driver set the CPUFREQ_IS_COOLING_DEV
flag (Viresh Kumar).
- Add new cpufreq driver callback to allow drivers to register
with the Energy Model in a consistent way and make several
drivers use it (Viresh Kumar).
- Change the remaining users of the .ready() cpufreq driver callback
to move the code from it elsewhere and drop it from the cpufreq
core (Viresh Kumar).
- Revert recent intel_pstate change adding HWP guaranteed performance
change notification support to it that led to problems, because
the notification in question is triggered prematurely on some
systems (Rafael Wysocki).
- Convert the OPP DT bindings to DT schema and clean them up while
at it (Rob Herring).
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmE41VgSHHJqd0Byand5
c29ja2kubmV0AAoJEILEb/54YlRxCN4P+gMjMrrZmuU6gZsbbvpDlaBhCd2Xq3TD
xR/DMDi7znkh3TUX3uwL+xnr+k0krIH0jBIeUQUE7NeNIoT6wgbjJ4Ty5rFq76qB
AODmmZ4vO7lmnupSyqUQbHfYohDmyICSKiStf8UOEj1o+jSWNmrgUYUv0tDtDUH+
Cn0vByah8gJAnoZX8Y8BM1jmRc3YoNHWpvtTQIhIBPkVZ//+NOKvDZvwUUPZFb+M
1PzMSfX7WsIDiUrUHpdvtZsoBniaMk0WS1EqVBRvEprqUXad1eHF19yuhtLxeUPH
8xh/7o8kYzjqVJvs7blTT8DztxRDScWHeGKSVdwoEJupbCwc5R3qfGaD6PWyhI1x
9R5Swsp64nLptTCwH7ZmgdJbC9IqN3cz1Nadd5v2Q2wr21KvZnj7zI2ijkPKGnZo
kqYQHghqnDkGPFVjdls/RKUXGCQIXZFQb+FeuyCvpVlz9Ol8+DnTYtgFjjc6VcU1
kApIqsE8V8GQEyzmm/OIAf6xtsA+mEUUh3Qds16KNCwBCRglC8I6v5IWnBc8PEJz
a+wtwjx+tyKSSlAMEvcDNtrWVN+3JNrwCFG+Q+QjMrwLiAgACrtJZ6e6PmLj9sZv
FPbZM8rzbzN7Zqd7XVNY37KHjqNs7zzDScAnATTUCKThp8ijDgtmG3ZhExmOPayc
74aQLham4TBO
=WSpr
-----END PGP SIGNATURE-----
Merge tag 'pm-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more power management updates from Rafael Wysocki:
"These are mostly ARM cpufreq driver updates, including one new
MediaTek driver that has just passed all of the reviews, with the
addition of a revert of a recent intel_pstate commit, some core
cpufreq changes and a DT-related update of the operating performance
points (OPP) support code.
Specifics:
- Add new cpufreq driver for the MediaTek MT6779 platform called
mediatek-hw along with corresponding DT bindings (Hector.Yuan).
- Add DCVS interrupt support to the qcom-cpufreq-hw driver (Thara
Gopinath).
- Make the qcom-cpufreq-hw driver set the dvfs_possible_from_any_cpu
policy flag (Taniya Das).
- Blocklist more Qualcomm platforms in cpufreq-dt-platdev (Bjorn
Andersson).
- Make the vexpress cpufreq driver set the CPUFREQ_IS_COOLING_DEV
flag (Viresh Kumar).
- Add new cpufreq driver callback to allow drivers to register with
the Energy Model in a consistent way and make several drivers use
it (Viresh Kumar).
- Change the remaining users of the .ready() cpufreq driver callback
to move the code from it elsewhere and drop it from the cpufreq
core (Viresh Kumar).
- Revert recent intel_pstate change adding HWP guaranteed performance
change notification support to it that led to problems, because the
notification in question is triggered prematurely on some systems
(Rafael Wysocki).
- Convert the OPP DT bindings to DT schema and clean them up while at
it (Rob Herring)"
* tag 'pm-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (23 commits)
Revert "cpufreq: intel_pstate: Process HWP Guaranteed change notification"
cpufreq: mediatek-hw: Add support for CPUFREQ HW
cpufreq: Add of_perf_domain_get_sharing_cpumask
dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
cpufreq: Remove ready() callback
cpufreq: sh: Remove sh_cpufreq_cpu_ready()
cpufreq: acpi: Remove acpi_cpufreq_cpu_ready()
cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag
cpufreq: blocklist more Qualcomm platforms in cpufreq-dt-platdev
cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support
cpufreq: scmi: Use .register_em() to register with energy model
cpufreq: vexpress: Use .register_em() to register with energy model
cpufreq: scpi: Use .register_em() to register with energy model
dt-bindings: opp: Convert to DT schema
dt-bindings: Clean-up OPP binding node names in examples
ARM: dts: omap: Drop references to opp.txt
cpufreq: qcom-cpufreq-hw: Use .register_em() to register with energy model
cpufreq: omap: Use .register_em() to register with energy model
cpufreq: mediatek: Use .register_em() to register with energy model
cpufreq: imx6q: Use .register_em() to register with energy model
...
no core changes at all this time, just driver work!
New drivers:
- New subdriver for Intel Keem Bay (an ARM-based SoC)
- New subdriver for Qualcomm MDM9607 and SM6115
- New subdriver for ST Microelectronics STM32MP135
- New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
- New subdriver for Ingenic X2100
- Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
- Support Samsung Exynos850
- Support Renesas RZ/G2L
Enhancements:
- A major refactoring of the Rockchip driver, breaking part of it out
to a separate GPIO driver in drivers/gpio
- Pin bias support on Renesas r8a77995
- Add SCI pins support to Ingenic JZ4755 and JZ4760
- Mediatek device tree bindings converted to YAML
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmEw+3cACgkQQRCzN7AZ
XXOBihAAyVGtmXsEO9yO50R0+RzbTvD8QVGTdBqjSK/ILghoP5xRZzYkOt9oKUgG
2ue24euJ2Ww0+tV69CEKHOfTt8vnXEawQe9hiROQTgSDrT+9ScdT81pEQPH00smM
oQJqxXmi0HQ28r6NyrA/0WN6f0J+nEh7f4STPWtSW8E3Cz/pyODhrtdhyNXbzMJ3
W9JGjTsz4VBy7qurb0RKpQrZ244uDyFCMzZnoBvJBN/f6Jupu09d0mNkDrYhvK5z
FVdIwFEZ2sssF9zf33BkJ7BKnHa5WANJD3RaM2fcCC/sFIq8k3ZVHhvOkdE3QmLp
yWrFZREsJvvK1U/ksHRFB3RucOMKVAXV+CnVxKqTU7rv+cEHH0l/TacPqfZaONm9
LGF3FoGYnG5oO+CxtfAedpHmajDZZNky2RC0Eov/Eigiq+VHXpuClB/DcpHyCuv2
aKDxeqP8JXsZW1t7YutCb6w5f6f8SKC/csaFkMqCJMXz10sCPjKBsvlgWq49A99X
CtwJxlzDKI7i9TSffCTHYUQBWAYa/b3fwnwuVphzpVya1gERvHN30ZhJH9ho0LGW
YNNdVAvqNdH6FzyTzOY8fOKc/J2OY1Yd7gL35T0xYiTrT8JK7rwW8pUh0JINxSdU
QGHjis4WjGUFzgqUpC8qhI6u+rInLRr08sGJ/qnj5TmpZRp9rsk=
=I6N/
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.15 kernel cycle, no
core changes at all this time, just driver work!
New drivers:
- New subdriver for Intel Keem Bay (an ARM-based SoC)
- New subdriver for Qualcomm MDM9607 and SM6115
- New subdriver for ST Microelectronics STM32MP135
- New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
- New subdriver for Ingenic X2100
- Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
- Support Samsung Exynos850
- Support Renesas RZ/G2L
Enhancements:
- A major refactoring of the Rockchip driver, breaking part of it out
to a separate GPIO driver in drivers/gpio
- Pin bias support on Renesas r8a77995
- Add SCI pins support to Ingenic JZ4755 and JZ4760
- Mediatek device tree bindings converted to YAML"
* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
pinctrl: samsung: Add Exynos850 SoC specific data
dt-bindings: pinctrl: samsung: Add Exynos850 doc
MAINTAINERS: Add maintainers for amd-pinctrl driver
pinctrl: Add Intel Keem Bay pinctrl driver
dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
dt-bindings: mediatek: convert pinctrl to yaml
arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
pinctrl: ingenic: Add .max_register in regmap_config
pinctrl: ingenic: Fix bias config for X2000(E)
pinctrl: ingenic: Fix incorrect pull up/down info
pinctrl: Ingenic: Add pinctrl driver for X2100.
dt-bindings: pinctrl: Add bindings for Ingenic X2100.
pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
pinctrl: Ingenic: Improve the code.
...
As usual, the bulk of work in the SoC tree goes into DT files,
this time with a roughly even split between 32-bit and 64-bit
SoCs rather than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new
32-bit platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the
existing phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of
older Renesas SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper,
Elbert and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iD8DBQBhL13Z5t5GS2LDRf4RAljwAJ0acTxOBYP8J5zETlAQRWYcYWh5hACfZOgC
Om6K0IN5+lJuaUyF/GdmqS4=
=zXua
-----END PGP SIGNATURE-----
Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, the bulk of work in the SoC tree goes into DT files, this
time with a roughly even split between 32-bit and 64-bit SoCs rather
than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions"
* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
ARM: dts: rockchip: Add SFC to RV1108
arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
dt-bindings: vendor-prefixes: add Traverse Technologies
arm64: dts: add device tree for Traverse Ten64 (LS1088A)
arm64: dts: ls1088a: add missing PMU node
arm64: dts: ls1088a: add internal PCS for DPMAC1 node
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
arm64: dts: imx8mq-reform2: add sound support
arm64: dts: imx8m: drop interrupt-affinity for pmu
arm64: dts: imx8qxp: update pmu compatible
arm64: dts: imx8mm: update pmu compatible
...
These are updates for drivers that are tied to a particular SoC,
including the correspondig device tree bindings:
- A couple of reset controller changes for unisoc, uniphier, renesas
and zte platforms
- memory controller driver fixes for omap and tegra
- Rockchip io domain driver updates
- Lots of updates for qualcomm platforms, mostly touching their
firmware and power management drivers
- Tegra FUSE and firmware driver updateѕ
- Support for virtio transports in the SCMI firmware framework
- cleanup of ixp4xx drivers, towards enabling multiplatform
support and bringing it up to date with modern platforms
- Minor updates for keystone, mediatek, omap, renesas.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iD8DBQBhLz215t5GS2LDRf4RAjlHAJ473D0PymaTzv68EuPHThG+DEPifQCdGjLq
QGBB6JidIP8rtEdC+LWBB8I=
=M5+N
-----END PGP SIGNATURE-----
Merge tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are updates for drivers that are tied to a particular SoC,
including the correspondig device tree bindings:
- A couple of reset controller changes for unisoc, uniphier, renesas
and zte platforms
- memory controller driver fixes for omap and tegra
- Rockchip io domain driver updates
- Lots of updates for qualcomm platforms, mostly touching their
firmware and power management drivers
- Tegra FUSE and firmware driver updateѕ
- Support for virtio transports in the SCMI firmware framework
- cleanup of ixp4xx drivers, towards enabling multiplatform support
and bringing it up to date with modern platforms
- Minor updates for keystone, mediatek, omap, renesas"
* tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
reset: simple: remove ZTE details in Kconfig help
soc: rockchip: io-domain: Remove unneeded semicolon
soc: rockchip: io-domain: add rk3568 support
dt-bindings: power: add rk3568-pmu-io-domain support
bus: ixp4xx: return on error in ixp4xx_exp_probe()
soc: renesas: Prefer memcpy() over strcpy()
firmware: tegra: Stop using seq_get_buf()
soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
soc/tegra: fuse: Add runtime PM support
soc/tegra: fuse: Clear fuse->clk on driver probe failure
soc/tegra: pmc: Prevent racing with cpuilde driver
soc/tegra: bpmp: Remove unused including <linux/version.h>
dt-bindings: soc: ti: pruss: Add dma-coherent property
soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs
firmware: arm_scmi: Use WARN_ON() to check configured transports
firmware: arm_scmi: Fix boolconv.cocci warnings
soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
soc: mediatek: mmsys: add MT8365 support
...
Here is the big set of char/misc driver changes for 5.15-rc1.
Lots of different driver subsystems are being updated in here, notably:
- mhi subsystem update
- fpga subsystem update
- coresight/hwtracing subsystem update
- interconnect subsystem update
- nvmem subsystem update
- parport drivers update
- phy subsystem update
- soundwire subsystem update
and there are some other char/misc drivers being updated as well:
- binder driver additions
- new misc drivers
- lkdtm driver updates
- mei driver updates
- sram driver updates
- other minor driver updates.
Note, there are no habanna labs driver updates in this pull request,
that will probably come later before -rc1 is out in a different request.
All of these have been in linux-next for a while with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYS+Kyw8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ymlpACg0JM+hSeo8T5GtwZksZ1QXXQfh8sAoK6Dt6xF
e62OQuuMFT0Un0qOflZk
=emH+
-----END PGP SIGNATURE-----
Merge tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc driver updates from Greg KH:
"Here is the big set of char/misc driver changes for 5.15-rc1.
Lots of different driver subsystems are being updated in here,
notably:
- mhi subsystem update
- fpga subsystem update
- coresight/hwtracing subsystem update
- interconnect subsystem update
- nvmem subsystem update
- parport drivers update
- phy subsystem update
- soundwire subsystem update
and there are some other char/misc drivers being updated as well:
- binder driver additions
- new misc drivers
- lkdtm driver updates
- mei driver updates
- sram driver updates
- other minor driver updates.
Note, there are no habanalabs driver updates in this pull request,
that will probably come later before -rc1 is out in a different
request.
All of these have been in linux-next for a while with no reported
problems"
* tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (169 commits)
Revert "bus: mhi: Add inbound buffers allocation flag"
misc/pvpanic: fix set driver data
VMCI: fix NULL pointer dereference when unmapping queue pair
char: mware: fix returnvar.cocci warnings
parport: remove non-zero check on count
soundwire: cadence: do not extend reset delay
soundwire: intel: conditionally exit clock stop mode on system suspend
soundwire: intel: skip suspend/resume/wake when link was not started
soundwire: intel: fix potential race condition during power down
phy: qcom-qmp: Add support for SM6115 UFS phy
dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
phy: qmp: Provide unique clock names for DP clocks
lkdtm: remove IDE_CORE_CP crashpoint
lkdtm: replace SCSI_DISPATCH_CMD with SCSI_QUEUE_RQ
coresight: Replace deprecated CPU-hotplug functions.
Documentation: coresight: Add documentation for CoreSight config
coresight: syscfg: Add initial configfs support
coresight: config: Add preloaded configurations
coresight: etm4x: Add complex configuration handlers to etmv4
coresight: etm-perf: Update to activate selected configuration
...
Pull operating performance points (OPP) framework changes for v5.15
from Viresh Kumar:
"This moves the OPP bindings to DT schema (Rob Herring)."
* 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
dt-bindings: opp: Convert to DT schema
dt-bindings: Clean-up OPP binding node names in examples
ARM: dts: omap: Drop references to opp.txt
Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to decide on and document
the node name.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
opp.txt is getting removed with the OPP binding converted to DT schema.
As it is unusual to reference a binding doc from a dts file, let's just
remove the reference.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add a devicetree entry for the Rockchip SFC for the RV1108 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134546.31340-5-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
- New machines
* Facebook's Cloudripper
* Facebook's Elbert
* Facebook's Fuji
All three carry the description of "Facebook's next generation switch
platform with an AST2600 BMC integrated for health monitoring
purpose."
They share a 128 MB SPI NOR flash layout that is also used by some
older platforms.
* Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
- SGPIO updates including AST2600 support
- GPIO descriptions for the IBM AST2600 machines
- Pinctrl fix
- Updates to Facebook's AST2500 based machines
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmEbYpcACgkQa3ZZB4FH
cJ5MQA//acXKEAKZgQ9op7wanVrQH37BkvFBkn02vwKWHJXt7tIXMlf19yeOSMsL
BIR4wPzWLCrK0Jy5R5AxSYcPosibjWZFKHPtgk9JfS2LHF11agYe+zTgBLkXgQbe
jVcraSaUOJ19on8iuYz50zhzcj5P0vlCN49dORcn0Ey0zw1Wnf6+D+//VcnlFaSt
6+vHGUyviMiQ8Ws6G0b1ZoWiM9mEDyLxUGVD+Qe/P5E/49ClkzowWswcBUcOgRmS
G/nHmPTWmxDKk8KAXPzijnbbxUmueepvv96Fbfvg8VEFP/alAEKKnn2QpTUF6kbi
y9IL1ryR8fzJS57HhEJ5O+l//+N0pvPlfsaLt4ZchZOBG9+zmbwOL3Q//qZ3/Ca2
vEUMp59f8uB8/coM3dzyuMWEPbn5nEuNAVDH8PVTcJsVxGSNHHHfb09ISmWGWacA
F8e6jAJVFkhf5xeoHV7qmf1l1VDwOCm3Fsgp1jGARZrK89sZmOlV5rgO7IIe7Swh
Y+itv+EOu8T1bJ+fs0eXLMUnGR/dw8OUmRIsgXnKCYAAPrjLfg8zusQfpr6mfMUA
tXpYxQqqVw+XXCtGewAoF3PHwuOcRxQbAJn1v4QrzYNseteJqoryzcMEZrZcocKQ
JwNQTJZyQ2OitRPHOnnTzLqgE5sV/PFHdzGpFgmPjfUkT/4Y+L0=
=GIHt
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdALkACgkQmmx57+YA
GNkzaBAAsDX3tqMQIo/U8o80Puwb7ZoupCxygmivhDSLaFtcvn/k14YT3Qi8JG/a
1NUSXi+YsM1du0QS3BI0bMrWIyLtj/7q2785UlyMOUS2DXukUuGLWMVTXmPOHh99
7N77IQuC/HB/qPiDm76V6Ax6ax6FVY4LQKXlur3z2MM5ZP2PbaLK2CG1VmZuH/gv
qVNFz1bQVjJ2j3iegGt3+bb1uaZshTX0S7PFrvvI0UmUjlfm9oKfGgYepFb6Rfi5
lQ1MP475qBMPWE/UIQ4hsg49PxOXKP9PsuW6+hK23GbgNoI2esgnJBG5mwzkWz+S
/H+2zeldljKQ1COBu0WztRQqDJTVphOlgbSRkQpYC6UJvXWs7XDrzrIXlLfu7gmn
FTPpQ2d+k+eTP2P2VHh2tgUDbf+OBftZvrad/2RW2WzFVrGd5oDt/kdXAxcOxC7i
fC2VKl9ban2xg1WBFgRUaH1t5OiUv7FaW3k2yFfkCSmbSY6OJSoUAMhhs3XuCW3T
nNCDRj6kew1qhl3zSUweGsZ3DdjctTr6ab1TFZd0BsGUl/7FQ5ycNx/LGafH2GtC
NCUxjK4ZSKddy7ROjyqwBH4zmevLbJz/ae+RbWKUh0aJcDC50LlWuH0dcFO2jlLx
yMcW71TqipL0BcTh6nfK1dJMbqrBOeQhTKC7NGcOZ9D2T+xu79g=
=Y4SA
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
ASPEED device tree updates for 5.15
- New machines
* Facebook's Cloudripper
* Facebook's Elbert
* Facebook's Fuji
All three carry the description of "Facebook's next generation switch
platform with an AST2600 BMC integrated for health monitoring
purpose."
They share a 128 MB SPI NOR flash layout that is also used by some
older platforms.
* Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
- SGPIO updates including AST2600 support
- GPIO descriptions for the IBM AST2600 machines
- Pinctrl fix
- Updates to Facebook's AST2500 based machines
* tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (23 commits)
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
ARM: dts: aspeed: Add Facebook Fuji (AST2600) BMC
ARM: dts: aspeed: Add Facebook Elbert (AST2600) BMC
ARM: dts: aspeed: Add Facebook Cloudripper (AST2600) BMC
ARM: dts: aspeed: Common dtsi for Facebook AST2600 Network BMCs
ARM: dts: aspeed: wedge400: Use common flash layout
ARM: dts: Add Facebook BMC 128MB flash layout
ARM: dts: aspeed-g5: Remove ngpios from sgpio node.
ARM: dts: aspeed-g6: Add SGPIO node.
dt-bindings: aspeed-sgpio: Add ast2600 sgpio
dt-bindings: aspeed-sgpio: Convert txt bindings to yaml.
ARM: dts: aspeed: ast2500evb: Enable built in RTC
ARM: dts: aspeed: tacoma: Add TPM reset GPIO
ARM: dts: rainier, everest: Add TPM reset GPIO
ARM: dts: aspeed: wedge100: Enable ADC channels
ARM: dts: aspeed: galaxy100: Remove redundant ADC device
ARM: dts: aspeed: wedge40: Remove redundant ADC device
ARM: dts: aspeed: Enable ADC in Facebook AST2400 common dtsi
...
Link: https://lore.kernel.org/r/CACPK8XdWRBb9cuDWGQPfK8R8TsZuydJQHsL4_e2w=HvCKAMogg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces the MSM8226 platform and an initial dts for the Samsung
Galaxy S III Neo phone.
MSM8974 gains another UART and this is used to enable Bluetooth on the
Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for
audio and modem remoteprocs, effectively enabling these.
DSI clocks on APQ8064 are updates as the old legacy clock names are no
longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets
wired up.
Lastly APQ8060 is converted to a SPDX header and the ethernet node is
updates in accordance with the binding.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmEa1W8bHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F0CcP/1rCgNZKQ++chXeDJX7O
BL1EmmHZ93RiY/u9etmwT2ZzLhGwIiEPhddqL/a1B2J4VFCfjsJVy31XQbYBCWpN
cZtsnsV0mHD9oU/SpHEAUkllTXZlr4kNoghaynzipQCC9oirZw7m4MxiSJENczZ9
sGefAzqpNtvGjR07wKUraWFJXDqKYQg1b+Tfu0Q1p3T9ZivkP3gRL4MGt4dzTgwo
tFHCs6bR9FA+eChmMhVfsBSytdOC+Y6kGOQOJLrvDYmHEkA2H3hLmkKAWpbGtjw2
Y4aj8n3IqPEkl2rSuH1pu2av5DwfDI4Kf+VI4LSz7/WVJ1e+FkrOQpCSTCOb+1m1
8re+do1wHB5PE3mnmvLa6avFO/GnKU9Uex8n+vPwUQ03Dhvh6IZ9jKo007iNrXB9
3VobOwkxPfVIUHv+T23pfbTHyWzcTZzLXivZSNQ9p3hfqBHS8dIwMJ9XMRW8M55D
BSoaEt5kHOKZMlgcpHFczeZiART/x6NkaIOU0b3TDq4xeSRttnKEr/ehy45jNN0w
yE7YG82gCuBBsI2pIre3mxVf8J8y10UBoE1plcKrDpJT80Xcik0llgfAvULw3Jx3
l4GGGlKFZSqzQ70B+4R8kfN5pLCI06CobEWL6VvZW9wfndt2M9NO/iPv/tRNAvVc
gsD+CKQ5QLVywIr/tZZ2d+EY
=JynD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEbgcEACgkQmmx57+YA
GNlC0Q//USmb8u05Sn7DlYu46UBcNcQrgGOCXIrNWkERm7jxEhUqp4soI24jomiq
1GEKWApzPlmLtBvQKiGl5IoCypYbZ0kOyFBP+FYezmSD8vCU46UtnzKV+b3mzwQH
rDPFogjj92LBv1+i+8jgry3tvrdK3oM2QJ2cSIF7EyXjuMBok36zXdPpG4mP8dBT
vla+IZFa7GXOi+SKVykB8tlaGPaslamIfG6ZtjeJJuGsPRDotjmjc9vvGEtKfOF0
cHKKTtPli60NqwHX61UURNAcaoURBw4W4Jy0KolvMWo98I+TyWf18xRF2aanm8pa
mLsK7SlqipRY1ofTeHZwb6eK3j13qD5knv+tWjjwCTCmAufljnLwqoP494mHeU5D
ppLMcSfw9HheR/J3NoimcJ8mvWe2/NOmtqxKFt0QYUiL3p0uqZUfclTUbIUEqzi3
v30lFh984aB91HgLQkl3dgqmCG/ggS7gy1W2BEQZtsaQHAW4v+psYAjMMMGpkcZV
vHjWffic3y+mVgClZ8PRaqkXQB/IjfuoSF/+VT6/kTNosmOXkvphd3je2ogE9Zn8
4r+ALaAlmaRLpBzvfDTyNAB2gUi4ar22JVa5VpF1y4G9SAlHkv6TdpnaTgfw4SKu
D3fqjSlYJ6DL7CRB+4BetPn2Al83CvuPXSMRF9iuikllRGHZfbs=
=zDwv
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm dts updates for v5.15
This introduces the MSM8226 platform and an initial dts for the Samsung
Galaxy S III Neo phone.
MSM8974 gains another UART and this is used to enable Bluetooth on the
Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for
audio and modem remoteprocs, effectively enabling these.
DSI clocks on APQ8064 are updates as the old legacy clock names are no
longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets
wired up.
Lastly APQ8060 is converted to a SPDX header and the ethernet node is
updates in accordance with the binding.
* tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: add ahb reset to ipq806x-gmac
ARM: dts: qcom: Fix up APQ8060 DragonBoard license
ARM: dts: qcom: msm8974: castor: Add Bluetooth-related nodes
ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius
ARM: dts: qcom: Add initial DTS file for Samsung Galaxy S III Neo phone
dt-bindings: arm: qcom: Document MSM8226 SoC binding
ARM: dts: qcom: Add support for MSM8226 SoC
ARM: dts: qcom: apq8060: Correct Ethernet node name and drop bogus irq property
ARM: dts: qcom: apq8064: correct clock names
ARM: dts: qcom: msm8974-klte: Enable remote processors
Link: https://lore.kernel.org/r/20210816211957.579365-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
boards.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmEXodgUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7/DQf6Ah9P+NmuvrV3T/soI3c6CNdvS4dC
mUqzkdpPvKw4b38iLBNS/qB1JvkIosu84Hx/Ll+toJYWC4QaV9M/ZgnMnqSXN56O
j18CMKhDQrw+Y7jghoqm8kvgmHooaSFvNgMBVNULa2pEozJuN/viUglgVJ+FCYaF
JBO2YRHNZvq0BxEy63es3qGG1JXdfs4slKu2wl4lGRCwk999odQKMFVpe1AaAJzN
sa61EYFsIvCgJGTYQlB6E0CTBkS8R4V4jezNPgGznQjYzCx1OF2+y0HaTUVC0Zk4
qqJcMO0uxFvuXs4dim9/djdmD80oqiGdZG6auPXUtx07MbyOP42dg9EuPA==
=5rPD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa1dwACgkQmmx57+YA
GNnS3g//fx4YK8NLznTzmfPVsR6ptAZ6jPsMHek5TZX3JAA4OVUIv+FQuWROHUys
QffZDniw2X1Gl8MsgueftVBN3fj9we6Rlmmk8opgWpAwOIFEaSUbHOMCSWy9MFUk
IDEg5VKK0l1JvYubCWBsjqoZz4GfWQr8HFZYeJFMFAi8r3YqS5UFoO39t/JpkHSX
si5Hzdgl5og8rqRiCfkgb+BcpMdDAcG/wSqQIsMi53y6Xnxl2nn7kMcN51nOOykB
Xc4w80fU3XxeWVPHzlzYYlCa35qmkFVZPY0z40sck4VmDvSr479ulhhGjoEPJlBD
Y1JNM3XZrrLWdCLcD+f3TcOhbBKDkei5xfN3cxb/dl1CPMpL9TdLUK/3rUh5+R5f
X0/w2vK6GyUWP6QSG0mGOmfUtsAYR3wz+ecApQzM0d50bSAOsQy4AEWgHASYE8gc
92HDFmi4uOTMJrh9q7c2LcrW/BK0UUtlSMeDPUMboL0RF5oQ4yzUF+b/7/1gr19a
xNRzo8tz2yEypU2V8Ol9VfO9EtIAIUf+HluR2PQ+bwgwd4cTqJJ001AUtSAXROdN
c4IMJhzKknUQpr0XgkbHTmF/Ts9bw32X7KZ3Rb+0cm5vUB2bE8WAeAKo/sIei5nh
VsS/9sLBeNIZAouq29DYsQxx3YLCowYG4l81DzOUFR3SzbVTLsk=
=7FFL
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 device tree changes for 5.15:
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
boards.
* tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (23 commits)
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
ARM: dts: imx7: add ftm nodes for Flex Timers
ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board
ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board
ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2
ARM: dts: imx6q-dhcom: Cleanup of the devicetrees
ARM: dts: imx6q-dhcom: Rearrange of iomux
ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls
ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board
ARM: dts: imx6q-dhcom: Set minimum memory size of all DHCOM i.MX6 variants
ARM: dts: imx6q-dhcom: Remove ddc-i2c-bus property
ARM: dts: imx6q-dhcom: Add keys and leds to the PDK2 board
ARM: dts: imx6q-dhcom: Align stdout-path with other DHCOM SoMs
ARM: dts: imx6q-dhcom: Adding Wake pin to the PCIe pinctrl
ARM: dts: imx6q-dhcom: Fill GPIO line names on DHCOM SoM
ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY
ARM: dts: imx6q-dhcom: Add the parallel system bus
ARM: dts: imx7d-remarkable2: Add WiFi support
...
Link: https://lore.kernel.org/r/20210814133853.9981-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmEWmI8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUMWD/9wdd5/zlOG3XHYGlo30TzoHLW6nO6E
VmZm5RlJ7JB7XRxFLrB22d0Kt9L6fm8UW5GOGCK4sG47I/+YyNUFDtn+TpQJeUvM
iQ7ImX9X4bFqVn7ul6xWhdCEN+p3ZTRcqTAtgEjJevs9i86EIZzYNtLaIHRqvxwT
9S7/6jtESZNRSVoH0/wQay0lOHoBoHhSzJTGSS61yGak/NAQDRdU0xNkvTarZbVb
VCojDx8uNuAuEUqvPxY9BRdhHy6PAPebSem60Akm+S76HUQ4CIea9A/SExsOfq0/
Zv07nMVKHjxAkKp+Mr8QWCpbJpdrf6snUU1nuGsOvnOwvgHQtatVlsYs81HlByGu
lI3mdajL8XSkxCIHnl2uXOXMuOnlh7BBuE6ie0/S3QN6yOMEI17kAJUnoB2eYitx
wfswrH3sVlJ5xFhb9oqhfz3VfjG69PPBLudm2YGLVs4pYVfvGS88Pqes//6jKfsT
1TgRmJEAwYaFCrhPJXjwnZniHc4tc6SowQ9XsPyhV9LepwbAQKF6VMzVOOqU9UW/
2fGlemi4aKWRmQRAlLT8kA2IS8fip7NOXSl/ffcGGnpqM5o38kikZsYRWgS+7kxT
M24mNefKwTy7FQjnfPPXfRo2xBTqXKNRmdUEHFdMwCTxNnVF8bf3I96IO8zsb408
vH6+nkJ/Ty7HaA==
=8RvP
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa0YAACgkQmmx57+YA
GNlbRA/8CvbB9v0CzVxIyEZQHEsTP3FZAu5kDUFxjG32yqNxmWTfGV197wQ7xLdI
R80L3LMf2kfWwwVi66dUiYpOVdUSg7Z+vZmieZhX4Z2rjtDdWzHYZYHF45Sc2UUr
yvJa41pCAx1GzI7vyfPVSRnIRpoc1GHumJzEQT8K4K7w9owImboZfgwufwkd7zB/
Y6XdAaFUiZjYsddAaiEE6NFAGAP/QSWQLRYmJB923P7kCKytS4zQp/bcUH+CrrrE
mr4ATkvrW5mclmaDhWjFsIHVUmpFUPiooCqy4eEg65muLm1MS30+6LO2U3F3+Vtt
hvAYIDtaI5WBrgwYVBnWMJuPtP4UZdybdmWJnHXKH+jVU3a7jjOo/59uI2ZKapYj
yOImKxJFMkJh/qPEDIyECtNXrbc+hqy5Pj3PryztEKx0lW8okl8eqDUN3JtUNkQc
AP5oMP36vdOhP2nZkfy8LlPz/1woQOlC2cPbP9mVU74kw2t2eybbinNLnU0pgAm/
bNh7In09ivbC9LUNoP63c1gS+ZF4yzdzomHNqzqIIy2i+RLrccPiIWg7DgMwX5ze
MtRHbuGNmMqoGgSzQx5u5PMPaw8aSRnNuoUiD7EjfydIqI90/0NLQ0lDrqMD/ctV
ftrlkNTVM6Y3OdGTyWFhmVAUjLeljY0yEaqBaIb+2YHS2icAYmI=
=zHxH
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.15-rc1
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
* tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tamonten: Fix UART pad setting
ARM: tegra: nexus7: Improve thermal zones
ARM: tegra: acer-a500: Improve thermal zones
ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method value
ARM: tegra: acer-a500: Add power supplies to accelerometer
ARM: tegra: acer-a500: Remove bogus USB VBUS regulators
ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensor
ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensor
ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensor
ARM: tegra: apalis: Correct interrupt trigger type of temperature sensor
ARM: tegra: nyan: Correct interrupt trigger type of temperature sensor
ARM: tegra: acer-a500: Add interrupt to temperature sensor node
ARM: tegra: nexus7: Add interrupt to temperature sensor node
ARM: tegra: paz00: Add interrupt to temperature sensor node
ARM: tegra: ouya: Add interrupt to temperature sensor node
ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees
Link: https://lore.kernel.org/r/20210813162157.2820913-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add some comments to explain the purpose of "mdio1" controller: it's
connected to the MDC/MDIO interface of the on-board management switch.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://lore.kernel.org/r/20210813061900.24539-1-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
By default ENET_REF is configured to 50MHz, which is usable for the RMII
link. In case RGMII is used, we need 125MHz clock.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove #address-cells and #size-cells property from at93c46d device tree
node as it does not have child nodes.
Fixes: 1556063fde ("ARM: dts: vf610-zii-dev: Add ZII development board.")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch fixes the tristate and pullup configuration for UART 1 to 3
on the Tamonten SOM.
Signed-off-by: Andreas Obergschwandtner <andreas.obergschwandtner@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for Nexus 7. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for A500. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The verbose variant of the atmel,wakeup-method value was lost when patch
that added the property was merged because it conflicted with other patch,
re-add it for consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The configuration of USB VBUS regulators was borrowed from downstream
kernel, which is incorrect because the corresponding GPIOs are connected
to PROX_EN (A501 3G model) and LED_EN pins in accordance to the board
schematics. USB works fine with both GPIOs being disabled, so remove the
bogus USB VBUS regulators. The USB VBUS of USB3 is supplied from the fixed
5v system regulator and device-mode USB1 doesn't have VBUS switches.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor and enable it in pinmux,
for completeness.
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the on-chip SoC thermal sensor to Tegra30 device-trees. Now CPU
temperature reporting and thermal throttling is available on all Tegra30
devices universally.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add initial version of device tree for Facebook Fuji (AST2600) BMC.
Fuji is Facebook's next generation switch platform with an AST2600 BMC
integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-7-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Facebook Elbert (AST2600) BMC.
Elbert is Facebook's next generation switch platform with an AST2600 BMC
integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-6-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Facebook Cloudripper (AST2600) BMC.
Cloudripper is Facebook's next generation switch platform with an AST2600
BMC integrated for health monitoring purpose.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-5-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This common descirption is included by all Facebook AST2600 Network BMC
platforms to minimize duplicated device entries across Facebook Network
BMC device trees.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-4-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Simplify wedge400 flash layout by using the common layout defined in
"facebook-bmc-flash-layout-128.dtsi".
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-3-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is the layout used by Facebook BMC systems. It describes the fixed
flash layout of a 128MB mtd device.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210805222818.8391-2-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
