Commit Graph

16 Commits

Author SHA1 Message Date
Vinod Koul
d7a49c8d2c clk: qcom: gcc-msm8994: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-3-vkoul@kernel.org
2021-12-20 23:14:50 -06:00
Konrad Dybcio
eb2d505834 clk: qcom: gcc-msm8994: Use ARRAY_SIZE() for num_parents
Don't rely on the programmer to enter the name of array elements, since the
computer can compute it with much less chance of making a mistake.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-9-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
c09b80238c clk: qcom: gcc-msm8994: Add proper msm8992 support
MSM8992 is a cut-down version of MSM8994, featuring
largely the same hardware.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-8-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
a888dc4cae clk: qcom: gcc-msm8994: Add modem reset
This will be required to support the modem.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-7-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
35bb1e6ece clk: qcom: gcc-msm8994: Remove the inexistent GDSC_PCIE
This GDSC is not present on msm8994.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-6-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
b8f415c6ae clk: qcom: gcc-msm8994: Add missing clocks
This should be the last "add missing clocks" commit, as to
my knowledge there are no more clocks registered within gcc.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-5-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
74a33fac3a clk: qcom: gcc-msm8994: Add missing NoC clocks
Add necessary NoC clocks to provide frequency sources for
relevant branch clocks.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-4-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
80863521ed clk: qcom: gcc-msm8994: Fix up SPI QUP clocks
Fix up SPI QUP freq tables to account for the fact
that not every QUP can run at the same set of frequencies.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-3-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
0519d1d0bf clk: qcom: gcc-msm8994: Modernize the driver
Switch to the newer-style parent_data and remove the hardcoded
xo clock.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-2-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
8c18b41b39 clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs
This change adds GDSCs, resets and most of the missing
clocks to the msm8994 GCC driver. The remaining ones
are of local_vote_clk and gate_clk type, which are not
yet supported upstream. Also reorder them to match the
original downstream driver.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20201005145855.149206-1-konradybcio@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-10-13 18:04:36 -07:00
Thomas Gleixner
97fb5e8d9b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Taniya Das
da172d2b6b clk: qcom: Move frequency table macro to common file
Frequency table macro is used by multiple clock drivers, move frequency
table macro to common header file.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-06 16:45:51 -07:00
Abhishek Sahu
28d3f06e56 clk: qcom: support for alpha pll properties
Alpha PLL is a generic name used for QCOM PLLs which uses L and
Alpha values for configuring the integer and fractional part.
QCOM SoCs use different types of Alpha PLLs for which basic
software configuration part is common with following differences.

  1. All these PLLs have the same basic registers like
     PLL_MODE, L_VAL, ALPHA_VAL but some of the register offsets are
     different between PLLs types.

  2. The dynamic programming sequence is different in some
     of the Alpha PLLs

  3. Some of the PLLs don’t have 64 bit config control, 64 bit
     user control, VCO configuration, etc.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-13 13:45:30 -08:00
Jeremy McNicoll
eaff16bc49 clk: qcom: SDHCI enablement on Nexus 5X / 6P
Add missing clock branch to enable onboard storage
for msm899(2/4).

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-27 13:33:05 -08:00
Rajendra Nayak
5f5001a978 clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops
The sdcc driver for msm8996/msm8916/msm8974/msm8994 and apq8084
expects a clk_set_rate() on the sdcc rcg clk to set
a floor value of supported clk rate closest to the requested
rate, by looking up the frequency table.
So move all the sdcc rcgs on all these platforms to use the
newly introduced clk_rcg2_floor_ops

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-23 11:00:06 -08:00
Bastian Köcher
aec89f78cf clk: qcom: Add support for msm8994 global clock controller
The clock definition was ported from the Google 3.10 kernel tree to
work with the latest kernel.

Signed-off-by: Bastian Köcher <mail@kchr.de>
[jeremymc@redhat.com: created new commit of just dt-bindings]
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Tidy up commit text and Kconfig help]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 15:45:42 -08:00