The wake-up interrupt bit is available on omap3/4/5 processors
unlike what we claim. Without fixing it we cannot use it on
omap3 and the system configured for wake-up events will just
hang on wake-up.
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
development cycle:
- Various cleanups like remove non-existant hardware from
the Snowball device tree, prefix all files with "ste-*"
- External regulators
- Documentation updates
- Delete some minor dangling platform data
- Pin control settings for U8540 through DT
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Merge tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
From: Linus Walleij:
Ux500 device tree enablement base for the v3.12
development cycle:
- Various cleanups like remove non-existant hardware from
the Snowball device tree, prefix all files with "ste-*"
- External regulators
- Documentation updates
- Delete some minor dangling platform data
- Pin control settings for U8540 through DT
* tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (22 commits)
ARM: ux500: fix devicetree builds
ARM: ux500: Remove u9540.dts as it's been replaced
ARM: ux500: Apply a ste-* prefix onto dbx5x0.dtsi
ARM: ux500: Apply a ste-* prefix onto stuib.dtsi
ARM: ux500: Apply a ste-* prefix onto hrefv60plus.dts
ARM: ux500: Apply a ste-* prefix onto hrefprev60.dts Signed-off-by: Lee Jones <lee.jones@linaro.org>
ARM: ux500: Apply a ste-* prefix onto href.dtsi
ARM: ux500: Apply a ste-* prefix onto ccu9540.dts
ARM: ux500: Apply a ste-* prefix onto ccu8540.dts
ARM: ux500: Apply a ste-* prefix onto snowball.dts
ARM: ux500: Remove Snowball DTS entry for ROHM BH1780GLI ambient light sensor
ARM: ux500: Remove Snowball DTS entry for TPS61052 chip
ARM: ux500: Remove Snowball DTS entry for National Semiconductor LP5521 LED chip
ARM: ux500: Remove Toshiba TC35892 I/O Expander's DT entry from Snowball's DTS
ARM: u8540: DT: Set pinctrl mapping to i2c0,1,2,4 & 5
ARM: u8540: Add Pinctrl Device Tree settings for uart0, uart2
ARM: ux500: Stop passing MMC's platform data for Device Tree boots
Documentation: Update binding for Nomadik and DBx5x based platforms
ARM: ux500: Supply external regulator names for Snowball's DT
ARM: ux500: Provide a supply name for the AB8500 AUX regulators to use
...
This patch adds pinctrl device tree settings for uart0 and uart2
for ccu8540 board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using #include <include/...> is a bit odd. It happens to work because the DTC
flags include -Iarch/FOO/boot/dts as well as arch/FOO/boot/dts/include and
arch/FOO/boot/dts/include/dt-bindings is a symlink to include/dt-bindings.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- A large slew of improvements of the Genric pin configuration
support, and deployment in four different platforms:
Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD,
get device tree parsing and debugfs support into shape.
- We also have device tree support with generic naming conventions
for the generic pin configuration.
- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.
- New drivers for Rockchip, TZ1090, and TZ1090 PDC.
- Two pin control states related to power management are now
handled in the device core: "sleep" and "idle", removing a lot
of boilerplate code in drivers. We do not yet know if this is
the final word for pin PM, but it already make things a lot
easier to handle.
- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.
- Make the sunxi (AllWinner) driver handle external interrupts.
- Make it possible for pinctrl-single to handle the case where
several pins are managed by a single register, and augment it to
handle sleep modes.
- Cleanups and improvements for the abx500 drivers.
- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.
- PMU muxing for the Dove pinctrl driver.
- Finalization and support for VF610 in the i.MX6 pinctrl driver.
- Smoothen out various Exynos rough edges.
- Generic cleanups of various kinds.
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Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control changes from Linus Walleij:
- A large slew of improvements of the Genric pin configuration support,
and deployment in four different platforms: Rockchip, Super-H PFC,
ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing
and debugfs support into shape.
- We also have device tree support with generic naming conventions for
the generic pin configuration.
- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.
- New drivers for Rockchip, TZ1090, and TZ1090 PDC.
- Two pin control states related to power management are now handled in
the device core: "sleep" and "idle", removing a lot of boilerplate
code in drivers. We do not yet know if this is the final word for
pin PM, but it already make things a lot easier to handle.
- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.
- Make the sunxi (AllWinner) driver handle external interrupts.
- Make it possible for pinctrl-single to handle the case where several
pins are managed by a single register, and augment it to handle sleep
modes.
- Cleanups and improvements for the abx500 drivers.
- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.
- PMU muxing for the Dove pinctrl driver.
- Finalization and support for VF610 in the i.MX6 pinctrl driver.
- Smoothen out various Exynos rough edges.
- Generic cleanups of various kinds.
* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
pinctrl: remove bindings for pinconf options needing more thought
pinctrl: remove slew-rate parameter from tz1090
pinctrl: set unit for debounce time pinconfig to usec
pinctrl: more clarifications for generic pull configs
pinctrl: rip out the direct pinconf API
pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
pinctrl-tz1090: add TZ1090 pinctrl driver
pinctrl: samsung: Staticize drvdata_list
pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
pinctrl: abx500: rework error path
pinctrl: abx500: suppress hardcoded value
pinctrl: abx500: factorize code
pinctrl: abx500: fix abx500_gpio_get()
pinctrl: abx500: fix abx500_pin_config_set()
pinctrl: abx500: Add device tree support
sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
pinctrl: add Intel BayTrail GPIO/pinctrl support
pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
pinctrl: Staticize local symbols
...
Conflicts:
drivers/net/ethernet/ti/davinci_mdio.c
drivers/pinctrl/Makefile
Pinctrl headers were not protected with #ifndef.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The pinctrl IP inside the AM33XX family differs slightly from
what is found on OMAP2+. Define a specific header to take account
of the differences.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Most of the constants are taken from arch/arm/mach-omap2/mux.h.
Define some others for the PIN_OUTPUT_* flavours.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.
Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
