-----------
- Add a dummy L2 cache's write_sec callback as in non secure mode execution,
we can't get access to L2 cache secure registers
- Cosmetics change, in case of dump_stack, update the hardware name with a
more generic for the STi SoCs family
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Merge tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/soc
Merge "STi SoC changes for v4.8" from Patrice Chotard:
- Add a dummy L2 cache's write_sec callback as in non secure mode execution,
we can't get access to L2 cache secure registers
- Cosmetics change, in case of dump_stack, update the hardware name with a
more generic for the STi SoCs family
* tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: sti: Implement dummy L2 cache's write_sec
ARM: STi: Update machine _namestr to be more generic.
commit 6bce5efd44 ("ARM: davinci: remove unused davinci-i2s pdata")
removed all instances of davinci-i2s pdata. However, on DM365 EVM,
the same platform data is passed to the voicecodec present on that
device.
This causes build breakage when voicecodec support is enabled:
arch/arm/mach-davinci/board-dm365-evm.c:764:17: error: 'dm365_evm_snd_data' undeclared (first use in this function)
voicecodec driver does not use the platform data as well, and
it is safe to remove it.
Fixes: 6bce5efd44 ("ARM: davinci: remove unused davinci-i2s pdata")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch implements the write_sec callback that handle PL310
secure registers writes.
This callback is just a stub for now, to avoid system crash.
Later, it could handle SMC calls so that TZ handles the needed writes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This string is used by dump_stack and as we now support
more SoC's than just STiH415/6 it is misleading to have
the current string in the stack trace.
This patch updates it to be more generic for the STi
family of SoCs.
So instead of looking like this
[ 271.672555] Hardware name: STiH415/416 SoC with Flattened Device Tree
[ 271.678998] [<c0310490>] (unwind_backtrace) from [<c030bb54>] (show_stack+0x10/0x14)
[ 271.686746] [<c030bb54>] (show_stack) from [<c058bc4c>] (dump_stack+0x98/0xac)
[snip]
it now looks like this:
[ 2.669879] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.6.0-rc3-00026-g38a1ce6-dirty #76
[ 2.677973] Hardware name: STi SoC with Flattened Device Tree
[ 2.683723] [<c0310490>] (unwind_backtrace) from [<c030bb54>] (show_stack+0x10/0x14)
[ 2.691472] [<c030bb54>] (show_stack) from [<c058bc0c>] (dump_stack+0x98/0xac)
[snip]
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
The AmLogic clock controller code is used by both arm and arm64
architectures. Explicitly select the core code for all Meson (32-bit
arm) builds, and also select the Meson8b driver when that machine is
built.
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Ask firmware to put RAM in self-refresh mode and power system down.
echo mem > /sys/power/state
See Documentation/power/states.txt
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains MAINTAINERS file changes for Broadcom entries:
- Rafal updates the BCM5301x entry to include the internal Broadcom
mailing-list so it's easy for engineers there to keep track of patches
- Jon updates the NSP regexp, updates the NS2, BCM63xx and Broadcom Mobile SoCs
entry
- Florian changes L to M in all Broadcom ARM/ARM64 entries per feeedback
* tag 'arm-soc/for-4.8/maintainers-part2' of http://github.com/Broadcom/stblinux:
MAINTAINERS: Update BCM281XX/BCM11XXX/BCM216XX entry
MAINTAINERS: Update BCM63XX entry
MAINTAINERS: Add NS2 entry
MAINTAINERS: Fix nsp false-positives
MAINTAINERS: Change L to M for Broadcom ARM/ARM64 SoC entries
MAINTAINERS: Update entry for BCM5301X ARM
Merge "the second part of the Broadcom ARM-based SoC changes" from Florian Fainelli:
- Florian updates the DEBUG_UART_BCM5301X entry to cover both NS and NSP SoCs
since they both have the same location
* tag 'arm-soc/for-4.8/soc-part2' of http://github.com/Broadcom/stblinux:
ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs
- Fix a make randconfig build error for recent SMP kexec changes
- A series of clock related fixes to prepare things for moving
device clkctrl register handling to drivers/clk
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Merge tag 'omap-for-v4.8/soc-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "Few more omap SoC changes for v4.8 merge window" from Tony Lindgren:
- Fix a make randconfig build error for recent SMP kexec changes
- A series of clock related fixes to prepare things for moving
device clkctrl register handling to drivers/clk
* tag 'omap-for-v4.8/soc-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: AM33xx: fix module_wait_ready without clkctrl register
ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIs
ARM: OMAP2+: timer: change order of hwmod data handling
ARM: OMAP2+: hwmod: fetch main_clk based on hwmod name
ARM: OMAP2+: omap_device: create clock alias purely from DT data
ARM: OMAP2+: Fix build with CONFIG_SMP and CONFIG_PM is not set
The original patch was to add compatible string for Hi3519 soc
and do some cleanup.
Since the generic machine entry could meet most of the cases,
so I did a further cleanup to reuse it and just keep one machine
entry that needs map_io here.
Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Add DT support to the APMU driver and prioritise DT APMU support
* Obtain extal frequency from DT
* Add support for r8a7792
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Merge tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.8
* Add DT support to the APMU driver and prioritise DT APMU support
* Obtain extal frequency from DT
* Add support for r8a7792
* tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Prioritize DT APMU support
ARM: shmobile: r8a7790: Prioritize DT APMU support
ARM: shmobile: smp: Add function to prioritize DT SMP
ARM: shmobile: apmu: Add APMU DT support via Enable method
ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions
ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H
ARM: shmobile: rcar-gen2: Obtain extal frequency from DT
ARM: shmobile: r8a7792: basic SoC support
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas
soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions
soc: renesas: rcar-sysc: Document r8a7796 support
Signed-off-by: Olof Johansson <olof@lixom.net>
Building with CONFIG_HOTPLUG_CPU disabled fails for mach-tango:
include/linux/stddef.h:7:14: error: excess elements in struct initializer [-Werror]
#define NULL ((void *)0)
arch/arm/mach-tango/platsmp.c:48:15: note: in expansion of macro 'tango_cpu_kill'
.cpu_kill = tango_cpu_kill,
the problem as that the .cpu_kill and .cpu_die struct members are
unavailable and we must not try to assign them in this configuration.
Hiding the two (as all other platforms do too) lets us get rid of
the #else clause as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
There are many clock, pinctl, and misc others that should be covered
under the BCM281XX/BCM11XXX/BCM216XX ARM listing. Change the entry to
use regex's that should cover all the files.
Also, remove the bcm_defconfig entry (as the file is being removed), and
arch/arm64/boot/dts/broadcom reference (as that is not accurate for this
group of maintainers and all the device trees under it should now be
covered by other maintainer entries).
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There are more files being supported by the BCM63XX than simply
"arch/arm/mach-bcm/bcm63xx.c" and "arch/arm/include/debug/bcm63xx.S".
Add a regex of "bcm63xx" to catch all the other files that are out
there.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add NS2 to the Broadcom iProc Subsystem maintainers entry. Since most
of the NS2 entries are already covered via the ns* already present
there, all that is currently needed is to reference the device tree
files.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The 'nsp' regex pattern in the "BROADCOM IPROC ARM ARCHITECTURE" section
is getting unintended hits due to the common frequence of these letters
appearing in sequence. To change the regex expression to be more
specific to the files we care about, add a "bcm" prefix to the regex and
add file entries for those that do not naturally match this new regex.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
bcm-kernel-feedback-list@broadcom.com is a Broadcom internal
mailing-list for which no external subscribers are allowed for now, so
update the different entries from L to M to reflect that and order
entries from M to L in order of preference.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Olof Johansson <olof@lixom.net>
Suggested-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Northstar Plus SoCs (ARCH_BCM_NSP) have the exact same UART location and
properties like the register shift of 0, so make it usable.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* commit '5c34a4e89c743339f78cafb2f2a826a010f0746a':
ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
ARM: uniphier: drop code for old DT binding
These cause a harmless conflict with the clps711x multiplatform
support, and it's easy to resolve.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Any CLPS711X-based board can be replaced with devicetree equivalent.
Remove the board files.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds basic support to run Cirrus Logic ARMv4T CPUs
with device-tree support.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Last CLPS711X CPU register is PLLR has 0xa5a8 address, so we can reduce
the map to 48k and align the end of the static at VMALLOC_START.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series of DSS platform_data fixes to prepare for DSS driver changes
- Add tblck clck aliases for PWM
- A series of trivial spelling corrections
- Remove bogus eQEP, ePWM and eCAP hwmod entries
- A series of McBSP sidetone fixes
- Remove QSPI and DSS addresses from hwmod, these come from dts
- Fix RSTST register offset for pruss
- Make ti81xx_rtc_hwmod static
- Remove wrongly defined RSTST offset for PER Domain, note
that the subject for this one wrongly has "dts" in the
subject
- Add support for omap5 and dra7 workaround for 801819
- A series of patches to make kexec work for SMP omaps
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Merge tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps for v4.8 merge window:
- A series of DSS platform_data fixes to prepare for DSS driver changes
- Add tblck clck aliases for PWM
- A series of trivial spelling corrections
- Remove bogus eQEP, ePWM and eCAP hwmod entries
- A series of McBSP sidetone fixes
- Remove QSPI and DSS addresses from hwmod, these come from dts
- Fix RSTST register offset for pruss
- Make ti81xx_rtc_hwmod static
- Remove wrongly defined RSTST offset for PER Domain, note
that the subject for this one wrongly has "dts" in the
subject
- Add support for omap5 and dra7 workaround for 801819
- A series of patches to make kexec work for SMP omaps
* tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (30 commits)
ARM: OMAP2+: Fix build if CONFIG_SMP is not set
ARM: OMAP4+: Allow kexec on SMP variants
ARM: OMAP4+: Reset CPU1 properly for kexec
ARM: OMAP4+: Prevent CPU1 related hang with kexec
ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec
ARM: dts: am43xx: Remove wrongly defined RSTST offset for PER Domain
ARM: OMAP: make ti81xx_rtc_hwmod static
ARM: AM43XX: hwmod: Fix RSTST register offset for pruss
ARM: DRA7: hwmod: remove DSS addresses from hwmod
ARM: DRA7: hwmod: Remove QSPI address space entry from hwmod
ARM: OMAP2+: McBSP: Remove the old iclk allow/deny idle code
ASoC: omap-mcbsp: sidetone: Use the new callback for iclk handling
ASoC: omap-mcbsp: Rename omap_mcbsp_sysfs_remove() to omap_mcbsp_cleanup()
ARM: OMAP3: pdata-quirks: Add support for McBSP2/3 sidetone handling
ARM: OMAP3: McBSP: New callback for McBSP2/3 ICLK idle configuration
ARM: OMAP3: hwmod data: Fix McBSP2/3 sidetone data
ARM: AM335x/AM437x: hwmod: Remove eQEP, ePWM and eCAP hwmod entries
ARM: OMAP2+: Fix typo in sdrc.h
ARM: OMAP2+: Fix typo in omap_device.c
ARM: OMAP2+: Fix typo in omap4-common.c
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Since the SP804 timer changes will not been merged upstream, switch the
default OX810SE config to the OXNAS RPS Timer driver configuration.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- A patch series including both cpuidle and FEC driver changes to
disable deeper idle states when FEC is active while board level
workaround for ERR006687 is not available
- A number patches to fix sparse warnings and spell errors
- A fix for TZIC FIQ translation from VIRQ to HWIRQ
- Support compatible of i.MX7 Solo SoC which has a subset of i.MX7 Dual
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Merge tag 'imx-soc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
The i.MX SoC changes for 4.8:
- A patch series including both cpuidle and FEC driver changes to
disable deeper idle states when FEC is active while board level
workaround for ERR006687 is not available
- A number patches to fix sparse warnings and spell errors
- A fix for TZIC FIQ translation from VIRQ to HWIRQ
- Support compatible of i.MX7 Solo SoC which has a subset of i.MX7 Dual
* tag 'imx-soc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: add support for i.MX 7Solo
ARM: i.MX: Disable supervisor protect for i.MX51
ARM: imx6: fix missing <soc/imx/cpuidle.h> in cpuidle-imx6q.c
ARM: i.MX: Fix FIQ interrupt handling for TZIC
ARM: imx6: fix static declaration in include/soc/imx/cpuidle.h
ARM: imx6q: export cpuidle functions needed by fec driver
ARM: imx: fix missing include of common.h
ARM: imx: fix missing includes
ARM: imx6: disable deeper idle states when FEC is active w/o HW workaround
ARM: mach-imx6q: fix spelling mistake in error message
Signed-off-by: Olof Johansson <olof@lixom.net>
Use regex pattern to match tango-specific files.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
cpu_die() and cpu_kill() are implemented in firmware.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add myself as I contribute to it. Include Broadcom's feedback ML as
suggested by Florian. Finally modify file rule to match
bcm5301x-nand-cs0-bch8.dtsi.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
[florian: change L to M as suggested]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Since the initial support of mach-uniphier, this has always been
just empty.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add MSM9615 support
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Merge tag 'qcom-soc-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc
Qualcomm ARM Based SoC Updates for v4.8
* Add MSM9615 support
* tag 'qcom-soc-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: qcom: Add support for MDM9615
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add final documentation for sama5d2
- Fix some compilation warnings
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Merge tag 'at91-ab-4.8-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/soc
SoC changes for 4.8 #2:
- Add final documentation for sama5d2
- Fix some compilation warnings
* tag 'at91-ab-4.8-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: fix warnings in pm.c
ARM: at91: Documentation: update the sama5d2 entry
Signed-off-by: Olof Johansson <olof@lixom.net>
If the module has no clkctrl register defined, module_wait_ready should
not try to access this. This can potentially cause an illegal register
access, and result in bad idle reporting also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The previous implementation was racy in many locations, where the current
status of the clockdomain was read out, some operations were executed,
and the previous status info was used afterwards to decide next state
for the clockdomain. Instead, fix the implementation of the allow_idle /
deny_idle APIs to properly have usecounting support. This allows clean
handling internally within the clockdomain core, and simplifies the
usage also within hwmod.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the introduction of hwmod module clocks, the name of the hwmod
main clk may not be available before hwmod setup, as hwmod setup
may lookup the main clock dynamically based on the hwmod name.
Thus, change the order of hwmod setup and main clock handling for
the timer code, to make sure the main clock is going to be
available.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the transition to hwmod module clocks, all hwmods will have
their main clocks named <hwmod_name>_mod_ck. Use this info to
fetch main_clk, and use it if found.
Also, if a main_clk is found based on the hwmod name, disable
the direct PRCM modulemode access from hwmod.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This avoids the need to add most of the clock aliases under
drivers/clk/ti/clk-xyz.c files.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
I found one more make randconfig build error with the recent
SMP kexec changes. We need the mpuss now always available early.
Fixes: 0573b957fc ("ARM: OMAP4+: Prevent CPU1 related hang
with kexec")
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adjust the r8a7791 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adjust the r8a7790 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a function to check if other DT based method is available, and
if so return false to not hook up smp_ops from the machine vector.
This results in that DT-based SMP support has priority over older
C-based smp_ops code, and in case DT-based SMP support code does not
exist in the DTB then the old smp_ops code will still work as-is.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to prevent DTB breakage for older
SoCs that do not rely on the enable-method for SMP support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
[geert: Fix CONFIG_SMP=n build]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
shmobile_smp_apmu_prepare_cpus() is used only if CONFIG_SMP=y.
Hence move the #ifdef to cover shmobile_smp_apmu_prepare_cpus() and all
functions only called by it (apmu_init_cpu() and apmu_parse_cfg()).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to the datasheet, the frequency of the ARM architecture timer
on R-Car V2H depends on the frequency of the ZS clock, just like on
R-Car E2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On some R-Car Gen2 SoCs, the frequency of the ARM architecture timer
depends on the frequency of the external clock crystal. Currently the
latter is determined indirectly from the state of the mode pins, which
is a relic predating DT.
Obtain the external clock crystal frequency from DT instead, removing
the dependency on the mode pins.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
