I notice some mistakes in the SoC DTSI; wrong interrupts properties
of timer nodes, mismatch between the node name and the compatible
for sdctrl block. Given those problems fixed, the common parts
among SoCs are less than I had first expected. The more and more
property overrides are making the SoC DTSI unreadable.
Stretch out the SoC DTSI files and fix the following:
- Fix the 3rd cell of the interrupts property of the timer nodes
for Pro4, Pro5, PXs2
- Fix the node name mioctrl to sdctrl for Pro5, PXs2
- Fix the second region of l2 node for PXs2
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add a CPU clock to every CPU node and a CPU OPP table to use the
generic cpufreq driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
The UniPhier reset controller driver has been merged. Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer. Recent documents and other
projects are not using PH1- prefixes any more.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>