Commit Graph

782 Commits

Author SHA1 Message Date
Chris Wilson
f787a5f59e drm/i915: Only hold a process-local lock whilst throttling.
Avoid cause latencies in other clients by not taking the global struct
mutex and moving the per-client request manipulation a local per-client
mutex. For example, this allows a compositor to schedule a page-flip
(through X) whilst an OpenGL application is monopolising the GPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-24 21:03:00 +01:00
Chris Wilson
ab6f8e3250 drm/i915/ringbuffer: whitespace cleanup
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:06 +01:00
Daniel Vetter
a9db5c8fdd drm/i915: drop alignment ringbuffer parameter
Always PAGE_SIZE and only complicates the code.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:05 +01:00
Daniel Vetter
fa7ed4d206 drm/i915: don't explicitly initialize ringbuffer members to zero
The compiler happily does that for us.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:05 +01:00
Daniel Vetter
7f2ab69913 drm/i915: use new macros to access the ring ctl register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:04 +01:00
Daniel Vetter
570ef60859 drm/i915: use new macros to access the ring head register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:03 +01:00
Daniel Vetter
6c0e1c556e drm/i915: use new macros to access the ring start register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:02 +01:00
Daniel Vetter
870e86ddc2 drm/i915: use new macros to access the ring tail register
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:02 +01:00
Daniel Vetter
333e9fe94d drm/i915: add relative ring register macros
Documentation explicitly mentions that the ring registers are
designed to have the same offsets relative to a base registers.

Use this to fight the code beaurocratic in intel_ringbuffer.c.

No code changes in this patch, just the new definitions.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:20:01 +01:00
Chris Wilson
e070868ef2 drm/i915/ringbuffer: Mark the initialisation structs as constant.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:58 +01:00
Xiang, Haihao
881f47b647 drm/i915: add a new BSD ring buffer for Sandybridge
This ring buffer is used for video decoding/encoding on Sandybridge.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:57 +01:00
Chris Wilson
a3f07cd53e drm/i915/ringbuffer: Implement advance using set_tail
As noted by Zhenyu, we can now simply replace the existing advance hook
by calling the new set_tail function pointer directly.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:57 +01:00
Xiang, Haihao
d46eefa297 drm/i915: add set_tail hook in struct intel_ring_buffer
This is prepared for video codec ring buffer on Sandybridge. It is
needed to read/write more than one register to move the tail pointer of
the video codec ring on Sandybridge.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:56 +01:00
Xiang, Haihao
5c1143bbec drm/i915: do not export the instances of struct intel_ring_buffer
Introduce intel_init_render_ring_buffer(), intel_init_bsd_ring_buffer
for ring initialization.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:55 +01:00
Chris Wilson
9220434a87 drm/i915: Only emit a flush request on the active ring.
When flushing the GPU domains,we emit a flush on *both* rings, even
though they share a unified cache. Only emit the flush on the currently
active ring.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:51 +01:00
Chris Wilson
a6c45cf013 drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
Avoid confusion between i965g meaning broadwater and the gen4+ chipset
families.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 11:19:45 +01:00
Chris Wilson
2b6efaa476 drm/i915: Remove unused intel_ringbuffer->ring_flag
This can always be re-added should somebody find a use...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-14 21:13:00 +01:00
Daniel Vetter
8a1a49f954 drm/i915: move flushing list processing to i915_retire_commands
... instead of threading flush_domains through the execbuf code to
i915_add_request.

With this change 2 small cleanups are possible (likewise the majority
of the patch):

- The flush_domains parameter of i915_add_request is always 0. Drop it
  and the corresponding logic.
- Ditto for the seqno param of i915_gem_process_flushing_list.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08 10:23:36 +01:00
Zhenyu Wang
a69ffdbfcb drm/i915: Enable MI_FLUSH on Sandybridge
MI_FLUSH is being deprecated, but still available on Sandybridge.
Make sure it's enabled as userspace still uses MI_FLUSH.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-07 11:16:44 +01:00
Zou Nan hai
1cafd34731 drm/i915 invalidate indirect state pointers at end of ring exec
This is required by the spec, and without this some 3D programs will
hang after resume from RC6 we enable that.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-09 11:28:03 -07:00
Chris Wilson
dd785e35cb drm/i915/ringbuffer: Set ring->gem_buffer = NULL on init unwind
The cleanup path for early abort failed to nullify the gem_buffer. The
likely consequence of this is zero, since a failure here should mean
aborting the module load.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-09 11:24:35 -07:00
Chris Wilson
6f392d5486 drm/i915: Use a common seqno for all rings.
This will be used by the eviction logic to maintain fairness between the
rings.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-09 11:24:32 -07:00
Chris Wilson
e898cd221d drm/i915: Inline ringbuffer_emit()
As the function has been reduced to a store plus increment, the body is
now smaller than the call so inline it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-09 11:24:31 -07:00
Chris Wilson
d97ed33963 drm/i915: Move ringbuffer accounting to begin/advance.
As we check that the ringbuffer will not wrap upon emission, we do not
need to check that incrementing the tail wrapped every time. However, we
do upon advancing just in case the tail is now pointing at the very end
of the ring.

Likewise we can account for the space used during emission in begin()
and avoid decrementing it for every emit.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-09 11:24:31 -07:00
Chris Wilson
1741dd4aa7 drm/i915: Unroll wrapping of the ringbuffer.
The tail is quadword aligned, so we can add two MI_NOOP as a time.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-09 11:24:31 -07:00
Chris Wilson
43ed340ad9 drm/i915: Account for space on the ring buffer consumed whilst wrapping.
If we fill the tail of the physical ring buffer with NOOP when wrapping,
we need to account for the reduction in available space.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-07-01 15:28:08 -07:00
Zou Nan hai
be26a10bd1 drm/i915: Fix incorrect intel_ring_begin size in BSD ringbuffer.
The ring_begin API was taking a number of bytes, while all of our
other begin/end macros take number of dwords.  Change the API over to
dwords to prevent future bugs.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-06-14 18:26:25 -07:00
Zhenyu Wang
ca76482e0f drm/i915: Fix PIPE_CONTROL command on Sandybridge
Sandybridge(Gen6) has new format for PIPE_CONTROL command,
the flush and post-op control are in dword 1 now. This
changes command length field for difference between Ironlake
and Sandybridge.

I tried to test this with noop request and issue PIPE_CONTROL
command for each sequence and track notify interrupts, which
seems work fine. Hopefully we don't need workaround like on
Ironlake for Sandybridge.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-28 11:11:23 -07:00
Zou Nan hai
d1b851fc0d drm/i915: implement BSD ring buffer V2
The BSD (bit stream decoder) ring is used for accessing the BSD engine
which decodes video bitstream for H.264 and VC1 on G45+.  It is
asynchronous with the render ring and has access to separate parts of
the GPU from it, though the render cache is coherent between the two.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-26 13:46:58 -07:00
Zou Nan hai
8187a2b70e drm/i915: introduce intel_ring_buffer structure (V2)
Introduces a more complete intel_ring_buffer structure with callbacks
for setup and management of a particular ringbuffer, and converts the
render ring buffer consumers to use it.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com>
[anholt: Fixed up whitespace fail and rebased against prep patches]
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-26 13:24:49 -07:00
Eric Anholt
d3301d86b4 drm/i915: Rename dev_priv->ring to dev_priv->render_ring.
With the advent of the BSD ring, be clear about which ring this is.
The docs are pretty consistent with calling this the Render engine at
this point.
2010-05-26 12:36:00 -07:00
Eric Anholt
62fdfeaf8b drm/i915: Move ringbuffer-related code to intel_ringbuffer.c.
This is preparation for supporting multiple ringbuffers on Ironlake.
The non-copy-and-paste changes are:
- de-staticing functions
- I915_GEM_GPU_DOMAINS moving to i915_drv.h to be used by both files.
- i915_gem_add_request had only half its implementation
  copy-and-pasted out of the middle of it.
2010-05-26 12:36:00 -07:00