Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest
of the OMAP2+ SoCs do in mach-omap2/cpu.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
The OMAP3505/AM3505 appears to be based on the same silicon as the
OMAP3517/AM3517, with some features disabled via eFuse bits. Follow
the same practice as OMAP3430 and identify these devices internally as
part of the OMAP3517/AM3517 family.
The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon
as the OMAP3430, with some features disabled via eFuse bits. Identify
these devices internally as part of the OMAP3430 family.
Remove the old OMAP35XX_CLASS, which actually covered two very different
chip families. The OMAP3503/3515/3525/3530 chips will now be covered by
OMAP343X_CLASS, since the silicon appears to be identical. For the
OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS.
Thanks to Tony Lindgren <tony@atomide.com> for some help with the second
revision of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
Macros for identifying the max frequency supported by various
OMAP4 variants - Expanding along the lines of OMAP3's feature
handling.
[nm@ti.com: minor fixes for checks that should only for 443x|446x]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for detecting the latest in the OMAP4 family: OMAP4460
Among other changes, the new chip also can support 1.5GHz A9s,
1080p stereoscopic 3D and 12 MP stereo (dual camera). In addition,
we have changes to OPPs supported, clock tree etc, hence having a
chip detection is required.
For more details on OMAP4460, see Highlights:
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?contentId=53243&navigationId=12843&templateId=6123
Public TRM is available here as usual:
http://focus.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12667
[nm@ti.com: cleanups and introduction of ramp system]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated to not use CHIP_IS_OMAP44XX]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adapts the register offsets used to read the CPU DIE ID registers
when run on 44XX so they match what is in the OMAP4430 Reference Manual
page 269
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Allow OMAP4 ES2.1 and ES2.2 revisions to be recognized in the
omap4_check_revision() function.
Mainly, ES2.1 has fixes that allow LPDDR to be used at 100% OPP (400MHz).
ES2.2 additionally has a couple of power management fixes (to reduce
leakage), an I2C1 SDA line state fix, and a floating point write
corruption fix (cortex erratum).
Even though the current mainline support doesn't need to distinguish
between ES2.X versions, it's still useful to know the correct silicon
rev when issues are reported. Moreover, these id checks can be used by
power management code that selects suitable OPPs considering the
memory speed limitation on ES2.0.
For details about the silicon errata on OMAP4430, refer
http://focus.ti.com/pdfs/wtbu/SWPZ009A_OMAP4430_Errata_Public_vA.pdf
Signed-off-by: Nishant Kamat <nskamat@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch updates the common machine specific source files with support for
TI816X.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap. This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.
In response, move the SCM headers into mach-omap2/.
As part of this, remove the direct SCM access from the OMAP UDC
driver. It was clearly broken. The UDC code needs an indepth review for
use on OMAP2+ chips.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
The existing definitions for cpu revision used
upper nibble in the bits[15:08]. With OMAP3630,
definitions use lower nibble.
This patch unifies the definitions to start
at lower nibble.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch has multiple fixes together. To ensure that git bisect work across
commits, all changes are clubbed together
1. Move the common control base address to control core
2. Remove the manually coeded defines and use the ones from headers.
3. Fix the the status register define in id.c for OMAP4
4. Fix all the register define in hsmmc.c
5. Use the control pad accessor API for omap4 hsmmc register accesses
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch updates the id.c and cpu.h files to support
omap4 ES2.0 silicon detection. Few initial omap4 es2 samples
IDCODE is same as es1. So the patch uses ARM cpuid register to
detect the ES version for such samples
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Wrong placement of break causes all revisions of 3630 to be
detected as 3630 es1.2, we need to break main loop if we have
an identified chip, default falls through as in the rest of the
switches in this function.
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Manjunath K <manjugk@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>
Cc: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add revision detection for ES1.1 and ES1.2. Set default
revision as ES1.2.
Add CHIP_GE_OMAP3630ES1_1 to detect revisions 1.1 and later.
This is needed for at least one feature that is broken in
3630ES1.0 but exists on older (3430 ES3.1) and newer revisions.
Additionally, update some of the CHIP_GE_* macros to use other
macros for ease of maintenance.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Manjunatha GK <manjugk@ti.com>
[tony@atomide.com: update to remove fallthrough handling]
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM3505/3517 doesn't have IO wakeup capability, so we do not need to set
the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register
PM_WKEN_WKUP when the system enters suspend state.
Tested on AM3517EVM and OMAP3530EVM.
Signed-off-by: Stanley.Miao <stanley.miao@windriver.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap24xx_check_revision, omap3_check_features,
omap3_check_revision, omap4_check_revision, omap3_cpuinfo
are not used elsewhere, it should be static
Also fixes the following sparse warnings:
arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo'
was not declared. Should it be static?
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In 3630, DPLL4M2 output can be 96MHz or 192MHz (for SGX to run at
192). This patch has changes to support this feature. 96MHz clock is
generated by dividing 192Mhz clock by 2 using CM_CLKSEL_CORE register.
SGX can select Core Clock, 192MHz clock or CM_96M_FCLK as it's
functional clock. In summary changes done are:
1. Added a feature called omap3_has_192mhz_clk and enabled for 3630
2. Added a new clock node called omap_192m_alwon_ck
3. Made omap_96m_alwon_fck to derive its clock from omap_192m_alwon_ck
Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com>
[paul@pwsan.com: fixed whitespace]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch fixes the omap_type function to detect whether the device
is GP or HS
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some of the OMAP4 specific chip level initialisations are taken care of.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated
to apply after the intervening cpu.h/id.c patch; thanks also to Tony
for catching a bug in my rewrite]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We need to set the omap_chip.oc carefully for the clocks to work.
To fix this, set the omap_chip.oc in omap3_check_features() based
on the CONTROL_IDCODE and silicon revision registers.
Also add handling for 34xx es3.1.2 as es3.1 for now.
Fixes booting on at least overo board.
Based on an earlier patch by Paul Walmsley <paul@pwsan.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The runtime detection of OMAP3515 and OMAP3525
was reversed.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the OMAP4430 cpu detection. The IC rev detection is
done with hawkeye and rev. Note that rev does not map directly to
defined processor revision numbers as ES1.0 uses value 0.It also fixes
the SCM base address to read the correct ID_CODE register.
Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated
instead of always being true
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cleanup the coding style in id.c while avoiding unneeded switch()
statements.
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When listing the various SoC features, print them on the same line.
So, instead of this
OMAP3430/3530 ES3.1
- l2cache : Y
- iva : Y
- sgx : Y
- neon : Y
- isp : Y
you get this:
OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap3_check_revision() does not depend on omap3_check_features()
move this above so that we can add logic based on revision
detected in check_features.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM35xx is functionally similar to OMAP3430 ES3.1 from a
powerdomain/clockdomain perspective. This patch initializes the
omap_chip bits on AM35xx for use by powerdomain and clockdomain code.
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support to detect AM3505/AM3517 devices at runtime.
Also updates the CPU names printed during boot.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3630 is getting treated like next rev of 3430
omap_chip.oc variable has to be updated for 3630 version
Otherwise the Core power domain is not getting registered.
This gets used in the registration of power domains in:
"arch/arm/mach-omap2/powerdomains34xx.h"
core_34xx_es3_1_pwrdm
OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1)
Core power doman will get registered for 3630 only when .oc is
populated correctly.
Tested on Zoom3(3630) board
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Acked-by: Alexander Shishkin <virtuoso@slind.org>
Acked-by: Ari Kauppi <kauppi@papupata.org>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP3630 is the latest in the family of OMAP3 devices
and among the changes it introduces are:
New OPP levels for new voltage and frequency levels. a bunch of
Bug fixes to various modules feature additions, notably with ISP,
sDMA etc.
Details about the chip is available here:
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606
Strategy used:
Strategy to introduce this device into Linux was discussed here:
Ref: http://marc.info/?t=125343303400003&r=1&w=2
Two approaches were available:
a) Consider 3630 generation of devices as a new family of silicon
b) Consider 3630 as an offshoot of 3430 family of devices
As a common consensus, (b) seems to be more valid for 3630 as:
* There are changes which are easily handled by using "FEATURES"
infrastructure.
For details how to do this, see thread:
http://marc.info/?t=125050998500001&r=1&w=2
* Most of existing 34xx infrastructure can be reused(almost 90%+)
- so no ugly if (cpu_is_omap34xx() || cpu_is_omap36xx())
all over the place
- lesser chance of bugs due to reuse of proven code flow
- 36xx specific handling can still be done where required
within the existing infrastructure
NOTE:
* If additional 34xx series are added, OMAP3430_REV_ESXXXX can be
added on top of the existing 3630 ones are renumbered
This patch was tested on SDP3430, boot tested on 3630 platform using
3430sdp defconfig
Signed-off-by: Madhusudhan Chikkature Rajashekar <madhu.cr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Cc: Allen Pais <allen.pais@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Felipe Balbi <felipe.balbi@nokia.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Sergio Alberto Aguirre Rodriguez <saaguirre@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add runtime check for these OMAP35x variations
based on the detected Si features:
OMAP3503, OMAP3515, OMAP3525 and OMA3530.
Also, delayed the call to pr_info() into actual
variant is detected in omap3_cpuinfo()
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP35x family has multiple variants differing
in the HW features. This patch detects these features
at runtime and prints information during the boot.
Since most of the code seemed repetitive, macros
have been used for readability.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using these headers to include using the right path.
This was done with:
#!/bin/bash
mach_dir_old="arch/arm/plat-omap/include/mach"
plat_dir_new="arch/arm/plat-omap/include/plat"
headers=$(cd $mach_dir_old && ls *.h)
omap_dirs="arch/arm/*omap*/ \
drivers/video/omap \
sound/soc/omap"
other_files="drivers/leds/leds-ams-delta.c \
drivers/mfd/menelaus.c \
drivers/mfd/twl4030-core.c \
drivers/mtd/nand/ams-delta.c"
for header in $headers; do
old="#include <mach\/$header"
new="#include <plat\/$header"
for dir in $omap_dirs; do
find $dir -type f -name \*.[chS] | \
xargs sed -i "s/$old/$new/"
done
find drivers/ -type f -name \*omap*.[chS] | \
xargs sed -i "s/$old/$new/"
for file in $other_files; do
sed -i "s/$old/$new/" $file
done
done
for header in $(ls $mach_dir_old/*.h); do
git mv $header $plat_dir_new/
done
Signed-off-by: Tony Lindgren <tony@atomide.com>
The omap_type() function is added and returns the DEVICETYPE field of
the CONTROL_STATUS register. The result can be used for conditional
code based on whether device is GP (general purpose), EMU or
HS (high security). Also move the type defines so omap1 code
compile does not require ifdefs for sections using these defines.
This code is needed for the following fix to set the SRAM
size correctly for HS omaps. Also at least PM and watchdog
code will need this function.
Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds the support for OMAP4. The platform and machine specific
headers and sources updated for OMAP4430 SDP platform.
OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some OMAP3 chip behaviors change in ES levels after ES2. Modify the
existing omap_chip flags to add options for ES3.0 and ES3.1.
Add a new macro, CHIP_GE_OMAP3430ES2, to cover ES levels from ES2
onwards - a common pattern for OMAP3 features. Update all current
users of the omap_chip macros to use this new macro.
Also add CHIP_GE_OMAP3430ES3_1 to cover the USBTLL SAR errata case
(described and fixed in the following patch)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
system_rev is meant for board revision, this patch changes
all relevant instances to use the new omap_rev() function
liberating system_rev to be used with ATAG_REVISION as it
has been designed.
Signed-off-by: Lauri Leukkunen <lauri.leukkunen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
At some point omap2 changed the bits for GET_OMAP_CLASS, which
broke 15xx detection on 730 as noticed by Russell King.
This patch fixes omap2 cpu detection to respect the original
GET_OMAP_CLASS, and simplifies the detection for 34xx.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rename omap2_check_revision to omap24xx_check_revision.
Then next patch will split if further and add omap34xx_check_revision.
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies
for use with __raw_{read|write}* for accessing registers. Therefore,
these macros should return (void __iomem *) cookies, not integer values.
Doing this improves typechecking, and means we can find those places
where, eg, DMA controllers are incorrectly given virtual addresses to
DMA to, or physical addresses are thrown through a virtual to physical
address translation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add asm/cputype.h, moving functions and definitions from asm/system.h
there. Convert all users of 'processor_id' to the more efficient
read_cpuid_id() function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a new OMAP chip identification interface, omap_chip_id.
omap_chip_id is a structure which contains one bit for each OMAP2/3
CPU type, and on 3430, ES level. For example, the CHIP_IS_OMAP2420
bit is set in omap_chip at boot on an OMAP2420. On OMAP3430ES2, both
CHIP_IS_OMAP3430 and CHIP_IS_OMAP3430ES2 bits are set.
omap_chip is set in mach-omap2/id.c by _set_omap_chip(). Other
code should use the omap_chip_is() function to test against omap_chip.
Also, clean up id.c by splitting some code out of
omap_check_revision() into its own function, _set_system_rev(); and
converting some debug printk()s into pr_debug().
Second revision.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
