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950b6662e2
2191 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Linus Torvalds
|
950b6662e2 |
SoC: DT changes for 6.3
About a quarter of the changes are for 32-bit arm, mostly filling in
device support for existing machines and adding minor cleanups, mostly
for Qualcomm and Samsung based machines.
Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from
Rockchips that have been around for a while but were lacking kernel
support so far: RV1126 is a Vision SoC with an NPU and is used in the
Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for
TV boxes and so far only comes with a dts for its refernece design.
The other 32-bit boards that were added are two ASpeed AST2600 based BMC
boards, the Microchip sam9x60_curiosity development board (Armv5 based!),
the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53
and i.MX6ULL.
On the RISC-V side, there are fewer patches, but a total of ten new
single-board computers based on variations of the Allwinner D1/T113 chip,
plus one more board based on Microchip Polarfire.
As usual, arm64 has by far the most changes here, with over 700 non-merge
changesets, among them over 400 alone for Qualcomm. The newly added SoCs
this time are all recent high-end embedded SoCs for various markets,
each on comes with support for its reference board:
- Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones
- Qualcomm QDU1000/QRU1000 5G RAN platform
- Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs
- TI J784S4 for industrial and automotive applications
In total, there are 46 new arm64 machines:
- Reference platforms for each of the five new SoCs
- Three Amlogic based development boards
- Six embedded machines based on NXP i.MX8MM and i.MX8MP
- The Mediatek mt7986a based Banana Pi R3 router
- Six tablets based on Qualcomm MSM8916 (Snapdragon 410),
SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865)
- Two LTE dongles, also based on MSM8916
- Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610),
SDM450 and SDM632
- Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c)
- Nine development boards based on Rockchips RK3588, RK3568,
RK3566 and RK3328.
- Five development machines based on TI K3 (AM642/AM654/AM68/AM69)
The cleanup of dtc warnings continues across all platforms, adding
to the total number of changes.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPvpVYACgkQmmx57+YA
GNm3iA/+NgaiEgwxaot1eoBqKImyP6NtC9VHFYRbscVkaBEkdNpm2zeVX92E2/8d
dZuGiOqY5VC+e53Rbig6m0GLrctYJfZTdJ0tYih8cwkB0jVL6bHzFQE1ugZkXkQC
/dXx2ozNQD1XqfgXqi7OC2PeaBqBxOK4UFrhUvjfzR68GuZmWpdC4+1mdIs106D1
252vV3y3biMDKXg1SgTXc4t8nb/ZT69gJpgJdbNuypDcAVrqlLaQZQ1sdEUu2wsh
6XnBZKe8srkFFwN+eR0Tdf9MhneUFJxLQsAajAm4WN1QiGrqtU42mrpJE80b6Uic
wnkvgwfyGVeGivM4/bAkeug5dCiElzCiwQBCKzL95ucf75Z8SfmhFAVAqji/MFBF
yzfetUld975qI0Bw6zh9dJALz6hElZAbbvcGI1imlXjVIsOwINvCoB5r3YPJw7FR
2nhJrsXs8h37VZgkeTlMp5BMu9j0AQKoBL4zbOSdrDr+XuOvuzIez+8ashFLijvu
FO+qlXfHUC7WsR6wktVumCsADnVRPJZN0UeMhSFixceD/njVaRZBk3BOY5Ea9wjm
G0s3KpqnLgEMrjDW3FLBf8xb9qEQPBAyeYUL9d0MHByz8W7iI/dQjEie0UEzmCqI
J+cDdhMCKDNYOF0Xk8d9k2g5/p62/0akmncOBCZRJf9bMHklBWY=
=I8Ga
-----END PGP SIGNATURE-----
Merge tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC DT updates from Arnd Bergmann:
"About a quarter of the changes are for 32-bit arm, mostly filling in
device support for existing machines and adding minor cleanups, mostly
for Qualcomm and Samsung based machines.
Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from
Rockchips that have been around for a while but were lacking kernel
support so far: RV1126 is a Vision SoC with an NPU and is used in the
Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design
for TV boxes and so far only comes with a dts for its refernece
design.
The other 32-bit boards that were added are two ASpeed AST2600 based
BMC boards, the Microchip sam9x60_curiosity development board (Armv5
based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards
for i.MX53 and i.MX6ULL.
On the RISC-V side, there are fewer patches, but a total of ten new
single-board computers based on variations of the Allwinner D1/T113
chip, plus one more board based on Microchip Polarfire.
As usual, arm64 has by far the most changes here, with over 700
non-merge changesets, among them over 400 alone for Qualcomm. The
newly added SoCs this time are all recent high-end embedded SoCs for
various markets, each on comes with support for its reference board:
- Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones
- Qualcomm QDU1000/QRU1000 5G RAN platform
- Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs
- TI J784S4 for industrial and automotive applications
In total, there are 46 new arm64 machines:
- Reference platforms for each of the five new SoCs
- Three Amlogic based development boards
- Six embedded machines based on NXP i.MX8MM and i.MX8MP
- The Mediatek mt7986a based Banana Pi R3 router
- Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115
(Snapdragon 662) and SM8250 (Snapdragon 865)
- Two LTE dongles, also based on MSM8916
- Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610),
SDM450 and SDM632
- Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c)
- Nine development boards based on Rockchips RK3588, RK3568, RK3566
and RK3328.
- Five development machines based on TI K3 (AM642/AM654/AM68/AM69)
The cleanup of dtc warnings continues across all platforms, adding to
the total number of changes"
* tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1035 commits)
dt-bindings: riscv: correct starfive visionfive 2 compatibles
ARM: dts: socfpga: Add enclustra PE1 devicetree
dt-bindings: altera: Add enclustra mercury PE1
arm64: dts: qcom: msm8996: align RPM G-Link clock-controller node with bindings
arm64: dts: qcom: qcs404: align RPM G-Link node with bindings
arm64: dts: qcom: ipq6018: align RPM G-Link node with bindings
arm64: dts: qcom: sm8550: remove invalid interconnect property from cryptobam
arm64: dts: qcom: sc7280: Adjust zombie PWM frequency
arm64: dts: qcom: sc8280xp-pmics: Specify interrupt parent explicitly
arm64: dts: qcom: sm7225-fairphone-fp4: enable remaining i2c busses
arm64: dts: qcom: sm7225-fairphone-fp4: move status property down
arm64: dts: qcom: pmk8350: Use the correct PON compatible
arm64: dts: qcom: sc8280xp-x13s: Enable external display
arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink
arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks
arm64: dts: qcom: sm8350-hdk: enable GPU
arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes
arm64: dts: qcom: sm8350: finish reordering nodes
arm64: dts: qcom: sm8350: move more nodes to correct place
arm64: dts: qcom: sm8350: reorder device nodes
...
|
||
|
Linus Torvalds
|
c72e04c26f |
ARM: defconfigs for 6.3
As usual, this branch contains all the patches to enable options for newly added device drivers in the 32-bit and 64-bit defconfig files. I have sorted the files according to the changes to Kconfig files, to make it easier to check what has changed compared to the 'make savedefconfig' output. The most notable change this time is a series from Mark Brown to add a 'virtconfig' target for arm64, which is for the moment the same as the 'defconfig' target but disables all the top-level SoC specific options in order to have a smaller and faster kernel build. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPtOE0ACgkQmmx57+YA GNk0DQ/+N1/Ga/kGtD8UOHrAOO3IPyGJJjQduYBp8e2mNbBy7uq4kOzXdir6va13 4i0N1+5gGt+OC4hbDry4405k8X064nnz5dpgKPWlfIZpMlM/r93xPVKTHRh2rBJI r18PH0I6QRvM4tGDBhbOXxs/T3jzYXTL0Vk4Y7RYO4Gqx0CL5QgQGIXyPkHTCk/y WCl9Ycbb4KAjTsA3lcmsZ+horkKK1uiJuI1KeIiWwKMeHc8rMTJRdSedprURCPaP SyQ4IHMMf3aST4PE8FLLnjD63F0suwUl/K4JRNktOcHcP+29T8cIqOgo7Tq8WLRk WHemO2dQl7stA6K03RPEabXFR7QN8VNVobLiWAfAAY0jf73pXC/OGxHilzWKJwPS Dd8SH2T2BW6p0Iuv95cYarfBXm2yp5Cp7WVmZhwX2/vPGjB9qJhvORiHoObYPIdo JS3FxPvlV6xKOkZwcTTrwJlooO735xNNFl9AyzUXOvmraVFTA+njZ9S7fGq0h/30 Z4UONXkaOSxAe4AfcD7vMDk9ezKFM7rDsPeT27tU3Ti1pLU+AAAkUlyEeWqwerxz miThF1LI5p5SWhSL32LjjBTfBPZ5DXZPni77Mbigq27OK/osuW3CJMenU5qD33+8 tmyzbX5CrkrwL0kfXpB9fCLiQKNmuO5VokbaapewwZykrdvX4H4= =48oI -----END PGP SIGNATURE----- Merge tag 'soc-defconfig-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM defconfigs updates from Arnd Bergmann: "As usual, this contains all the patches to enable options for newly added device drivers in the 32-bit and 64-bit defconfig files. I have sorted the files according to the changes to Kconfig files, to make it easier to check what has changed compared to the 'make savedefconfig' output. The most notable change this time is a series from Mark Brown to add a 'virtconfig' target for arm64, which is for the moment the same as the 'defconfig' target but disables all the top-level SoC specific options in order to have a smaller and faster kernel build" * tag 'soc-defconfig-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (39 commits) arm64: defconfig: enable drivers required by the Qualcomm SA8775P platform arm64: defconfig: Enable DisplayPort on SC8280XP laptops arm64: configs: Add virtconfig kbuild: Provide a version of merge_into_defconfig without override warnings scripts: merge_config: Add option to suppress warning on overrides ARM: reorder defconfig files arm64: reorder defconfig arm64: defconfig: enable Qualcomm SDAM nvmem driver arm64: defconfig: enable SM8450 DISPCC clock driver ARM: defconfig: Add IOSCHED_BFQ to the default configs ARM: configs: multi_v7: enable NVMEM driver for STM32 ARM: Add wpcm450_defconfig for Nuvoton WPCM450 arm64: defconfig: Enable DMA_RESTRICTED_POOL arm64: defconfig: Enable missing configs for mt8192-asurada riscv: defconfig: Enable the Allwinner D1 platform and drivers ARM: imx_v6_v7_defconfig: Don't enable PROVE_LOCKING ARM: multi_v7_defconfig: Add GXP Fan and SPI support ARM: add multi_v7_lpae_defconfig kbuild: Add config fragment merge functionality ARM: multi_v7_defconfig: Add options to support TQMLS102xA series ... |
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|
Linus Torvalds
|
8e9a8427a1 |
RISC-V Fixes for 6.2-rc8
* A fix to avoid partial TLB fences for huge pages, which are disallowed
by the ISA.
* A fix to to avoid missing a frame when dumping stacks.
* A fix to avoid misaligned accesses (and possibly overflows) in
kprobes.
* A fix for a race condition in tracking page dirtiness.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmPmZ50THHBhbG1lckBk
YWJiZWx0LmNvbQAKCRAuExnzX7sYiXg6D/0S9sZJWHNHRUIPzTSkmZX7T5awnT+J
G6sQ1c48ukNz6ujHnlW9x05xHi41taRco+OIpZ7rLmEN/sdjTDEk7fhSaYqqpzZ+
KsVjhT3rBfoAf6B/zwHOkLFnvCLHagv4NzPQrT+6Kwc7TAm2XFm0UihBDFaTUXJt
6SXCFhy3YPft4WqFxQX5umo8W+TrIJd39c3/suwUABPFGyHjmRt5RHEaeOsil7SG
rdxq2KlYVeZ7485bYIKshmIRXQNmxwVI75+CGdzQqL0g8z8dT6rnV4FOW2PBP074
xr+nn0jV9DBmDNbZ7fcsjAJeAzNZZVyYzE9PGESF5euu09iO+VEdnRD3Bqx/rVcB
PQjB78PsaL0OV8fdJLssa0W9D2kvV7FF3aZLNgEJ3+lhmOw2kkuCyp7ud0QXMU0t
rYb6TQQ3kr5lKu3pJPbt8oir9/KDXaFCEN2e5Lmr7T58KIvoYns+jZnY/7FctDTq
S3Ev9sxDzfJWttVYNmciNTmUV8NMlTOTllBFcp68IWmTrOlKETURH7XBOLDPl8Pd
xPmu226whK/5s1/vjwMH/uUnSCxQXWlxiljMg8tkYt44+RU68AWMcnhylWy2eu1c
njdQIcpWKtZVy/NTH4gSvaGIuY3bi4h0zsY23x713eDp5ZbEeEWEcEDCrnjjuU1c
EcOgqzpIzc/c8w==
=hyiU
-----END PGP SIGNATURE-----
Merge tag 'riscv-for-linus-6.2-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
"This is a little bigger that I'd hope for this late in the cycle, but
they're all pretty concrete fixes and the only one that's bigger than
a few lines is pmdp_collapse_flush() (which is almost all
boilerplate/comment). It's also all bug fixes for issues that have
been around for a while.
So I think it's not all that scary, just bad timing.
- avoid partial TLB fences for huge pages, which are disallowed by
the ISA
- avoid missing a frame when dumping stacks
- avoid misaligned accesses (and possibly overflows) in kprobes
- fix a race condition in tracking page dirtiness"
* tag 'riscv-for-linus-6.2-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte
riscv: kprobe: Fixup misaligned load text
riscv: stacktrace: Fix missing the first frame
riscv: mm: Implement pmdp_collapse_flush for THP
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Guo Ren
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950b879b7f
|
riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte
In commit |
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Guo Ren
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eb7423273c
|
riscv: kprobe: Fixup misaligned load text
The current kprobe would cause a misaligned load for the probe point.
This patch fixup it with two half-word loads instead.
Fixes:
|
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Linus Torvalds
|
a30df1ea94 |
RISC-V Fixes for 6.2-rc7
* A build fix to avoid static branches in cpu_relax(), which greatly inflates the jump tables and breaks at least CONFIG_CC_OPTIMIZE_FOR_SIZE=y. * A fix for a kernel panic when probing impossible instruction positions. * A fix to disable unwind tables, which are enabled by default for GCC-13 and result in unhandled relocations in modules. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmPdJvwTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiY3tD/4jeqeeiOnO54xgsN8WVLQpqyAJ7UHY p3Jv993jTs9Wmo4eUaL/b0PoAvu6V8omGsorPatJUShZnAxQ51Cre6DMJ2NZ5uQG SJVt8t2/gYDZ8WPqKbN92ZqxIgnGc78lNX1YcrdZRL5oO7MKX1qcnqcSj/1NMAz1 XZGgrXC9eQHNQ72FYevxNoKwSpfMp3vBSHq6oxGKKVRcTYPMiEQp8GVIqYOZSDOG MLYl+szh9tz3vvMLZ4+R7/Zu5vQUQ7mvq2Sy+MjrpFpZJWOCqUfxPGZ1BaVbRSc3 K98Z/OEeSIxoxPcv0NdWJ/wbu1WKm+tdk0leCmpzj+DdAtf/ysKBdipei6gNZhWY Q43vwlNwviDNioVW0pIEGpT8nn5k+XNExhwUJtcYgmWleOevzSlKfpPRenLY9rHF IjNdN8ZcoR5Kh/ydGew+yYTmxjykFoCvAENTdCEj3gehWEF56Emts+uVJpPhxZS7 fBBVnYN64zq3gfbStVB0ci4wMH126vWbP6iEQMfc9fKCoAKymEyjspehQ2NHK/V4 s1Zvb4J0Hay1KQT+vhOJoMOf2vm6zXNRzoXQAtKz8HSn9L6zLq6+oYzHH/55CZ3K 7CN7djPGacIPacqLYE2QodL+xiXNEs7k2xbvU0OsS+uQcRKkYqSPI9hx5jgEG+PS OXh8tvtxdpVOqQ== =tZzK -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - A build fix to avoid static branches in cpu_relax(), which greatly inflates the jump tables and breaks at least CONFIG_CC_OPTIMIZE_FOR_SIZE=y. - A fix for a kernel panic when probing impossible instruction positions. - A fix to disable unwind tables, which are enabled by default for GCC-13 and result in unhandled relocations in modules. * tag 'riscv-for-linus-6.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: disable generation of unwind tables riscv: kprobe: Fixup kernel panic when probing an illegal position riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
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Liu Shixin
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cb80242cc6
|
riscv: stacktrace: Fix missing the first frame
When running kfence_test, I found some testcases failed like this: # test_out_of_bounds_read: EXPECTATION FAILED at mm/kfence/kfence_test.c:346 Expected report_matches(&expect) to be true, but is false not ok 1 - test_out_of_bounds_read The corresponding call-trace is: BUG: KFENCE: out-of-bounds read in kunit_try_run_case+0x38/0x84 Out-of-bounds read at 0x(____ptrval____) (32B right of kfence-#10): kunit_try_run_case+0x38/0x84 kunit_generic_run_threadfn_adapter+0x12/0x1e kthread+0xc8/0xde ret_from_exception+0x0/0xc The kfence_test using the first frame of call trace to check whether the testcase is succeed or not. Commit |
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Mayuresh Chitale
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f0293cd1f4
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riscv: mm: Implement pmdp_collapse_flush for THP
When THP is enabled, 4K pages are collapsed into a single huge
page using the generic pmdp_collapse_flush() which will further
use flush_tlb_range() to shoot-down stale TLB entries. Unfortunately,
the generic pmdp_collapse_flush() only invalidates cached leaf PTEs
using address specific SFENCEs which results in repetitive (or
unpredictable) page faults on RISC-V implementations which cache
non-leaf PTEs.
Provide a RISC-V specific pmdp_collapse_flush() which ensures both
cached leaf and non-leaf PTEs are invalidated by using non-address
specific SFENCEs as recommended by the RISC-V privileged specification.
Fixes:
|
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Andreas Schwab
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2f394c0e7d
|
riscv: disable generation of unwind tables
GCC 13 will enable -fasynchronous-unwind-tables by default on riscv. In
the kernel, we don't have any use for unwind tables yet, so disable them.
More importantly, the .eh_frame section brings relocations
(R_RISC_32_PCREL, R_RISCV_SET{6,8,16}, R_RISCV_SUB{6,8,16}) into modules
that we are not prepared to handle.
Signed-off-by: Andreas Schwab <schwab@suse.de>
Link: https://lore.kernel.org/r/mvmzg9xybqu.fsf@suse.de
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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Guo Ren
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87f48c7ccc
|
riscv: kprobe: Fixup kernel panic when probing an illegal position
The kernel would panic when probed for an illegal position. eg:
(CONFIG_RISCV_ISA_C=n)
echo 'p:hello kernel_clone+0x16 a0=%a0' >> kprobe_events
echo 1 > events/kprobes/hello/enable
cat trace
Kernel panic - not syncing: stack-protector: Kernel stack
is corrupted in: __do_sys_newfstatat+0xb8/0xb8
CPU: 0 PID: 111 Comm: sh Not tainted
6.2.0-rc1-00027-g2d398fe49a4d #490
Hardware name: riscv-virtio,qemu (DT)
Call Trace:
[<ffffffff80007268>] dump_backtrace+0x38/0x48
[<ffffffff80c5e83c>] show_stack+0x50/0x68
[<ffffffff80c6da28>] dump_stack_lvl+0x60/0x84
[<ffffffff80c6da6c>] dump_stack+0x20/0x30
[<ffffffff80c5ecf4>] panic+0x160/0x374
[<ffffffff80c6db94>] generic_handle_arch_irq+0x0/0xa8
[<ffffffff802deeb0>] sys_newstat+0x0/0x30
[<ffffffff800158c0>] sys_clone+0x20/0x30
[<ffffffff800039e8>] ret_from_syscall+0x0/0x4
---[ end Kernel panic - not syncing: stack-protector:
Kernel stack is corrupted in: __do_sys_newfstatat+0xb8/0xb8 ]---
That is because the kprobe's ebreak instruction broke the kernel's
original code. The user should guarantee the correction of the probe
position, but it couldn't make the kernel panic.
This patch adds arch_check_kprobe in arch_prepare_kprobe to prevent an
illegal position (Such as the middle of an instruction).
Fixes:
|
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Palmer Dabbelt
|
3c349eacc5
|
Merge patch "riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y"
This is a single fix, but it conflicts with some recent features. I'm merging it on top of the commit it fixes to ease backporting. * b4-shazam-merge: riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y Link: https://lore.kernel.org/r/20220922060958.44203-1-samuel@sholland.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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Samuel Holland
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0b1d60d6dd
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riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y
commit |
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Arnd Bergmann
|
7ba26a7201 |
- Enable Allwinner D1 platform and drivers
-----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSPRixG1tysKC2PKM10Ba7+DO8kkwUCY9RSUAAKCRB0Ba7+DO8k k+OBAP9/thzK03rpILAjN/qdpVgspns0hnpgtzMwIN+ErT1/LgEA16QSOD3eedyt SdrsxfNdGovOoQiyFNvgkoyA5sZD0QI= =Nf9R -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPYzDcACgkQmmx57+YA GNn3SxAAwxECAbVaGTklCu9JJbskd/girYIN4tyNONxszuvNNWosy0dN0Tcm4BBU ls0AH91Owe/CDlRnFaCexeyeBFcNj+PMwl03OE8gFz0by7s8SlzliFV3eZpl+djA qPoKL7ssardIqfE5UfiNnoARmFow3+Sb6XPWozSvyFyE/7Ggfgt/OHN+LXEFI7Sm gDyqrsu1ktSr8HYACZD6gIPGYSteM32aT94jtHq8S2Q2WHyVK0wAYiRMcc80vtO3 Tb1e8/xoImqo2ME95v7WKEq+7//3a9u4UyjrhJV8m25axLtu32Df7kLNMrFDzc/p 2T9JzfbaXeWrExreHdLNytXc7ua2VJXSQwDXAvrXKhc3bXpRbuo0e4oUBoBn2wLX 4J5g+lJS5t1dekW2E6I8gg0W3zzH4MPxxURNrmzvb0n+x9FnwBDTmXYfH1i9CobT Z76id/g8bfMQ2h7znH7IMHezRl9y2jmU7ijrlZsBmp0Bc83S5H/yintzclur2ShE T0G8dIkvySshZfv1FehwZHLX7pdb1a8sk2u35E3JZfSrmT18UCzJJtWfHGcXQU8W 5DlrPbDe2DzrjRJmlc1x4VcfDVV2meoQIn+U9B/T3wpHE7yXMha5GMtTBHV/jRXY MTgkTEdkHCuMGS2Su8Hj1VV7WRThQS2zaE840aC5qlthS/scpDY= =898J -----END PGP SIGNATURE----- Merge tag 'sunxi-config-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/defconfig - Enable Allwinner D1 platform and drivers * tag 'sunxi-config-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: defconfig: Enable the Allwinner D1 platform and drivers Link: https://lore.kernel.org/r/Y9Ra7dxkfMI9Xp3F@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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ffe4bd3db8 |
- introduce Allwinner D1 DTSI
- add boards: Dongshan Nezha STU, MangoPi MQ (Pro), Sipeed Lichee RV, Nezha - add D1 power controller node - Add SATA regulator to Bananapi M3 - fix regulator reference for nanopi-duo2 - fix GPIO node names - align HDMI CEC node name for h3-beelink-x2 - add DPHY interrupt to A64 and A33 -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSPRixG1tysKC2PKM10Ba7+DO8kkwUCY9RVEwAKCRB0Ba7+DO8k kxOPAP91Bp2oGLEETbHRdytQ13SrgPhuvvz4WS1uITIc/VKS0AEAhZmwAZc4gUjd xczXP58T08vFH8CVf2hyGW3vyHX1cwI= =/7zT -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPYOdwACgkQmmx57+YA GNmuHg/7B+KIcl+slzhtIApKbEouiqK2sEAemkmrMKdMXBMf02Vl27MHZZMajb1b B4hva6xzV2UOxOJ9e8THo1e28ciQnKBU1EqBKRJhGrBfiQweXFe97JO2vU+MhKsB 3pEzZfGfwuaOp9fjyYGoXZM/mVxjYqfy5tevUzTmOLhTxQiapu+xRaFmHUWgVXS9 fYnlDs0/PPVYbIvSmIfArd8nGfcl/RD99TGm9LOhGjdr3r3LAjrDhxCXkgJi2JyP nWJ2DxlUUXcaslb4ulvErZ+XfQJ+dhoGRsHwhnSFAige24CL2xbzbIHKyIHSTDl3 GT9FxOrJkZjHY7q2WK28w2cUGKwF1fYsNqLXqWs0GMYQSNlxR6eGyeV5HW2gh7xg xmxqzDl2I7YpuxJkf520y9rsWmy7qbM8piM1CwdQMDY6fUBcGryEZJUg6uEaEQw9 FgnqoNdqB6GAjHN6XYtxcQmivUhJA8Jk1zUSdIv4QmWy6M+tseVuKnNxwxwFL/Ab z3uguUCVxOXHKazvs+6LcE+iHUu1S1TjFjGuQQ3TN+TETKeDpn0AwB4/6WJMkbCE rCJ3O8ku7dD3tsp76GCSP6jxT/97b3uEPfcCuZZoBtToy3s8IMBvYFEB8wMftZxp SPeCPiGBYNAmxDIfbTdwwZc9abfJZcLB3/XDlpSpIguLmqdxhJs= =lSwT -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt - introduce Allwinner D1 DTSI - add boards: Dongshan Nezha STU, MangoPi MQ (Pro), Sipeed Lichee RV, Nezha - add D1 power controller node - Add SATA regulator to Bananapi M3 - fix regulator reference for nanopi-duo2 - fix GPIO node names - align HDMI CEC node name for h3-beelink-x2 - add DPHY interrupt to A64 and A33 * tag 'sunxi-dt-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: d1: Add power controller node riscv: Add the Allwinner SoC family Kconfig option riscv: dts: allwinner: Add Dongshan Nezha STU devicetree riscv: dts: allwinner: Add MangoPi MQ Pro devicetree riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree riscv: dts: allwinner: Add MangoPi MQ devicetree riscv: dts: allwinner: Add the D1/D1s SoC devicetree dt-bindings: riscv: Add Allwinner D1/D1s board compatibles dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors MAINTAINERS: Match the sun20i family of Allwinner SoCs ARM: dts: sun8i: a83t: bananapi-m3: describe SATA disk regulator ARM: dts: sun8i: nanopi-duo2: Fix regulator GPIO reference ARM: dts: sunxi: Fix GPIO LED node names ARM: dts: sun8i: h3-beelink-x2: align HDMI CEC node names with dtschema arm64: dts: allwinner: a64: Add DPHY interrupt ARM: dts: sun8i: a33: Add DPHY interrupt Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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ad3c046a26 |
Renesas DT updates for v6.3 (take two)
- High Performance mode (1.8 GHz) support for the Cortex-A76 CPU cores
on R-Car V4H,
- GPIO interrupt support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- USB Function support for the RZ/N1D SoC,
- Generic Sound Card driver examples for the Renesas R-Car Starter Kit
Premier/Pro and Shimafugi Kingfisher development board stack,
- Universal Flash Storage support for the Renesas Spider development
board,
- External Power Sequence Controller (PWC) support for the RZ/V2M SoC
and the RZ/V2M Evaluation Kit 2.0,
- IOMMU support for MMC on the R-Car S4-8 SoC,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCY9Oc1QAKCRCKwlD9ZEnx
cMRKAP0S0VgkOJU9n+qrDdFNYeCAwLkJbcpWMsc4xy/dxt1gIQEAxbnJpGcmdAis
qiY67N7RU8mST1R7QACUEcvygxvqLwI=
=dAM5
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX+vEACgkQmmx57+YA
GNk6hA//Xbr/6Ey1bGx6jweljSEvLpOZkMCKiprOlJ7aaKM3SXfO2BK447zADtar
D9ooowc/IHBt4DNltVsAol5dm6QgQjcrs4+S04qFsdPtEtEmy59JS7e4m3BWKlTe
AJucF5A8g9HACAYs3zq6iEK8gGnJU2qW1ysiU03ypf9ctfDsir8eWgzCV0P3lgmr
1Rb29ZG0m661ucDNFM5tGOMpJ3yFGgAx1YnNtdn2XMOs3txFZ9hS0lPAOaBd7Wmj
hBDxJPWye7BG3zAo8vCYPDZcvDgl4iGKpmqHJ+p5fA5tD/od/tpyM/ih94pzv9iW
8yqpaIUNpwZ7VD1wITVxWXUOqubNyXo5f5dqWwjcOkp2toc+xn2gJFPD3ffsjghT
YmvRlglaOUHt09Koinb0SYrNBhGnN2qtYYfZzvRWJZmAhT/gzH16/ezuoI9DMy26
cwO8DsXMLA9QKxKVyzq9Y+9gKRXj6dtJhEjUheax/AfeW2q4Bs9fVG4bSw9LLYb4
vSVRIgBhojWvCA/t0vt1tmK+Nw5abm+m3Mfiq8E6rmR5yWqRmoN3mHaUNs4XOllI
sGd4NtO1uqM/SbovLMkccw4NaU0wUdcnYtKsem7dl1Jo5yWUbg8EGh6jRXdtILEt
SLRrc5NkG4kEbGRqSQ9ieINdw3bWUn2kOLbKcWFDwtqzkq6Ucqk=
=YAr2
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT updates for v6.3 (take two)
- High Performance mode (1.8 GHz) support for the Cortex-A76 CPU cores
on R-Car V4H,
- GPIO interrupt support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- USB Function support for the RZ/N1D SoC,
- Generic Sound Card driver examples for the Renesas R-Car Starter Kit
Premier/Pro and Shimafugi Kingfisher development board stack,
- Universal Flash Storage support for the Renesas Spider development
board,
- External Power Sequence Controller (PWC) support for the RZ/V2M SoC
and the RZ/V2M Evaluation Kit 2.0,
- IOMMU support for MMC on the R-Car S4-8 SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
arm64: dts: renesas: r8a779f0: Add iommus to MMC node
arm64: dts: renesas: v2mevk2: Add PWC support
arm64: dts: renesas: r9a09g011: Add PWC support
arm64: dts: renesas: r9a09g011: Reword ethernet status
arm64: dts: renesas: r8a774[be]1-beacon: Sync aliases with RZ/G2M
arm64: dts: renesas: beacon-renesom: Fix audio clock rate
arm64: dts: renesas: beacon-renesom: Update Ethernet PHY ID
arm64: dts: renesas: beacon-renesom: Fix gpio expander reference
arm64: dts: renesas: spider-cpu: Enable UFS device
arm64: dts: renesas: Add ulcb{-kf} Simple Audio Card MIX + TDM Split dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card MIX + TDM Split dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card2 MIX + TDM Split dtsi
arm64: dts: renesas: Add ulcb{-kf} Simple Audio Card dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card2 dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card dtsi
arm64: dts: renesas: #sound-dai-cells is used when simple-card
ARM: dts: renesas: #sound-dai-cells is used when simple-card
arm64: dts: renesas: eagle: Add SCIF_CLK support
ARM: dts: r9a06g032: Add the USBF controller node
arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1}
...
Link: https://lore.kernel.org/r/cover.1674815099.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann
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b453988c59 |
RISC-V Devicetrees for v6.3-mw0
Microchip: A vendor prefix for Aldec and both a binding and Devicetree for the Aldec TySoM devkit for PolarFire SoC. This Devicetree corresponds to what they are shipping in the SDK for rev2 boards. StarFive: Just the binding for the new StarFive JH7110 SoC and its first-party SDC the VisionFive 2. Other: I was expecting the Devicetree for the aforementioned board to be ready for this window, as the pinctrl driver had seem some review prior to v6.2 and both it & the base clock drivers are heavily based on the existing drivers for the JH7110. That didn't come to be.. Christmas, the RISC-V Summit in December and the Lunar New Year all playing a part perhaps. Because of that, both Palmer and I have the Kconfig.socs work in our branches, although in hindsight it probably wasn't needed here as I only added the TySoM Devicetree & the conflict would've been trivial. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY9EPgwAKCRB4tDGHoIJi 0l9kAQDJHyrjfXMooRHSFXRUsJFYeN8MpYvD1CLavdrD+Pu+KQD/c1sApjfZrKjo ItyEL37F2QJOAFY1rAxdB7d6ppsUEAQ= =sN4y -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX9PcACgkQmmx57+YA GNn4Xg/+MykVFbZuQZbFuzD9DNA3BnHJuJL+5Uz1Ywy9H+Katl4hQGRLlt4WtRzC fWuteoPmNwvsbxuDRQ3sDC2oqRFVFD45u/q7qQ4ce+dKDbL2qpnbgxdmXVXdJrgL e9Wb9V01j8vLimNvFspicnaajFwDEC1uGLbVaZ+RKEk6GxxlJEJqydUsa2FVbQIf QDMEtR967fI3CUZ2wvzplJDDGBBKZbXxuZ/tOaTwEGPKFxbzQ5CBP7CFkbfEEjTZ kbcHsfLloKLL1/11oBeR6aPhY1WQvecBHO9WZ3ANR+/+2GT9SLdPbCWQN+uWM9ZI B5/SvtvJhzyP6HG+ErX/Pc8NPjm6AKMoo6j8fLuy8pASJF+H3tV9bn9mj4ld6B1S Vz8D1/hoh7OIuEaRDdfzW8xHQS6qQF58MRS3J8+I3xTUs4ZP6JifnOdIcrbXYvup +SFRgtoewV4wMxPshM+5FsVqsE4xSnvdwZeuxIjqpFY/CvlubFJdT9FBx8tx+v+G rC7MtoggznsQi1BDShGbu0xNAmE6iJcv9mranFm6NQUXC5/1SObIA9RFb0aBBJoQ DsU1rDqWndh9bILZkoikpPQ0uZWwAOFRpp44CSZ6/YtYPDku99YWozxqCeGGw4gN V18SjBXgL9YZfQKH3Z0biOdv6m2vLJKoj5hxgzu0KFxbCFlrl+A= =SCZP -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/dt RISC-V Devicetrees for v6.3-mw0 Microchip: A vendor prefix for Aldec and both a binding and Devicetree for the Aldec TySoM devkit for PolarFire SoC. This Devicetree corresponds to what they are shipping in the SDK for rev2 boards. StarFive: Just the binding for the new StarFive JH7110 SoC and its first-party SDC the VisionFive 2. Other: I was expecting the Devicetree for the aforementioned board to be ready for this window, as the pinctrl driver had seem some review prior to v6.2 and both it & the base clock drivers are heavily based on the existing drivers for the JH7110. That didn't come to be.. Christmas, the RISC-V Summit in December and the Lunar New Year all playing a part perhaps. Because of that, both Palmer and I have the Kconfig.socs work in our branches, although in hindsight it probably wasn't needed here as I only added the TySoM Devicetree & the conflict would've been trivial. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: microchip: add the Aldec TySoM's devicetree dt-bindings: riscv: microchip: document the Aldec TySoM dt-bindings: vendor-prefixes: Add entry for Aldec RISC-V: stop directly selecting drivers for SOC_CANAAN RISC-V: stop selecting SiFive clock and serial drivers directly RISC-V: stop selecting the PolarFire SoC clock driver RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board Link: https://lore.kernel.org/r/Y9LP+Za1h0fkBa58@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Samuel Holland
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dca36f7b3d |
riscv: dts: allwinner: d1: Add power controller node
The Allwinner D1 family of SoCs contain a PPU power domain controller separate from the PRCM. It can power down the video engine and DSP, and it contains special logic for hardware-assisted CPU idle. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230126063419.15971-4-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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eb20e7cb91 |
riscv: defconfig: Enable the Allwinner D1 platform and drivers
Now that several D1-based boards are supported, enable the platform in our defconfig. Build in the drivers which are necessary to boot, such as the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash), and watchdog (which may be left enabled by the bootloader). Other common onboard peripherals are enabled as modules. Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230126045738.47903-12-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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6f5178acf6 |
riscv: Add the Allwinner SoC family Kconfig option
Allwinner manufactures the sunxi family of application processors. This includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8 SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs. The first SoC in the sun20i series is D1, containing a single T-HEAD C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM. Most peripherals are shared across the entire chip family. In fact, the ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible with the D1s. This means many existing device drivers can be reused. To facilitate this reuse, name the symbol ARCH_SUNXI, since that is what the existing drivers have as their dependency. Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230126045738.47903-11-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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72cee3dbb4 |
riscv: dts: allwinner: Add Dongshan Nezha STU devicetree
The 100ask Dongshan Nezha STU is a system-on-module that can be used standalone or with a carrier board. The SoM provides gigabit Ethernet, HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip. The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1" headers, but contains no digital circuitry, so it does not have its own devicetree. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-10-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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96a35ab9a8 |
riscv: dts: allwinner: Add MangoPi MQ Pro devicetree
The MangoPi MQ Pro is a tiny SBC with a layout compatible to the Raspberry Pi Zero. It includes the Allwinner D1 SoC, 512M or 1G of DDR3, and an RTL8723DS-based WiFi/Bluetooth module. The board also exposes GPIO Port E via a connector on the end of the board, which can support either a camera or an RMII Ethernet PHY. The additional regulators supply that connector. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-9-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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7705ce5ab0 |
riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees
Sipeed manufactures a "Lichee RV" system-on-module, which provides a minimal working system on its own, as well as a few carrier boards. The "Dock" board provides audio, USB, and WiFi. The "86 Panel" additionally provides 100M Ethernet and a built-in display panel. The 86 Panel repurposes the USB ID and VBUS detection GPIOs for its RGB panel interface, since the USB OTG port is inaccessible inside the case. Co-developed-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-8-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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88ea698914 |
riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree
"D1 Nezha" is Allwinner's first-party development board for the D1 SoC. It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio, HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports, plus low-speed I/O from the SoC and a GPIO expander chip. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-7-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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Samuel Holland
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2a93adfb09 |
riscv: dts: allwinner: Add MangoPi MQ devicetree
The MangoPi MQ is a tiny SBC built around the Allwinner D1s. Its onboard peripherals include two USB Type-C ports (1 device, 1 host) and RTL8189FTV WLAN. A MangoPi MQ-R variant of the board also exists. The MQ-R has a different form factor, but the onboard peripherals are the same. Most D1 and D1s boards use a similar power tree, with the 1.8V rail powered by the SoC's internal LDOA, analog domains powered by ALDO, and the rest of the board powered by always-on fixed regulators. To avoid duplication, factor out the regulator information that is common across boards. The board also exposes GPIO Port E via a FPC connector, which can support either a camera or an RMII Ethernet PHY. The additional regulators supply that connector. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-6-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
||
|
Samuel Holland
|
077e5f4f55 |
riscv: dts: allwinner: Add the D1/D1s SoC devicetree
D1 (aka D1-H), D1s (aka F133), R528, and T113 are a family of SoCs based on a single die, or at a pair of dies derived from the same design. D1 and D1s contain a single T-HEAD Xuantie C906 CPU, whereas R528 and T113 contain a pair of Cortex-A7's. D1 and R528 are the full version of the chip with a BGA package, whereas D1s and T113 are low-pin-count QFP variants. Because the original design supported both ARM and RISC-V CPUs, some peripherals are duplicated. In addition, all variants except D1s contain a HiFi 4 DSP with its own set of peripherals. The devicetrees are organized to minimize duplication: - Common perhiperals are described in sunxi-d1s-t113.dtsi - DSP-related peripherals are described in sunxi-d1-t113.dtsi - RISC-V specific hardware is described in sun20i-d1s.dtsi - Functionality unique to the D1 variant is described in sun20i-d1.dtsi The SOC_PERIPHERAL_IRQ macro handles the different #interrupt-cells values between the ARM (GIC) and RISC-V (PLIC) versions of the SoC. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu> Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-5-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
||
|
Linus Torvalds
|
db7c4673bb |
RISC-V Fixes for 6.2-rc6
* A few DT bindings fixes to more closely align the ISA string requirements between the bindings and the ISA manual. * A handful of build error/warning fixes. * A fix to move init_cpu_topology() later in the boot flow, so it can allocate memory. * The IRC channel is now in the MAINTAINERS file, so it's easier to find. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmPUC6kTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYibIoD/9WvCKADgFTdAsKx+daiKebpuWvCjUv du8/l+QE9xdmpbISdA5tpzHVLQNc3oqM2AtgeKtxdX5mG1DndtIuigM9k8hoF5p9 id9nWnIAHI1t5/yigmd4NPMNBB23Lsh+NfFSfP+fn1Q9F3ZmUCvVnotu91+Qs9lQ ZYeb2l2jEJU19KV79Do+zNisJ5iXMMl7/5GIFjov6vUpVw5jIU5C6gbVEWHrgSEe xGr7aZBJPIszcM6L7nTVWrikdK4gn417ydqBrBUGN8n2skve6Q32snfN8zrs0DV7 YYJfo+Gh2j2K5pQnpLganpbQIGBm1u9cx5sKboD6X/eAsyzlgjGelH13uA/1ZNB1 rqUsr5V11TN2RconXK/kkox+pusq3/KRDB01focndJdHKNDJo5bZps6uH/GM9aog 3wMafDLWd4LeBJiPbJx49834wy277GGbyxBpSar7uIRrhX7IPwLkj3tTU3DCP4kK xvrk2LhitdgLOzGSDMoPjTPTpXlqrXwb3bh4NITxx95XXOAE03/4W6FhYKRbgWub JDmX0JKGkcgWC/JX4TMAFLZU7AvjKpZBLoTTMrAe+y/bzHASBgFBrzqUVaKZ8GgC KV91OzOLJb1/np7kZCQHxO/72v5YPbPcfEyNUQwm8KC4/8CPf8/tq5eWgWsw9xBM GZjoUco1Y+9RCQ== =ZHbl -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - A few DT bindings fixes to more closely align the ISA string requirements between the bindings and the ISA manual. - A handful of build error/warning fixes. - A fix to move init_cpu_topology() later in the boot flow, so it can allocate memory. - The IRC channel is now in the MAINTAINERS file, so it's easier to find. * tag 'riscv-for-linus-6.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Move call to init_cpu_topology() to later initialization stage riscv/kprobe: Fix instruction simulation of JALR riscv: fix -Wundef warning for CONFIG_RISCV_BOOT_SPINWAIT MAINTAINERS: add an IRC entry for RISC-V RISC-V: fix compile error from deduplicated __ALTERNATIVE_CFG_2 dt-bindings: riscv: fix single letter canonical order dt-bindings: riscv: fix underscore requirement for multi-letter extensions |
||
Lad Prabhakar
|
7dd48e96d0 |
riscv: dts: renesas: rzfive-smarc-som: Drop PHY interrupt support for ETH{0,1}
IRQC support for RZ/Five is still missing so drop the interrupts and
interrupt-parent properties from the PHY nodes of ETH{0,1}.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230102222708.274369-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||
Ley Foon Tan
|
c1d6105869
|
riscv: Move call to init_cpu_topology() to later initialization stage
If "capacity-dmips-mhz" is present in a CPU DT node,
topology_parse_cpu_capacity() will fail to allocate memory. arm64, with
which this code path is shared, does not call
topology_parse_cpu_capacity() until later in boot where memory
allocation is available. While "capacity-dmips-mhz" is not yet a valid
property on RISC-V, invalid properties should be ignored rather than
cause issues. Move init_cpu_topology(), which calls
topology_parse_cpu_capacity(), to a later initialization stage, to match
arm64.
As a side effect of this change, RISC-V is "protected" from changes to
core topology code that would work on arm64 where memory allocation is
safe but on RISC-V isn't.
Fixes:
|
||
Conor Dooley
|
d9c36d016f |
Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM"
As it says on the tin, add a DT for this board. It's been sitting on my desk for a while, so may as well have it upstream... The DT is only partially complete, as it needs the fabric content added. Unfortunately, I don't have a reference design in RTL or SmartDesign for it and therefore don't know what that fabric content is. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Conor Dooley
|
497e6b37b0 |
riscv: dts: microchip: add the Aldec TySoM's devicetree
The TySOM-M-MPFS250 is a compact SoC prototyping board featuring a Microchip PolarFire SoC MPFS250T-FCG1152. Features include: - 16 Gib FPGA DDR4 - 16 Gib MSS DDR4 with ECC - eMMC - SPI flash memory - 2x Ethernet 10/100/1000 - USB 2.0 - PCIe x4 Gen2 - HDMI OUT - 2x FMC connector (HPC and LPC) Specifically flag this board as rev2, in case later boards have an FPGA design revision with more features available in the future. Link: https://www.aldec.com/en/products/emulation/tysom_boards/polarfire_microchip/tysom_m_mpfs250 [Fixed a mistake where I read 16 Gib as 16 GiB!] Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
Liao Chang
|
ca0254998b
|
riscv/kprobe: Fix instruction simulation of JALR
Set kprobe at 'jalr 1140(ra)' of vfs_write results in the following
crash:
[ 32.092235] Unable to handle kernel access to user memory without uaccess routines at virtual address 00aaaaaad77b1170
[ 32.093115] Oops [#1]
[ 32.093251] Modules linked in:
[ 32.093626] CPU: 0 PID: 135 Comm: ftracetest Not tainted 6.2.0-rc2-00013-gb0aa5e5df0cb-dirty #16
[ 32.093985] Hardware name: riscv-virtio,qemu (DT)
[ 32.094280] epc : ksys_read+0x88/0xd6
[ 32.094855] ra : ksys_read+0xc0/0xd6
[ 32.095016] epc : ffffffff801cda80 ra : ffffffff801cdab8 sp : ff20000000d7bdc0
[ 32.095227] gp : ffffffff80f14000 tp : ff60000080f9cb40 t0 : ffffffff80f13e80
[ 32.095500] t1 : ffffffff8000c29c t2 : ffffffff800dbc54 s0 : ff20000000d7be60
[ 32.095716] s1 : 0000000000000000 a0 : ffffffff805a64ae a1 : ffffffff80a83708
[ 32.095921] a2 : ffffffff80f160a0 a3 : 0000000000000000 a4 : f229b0afdb165300
[ 32.096171] a5 : f229b0afdb165300 a6 : ffffffff80eeebd0 a7 : 00000000000003ff
[ 32.096411] s2 : ff6000007ff76800 s3 : fffffffffffffff7 s4 : 00aaaaaad77b1170
[ 32.096638] s5 : ffffffff80f160a0 s6 : ff6000007ff76800 s7 : 0000000000000030
[ 32.096865] s8 : 00ffffffc3d97be0 s9 : 0000000000000007 s10: 00aaaaaad77c9410
[ 32.097092] s11: 0000000000000000 t3 : ffffffff80f13e48 t4 : ffffffff8000c29c
[ 32.097317] t5 : ffffffff8000c29c t6 : ffffffff800dbc54
[ 32.097505] status: 0000000200000120 badaddr: 00aaaaaad77b1170 cause: 000000000000000d
[ 32.098011] [<ffffffff801cdb72>] ksys_write+0x6c/0xd6
[ 32.098222] [<ffffffff801cdc06>] sys_write+0x2a/0x38
[ 32.098405] [<ffffffff80003c76>] ret_from_syscall+0x0/0x2
Since the rs1 and rd might be the same one, such as 'jalr 1140(ra)',
hence it requires obtaining the target address from rs1 followed by
updating rd.
Fixes:
|
||
|
Arnd Bergmann
|
bd5a649bf3 |
Renesas DT updates for v6.3
- Enable watchdog and timer (OSTM) support for the RZ/Five SMARC EVK
development board,
- Add operating points for the Cortex-A55 CPU cores on the R-Car S4-8
SoC,
- Add display support for the R-Car V4H SoC and the White-Hawk
development board,
- Add eMMC and SDHI support for the RZ/V2M SoC,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCY8KpMgAKCRCKwlD9ZEnx
cHYVAP95PYoFsrCBey0YgfFx7Gae0ehQG3FzfMXXmq8ZH1oXBwD+NkvC3oWuegOn
MEs2EtfRvUMzMyY2t9Vd34ktvmxOpAQ=
=EGFO
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPQD1kACgkQmmx57+YA
GNkMtQ/8C+bEUeSMfWqfn5jqxhLAv3Vh/NlzbfVTJZQKC8oNvNUMdZ6DnCSoNc3Q
I9t6AXtAfmRfCIKsFsPFK5JdQk/Hh9EeGH5Qdp6/7kP0RzOm3Ghm2ahjvrTVgwRo
BCNWW6wL0q2dne/GWUgCREbFdASsXleg/DevAHyJtHxHbPQ8Qg+wLAXt/DIjKMDs
rMCiFGlabFqn+lFKAGbkoVFvhWcxZ5MxbPhTQMAVnDapPQeCEEe5pnr5SvU29oAz
Xo5OnLmPcToafgQwDZkj35GO6IMWnhvsRggLymw0Xe6SYz54zZa3Jv+d94hh26pG
6U03v0XL9dia29vJd4OvlYS1pZRT1/IqoUcFfaH0I2+lbsqz7Tpmyu5taho5Iovu
dUydGgs4VFwtWZfihkxoh4IzpGTHzGaCjrnlvwMN3XalkpmxtaptHMjBLBDkl1eR
UsEABPVZNYQLm06ow6I9F8NhSQ6QyU8Ex1s/tG4c03iBQIB6/0iaZ2Oc1mx13lBJ
cgEodH6OWgdxypA5NzZBUwr8Tgfizsekfv6XmFjMz6wbNaCS5WD5ah4BXEEiSADu
pNbAm7lScfZAFaaQ5ixGQJXq2euVhXtIFfS5r/+HE6t8MLVnLCrmqgitmFGdJ+TU
6haBRo7l15MRDjSzseOpHeXR8UBg8eDu41dlS0pkouiAg9vjYuk=
=7zgr
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT updates for v6.3
- Enable watchdog and timer (OSTM) support for the RZ/Five SMARC EVK
development board,
- Add operating points for the Cortex-A55 CPU cores on the R-Car S4-8
SoC,
- Add display support for the R-Car V4H SoC and the White-Hawk
development board,
- Add eMMC and SDHI support for the RZ/V2M SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: condor-i: add HS400 support for eMMC
arm64: boot: dts: r8a774[a/b/e]1-beacon: Consolidate sound clocks
riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodes
arm64: dts: renesas: ulcb-kf: Fix pca9548 i2c-mux node names
arm64: dts: renesas: r9a09g011: Add eMMC and SDHI support
arm64: dts: renesas: white-hawk-cpu: Add DP output support
arm64: dts: renesas: r8a779g0: Add display related nodes
arm64: dts: renesas: r8a779f0: Add CA55 operating points
riscv: dts: renesas: rzfive-smarc-som: Enable WDT
Link: https://lore.kernel.org/r/cover.1673702293.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Linus Torvalds
|
1ed46384f8 |
ARM: SoC DT and driver fixes 6.2
Lots of dts fixes for Qualcomm Snapdragon and NXP i.MX platforms,
including:
- A regression fix for SDHCI controllers on Inforce 6540, and
another SDHCI fix on SM8350
- Reenable cluster idle on sm8250 after the the code fix is upstream
- multiple fixes for the QMP PHY binding, needing an incompatible
dt change
- The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus
6P, to avoid instabilities caused by use of protected memory regions
- Fix i.MX8MP DT for missing GPC Interrupt, power-domain typo and USB
clock error
- A couple of verdin-imx8mm DT fixes for audio playback support
- Fix pca9547 i2c-mux node name for i.MX and Vybrid device trees
- Fix an imx93-11x11-evk uSDHC pad setting problem that causes Micron
eMMC CMD8 CRC error in HS400ES/HS400 mode
The remaining ARM and RISC-V platforms only have very few
smaller dts bugfixes this time:
- A fix for the SiFive unmatched board's PCI memory space
- A revert to fix a regression with GPIO on Marvell Armada
- A fix for the UART address on Marvell AC5
- Missing chip-select phandles for stm32 boards
- Selecting the correct clock for the sam9x60 memory controller
- Amlogic based Odroid-HC4 needs a revert to restore USB
functionality.
And finally, there are some minor code fixes:
- Build fixes for OMAP1, pxa, riscpc, raspberry pi firmware, and zynq
firmware
- memory controller driver fixes for an OMAP regression and older bugs
on tegra, atmel and mvebu
- reset controller fixes for ti-sci and uniphier platforms
- ARM SCMI firmware fixes for a couple of rare corner cases
- Qualcomm platform driver fixes for incorrect error handling and a
backwards compatibility fix for the apr driver using older dtb
- NXP i.MX SoC driver fixes for HDMI output, error handling in the imx8
soc-id and missing reference counting on older cpuid code
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPKahwACgkQmmx57+YA
GNnxcA//YBkeRJfseYQoe9OyfkWOVDUIImffhuL+sl6wdEPKHDzqwiVBloMR9GXj
e6g+Qc4OWSHtTozrmIBHbMh41CKTXr+76XYeJwZXxb6VOkAwbJyom9BOsyO8V9oQ
hrnjeqMgHA8VrsP5EFkE8QAEK+ptyiYlPdQdWncqBJn4552xd95P1De3AOsUsjef
Rr/VanMpS2jLuPsTZsR7mT3RmbDbrYCGua84tXihqtfz/4Eqsr9OCKrMnkZbEQty
ehxN1qAOnx7fTr7r/FJFupWN7MPaOEuwYyjQY/cuTlPSt1sq1re7YII6CC5y1wGS
eFOc/m689GvACfCW8bQIVdXcRKcYFKJOK1XvA9168QupCd+cDmuKmu0VdKLCGgTd
9fzbvYfqhXcG8wXKvDPDw2GlMvItxjJ3kzGmHaDU33c+h9Ep9u9C/Jsf/mKYo8E6
TsOAgkl1pU23cuETATi2BXx/HdH8cHUVX1ssuqiGJeVGLF+hsJuEAMS5wKexBnJ0
pVrknInSli7s4qPcVe0GYpULGRxT/FYEEeCBgl9WppkhUaU3h1Pwo2SstL6tdTwE
2vMCEi8HdQuWccxoGMEG1nE1/de2Rxv7bcefVHQTpofv47kDOlnjlIoFy9nCCVaF
fDGbMK3ArpTUNscDBs9d81U3r26/8him36H+QRvWfb7zI7DryxU=
=W7dq
-----END PGP SIGNATURE-----
Merge tag 'soc-fixes-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT and driver fixes from Arnd Bergmann:
"Lots of dts fixes for Qualcomm Snapdragon and NXP i.MX platforms,
including:
- A regression fix for SDHCI controllers on Inforce 6540, and another
SDHCI fix on SM8350
- Reenable cluster idle on sm8250 after the the code fix is upstream
- multiple fixes for the QMP PHY binding, needing an incompatible dt
change
- The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus
6P, to avoid instabilities caused by use of protected memory
regions
- Fix i.MX8MP DT for missing GPC Interrupt, power-domain typo and USB
clock error
- A couple of verdin-imx8mm DT fixes for audio playback support
- Fix pca9547 i2c-mux node name for i.MX and Vybrid device trees
- Fix an imx93-11x11-evk uSDHC pad setting problem that causes Micron
eMMC CMD8 CRC error in HS400ES/HS400 mode
The remaining ARM and RISC-V platforms only have very few smaller dts
bugfixes this time:
- A fix for the SiFive unmatched board's PCI memory space
- A revert to fix a regression with GPIO on Marvell Armada
- A fix for the UART address on Marvell AC5
- Missing chip-select phandles for stm32 boards
- Selecting the correct clock for the sam9x60 memory controller
- Amlogic based Odroid-HC4 needs a revert to restore USB
functionality.
And finally, there are some minor code fixes:
- Build fixes for OMAP1, pxa, riscpc, raspberry pi firmware, and zynq
firmware
- memory controller driver fixes for an OMAP regression and older
bugs on tegra, atmel and mvebu
- reset controller fixes for ti-sci and uniphier platforms
- ARM SCMI firmware fixes for a couple of rare corner cases
- Qualcomm platform driver fixes for incorrect error handling and a
backwards compatibility fix for the apr driver using older dtb
- NXP i.MX SoC driver fixes for HDMI output, error handling in the
imx8 soc-id and missing reference counting on older cpuid code"
* tag 'soc-fixes-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (60 commits)
firmware: zynqmp: fix declarations for gcc-13
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp151a-prtt1l
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp157c-emstamp-argon
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som
ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60
ARM: omap1: fix building gpio15xx
ARM: omap1: fix !ARCH_OMAP1_ANY link failures
firmware: raspberrypi: Fix type assignment
arm64: dts: qcom: msm8992-libra: Fix the memory map
arm64: dts: qcom: msm8992: Don't use sfpb mutex
PM: AVS: qcom-cpr: Fix an error handling path in cpr_probe()
arm64: dts: msm8994-angler: fix the memory map
arm64: dts: marvell: AC5/AC5X: Fix address for UART1
ARM: footbridge: drop unnecessary inclusion
Revert "ARM: dts: armada-39x: Fix compatible string for gpios"
Revert "ARM: dts: armada-38x: Fix compatible string for gpios"
ARM: pxa: enable PXA310/PXA320 for DT-only build
riscv: dts: sifive: fu740: fix size of pcie 32bit memory
soc: qcom: apr: Make qcom,protection-domain optional again
...
|
||
Masahiro Yamada
|
5b89c6f9b2
|
riscv: fix -Wundef warning for CONFIG_RISCV_BOOT_SPINWAIT
Since commit |
||
Heiko Stuebner
|
d374a16539
|
RISC-V: fix compile error from deduplicated __ALTERNATIVE_CFG_2
On the non-assembler-side wrapping alternative-macros inside other macros to prevent duplication of code works, as the end result will just be a string that gets fed to the asm instruction. In real assembler code, wrapping .macro blocks inside other .macro blocks brings more restrictions on usage it seems and the optimization done by commit |
||
|
Lad Prabhakar
|
c68b12a902 |
riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodes
Enable OSTM{1,2} nodes on RZ/Five SMARC SoM.
Note, OSTM{1,2} nodes are enabled in the RZ/G2UL SMARC SoM DTSI [0] hence
deleting the disabled nodes from RZ/Five SMARC SoM DTSI enables it here
too as we include [0] in RZ/Five SMARC SoM DTSI.
[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230102222233.274021-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||
Ben Dooks
|
43d5f5d636 |
riscv: dts: sifive: fu740: fix size of pcie 32bit memory
The 32-bit memory resource is needed for non-prefetchable memory
allocations on the PCIe bus, however with some cards (such as the
SM768) the system fails to allocate memory from this.
Checking the allocation against the datasheet, it looks like there
has been a mis-calcualation of the resource for the first memory
region (0x0060090000..0x0070ffffff) which in the data-sheet for
the fu740 (v1p2) is from 0x0060000000..0x007fffffff. Changing
this to allocate from 0x0060090000..0x007fffffff fixes the probing
issues.
Fixes:
|
||
Ben Dooks
|
b9b916aee6
|
riscv: uaccess: fix type of 0 variable on error in get_user()
If the get_user(x, ptr) has x as a pointer, then the setting of (x) = 0 is going to produce the following sparse warning, so fix this by forcing the type of 'x' when access_ok() fails. fs/aio.c:2073:21: warning: Using plain integer as NULL pointer Signed-off-by: Ben Dooks <ben-linux@fluff.org> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20221229170545.718264-1-ben-linux@fluff.org Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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Björn Töpel
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b2d473a601
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riscv, kprobes: Stricter c.jr/c.jalr decoding
In the compressed instruction extension, c.jr, c.jalr, c.mv, and c.add
is encoded the following way (each instruction is 16b):
---+-+-----------+-----------+--
100 0 rs1[4:0]!=0 00000 10 : c.jr
100 1 rs1[4:0]!=0 00000 10 : c.jalr
100 0 rd[4:0]!=0 rs2[4:0]!=0 10 : c.mv
100 1 rd[4:0]!=0 rs2[4:0]!=0 10 : c.add
The following logic is used to decode c.jr and c.jalr:
insn & 0xf007 == 0x8002 => instruction is an c.jr
insn & 0xf007 == 0x9002 => instruction is an c.jalr
When 0xf007 is used to mask the instruction, c.mv can be incorrectly
decoded as c.jr, and c.add as c.jalr.
Correct the decoding by changing the mask from 0xf007 to 0xf07f.
Fixes:
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Conor Dooley
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3af577f982 |
RISC-V: stop directly selecting drivers for SOC_CANAAN
The serial and clock drivers will be enabled by default if the symbol itself is enabled, so stop directly selecting the drivers in Kconfigs.socs. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Conor Dooley
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0e6aee5bcc |
RISC-V: stop selecting SiFive clock and serial drivers directly
The SiFive clock and serial drivers will now default to the value of SOC_SIFIVE so there is no need to directly select their symbols anymore. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Conor Dooley
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b61032557d |
RISC-V: stop selecting the PolarFire SoC clock driver
The driver is now enabled by default if SOC_MICROCHIP_POLARFIRE so there is no longer a need to select it in Kconfig.socs Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Conor Dooley
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19ba9cf707 |
RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
Convert all non user visible use of SOC_FOO symbols to their ARCH_FOO variants. The canaan DTs are an outlier in that they're gated at the directory and the file level. Drop the directory level gating while we are swapping the symbol names over. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Conor Dooley
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fc43211939 |
RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN
While we cannot yet drop the SOC_ prefixed symbols, we can convert uses of these symbols within Kconfig.socs to the ARCH_ variants. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Conor Dooley
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444c3dbdab |
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO |
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Lad Prabhakar
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3e9e6fc9c6 |
riscv: dts: renesas: rzfive-smarc-som: Enable WDT
Enable WDT node on RZ/Five SMARC SoM. Note, WDT block is enabled in RZ/G2UL SMARC SoM DTSI [0] hence deleting the disabled node from RZ/Five SMARC SoM DTSI enables it here too as we include [0] in RZ/Five SMARC SoM DTSI. [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20221118135715.14410-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Linus Torvalds
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7a5189c58b |
KVM/riscv changes for 6.2
* Allow unloading KVM module * Allow KVM user-space to set mvendorid, marchid, and mimpid * Several fixes and cleanups -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmOhy+QUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOdUwf+K3i8RHW1H8TF/JSrn1I6nURNLYhb 2wXzl3esOsfswtn6dxEvLEXivcKmD2G9bLpa2UIa3vw1Plg9tdce9IJ5qDodtxVL mlISMUSgMNy+lelKJiG+l5Ld4oJ4HUY0yw/p3Ml9WUpra98UCB0sJ+FsqXr4ndi9 LxkQJrNyZkQcRH2IXjQhKjdjkepFTmkhKs/uCxAZvW9zfUmGX0dcp9W22PTbsapQ IcaBKdVaNN3TXNSIdDCM2Iv+oBN7gJn1CbgFxhkp4L8eE5PvRjFw0QooFMn2TjDw VflP3gIs/41+5tnoPWXGAkKFe/Z5aJjGjx6Yx0WnEEgoAG47RUHYsKIUjw== =8ejV -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull RISC-V kvm updates from Paolo Bonzini: - Allow unloading KVM module - Allow KVM user-space to set mvendorid, marchid, and mimpid - Several fixes and cleanups * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: RISC-V: KVM: Add ONE_REG interface for mvendorid, marchid, and mimpid RISC-V: KVM: Save mvendorid, marchid, and mimpid when creating VCPU RISC-V: Export sbi_get_mvendorid() and friends RISC-V: KVM: Move sbi related struct and functions to kvm_vcpu_sbi.h RISC-V: KVM: Use switch-case in kvm_riscv_vcpu_set/get_reg() RISC-V: KVM: Remove redundant includes of asm/csr.h RISC-V: KVM: Remove redundant includes of asm/kvm_vcpu_timer.h RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config() RISC-V: KVM: Simplify kvm_arch_prepare_memory_region() RISC-V: KVM: Exit run-loop immediately if xfer_to_guest fails RISC-V: KVM: use vma_lookup() instead of find_vma_intersection() RISC-V: KVM: Add exit logic to main.c |
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Linus Torvalds
|
6feb57c2fd |
Kbuild updates for v6.2
- Support zstd-compressed debug info
- Allow W=1 builds to detect objects shared among multiple modules
- Add srcrpm-pkg target to generate a source RPM package
- Make the -s option detection work for future GNU Make versions
- Add -Werror to KBUILD_CPPFLAGS when CONFIG_WERROR=y
- Allow W=1 builds to detect -Wundef warnings in any preprocessed files
- Raise the minimum supported version of binutils to 2.25
- Use $(intcmp ...) to compare integers if GNU Make >= 4.4 is used
- Use $(file ...) to read a file if GNU Make >= 4.2 is used
- Print error if GNU Make older than 3.82 is used
- Allow modpost to detect section mismatches with Clang LTO
- Include vmlinuz.efi into kernel tarballs for arm64 CONFIG_EFI_ZBOOT=y
-----BEGIN PGP SIGNATURE-----
iQJJBAABCgAzFiEEbmPs18K1szRHjPqEPYsBB53g2wYFAmOeImsVHG1hc2FoaXJv
eUBrZXJuZWwub3JnAAoJED2LAQed4NsG06IP/iVjuWFvnjDZT4X8X6zN8aKp1vtR
EMkmoRtt5cD4CLb1MG4N7irYHgedQSx4rYceP45MyW1I3egl6Ct14RDyeQ1xSIZb
XFTLDCZvfl/up3MdiqNAqKRS7x5lk9++7F0t+2SoQxKQyJvm735XreX+VhZ1FeLB
qcHrmzJ5veky5Ry/3OkNUgKFBjKEAL+qKMc55uvkXqfTb3KoBa2r4VC1OaoYGRru
R8oF9qQRnGVQAl/LbBVchmgSjxryxPrCvBGiKlK03VkXdzEMHMimEJh3BQ6e0PGo
gajdk+4liy7z+jQnI7jFhvJjGKzkEP/Bc99M/uS92QX5MgpH6mqpHMoqqPiqW87K
RmZH37FqRu1Vo8dpibmH6r2K6YD/HHRjaDHk1VuuCQYEn0dsNmokPXOqd/1v0I1i
TXPjWOw1AID5vMJWllqxFhpeVvf0vx5BT/UNrh68MLqlJZzv2eMVJb4fNy6640ml
U0NclMnOa3eOmf5z1T7/LqDRTa63Q0kpanRrBpcmVOaqW+ZpQ3SQjh4uBN1PyJHL
cX3Skc341DyRlFiT54QhGKlm57MEb2gjhBZ3Z4J+b7sEFgvjXH/W8vcOGIKlppmA
CfYMyres4OV+fJc89ONkWsvLiOP1OeUGPvytm33J5QMKXc8SzOLP0D/F8kjrDflm
EROKuZ4EA5ej/rOy
=Ig/Y
-----END PGP SIGNATURE-----
Merge tag 'kbuild-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild updates from Masahiro Yamada:
- Support zstd-compressed debug info
- Allow W=1 builds to detect objects shared among multiple modules
- Add srcrpm-pkg target to generate a source RPM package
- Make the -s option detection work for future GNU Make versions
- Add -Werror to KBUILD_CPPFLAGS when CONFIG_WERROR=y
- Allow W=1 builds to detect -Wundef warnings in any preprocessed files
- Raise the minimum supported version of binutils to 2.25
- Use $(intcmp ...) to compare integers if GNU Make >= 4.4 is used
- Use $(file ...) to read a file if GNU Make >= 4.2 is used
- Print error if GNU Make older than 3.82 is used
- Allow modpost to detect section mismatches with Clang LTO
- Include vmlinuz.efi into kernel tarballs for arm64 CONFIG_EFI_ZBOOT=y
* tag 'kbuild-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (29 commits)
buildtar: fix tarballs with EFI_ZBOOT enabled
modpost: Include '.text.*' in TEXT_SECTIONS
padata: Mark padata_work_init() as __ref
kbuild: ensure Make >= 3.82 is used
kbuild: refactor the prerequisites of the modpost rule
kbuild: change module.order to list *.o instead of *.ko
kbuild: use .NOTINTERMEDIATE for future GNU Make versions
kconfig: refactor Makefile to reduce process forks
kbuild: add read-file macro
kbuild: do not sort after reading modules.order
kbuild: add test-{ge,gt,le,lt} macros
Documentation: raise minimum supported version of binutils to 2.25
kbuild: add -Wundef to KBUILD_CPPFLAGS for W=1 builds
kbuild: move -Werror from KBUILD_CFLAGS to KBUILD_CPPFLAGS
kbuild: Port silent mode detection to future gnu make.
init/version.c: remove #include <generated/utsrelease.h>
firmware_loader: remove #include <generated/utsrelease.h>
modpost: Mark uuid_le type to be suitable only for MEI
kbuild: add ability to make source rpm buildable using koji
kbuild: warn objects shared among multiple modules
...
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Linus Torvalds
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eb67d239f3 |
RISC-V Patches for the 6.2 Merge Window, Part 1
* Support for the T-Head PMU via the perf subsystem. * ftrace support for rv32. * Support for non-volatile memory devices. * Various fixes and cleanups. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmOZ6WsTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiWGcD/wLGiHq3ekQhl5D+CaA1WlJ5XzQFfY2 bv1ZCZGdjuiv66jiMlmEsbpfUCk3bSAIjCO3MHQNDmTuPJztCHVJXOHbZFWItzzO soW4nXHKW1sGHa7hDLGQUPkltA48OdPoyqEDvlnpyEWFT+2xHwdFEURWE85FXGeq ZzFSKUQqX/V52n9TS4M4QtmNnQatR3TgIs8ttzD4JqwWFBbp4/iBfIGt6n3W24XH 9lKWikO4YOYUPl0KVIakM4d8NmX7g+7vhCKWavLke1fF/IQOlyWwA0eM8ryj33OG L1nFkqfF3mCw9i72WHftlc0rAgVqcYS8ntnQkPNpt2zPp3xFjDwEy+XiZrRE+sAp m5Ma2Tkw7G3ueBtXwP1yo+EKa7PrVFbCRD/rEpLJAC6+9ktvc7cYs39E08O+wrwT qkYThDolovqMOqfOq6afEGy5lfIa5U00vxK+3MXiE3eLEjHSJhwTXadUbwyMjJWE zOwA6p5NfDFzklESSNTtIBY85Zlh/g2q6GWCy7yBQnlaSdbpDxcnAlSZipq66Iqm 9ytdZiHid4BIRQxr5qyXTB184BvFnWNRs9NGhCj38uLEnuxwSChzwoh/WPDxLNte U9ouvwJO5U2qAZsMGJhY8W2s/9WvWpSqRhSMA/nnNV1Hh+URFz8rFXAln6kNn//v j+cYGCyjLnO1hg== =4Ak2 -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for the T-Head PMU via the perf subsystem - ftrace support for rv32 - Support for non-volatile memory devices - Various fixes and cleanups * tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (52 commits) Documentation: RISC-V: patch-acceptance: s/implementor/implementer Documentation: RISC-V: Mention the UEFI Standards Documentation: RISC-V: Allow patches for non-standard behavior Documentation: RISC-V: Fix a typo in patch-acceptance riscv: Fixup compile error with !MMU riscv: Fix P4D_SHIFT definition for 3-level page table mode riscv: Apply a static assert to riscv_isa_ext_id RISC-V: Add some comments about the shadow and overflow stacks RISC-V: Align the shadow stack RISC-V: Ensure Zicbom has a valid block size RISC-V: Introduce riscv_isa_extension_check RISC-V: Improve use of isa2hwcap[] riscv: Don't duplicate _ALTERNATIVE_CFG* macros riscv: alternatives: Drop the underscores from the assembly macro names riscv: alternatives: Don't name unused macro parameters riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2 riscv: mm: call best_map_size many times during linear-mapping riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a riscv: Fix crash during early errata patching riscv: boot: add zstd support ... |
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Linus Torvalds
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e2ca6ba6ba |
MM patches for 6.2-rc1.
- More userfaultfs work from Peter Xu. - Several convert-to-folios series from Sidhartha Kumar and Huang Ying. - Some filemap cleanups from Vishal Moola. - David Hildenbrand added the ability to selftest anon memory COW handling. - Some cpuset simplifications from Liu Shixin. - Addition of vmalloc tracing support by Uladzislau Rezki. - Some pagecache folioifications and simplifications from Matthew Wilcox. - A pagemap cleanup from Kefeng Wang: we have VM_ACCESS_FLAGS, so use it. - Miguel Ojeda contributed some cleanups for our use of the __no_sanitize_thread__ gcc keyword. This series shold have been in the non-MM tree, my bad. - Naoya Horiguchi improved the interaction between memory poisoning and memory section removal for huge pages. - DAMON cleanups and tuneups from SeongJae Park - Tony Luck fixed the handling of COW faults against poisoned pages. - Peter Xu utilized the PTE marker code for handling swapin errors. - Hugh Dickins reworked compound page mapcount handling, simplifying it and making it more efficient. - Removal of the autonuma savedwrite infrastructure from Nadav Amit and David Hildenbrand. - zram support for multiple compression streams from Sergey Senozhatsky. - David Hildenbrand reworked the GUP code's R/O long-term pinning so that drivers no longer need to use the FOLL_FORCE workaround which didn't work very well anyway. - Mel Gorman altered the page allocator so that local IRQs can remnain enabled during per-cpu page allocations. - Vishal Moola removed the try_to_release_page() wrapper. - Stefan Roesch added some per-BDI sysfs tunables which are used to prevent network block devices from dirtying excessive amounts of pagecache. - David Hildenbrand did some cleanup and repair work on KSM COW breaking. - Nhat Pham and Johannes Weiner have implemented writeback in zswap's zsmalloc backend. - Brian Foster has fixed a longstanding corner-case oddity in file[map]_write_and_wait_range(). - sparse-vmemmap changes for MIPS, LoongArch and NIOS2 from Feiyang Chen. - Shiyang Ruan has done some work on fsdax, to make its reflink mode work better under xfstests. Better, but still not perfect. - Christoph Hellwig has removed the .writepage() method from several filesystems. They only need .writepages(). - Yosry Ahmed wrote a series which fixes the memcg reclaim target beancounting. - David Hildenbrand has fixed some of our MM selftests for 32-bit machines. - Many singleton patches, as usual. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTTMBEPP41GrTpTJgfdBJ7gKXxAjgUCY5j6ZwAKCRDdBJ7gKXxA jkDYAP9qNeVqp9iuHjZNTqzMXkfmJPsw2kmy2P+VdzYVuQRcJgEAgoV9d7oMq4ml CodAgiA51qwzId3GRytIo/tfWZSezgA= =d19R -----END PGP SIGNATURE----- Merge tag 'mm-stable-2022-12-13' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Pull MM updates from Andrew Morton: - More userfaultfs work from Peter Xu - Several convert-to-folios series from Sidhartha Kumar and Huang Ying - Some filemap cleanups from Vishal Moola - David Hildenbrand added the ability to selftest anon memory COW handling - Some cpuset simplifications from Liu Shixin - Addition of vmalloc tracing support by Uladzislau Rezki - Some pagecache folioifications and simplifications from Matthew Wilcox - A pagemap cleanup from Kefeng Wang: we have VM_ACCESS_FLAGS, so use it - Miguel Ojeda contributed some cleanups for our use of the __no_sanitize_thread__ gcc keyword. This series should have been in the non-MM tree, my bad - Naoya Horiguchi improved the interaction between memory poisoning and memory section removal for huge pages - DAMON cleanups and tuneups from SeongJae Park - Tony Luck fixed the handling of COW faults against poisoned pages - Peter Xu utilized the PTE marker code for handling swapin errors - Hugh Dickins reworked compound page mapcount handling, simplifying it and making it more efficient - Removal of the autonuma savedwrite infrastructure from Nadav Amit and David Hildenbrand - zram support for multiple compression streams from Sergey Senozhatsky - David Hildenbrand reworked the GUP code's R/O long-term pinning so that drivers no longer need to use the FOLL_FORCE workaround which didn't work very well anyway - Mel Gorman altered the page allocator so that local IRQs can remnain enabled during per-cpu page allocations - Vishal Moola removed the try_to_release_page() wrapper - Stefan Roesch added some per-BDI sysfs tunables which are used to prevent network block devices from dirtying excessive amounts of pagecache - David Hildenbrand did some cleanup and repair work on KSM COW breaking - Nhat Pham and Johannes Weiner have implemented writeback in zswap's zsmalloc backend - Brian Foster has fixed a longstanding corner-case oddity in file[map]_write_and_wait_range() - sparse-vmemmap changes for MIPS, LoongArch and NIOS2 from Feiyang Chen - Shiyang Ruan has done some work on fsdax, to make its reflink mode work better under xfstests. Better, but still not perfect - Christoph Hellwig has removed the .writepage() method from several filesystems. They only need .writepages() - Yosry Ahmed wrote a series which fixes the memcg reclaim target beancounting - David Hildenbrand has fixed some of our MM selftests for 32-bit machines - Many singleton patches, as usual * tag 'mm-stable-2022-12-13' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (313 commits) mm/hugetlb: set head flag before setting compound_order in __prep_compound_gigantic_folio mm: mmu_gather: allow more than one batch of delayed rmaps mm: fix typo in struct pglist_data code comment kmsan: fix memcpy tests mm: add cond_resched() in swapin_walk_pmd_entry() mm: do not show fs mm pc for VM_LOCKONFAULT pages selftests/vm: ksm_functional_tests: fixes for 32bit selftests/vm: cow: fix compile warning on 32bit selftests/vm: madv_populate: fix missing MADV_POPULATE_(READ|WRITE) definitions mm/gup_test: fix PIN_LONGTERM_TEST_READ with highmem mm,thp,rmap: fix races between updates of subpages_mapcount mm: memcg: fix swapcached stat accounting mm: add nodes= arg to memory.reclaim mm: disable top-tier fallback to reclaim on proactive reclaim selftests: cgroup: make sure reclaim target memcg is unprotected selftests: cgroup: refactor proactive reclaim code to reclaim_until() mm: memcg: fix stale protection of reclaim target memcg mm/mmap: properly unaccount memory on mas_preallocate() failure omfs: remove ->writepage jfs: remove ->writepage ... |