Commit Graph

9631 Commits

Author SHA1 Message Date
Miquel Raynal
869acb874f * Raw NAND changes
The use of for_each_child_of_node_scoped() has been spread into the
 subsystem drivers. Aside from that, a couple of exit path have been
 fixed (mtk, denali), the TI GPMC bindings have been enhanced to comply
 with up-to-date partition descriptions and as always there is a load of
 small and misc fixes.
 
 * SPI-NAND changes
 
 The most impacting series this cycle is bringing support for continuous
 reads in the SPI-NAND subsystem. This is a feature already merged in the
 raw NAND subsystem which allows optimizing the internal fetch times in
 the chip while reading sequential pages within an eraseblock. For now
 only Macronix NANDs benefit from this feature. While we are talking
 about Macronix, some of their chip need an explicit action for selecting
 a different plane, and support for it has also been brought.
 
 The bitflip threshold has also been set to the same arbitrary level as
 in the raw NAND subsystem to optimize wear leveling decisions, and
 finally support for a new Winbond chip has been added.
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Merge tag 'nand/for-6.12' into mtd/next

* Raw NAND changes

The use of for_each_child_of_node_scoped() has been spread into the
subsystem drivers. Aside from that, a couple of exit path have been
fixed (mtk, denali), the TI GPMC bindings have been enhanced to comply
with up-to-date partition descriptions and as always there is a load of
small and misc fixes.

* SPI-NAND changes

The most impacting series this cycle is bringing support for continuous
reads in the SPI-NAND subsystem. This is a feature already merged in the
raw NAND subsystem which allows optimizing the internal fetch times in
the chip while reading sequential pages within an eraseblock. For now
only Macronix NANDs benefit from this feature. While we are talking
about Macronix, some of their chip need an explicit action for selecting
a different plane, and support for it has also been brought.

The bitflip threshold has also been set to the same arbitrary level as
in the raw NAND subsystem to optimize wear leveling decisions, and
finally support for a new Winbond chip has been added.
2024-09-15 12:38:22 +02:00
Miquel Raynal
5d09909a19 SPI NOR changes for 6.12
Notable changes:
 
 - Add Write Protect support for N25Q064A.
 
 - New flash support for Zetta ZD25Q128C and Spansion S28HS256T.
 
 - Fix a NULL dereference in probe path for flashes without a name. The
   probe path tries to access the name without checking its existence
   first. S28HS256T is the first flash to define its entry without a
   name, uncovering this issue.
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Merge tag 'spi-nor/for-6.12' into mtd/next

SPI NOR changes for 6.12

Notable changes:

- Add Write Protect support for N25Q064A.

- New flash support for Zetta ZD25Q128C and Spansion S28HS256T.

- Fix a NULL dereference in probe path for flashes without a name. The
  probe path tries to access the name without checking its existence
  first. S28HS256T is the first flash to define its entry without a
  name, uncovering this issue.
2024-09-15 12:37:29 +02:00
Michael Walle
ac5bfa968b mtd: spi-nor: fix flash probing
Fix flash probing by name. Flash entries without a name are allowed
since commit 15eb8303bb ("mtd: spi-nor: mark the flash name as
obsolete"). But it was just until recently that a flash entry without a
name was actually introduced. This triggers a bug in the legacy probe by
name path. Skip entries without a name to fix it.

Fixes: 2095e7da8049 ("mtd: spi-nor: spansion: Add support for S28HS256T")
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Closes: https://lore.kernel.org/r/66c8ebb0-1324-4ad9-9926-8d4eb7e1e63a@nvidia.com/
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240909072854.812206-1-mwalle@kernel.org
2024-09-14 17:56:31 +02:00
Takahiro Kuwano
1dc6cd4f94 mtd: spi-nor: spansion: Add support for S28HS256T
Infineon S28HS256T is 256Mb Octal SPI device which has same
functionalities with 512Mb and 1Gb parts.

Link: https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c8fc2dd9c018fc66787aa0657
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240830080428.6994-1-Takahiro.Kuwano@infineon.com
2024-09-14 17:56:31 +02:00
Michael Walle
a84d45217c mtd: spi-nor: winbond: add Zetta ZD25Q128C support
Zetta normally uses BAh as its vendor ID. But for the ZD25Q128C they
took the one from Winbond and messed up the size parameters in SFDP.
Most functions seem compatible with the W25Q128, we just have to fix up
the size.

Link: http://www.zettadevice.com/upload/file/20150821/DS_Zetta_25Q128_RevA.pdf
Link: https://www.lcsc.com/datasheet/lcsc_datasheet_2312081757_Zetta-ZD25Q128CSIGT_C19626875.pdf
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240804221535.291923-1-mwalle@kernel.org
2024-09-14 17:56:31 +02:00
Brian Norris
86fd0e6410 mtd: spi-nor: micron-st: Add n25q064a WP support
These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
OnHub devices are write-protected by default (same as any other
ChromeOS/Chromebook system). I've referred to datasheets, and tested on
OnHub devices.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240726185825.142733-1-computersforpeace@gmail.com
2024-09-14 17:56:31 +02:00
Csókás, Bence
18bcb4aa54 mtd: spi-nor: sst: Factor out common write operation to sst_nor_write_data()
Writing to the Flash in `sst_nor_write()` is a 3-step process:
first an optional one-byte write to get 2-byte-aligned, then the
bulk of the data is written out in vendor-specific 2-byte writes.
Finally, if there's a byte left over, another one-byte write.
This was implemented 3 times in the body of `sst_nor_write()`.
To reduce code duplication, factor out these sub-steps to their
own function.

Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
[pratyush@kernel.org: fixup whitespace, use %zu instead of %i in WARN()]
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20240710091401.1282824-1-csokas.bence@prolan.hu
2024-09-14 17:56:31 +02:00
Cheng Ming Lin
475aadeba5 mtd: spinand: macronix: Flag parts needing explicit plane select
Macronix serial NAND flash with a two-plane structure requires
insertion of the Plane Select bit into the column address during
the write_to_cache operation.

Additionally, for MX35{U,F}2G14AC and MX35LF2GE4AB, insertion of
the Plane Select bit into the column address is required during
the read_from_cache operation.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240909092643.2434479-3-linchengming884@gmail.com
2024-09-09 11:52:06 +02:00
Cheng Ming Lin
ca229bdbef mtd: spinand: Add support for setting plane select bits
Add two flags for inserting the Plane Select bit into the column
address during the write_to_cache and the read_from_cache operation.

Add the SPINAND_HAS_PROG_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the write_to_cache operation.

Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the read_from_cache operation.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240909092643.2434479-2-linchengming884@gmail.com
2024-09-09 11:52:06 +02:00
Miquel Raynal
2073ae37d5 mtd: rawnand: mtk: Fix init error path
Reviewing a series converting the for_each_chil_of_node() loops into
their _scoped variants made me realize there was no cleanup of the
already registered NAND devices upon error which may leak memory on
systems with more than a chip when this error occurs. We should call the
_nand_chips_cleanup() function when this happens.

Fixes: 1d6b1e4649 ("mtd: mediatek: driver for MTK Smart Device")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20240826153019.67106-2-miquel.raynal@bootlin.com
2024-09-09 11:51:50 +02:00
Charles Han
3959998298 mtd: powernv: Add check devm_kasprintf() returned value
devm_kasprintf() can return a NULL pointer on failure but this
returned value is not checked.

Fixes: acfe63ec1c ("mtd: Convert to using %pOFn instead of device_node.name")
Signed-off-by: Charles Han <hanchunchao@inspur.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240828092427.128177-1-hanchunchao@inspur.com
2024-09-06 17:10:08 +02:00
Miquel Raynal
81cb3be326 mtd: rawnand: mtk: Factorize out the logic cleaning mtk chips
There are some un-freed resources in one of the error path which would
benefit from a helper going through all the registered mtk chips one by
one and perform all the necessary cleanup. This is precisely what the
remove path does, so let's extract the logic in a helper.

There is no functional change.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20240826153019.67106-1-miquel.raynal@bootlin.com
2024-09-06 17:05:47 +02:00
Alexander Dahl
9b3c395096 mtd: rawnand: atmel: Add message on DMA usage
Like for other atmel drivers (serial, crypto, mmc, …), too.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240828063707.73869-1-ada@thorsis.com
2024-09-06 17:00:20 +02:00
Miquel Raynal
9ab52d9800 mtd: rawnand: meson: Fix typo in function name
There is a reason why sometime we write "NAND chip" with an 's'. It
usually means several chips can be managed by the same controller. So
when initializing a single chip at a time, the wording "chip" must be
used, otherwise when talking about all the chips managed by the
controller, we want to use "chips". Fix the function name to clarify the
meson_nfc_nand_chip*s*_cleanup() helper intend.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20240826153158.67334-1-miquel.raynal@bootlin.com
2024-09-06 17:00:18 +02:00
Miquel Raynal
1181385786 mtd: spi-nand: macronix: Continuous read support
Enabling continuous read support implies several changes which must be
done atomically in order to keep the code base consistent and
bisectable.

1/ Retrieving bitflips differently

Improve the helper retrieving the number of bitflips to support the case
where many pages have been read instead of just one. In this case, if
there is one page with bitflips, we cannot know the detail and just get
the information of the maximum number of bitflips corrected in the most
corrupted chunk. Compatible Macronix flashes return:
- the ECC status for the last page read (bits 0-3),
- the amount of bitflips for the whole read operation (bits 4-7).
Hence, when reading two consecutive pages, if there was 2 bits corrected
at most in one chunk, we return this amount times (arbitrary) the number
read pages. It is probably a very pessimistic calculation in most cases,
but still less pessimistic than if we multiplied this amount by the
number of chunks. Anyway, this is just for statistics, the important
data is the maximum amount of bitflips, which leads to wear leveling.

2/ Configuring, enabling and disabling the feature

Create an init function for allocating a vendor structure. Use this
vendor structure to cache the internal continuous read state. The state
is being used to discriminate between the two bitflips retrieval
methods. Finally, helpers for enabling and disabling sequential reads
are also created.

3/ Fill the chips table

Flag all the chips supporting the feature with the ->set_cont_read()
helper.

In order to validate the changes, I modified the mtd-utils test suite
with extended versions of nandbiterrs, nanddump and flash_speed in order
to support, test and benchmark continuous reads. I also ran all the UBI
tests successfully.

The nandbiterrs tool allows to track the ECC efficiency and
feedback. Here is its default output (stripped):

Successfully corrected 0 bit errors per subpage
Read reported 1 corrected bit errors
Successfully corrected 1 bit errors per subpage
Read reported 2 corrected bit errors
Successfully corrected 2 bit errors per subpage
Read reported 3 corrected bit errors
Successfully corrected 3 bit errors per subpage
Read reported 4 corrected bit errors
Successfully corrected 4 bit errors per subpage
Read reported 5 corrected bit errors
Successfully corrected 5 bit errors per subpage
Read reported 6 corrected bit errors
Successfully corrected 6 bit errors per subpage
Read reported 7 corrected bit errors
Successfully corrected 7 bit errors per subpage
Read reported 8 corrected bit errors
Successfully corrected 8 bit errors per subpage
Failed to recover 1 bitflips
Read error after 9 bit errors per page

The output using the continuous option over two pages (the second page
is kept intact):

Successfully corrected 0 bit errors per subpage
Read reported 2 corrected bit errors
Successfully corrected 1 bit errors per subpage
Read reported 4 corrected bit errors
Successfully corrected 2 bit errors per subpage
Read reported 6 corrected bit errors
Successfully corrected 3 bit errors per subpage
Read reported 8 corrected bit errors
Successfully corrected 4 bit errors per subpage
Read reported 10 corrected bit errors
Successfully corrected 5 bit errors per subpage
Read reported 12 corrected bit errors
Successfully corrected 6 bit errors per subpage
Read reported 14 corrected bit errors
Successfully corrected 7 bit errors per subpage
Read reported 16 corrected bit errors
Successfully corrected 8 bit errors per subpage
Failed to recover 1 bitflips
Read error after 9 bit errors per page

Regarding the throughput improvements, tests have been conducted in
1-1-1 and 1-1-4 modes, reading a full block X pages at a
time, X ranging from 1 to 64 (size of a block with the tested device).
The percent value on the right is the comparison of the same test
conducted without the continuous read feature, ie. reading X pages in
one single user request, which got naturally split by the core whit the
continuous read optimization disabled into single-page reads.

* 1-1-1 result:
1 page read speed is 2634 KiB/s
2 page read speed is 2704 KiB/s (+3%)
3 page read speed is 2747 KiB/s (+5%)
4 page read speed is 2804 KiB/s (+7%)
5 page read speed is 2782 KiB/s
6 page read speed is 2826 KiB/s
7 page read speed is 2834 KiB/s
8 page read speed is 2821 KiB/s
9 page read speed is 2846 KiB/s
10 page read speed is 2819 KiB/s
11 page read speed is 2871 KiB/s (+10%)
12 page read speed is 2823 KiB/s
13 page read speed is 2880 KiB/s
14 page read speed is 2842 KiB/s
15 page read speed is 2862 KiB/s
16 page read speed is 2837 KiB/s
32 page read speed is 2879 KiB/s
64 page read speed is 2842 KiB/s

* 1-1-4 result:
1 page read speed is 7562 KiB/s
2 page read speed is 8904 KiB/s (+15%)
3 page read speed is 9655 KiB/s (+25%)
4 page read speed is 10118 KiB/s (+30%)
5 page read speed is 10084 KiB/s
6 page read speed is 10300 KiB/s
7 page read speed is 10434 KiB/s (+35%)
8 page read speed is 10406 KiB/s
9 page read speed is 10769 KiB/s (+40%)
10 page read speed is 10666 KiB/s
11 page read speed is 10757 KiB/s
12 page read speed is 10835 KiB/s
13 page read speed is 10976 KiB/s
14 page read speed is 11200 KiB/s
15 page read speed is 11009 KiB/s
16 page read speed is 11082 KiB/s
32 page read speed is 11352 KiB/s (+45%)
64 page read speed is 11403 KiB/s

This work has received support and could be achieved thanks to
Alvin Zhou <alvinzhou@mxic.com.tw>.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-10-miquel.raynal@bootlin.com
2024-09-06 17:00:16 +02:00
Miquel Raynal
e1f251e1aa mtd: spi-nand: macronix: Add a possible bitflip status flag
Macronix SPI-NANDs encode the ECC status into two bits. There are three
standard situations (no bitflip, bitflips, error), and an additional
possible situation which is only triggered when configuring the 0x10
configuration register, allowing to know, if there have been bitflips,
whether the maximum amount of bitflips was above a configurable
threshold or not. In all cases, for now, s this configuration register
is unset, it means the same as "there are bitflips".

This value is maybe standard, maybe not. For now, let's define it in the
Macronix driver, we can safely move it to a shared place later if that
is relevant.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-9-miquel.raynal@bootlin.com
2024-09-06 17:00:14 +02:00
Miquel Raynal
18073e395c mtd: spi-nand: macronix: Extract the bitflip retrieval logic
With GET_STATUS commands, SPI-NAND devices can tell the status of the
last read operation, in particular if there was:
- no bitflips
- corrected bitflips
- uncorrectable bitflips

The next step then to read an ECC status register and retrieve the
amount of bitflips, when relevant, if possible. The logic used here
works well for now, but will no longer apply to continuous reads. In
order to prepare the introduction of continuous reads, let's factorize
out the code that is specific to single-page reads.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-8-miquel.raynal@bootlin.com
2024-09-06 17:00:12 +02:00
Miquel Raynal
ed148d30ea mtd: spi-nand: macronix: Fix helper name
Use "macronix_" instead of "mx35lf1ge4ab_" as common prefix for the
->get_status() callback name. This callback is used by many different
families, there is no variation in the implementation so far.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-7-miquel.raynal@bootlin.com
2024-09-06 17:00:10 +02:00
Miquel Raynal
a06f2e7cc4 mtd: spi-nand: Expose spinand_write_reg_op()
This helper function will soon be used from a vendor driver, let's
export it through the spinand.h header. No need for any export, as there
is currently no reason for any module to need it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-6-miquel.raynal@bootlin.com
2024-09-06 17:00:08 +02:00
Miquel Raynal
631cfdd052 mtd: spi-nand: Add continuous read support
A regular page read consist in:
- Asking one page of content from the NAND array to be loaded in the
  chip's SRAM,
- Waiting for the operation to be done,
- Retrieving the data (I/O phase) from the chip's SRAM.

When reading several sequential pages, the above operation is repeated
over and over. There is however a way to optimize these accesses, by
enabling continuous reads. The feature requires the NAND chip to have a
second internal SRAM area plus a bit of additional internal logic to
trigger another internal transfer between the NAND array and the second
SRAM area while the I/O phase is ongoing. Once the first I/O phase is
done, the host can continue reading more data, continuously, as the chip
will automatically switch to the second SRAM content (which has already
been loaded) and in turns trigger the next load into the first SRAM area
again.

From an instruction perspective, the command op-codes are different, but
the same cycles are required. The only difference is that after a
continuous read (which is stopped by a CS deassert), the host must
observe a delay of tRST. However, because there is no guarantee in Linux
regarding the actual state of the CS pin after a transfer (in order to
speed-up the next transfer if targeting the same device), it was
necessary to manually end the continuous read with a configuration
register write operation.

Continuous reads have two main drawbacks:
* They only work on full pages (column address ignored)
* Only the main data area is pulled, out-of-band bytes are not
  accessible. Said otherwise, the feature can only be useful with on-die
  ECC engines.

Performance wise, measures have been performed on a Zynq platform using
Macronix SPI-NAND controller with a Macronix chip (based on the
flash_speed tool modified for testing sequential reads):
- 1-1-1 mode: performances improved from +3% (2-pages) up to +10% after
              a dozen pages.
- 1-1-4 mode: performances improved from +15% (2-pages) up to +40% after
              a dozen pages.

This series is based on a previous work from Macronix engineer Jaime
Liao.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-5-miquel.raynal@bootlin.com
2024-09-06 17:00:06 +02:00
Miquel Raynal
79da17072e mtd: spi-nand: Isolate the MTD read logic in a helper
There is currently only a single path for performing page reads as
requested by the MTD layer. Soon there will be two:
- a "regular" page read
- a continuous page read

Let's extract the page read logic in a dedicated helper, so the
introduction of continuous page reads will be as easy as checking whether
continuous reads shall/can be used and calling one helper or the other.

There is not behavioral change intended.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-4-miquel.raynal@bootlin.com
2024-09-06 17:00:04 +02:00
Jinjie Ruan
b59fdc7f38 mtd: rawnand: sunxi: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-11-ruanjinjie@huawei.com
2024-09-06 16:59:58 +02:00
Jinjie Ruan
f5b30c7f47 mtd: rawnand: stm32_fmc2: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-10-ruanjinjie@huawei.com
2024-09-06 16:59:56 +02:00
Jinjie Ruan
f3b3c47ca4 mtd: rawnand: renesas: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-9-ruanjinjie@huawei.com
2024-09-06 16:59:54 +02:00
Jinjie Ruan
8795952679 mtd: rawnand: mtk: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-8-ruanjinjie@huawei.com
2024-09-06 16:59:52 +02:00
Jinjie Ruan
ee06c7821d mtd: rawnand: meson: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-7-ruanjinjie@huawei.com
2024-09-06 16:59:50 +02:00
Jinjie Ruan
0d5c32b5c8 mtd: rawnand: rockchip: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-6-ruanjinjie@huawei.com
2024-09-06 16:59:48 +02:00
Jinjie Ruan
707f2d0720 mtd: rawnand: marvell: drm/rockchip: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-5-ruanjinjie@huawei.com
2024-09-06 16:59:46 +02:00
Jinjie Ruan
e2e4eddf7b mtd: rawnand: pl353: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop by using for_each_child_of_node_scoped().

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-4-ruanjinjie@huawei.com
2024-09-06 16:59:44 +02:00
Jinjie Ruan
fc214e50e2 mtd: rawnand: cadence: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop by using for_each_child_of_node_scoped().

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-3-ruanjinjie@huawei.com
2024-09-06 16:59:42 +02:00
Jinjie Ruan
7021a79768 mtd: rawnand: arasan: Use for_each_child_of_node_scoped()
Avoids the need for manual cleanup of_node_put() in early exits
from the loop.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826094328.2991664-2-ruanjinjie@huawei.com
2024-09-06 16:59:41 +02:00
Jinjie Ruan
3c0e167c21 mtd: rawnand: denali: Use the devm_clk_get_enabled() helper function
The devm_clk_get_enabled() helper:
  - calls devm_clk_get()
  - calls clk_prepare_enable() and registers what is needed in order to
    call clk_disable_unprepare() when needed, as a managed resource.

This simplifies the code.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826080408.2522978-1-ruanjinjie@huawei.com
2024-09-06 16:59:39 +02:00
Chen Ridong
d43b24f50d mtd: rawnand: denali: Fix missing pci_release_regions in probe and remove
The pci_release_regions was miss at error case, just add it.

Signed-off-by: Chen Ridong <chenridong@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826024339.476921-1-chenridong@huawei.com
2024-09-06 16:59:37 +02:00
Bartosz Golaszewski
ccce710134 mtd: rawnand: davinci: make platform_data private
There are no longer any users of the platform data for davinci rawnand
in board files. We can remove the public pdata headers and move the
structures that are still used into the driver compilation unit while
removing the rest.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240814122120.13975-1-brgl@bgdev.pl
2024-08-23 19:29:20 +02:00
Daniel Golle
1824520e74 mtd: spinand: set bitflip_threshold to 75% of ECC strength
Reporting an unclean read from SPI-NAND only when the maximum number
of correctable bitflip errors has been hit seems a bit late.
UBI LEB scrubbing, which depends on the lower MTD device reporting
correctable bitflips, then only kicks in when it's almost too late.

Set bitflip_threshold to 75% of the ECC strength, which is also the
default for raw NAND.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/2117e387260b0a96f95b8e1652ff79e0e2d71d53.1723427450.git.daniel@makrotopia.org
2024-08-23 19:29:18 +02:00
Robert Marko
e2a9fcb36e mtd: spinand: winbond: add support for W25N01KV
Add support for Winbond W25N01KV 1Gbit SPI-NAND.

It has 4-bit on-die ECC.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240805175125.6658-1-robimarko@gmail.com
2024-08-23 19:29:16 +02:00
Yan Zhen
175086cf4a mtd: concat: Use kmemdup_array instead of kmemdup for multiple allocation
When we are allocating an array, using kmemdup_array() to take care about
multiplication and possible overflows.

Also it makes auditing the code easier.

Signed-off-by: Yan Zhen <yanzhen@vivo.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240823110824.3895787-1-yanzhen@vivo.com
2024-08-23 19:25:51 +02:00
Colin Ian King
e334c01df2 mtd: parsers: bcm47xxpart: make read-only array possible_nvram_sizes static const
Don't populate the read-only array possible_nvram_sizes on the stack at
run time, instead make it static const.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240822164632.638171-1-colin.i.king@gmail.com
2024-08-23 19:25:49 +02:00
Rob Herring (Arm)
ea265e483e mtd: Use of_property_read_bool()
Use of_property_read_bool() to read boolean properties rather than
of_get_property(). This is part of a larger effort to remove callers
of of_get_property() and similar functions. of_get_property() leaks
the DT property data pointer which is a problem for dynamically
allocated nodes which may be freed.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240731191312.1710417-22-robh@kernel.org
2024-08-23 19:25:48 +02:00
Mirsad Todorovac
336c218dd7 mtd: slram: insert break after errors in parsing the map
GCC 12.3.0 compiler on linux-next next-20240709 tree found the execution
path in which, due to lazy evaluation, devlength isn't initialised with the
parsed string:

   289		while (map) {
   290			devname = devstart = devlength = NULL;
   291
   292			if (!(devname = strsep(&map, ","))) {
   293				E("slram: No devicename specified.\n");
   294				break;
   295			}
   296			T("slram: devname = %s\n", devname);
   297			if ((!map) || (!(devstart = strsep(&map, ",")))) {
   298				E("slram: No devicestart specified.\n");
   299			}
   300			T("slram: devstart = %s\n", devstart);
 → 301			if ((!map) || (!(devlength = strsep(&map, ",")))) {
   302				E("slram: No devicelength / -end specified.\n");
   303			}
 → 304			T("slram: devlength = %s\n", devlength);
   305			if (parse_cmdline(devname, devstart, devlength) != 0) {
   306				return(-EINVAL);
   307			}

Parsing should be finished after map == NULL, so a break is best inserted after
each E("slram: ... \n") error message.

Fixes: 1da177e4c3 ("Linux-2.6.12-rc2")
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Mirsad Todorovac <mtodorovac69@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240711234319.637824-1-mtodorovac69@gmail.com
2024-08-23 19:25:46 +02:00
Linus Torvalds
7e2d0ba732 This pull request contains updates (actually, just fixes) for UBI and UBIFS:
- Many fixes for power-cut issues by Zhihao Cheng
 - Another ubiblock error path fix
 - ubiblock section mismatch fix
 - Misc fixes all over the place
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Merge tag 'ubifs-for-linus-6.11-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull UBI and UBIFS updates from Richard Weinberger:

 - Many fixes for power-cut issues by Zhihao Cheng

 - Another ubiblock error path fix

 - ubiblock section mismatch fix

 - Misc fixes all over the place

* tag 'ubifs-for-linus-6.11-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  ubi: Fix ubi_init() ubiblock_exit() section mismatch
  ubifs: add check for crypto_shash_tfm_digest
  ubifs: Fix inconsistent inode size when powercut happens during appendant writing
  ubi: block: fix null-pointer-dereference in ubiblock_create()
  ubifs: fix kernel-doc warnings
  ubifs: correct UBIFS_DFS_DIR_LEN macro definition and improve code clarity
  mtd: ubi: Restore missing cleanup on ubi_init() failure path
  ubifs: dbg_orphan_check: Fix missed key type checking
  ubifs: Fix unattached inode when powercut happens in creating
  ubifs: Fix space leak when powercut happens in linking tmpfile
  ubifs: Move ui->data initialization after initializing security
  ubifs: Fix adding orphan entry twice for the same inode
  ubifs: Remove insert_dead_orphan from replaying orphan process
  Revert "ubifs: ubifs_symlink: Fix memleak of inode->i_link in error path"
  ubifs: Don't add xattr inode into orphan area
  ubifs: Fix unattached xattr inode if powercut happens after deleting
  mtd: ubi: avoid expensive do_div() on 32-bit machines
  mtd: ubi: make ubi_class constant
  ubi: eba: properly rollback inside self_check_eba
2024-07-28 11:51:51 -07:00
Richard Weinberger
92a286e902 ubi: Fix ubi_init() ubiblock_exit() section mismatch
Since ubiblock_exit() is now called from an init function,
the __exit section no longer makes sense.

Cc: Ben Hutchings <bwh@kernel.org>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202407131403.wZJpd8n2-lkp@intel.com/
Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Zhihao Cheng <chengzhihao1@huawei.com>
2024-07-28 20:08:25 +02:00
Linus Torvalds
c43a20e4a5 MTD changes:
- Nothing stands out for this merge window, mostly minor fixes, such as
   module descriptions, the use of debug macros and Makefile improvements.
 
 Raw NAND changes;
 
 - The Freescale MXC driver has been converted to the newer ->exec_op()
   interface. The meson driver now supports handling the boot ROM area
   with very specific ECC needs. Support for the iMX8QXP has been added
   to the GPMI driver. The lpx32xx driver now can get the DMA channels
   using DT entries. The Qcom binding has been improved to be more future
   proof by Rob. And then there is the usual load of misc and minor
   changes.
 
 SPI-NAND changes:
 
 - The Macronix vendor driver has been improved to support an extended ID
   to avoid conflicting with older devices after an ID reuse issue.
 
 SPI NOR changes:
 
 - Drop support for Xilinx S3AN flashes. These flashes are for the very
   old Xilinx Spartan 3 FPGAs and they need some awkward code in the core
   to support. Drop support for these flashes, along with the special
   handling we needed for them in the core like non-power-of-2 page size
   handling and the .setup() callback.
 
 - Fix regression for old w25q128 flashes without SFDP tables. Commit
   83e824a4a5 ("mtd: spi-nor: Correct flags for Winbond w25q128")
   dropped support for such devices under the assumption that they aren't
   being used anymore. Users have now surfaced [0] so fix the regression
   by supporting both kind of devices.
 
 - Core cleanups including removal of SPI_NOR_NO_FR flag and
   simplification of spi_nor_get_flash_info().
 
 [0] https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/
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Merge tag 'mtd/for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "Nothing stands out for this merge window, mostly minor fixes, such as
  module descriptions, the use of debug macros and Makefile
  improvements.

  Raw NAND changes;

   - The Freescale MXC driver has been converted to the newer
     '->exec_op()' interface

   - The meson driver now supports handling the boot ROM area with very
     specific ECC needs

   - Support for the iMX8QXP has been added to the GPMI driver

   - The lpx32xx driver now can get the DMA channels using DT entries

   - The Qcom binding has been improved to be more future proof by Rob

   - And then there is the usual load of misc and minor changes

  SPI-NAND changes:

   - The Macronix vendor driver has been improved to support an extended
     ID to avoid conflicting with older devices after an ID reuse issue

  SPI NOR changes:

   - Drop support for Xilinx S3AN flashes. These flashes are for the
     very old Xilinx Spartan 3 FPGAs and they need some awkward code in
     the core to support.

     Drop support for these flashes, along with the special handling we
     needed for them in the core like non-power-of-2 page size handling
     and the .setup() callback.

   - Fix regression for old w25q128 flashes without SFDP tables.

     Commit 83e824a4a5 ("mtd: spi-nor: Correct flags for Winbond
     w25q128") dropped support for such devices under the assumption
     that they aren't being used anymore. Users have now surfaced [0] so
     fix the regression by supporting both kind of devices.

   - Core cleanups including removal of SPI_NOR_NO_FR flag and
     simplification of spi_nor_get_flash_info()"

Link: https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/ [0]

* tag 'mtd/for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (28 commits)
  mtd: rawnand: lpx32xx: Fix dma_request_chan() error checks
  mtd: spinand: macronix: Add support for serial NAND flash
  mtd: spinand: macronix: Add support for reading Device ID 2
  mtd: rawnand: lpx32xx: Request DMA channels using DT entries
  dt-bindings: mtd: qcom,nandc: Define properties at top-level
  mtd: rawnand: intel: use 'time_left' variable with wait_for_completion_timeout()
  mtd: rawnand: mxc: use 'time_left' variable with wait_for_completion_timeout()
  mtd: rawnand: gpmi: add iMX8QXP support.
  mtd: rawnand: gpmi: add 'support_edo_timing' in gpmi_devdata
  mtd: cmdlinepart: Replace `dbg()` macro with `pr_debug()`
  mtd: add missing MODULE_DESCRIPTION() macros
  mtd: make mtd_test.c a separate module
  dt-bindings: mtd: gpmi-nand: Add 'fsl,imx8qxp-gpmi-nand' compatible string
  mtd: rawnand: cadence: remove unused struct 'ecc_info'
  mtd: rawnand: mxc: support software ECC
  mtd: rawnand: mxc: implement exec_op
  mtd: rawnand: mxc: separate page read from ecc calc
  mtd: spi-nor: winbond: fix w25q128 regression
  mtd: spi-nor: simplify spi_nor_get_flash_info()
  mtd: spi-nor: get rid of SPI_NOR_NO_FR
  ...
2024-07-20 11:52:17 -07:00
Miquel Raynal
78a0b13f57 Raw NAND changes;
The Freescale MXC driver has been converted to the newer ->exec_op()
 interface. The meson driver now supports handling the boot ROM area with
 very specific ECC needs. Support for the iMX8QXP has been added to the
 GPMI driver. The lpx32xx driver now can get the DMA channels using DT
 entries. The Qcom binding has been improved to be more future proof by
 Rob. And then there is the usual load of misc and minor changes.
 
 SPI-NAND changes:
 
 The Macronix vendor driver has been improved to support an extended ID
 to avoid conflicting with older devices after an ID reuse issue.
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Merge tag 'nand/for-6.11' into mtd/next

Raw NAND changes;

The Freescale MXC driver has been converted to the newer ->exec_op()
interface. The meson driver now supports handling the boot ROM area with
very specific ECC needs. Support for the iMX8QXP has been added to the
GPMI driver. The lpx32xx driver now can get the DMA channels using DT
entries. The Qcom binding has been improved to be more future proof by
Rob. And then there is the usual load of misc and minor changes.

SPI-NAND changes:

The Macronix vendor driver has been improved to support an extended ID
to avoid conflicting with older devices after an ID reuse issue.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-07-20 14:24:38 +02:00
Miquel Raynal
b93f410b8b SPI NOR changes for 6.11
Notable changes:
 
 - Drop support for Xilinx S3AN flashes. These flashes are for the very
   old Xilinx Spartan 3 FPGAs and they need some awkward code in the core
   to support. Drop support for these flashes, along with the special
   handling we needed for them in the core like non-power-of-2 page size
   handling and the .setup() callback.
 
 - Fix regression for old w25q128 flashes without SFDP tables. Commit
   83e824a4a5 ("mtd: spi-nor: Correct flags for Winbond w25q128")
   dropped support for such devices under the assumption that they aren't
   being used anymore. Users have now surfaced [0] so fix the regression
   by supporting both kind of devices.
 
 - Core cleanups including removal of SPI_NOR_NO_FR flag and
   simplification of spi_nor_get_flash_info().
 
 [0] https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/
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Merge tag 'spi-nor/for-6.11' into mtd/next

SPI NOR changes for 6.11

Notable changes:

- Drop support for Xilinx S3AN flashes. These flashes are for the very
  old Xilinx Spartan 3 FPGAs and they need some awkward code in the core
  to support. Drop support for these flashes, along with the special
  handling we needed for them in the core like non-power-of-2 page size
  handling and the .setup() callback.

- Fix regression for old w25q128 flashes without SFDP tables. Commit
  83e824a4a5 ("mtd: spi-nor: Correct flags for Winbond w25q128")
  dropped support for such devices under the assumption that they aren't
  being used anymore. Users have now surfaced [0] so fix the regression
  by supporting both kind of devices.

- Core cleanups including removal of SPI_NOR_NO_FR flag and
  simplification of spi_nor_get_flash_info().

[0] https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-07-20 14:24:26 +02:00
Piotr Wojtaszczyk
a503f91a36 mtd: rawnand: lpx32xx: Fix dma_request_chan() error checks
The dma_request_chan() returns error pointer in case of error, while
dma_request_channel() returns NULL in case of error therefore different
error checks are needed for the two.

Fixes: 7326d3fb1e ("mtd: rawnand: lpx32xx: Request DMA channels using DT entries")
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240705115139.126522-1-piotr.wojtaszczyk@timesys.com
2024-07-17 10:39:39 +02:00
Cheng Ming Lin
d29e8e28d6 mtd: spinand: macronix: Add support for serial NAND flash
MX35{U,L}F{2,4}G24AD-Z4I8 are Macronix serial NAND flashes.

Their main difference from MX35{U,L}F{2,4}G24AD lies in
the plane number. The plane number for those with the
postfix Z4I8 is 1.

These flashes have been validated on Xilinx zynq-picozed
board which include Macronix SPI Host.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240704024839.241101-3-linchengming884@gmail.com
2024-07-17 10:39:39 +02:00
Cheng Ming Lin
aacbb6c837 mtd: spinand: macronix: Add support for reading Device ID 2
Adding the Device ID 2 on Macronix serial NAND flash.

When the number of flashes increases, we need to utilize
Device ID 2 to distinguish between different flashes.

These flashes have been validated on Xilinx zynq-picozed
board which included Macronix SPI Host.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240704024839.241101-2-linchengming884@gmail.com
2024-07-17 10:39:39 +02:00
Piotr Wojtaszczyk
4782118674 mtd: rawnand: lpx32xx: Request DMA channels using DT entries
Move away from pl08x platform data towards device tree.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240627150046.258795-11-piotr.wojtaszczyk@timesys.com
2024-07-17 10:39:38 +02:00
Wolfram Sang
e33df1c488 mtd: rawnand: intel: use 'time_left' variable with wait_for_completion_timeout()
There is a confusing pattern in the kernel to use a variable named 'timeout' to
store the result of wait_for_completion_timeout() causing patterns like:

	timeout = wait_for_completion_timeout(...)
	if (!timeout) return -ETIMEDOUT;

with all kinds of permutations. Use 'time_left' as a variable to make the code
self explaining.

Fix to the proper variable type 'unsigned long' while here.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240604212919.5038-6-wsa+renesas@sang-engineering.com
2024-07-17 10:39:38 +02:00