On XLR/XLS, the cpu cores communicate with fast on-chip devices
(e.g. network accelerator, security engine etc.) using the Fast
Messaging Network(FMN). The FMN queues and credits needs to be
configured and intialized before it can be used.
The co-processor 2 on XLR/XLS CPU cores has registers for FMN access,
and the XLR/XLS has custom instructions for sending and loading
messages. The FMN can deliver also per-cpu interrupts when messages
are available at the CPU.
This patch adds FMN initialization, adds interrupt setup and handling,
and also provides support for sending and receiving FMN messages.
Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4468
Signed-off-by: John Crispin <blogic@openwrt.org>
Create struct nlm_pic_irq for interrupts handled by the PIC.
This simplifies IRQ handling for multi-SoC as well as
the single SoC cases. Also split the setup of percpu and PIC
interrupts so that we can configure the PIC interrupts for
every node.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4467
Signed-off-by: John Crispin <blogic@openwrt.org>
Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system. Each SoC has its own set of on-chip
devices including PIC. To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469
Signed-off-by: John Crispin <blogic@openwrt.org>
Initial code to support more than 32 cpus. The platform CPU mask
is updated from 32-bit mask to cpumask_t. Convert places that use
cpu_/cpus_ functions to use cpumask_* functions.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4464
Signed-off-by: John Crispin <blogic@openwrt.org>
At this point early printk is available, so debugging device tree
issues is easier.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4460
Signed-off-by: John Crispin <blogic@openwrt.org>
Provide a config option to embed a device tree for XLP evaluation
boards. This DTB will be used if the firmware does not pass in a
device tree pointer.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Patchwork: http://patchwork.linux-mips.org/patch/4103/
Signed-off-by: John Crispin <blogic@openwrt.org>
Add the serial ports to the device tree and remove the platform
code for adding them.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Patchwork: http://patchwork.linux-mips.org/patch/4098/
Signed-off-by: John Crispin <blogic@openwrt.org>
Move the function device_tree_init() from netlogic/xlp/of.c
to setup.c, and remove the wrapper functions reserve_mem_mach()
and free_mem_mach().
Remove file netlogic/xlp/of.c, and the Makefile entry for it.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Patchwork: http://patchwork.linux-mips.org/patch/4097/
Signed-off-by: John Crispin <blogic@openwrt.org>
Probe and add devices on SoC "simple-bus" on startup. This will
in turn add devices like I2C controller that are specified in the
device tree under 'soc'.
Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3762/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The XLP USB controller appears as a device on the internal SoC PCIe
bus, the block has 2 EHCI blocks and 4 OHCI blocks. Change are to:
* Add files netlogic/xlp/usb-init.c and asm/netlogic/xlp-hal/usb.h
to initialize the USB controller and define PCI fixups. The PCI
fixups are to setup interrupts and DMA mask.
* Update include/asm/xlp-hal/{iomap.h,pic.h,xlp.h} to add interrupt
mapping for EHCI/OHCI interrupts.
Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3756/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Adds support for the XLP on-chip PCIe controller. On XLP, the
on-chip devices(including the 4 PCIe links) appear in the PCIe
configuration space of the XLP as PCI devices.
The changes are to initialize and register the PCIe controller,
enable hardware byte swap in the PCIe IO and MEM space, and to
enable PCIe interrupts.
Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3760/
Patchwork: https://patchwork.linux-mips.org/patch/4104/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Starting other threads in the core will change the number of
TLB entries of a CPU. Re-calculate current_cpu_data.tlbsize
on the boot cpu after enabling and waking up other threads.
The secondary CPUs do not need this logic because the threads
are enabled on the secondary cores at wakeup and before cpu_probe.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3751/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add new processor ID to asm/cpu.h and kernel/cpu-probe.c.
Update to new CPU frequency detection code which works on XLP 3XX
and 8XX.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2971/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Create a common NMI and reset handler in smpboot.S and use this for
both XLR and XLP. In the earlier code, the woken up CPUs would
busy wait until released, switch this to wakeup by NMI.
The initial wakeup code or XLR and XLP are differ since they are
started from different bootloaders (XLP from u-boot and XLR from
netlogic bootloader). But in both platforms the woken up CPUs wait
and are released by sending an NMI.
Add support for starting XLR and XLP in 1/2/4 threads per core.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2970/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
- Update common files to support XLP.
- Add arch/mips/include/asm/netlogic/xlp-hal for register definitions
and access macros
- Add arch/mips/netlogic/xlp/ for XLP specific files.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2967/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
