Commit Graph

224 Commits

Author SHA1 Message Date
Linus Torvalds
c0d6fe2f01 ARM: DT updates for v4.4
As usual, this is the massive branch we have for each release. Lots of
 various updates and additions of hardware descriptions on existing hardware,
 as well as the usual additions of new boards and SoCs.
 
 This is also the first release where we've started mixing 64- and 32-bit
 DT updates in one branch.
 
 (Specific details on what's actually here and new is pretty easy to tell
 from the diffstat, so there's little point in duplicating listing it here.)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q
 vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0
 NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw
 7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp
 NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z
 p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ
 nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb
 eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ
 JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA
 uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+
 u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3
 ILJ2QMe/DGiPIlUmCfsx
 =qY1q
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
2015-11-10 15:06:26 -08:00
Olof Johansson
3e4dda70cc Merge branch 'next/arm64' into next/dt
Merging in the few patches I had kept separate from main next/dt, since others
got merged here directly.

* next/arm64:
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  arm64: dts: mt8173: Add clocks for SCPSYS unit
  arm64: dts: mt8173: Add subsystem clock controller device nodes
  + Linux 4.3-rc5
2015-11-09 16:35:19 -08:00
Linus Torvalds
9bbd4b9f38 DeviceTree updates for 4.4:
- DT binding doc consolidation moving similar bindings to common
   locations. The majority of these are display related which were
   scattered in video/, fb/, drm/, gpu/, and panel/ directories.
 - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs
   in the tree for most arches with dts files (except powerpc for now).
 - OF_IRQ=n fixes for user enabled CONFIG_OF.
 - of_node_put ref counting fixes from Julia Lawall.
 - Common DT binding for wakeup-source and deprecation of all similar
   bindings.
 - DT binding for PXA LCD controller.
 - Allow ignoring failed PCI resource translations in order to ignore
   64-bit addresses on non-LPAE 32-bit kernels.
 - Support setting the NUMA node from DT instead of only from parent
   device.
 - Couple of earlycon DT parsing fixes for address and options.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWO+HwAAoJEPr7XbWNvGHDFOoP/RcK4z5dtVQL2XRFbJBqRBZU
 riMc4BZkwpcKGXjzZlMrLw+mg4vaoLKSIAGAsYkgdDOKbYphQQdVwDzN099Fzpzy
 EE6K7Q+AW618z34AWdDjcpJYzSFnjAjYdh6JabohmKdPlxobR1RsKT+nRpDOGfeO
 c1DmxAQ1Fiav+xAI4m0YUuyxQDUeFYC0mVcVPzRbWZj31Ia5BgIrvT+V7fM55CTb
 dOAYWDHrfOw+yYI98sqZoSAb5H+E3UuY1ymBMhiP16Ot2vCyIKRYwhDokF9VYO/0
 MpIMhCgv1jmE5NCbBeYSSJUePySvvnuyYe6HIaJQjV8KGEZ5C7c1iLMgtvov2KVI
 bcSx6nPH/u5FuWIhWdMINPc50AQBAK/akYcgoCVjioVX+4WY2pqLvsXW2arEr//Z
 XY3FUpgS6eI42HBsj4SxrGnzaRc2jPOs6yiANkywmHnpWcyvszCxUEvf0Mh0cbkm
 diu31/owdpUO5imCe+ErtGVV3vY2VUMnbcm8J61pqL52OZNPLZUUEfktv1JCGW7y
 cVdnlgeGSFuCbY4jUErvxtQGJQLFwf7Gg1U/VfFXX2iuQGAACB1KwxY5sR6P5Ghz
 W6NvOTT36kaM9WGqn/bquOd6EmKcx9aZfgRLOkgV86Q/11gHKpuRjkrsth7rIJDI
 97qkGiWl4t1Ll5T4StK8
 =tGCy
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull DeviceTree updates from Rob Herring:
 "A fairly large (by DT standards) pull request this time with the
  majority being some overdue moving DT binding docs around to
  consolidate similar bindings.

   - DT binding doc consolidation moving similar bindings to common
     locations.  The majority of these are display related which were
     scattered in video/, fb/, drm/, gpu/, and panel/ directories.

   - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all
     dtbs in the tree for most arches with dts files (except powerpc for
     now).

   - OF_IRQ=n fixes for user enabled CONFIG_OF.

   - of_node_put ref counting fixes from Julia Lawall.

   - Common DT binding for wakeup-source and deprecation of all similar
     bindings.

   - DT binding for PXA LCD controller.

   - Allow ignoring failed PCI resource translations in order to ignore
     64-bit addresses on non-LPAE 32-bit kernels.

   - Support setting the NUMA node from DT instead of only from parent
     device.

   - Couple of earlycon DT parsing fixes for address and options"

* tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits)
  MAINTAINERS: update DT binding doc locations
  devicetree: add Sigma Designs vendor prefix
  of: simplify arch_find_n_match_cpu_physical_id() function
  Documentation: arm: Fixed typo in socfpga fpga mgr example
  Documentation: devicetree: fix reference to legacy wakeup properties
  Documentation: devicetree: standardize/consolidate on "wakeup-source" property
  drivers: of: removing assignment of 0 to static variable
  xtensa: enable building of all dtbs
  mips: enable building of all dtbs
  metag: enable building of all dtbs
  metag: use common make variables for dtb builds
  h8300: enable building of all dtbs
  arm64: enable building of all dtbs
  arm: enable building of all dtbs
  arc: enable building of all dtbs
  arc: use common make variables for dtb builds
  of: add config option to enable building of all dtbs
  of/fdt: fix error checking for earlycon address
  of/overlay: add missing of_node_put
  of/platform: add missing of_node_put
  ...
2015-11-06 12:17:09 -08:00
Linus Torvalds
3c87b79188 PCI changes for the v4.4 merge window:
Resource management
     Add support for Enhanced Allocation devices (Sean O. Stalley)
     Add Enhanced Allocation register entries (Sean O. Stalley)
     Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney)
     Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney)
     Handle Enhanced Allocation capability for SR-IOV devices (David Daney)
     Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas)
     Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas)
     Expand Enhanced Allocation BAR output (Bjorn Helgaas)
     Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier)
     Fix lookup of linux,pci-probe-only property (Marc Zyngier)
     Add sparc mem64 resource parsing for root bus (Yinghai Lu)
 
   PCI device hotplug
     pciehp: Queue power work requests in dedicated function (Guenter Roeck)
 
   Driver binding
     Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker)
 
   Virtualization
     Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck)
     Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck)
     Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck)
     Reorder pcibios_sriov_disable() (Alexander Duyck)
     Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck)
     Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck)
     Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton)
     Don't try to restore VF BARs (Wei Yang)
 
   MSI
     Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel)
     Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach)
     Export all remapped MSIs to sysfs attributes (Romain Bezut)
     Disable MSI on SiS 761 (Ondrej Zary)
 
   AER
     Clear error status registers during enumeration and restore (Taku Izumi)
 
   Generic host bridge driver
     Fix lookup of linux,pci-probe-only property (Marc Zyngier)
     Allow multiple hosts with different map_bus() methods (David Daney)
     Pass starting bus number to pci_scan_root_bus() (David Daney)
     Fix address window calculation for non-zero starting bus (David Daney)
 
   Altera host bridge driver
     Add msi.h to ARM Kbuild (Ley Foon Tan)
     Add Altera PCIe host controller driver (Ley Foon Tan)
     Add Altera PCIe MSI driver (Ley Foon Tan)
 
   APM X-Gene host bridge driver
     Remove msi_controller assignment (Duc Dang)
 
   Broadcom iProc host bridge driver
     Fix header comment "Corporation" misspelling (Florian Fainelli)
     Fix code comment to match code (Ray Jui)
     Remove unused struct iproc_pcie.irqs[] (Ray Jui)
     Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui)
     Fix PCIe reset logic (Ray Jui)
     Improve link detection logic (Ray Jui)
     Update PCIe device tree bindings (Ray Jui)
     Add outbound mapping support (Ray Jui)
 
   Freescale i.MX6 host bridge driver
     Return real error code from imx6_add_pcie_port() (Fabio Estevam)
     Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam)
 
   Freescale Layerscape host bridge driver
     Remove ls_pcie_establish_link() (Minghuan Lian)
     Ignore PCIe controllers in Endpoint mode (Minghuan Lian)
     Factor out SCFG related function (Minghuan Lian)
     Update ls_add_pcie_port() (Minghuan Lian)
     Remove unused fields from struct ls_pcie (Minghuan Lian)
     Add support for LS1043a and LS2080a (Minghuan Lian)
     Add ls_pcie_msi_host_init() (Minghuan Lian)
 
   HiSilicon host bridge driver
     Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang)
 
   Marvell MVEBU host bridge driver
     Return zero for reserved or unimplemented config space (Russell King)
     Use exact config access size; don't read/modify/write (Russell King)
     Use of_get_available_child_count() (Russell King)
     Use for_each_available_child_of_node() to walk child nodes (Russell King)
     Report full node name when reporting a DT error (Russell King)
     Use port->name rather than "PCIe%d.%d" (Russell King)
     Move port parsing and resource claiming to  separate function (Russell King)
     Fix memory leaks and refcount leaks (Russell King)
     Split port parsing and resource claiming from  port setup (Russell King)
     Use gpio_set_value_cansleep() (Russell King)
     Use devm_kcalloc() to allocate an array (Russell King)
     Use gpio_desc to carry around gpio (Russell King)
     Improve clock/reset handling (Russell King)
     Add PCI Express root complex capability block (Russell King)
     Remove code restricting accesses to slot 0 (Russell King)
 
   NVIDIA Tegra host bridge driver
     Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel)
 
   Renesas R-Car host bridge driver
     Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven)
     Build pcie-rcar.c only on ARM (Geert Uytterhoeven)
     Make PCI aware of the I/O resources (Phil Edworthy)
     Remove dependency on ARM-specific struct hw_pci (Phil Edworthy)
     Set root bus nr to that provided in DT (Phil Edworthy)
     Fix I/O offset for multiple host bridges (Phil Edworthy)
 
   ST Microelectronics SPEAr13xx host bridge driver
     Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni)
 
   Synopsys DesignWare host bridge driver
     Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma)
     Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni)
     Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni)
     Require config accesses to be naturally aligned (Gabriele Paoloni)
     Make "num-lanes" an optional DT property (Gabriele Paoloni)
     Move calculation of bus addresses to DRA7xx (Gabriele Paoloni)
     Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni)
     Factor out MSI msg setup (Lucas Stach)
     Implement multivector MSI IRQ setup (Lucas Stach)
     Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach)
     Set up high part of MSI target address (Lucas Stach)
     Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang)
     Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang)
     Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang)
     Make driver arch-agnostic (Zhou Wang)
 
   Miscellaneous
     Make x86 pci_subsys_init() static (Alexander Kuleshov)
     Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWPM9aAAoJEFmIoMA60/r89f8QALFMHegqKk5M08ZcCaG7unLF
 5U5t88y6KF/kNYF6HOqLQiHh79U3ToU5HdrNaAtutr0UnvgbFC2WulLqKYgLiq6Y
 YJnwR3EfgGmdG7DKAVAXq19+nc2hgTPAEe8sciU7HKlTbqQmGj6//y3sQULGNLx3
 zur0C33DCtrDgKDP7to273lkHO8Vl0YuLzyqwt0ePCMNcXR0h1dK8QxSTjuXBxaR
 c+T1V1Hw64MTxLz3xJd1/1ipy32u+9LnqqcdRz0zRq6qi48G9ch/i4Z6DHa8kTbj
 DUZrrTYKILQ2TcjcZSBmTueX11Z1Xa4/I/45sehIi6gVWL9qQbmGpt2E5YtFED+4
 GdcmBSbWG/qsNsabXk38uiM3ww7+ltXEOhTXbcK+EgjvIhE6gSK/plYG0fU9pybs
 AKViEXVdHoT1X0N1dLK12mq7kvDCQvShHn08lz97Q9YrZ32wv1Fnij6WVSbJvfWt
 DubtPtisVM+rVy+VTpOImNR9wO54lTmG5jK53yNqH7I20K89y1kqARlN9nMXMB1a
 2nQnwe9yWlsGj9gVNCn1KmyQSPOWjg+3Z+ekfwbxpca14s1AaN3Jm0N9Z61dXFoF
 y2ygoQtZ/z9BHr3quBpxXGt+aVUg2kcNw5GYeDYiALxXdJSObyzRrZ6HDb/zicU2
 ZH9hBj0ctXvucmy6I2mt
 =uZrt
 -----END PGP SIGNATURE-----

Merge tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
 "Resource management:
   - Add support for Enhanced Allocation devices (Sean O. Stalley)
   - Add Enhanced Allocation register entries (Sean O. Stalley)
   - Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney)
   - Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney)
   - Handle Enhanced Allocation capability for SR-IOV devices (David Daney)
   - Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas)
   - Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas)
   - Expand Enhanced Allocation BAR output (Bjorn Helgaas)
   - Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier)
   - Fix lookup of linux,pci-probe-only property (Marc Zyngier)
   - Add sparc mem64 resource parsing for root bus (Yinghai Lu)

  PCI device hotplug:
   - pciehp: Queue power work requests in dedicated function (Guenter Roeck)

  Driver binding:
   - Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker)

  Virtualization:
   - Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck)
   - Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck)
   - Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck)
   - Reorder pcibios_sriov_disable() (Alexander Duyck)
   - Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck)
   - Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck)
   - Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton)
   - Don't try to restore VF BARs (Wei Yang)

  MSI:
   - Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel)
   - Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach)
   - Export all remapped MSIs to sysfs attributes (Romain Bezut)
   - Disable MSI on SiS 761 (Ondrej Zary)

  AER:
   - Clear error status registers during enumeration and restore (Taku Izumi)

  Generic host bridge driver:
   - Fix lookup of linux,pci-probe-only property (Marc Zyngier)
   - Allow multiple hosts with different map_bus() methods (David Daney)
   - Pass starting bus number to pci_scan_root_bus() (David Daney)
   - Fix address window calculation for non-zero starting bus (David Daney)

  Altera host bridge driver:
   - Add msi.h to ARM Kbuild (Ley Foon Tan)
   - Add Altera PCIe host controller driver (Ley Foon Tan)
   - Add Altera PCIe MSI driver (Ley Foon Tan)

  APM X-Gene host bridge driver:
   - Remove msi_controller assignment (Duc Dang)

  Broadcom iProc host bridge driver:
   - Fix header comment "Corporation" misspelling (Florian Fainelli)
   - Fix code comment to match code (Ray Jui)
   - Remove unused struct iproc_pcie.irqs[] (Ray Jui)
   - Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui)
   - Fix PCIe reset logic (Ray Jui)
   - Improve link detection logic (Ray Jui)
   - Update PCIe device tree bindings (Ray Jui)
   - Add outbound mapping support (Ray Jui)

  Freescale i.MX6 host bridge driver:
   - Return real error code from imx6_add_pcie_port() (Fabio Estevam)
   - Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam)

  Freescale Layerscape host bridge driver:
   - Remove ls_pcie_establish_link() (Minghuan Lian)
   - Ignore PCIe controllers in Endpoint mode (Minghuan Lian)
   - Factor out SCFG related function (Minghuan Lian)
   - Update ls_add_pcie_port() (Minghuan Lian)
   - Remove unused fields from struct ls_pcie (Minghuan Lian)
   - Add support for LS1043a and LS2080a (Minghuan Lian)
   - Add ls_pcie_msi_host_init() (Minghuan Lian)

  HiSilicon host bridge driver:
   - Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang)

  Marvell MVEBU host bridge driver:
   - Return zero for reserved or unimplemented config space (Russell King)
   - Use exact config access size; don't read/modify/write (Russell King)
   - Use of_get_available_child_count() (Russell King)
   - Use for_each_available_child_of_node() to walk child nodes (Russell King)
   - Report full node name when reporting a DT error (Russell King)
   - Use port->name rather than "PCIe%d.%d" (Russell King)
   - Move port parsing and resource claiming to  separate function (Russell King)
   - Fix memory leaks and refcount leaks (Russell King)
   - Split port parsing and resource claiming from  port setup (Russell King)
   - Use gpio_set_value_cansleep() (Russell King)
   - Use devm_kcalloc() to allocate an array (Russell King)
   - Use gpio_desc to carry around gpio (Russell King)
   - Improve clock/reset handling (Russell King)
   - Add PCI Express root complex capability block (Russell King)
   - Remove code restricting accesses to slot 0 (Russell King)

  NVIDIA Tegra host bridge driver:
   - Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel)

  Renesas R-Car host bridge driver:
   - Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven)
   - Build pcie-rcar.c only on ARM (Geert Uytterhoeven)
   - Make PCI aware of the I/O resources (Phil Edworthy)
   - Remove dependency on ARM-specific struct hw_pci (Phil Edworthy)
   - Set root bus nr to that provided in DT (Phil Edworthy)
   - Fix I/O offset for multiple host bridges (Phil Edworthy)

  ST Microelectronics SPEAr13xx host bridge driver:
   - Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni)

  Synopsys DesignWare host bridge driver:
   - Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma)
   - Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni)
   - Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni)
   - Require config accesses to be naturally aligned (Gabriele Paoloni)
   - Make "num-lanes" an optional DT property (Gabriele Paoloni)
   - Move calculation of bus addresses to DRA7xx (Gabriele Paoloni)
   - Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni)
   - Factor out MSI msg setup (Lucas Stach)
   - Implement multivector MSI IRQ setup (Lucas Stach)
   - Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach)
   - Set up high part of MSI target address (Lucas Stach)
   - Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang)
   - Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang)
   - Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang)
   - Make driver arch-agnostic (Zhou Wang)

  Miscellaneous:
   - Make x86 pci_subsys_init() static (Alexander Kuleshov)
   - Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)"

* tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits)
  PCI: altera: Add Altera PCIe MSI driver
  PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver
  PCI: layerscape: Add ls_pcie_msi_host_init()
  PCI: layerscape: Add support for LS1043a and LS2080a
  PCI: layerscape: Remove unused fields from struct ls_pcie
  PCI: layerscape: Update ls_add_pcie_port()
  PCI: layerscape: Factor out SCFG related function
  PCI: layerscape: Ignore PCIe controllers in Endpoint mode
  PCI: layerscape: Remove ls_pcie_establish_link()
  PCI: designware: Make "clocks" and "clock-names" optional DT properties
  PCI: designware: Make driver arch-agnostic
  ARM/PCI: Replace pci_sys_data->align_resource with global function pointer
  PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT
  Revert "PCI: designware: Program ATU with untranslated address"
  PCI: designware: Move calculation of bus addresses to DRA7xx
  PCI: designware: Make "num-lanes" an optional DT property
  PCI: designware: Require config accesses to be naturally aligned
  PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces
  PCI: designware: Use exact access size in dw_pcie_cfg_read()
  PCI: spear: Fix dw_pcie_cfg_read/write() usage
  ...
2015-11-06 11:29:53 -08:00
Linus Torvalds
2dc10ad81f arm64 updates for 4.4:
- "genirq: Introduce generic irq migration for cpu hotunplugged" patch
   merged from tip/irq/for-arm to allow the arm64-specific part to be
   upstreamed via the arm64 tree
 
 - CPU feature detection reworked to cope with heterogeneous systems
   where CPUs may not have exactly the same features. The features
   reported by the kernel via internal data structures or ELF_HWCAP are
   delayed until all the CPUs are up (and before user space starts)
 
 - Support for 16KB pages, with the additional bonus of a 36-bit VA
   space, though the latter only depending on EXPERT
 
 - Implement native {relaxed, acquire, release} atomics for arm64
 
 - New ASID allocation algorithm which avoids IPI on roll-over, together
   with TLB invalidation optimisations (using local vs global where
   feasible)
 
 - KASan support for arm64
 
 - EFI_STUB clean-up and isolation for the kernel proper (required by
   KASan)
 
 - copy_{to,from,in}_user optimisations (sharing the memcpy template)
 
 - perf: moving arm64 to the arm32/64 shared PMU framework
 
 - L1_CACHE_BYTES increased to 128 to accommodate Cavium hardware
 
 - Support for the contiguous PTE hint on kernel mapping (16 consecutive
   entries may be able to use a single TLB entry)
 
 - Generic CONFIG_HZ now used on arm64
 
 - defconfig updates
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWOkmIAAoJEGvWsS0AyF7x4GgQAINU3NePjFFvWZNCkqobeH9+
 jFKwtXamIudhTSdnXNXyYWmtRL9Krg3qI4zDQf68dvDFAZAze2kVuOi1yPpCbpFZ
 /j/afNyQc7+PoyqRAzmT+EMPZlcuOA84Prrl1r3QWZ58QaFeVk/6ZxrHunTHxN0x
 mR9PIXfWx73MTo+UnG8FChkmEY6LmV4XpemgTaMR9FqFhdT51OZSxDDAYXOTm4JW
 a5HdN9OWjjJ2rhLlFEaC7tszG9B5doHdy2tr5ge/YERVJzIPDogHkMe8ZhfAJc+x
 SQU5tKN6Pg4MOi+dLhxlk0/mKCvHLiEQ5KVREJnt8GxupAR54Bat+DQ+rP9cSnpq
 dRQTcARIOyy9LGgy+ROAsSo+NiyM5WuJ0/WJUYKmgWTJOfczRYoZv6TMKlwNOUYb
 tGLCZHhKPM3yBHJlWbQykl3xmSuudxCMmjlZzg7B+MVfTP6uo0CRSPmYl+v67q+J
 bBw/Z2RYXWYGnvlc6OfbMeImI6prXeE36+5ytyJFga0m+IqcTzRGzjcLxKEvdbiU
 pr8n9i+hV9iSsT/UwukXZ8ay6zH7PrTLzILWQlieutfXlvha7MYeGxnkbLmdYcfe
 GCj374io5cdImHcVKmfhnOMlFOLuOHphl9cmsd/O2LmCIqBj9BIeNH2Om8mHVK2F
 YHczMdpESlJApE7kUc1e
 =3six
 -----END PGP SIGNATURE-----

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 updates from Catalin Marinas:

 - "genirq: Introduce generic irq migration for cpu hotunplugged" patch
   merged from tip/irq/for-arm to allow the arm64-specific part to be
   upstreamed via the arm64 tree

 - CPU feature detection reworked to cope with heterogeneous systems
   where CPUs may not have exactly the same features.  The features
   reported by the kernel via internal data structures or ELF_HWCAP are
   delayed until all the CPUs are up (and before user space starts)

 - Support for 16KB pages, with the additional bonus of a 36-bit VA
   space, though the latter only depending on EXPERT

 - Implement native {relaxed, acquire, release} atomics for arm64

 - New ASID allocation algorithm which avoids IPI on roll-over, together
   with TLB invalidation optimisations (using local vs global where
   feasible)

 - KASan support for arm64

 - EFI_STUB clean-up and isolation for the kernel proper (required by
   KASan)

 - copy_{to,from,in}_user optimisations (sharing the memcpy template)

 - perf: moving arm64 to the arm32/64 shared PMU framework

 - L1_CACHE_BYTES increased to 128 to accommodate Cavium hardware

 - Support for the contiguous PTE hint on kernel mapping (16 consecutive
   entries may be able to use a single TLB entry)

 - Generic CONFIG_HZ now used on arm64

 - defconfig updates

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (91 commits)
  arm64/efi: fix libstub build under CONFIG_MODVERSIONS
  ARM64: Enable multi-core scheduler support by default
  arm64/efi: move arm64 specific stub C code to libstub
  arm64: page-align sections for DEBUG_RODATA
  arm64: Fix build with CONFIG_ZONE_DMA=n
  arm64: Fix compat register mappings
  arm64: Increase the max granular size
  arm64: remove bogus TASK_SIZE_64 check
  arm64: make Timer Interrupt Frequency selectable
  arm64/mm: use PAGE_ALIGNED instead of IS_ALIGNED
  arm64: cachetype: fix definitions of ICACHEF_* flags
  arm64: cpufeature: declare enable_cpu_capabilities as static
  genirq: Make the cpuhotplug migration code less noisy
  arm64: Constify hwcap name string arrays
  arm64/kvm: Make use of the system wide safe values
  arm64/debug: Make use of the system wide safe value
  arm64: Move FP/ASIMD hwcap handling to common code
  arm64/HWCAP: Use system wide safe values
  arm64/capabilities: Make use of system wide safe value
  arm64: Delay cpu feature capability checks
  ...
2015-11-04 14:47:13 -08:00
Linus Torvalds
b0f85fa11a Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:

Changes of note:

 1) Allow to schedule ICMP packets in IPVS, from Alex Gartrell.

 2) Provide FIB table ID in ipv4 route dumps just as ipv6 does, from
    David Ahern.

 3) Allow the user to ask for the statistics to be filtered out of
    ipv4/ipv6 address netlink dumps.  From Sowmini Varadhan.

 4) More work to pass the network namespace context around deep into
    various packet path APIs, starting with the netfilter hooks.  From
    Eric W Biederman.

 5) Add layer 2 TX/RX checksum offloading to qeth driver, from Thomas
    Richter.

 6) Use usec resolution for SYN/ACK RTTs in TCP, from Yuchung Cheng.

 7) Support Very High Throughput in wireless MESH code, from Bob
    Copeland.

 8) Allow setting the ageing_time in switchdev/rocker.  From Scott
    Feldman.

 9) Properly autoload L2TP type modules, from Stephen Hemminger.

10) Fix and enable offload features by default in 8139cp driver, from
    David Woodhouse.

11) Support both ipv4 and ipv6 sockets in a single vxlan device, from
    Jiri Benc.

12) Fix CWND limiting of thin streams in TCP, from Bendik Rønning
    Opstad.

13) Fix IPSEC flowcache overflows on large systems, from Steffen
    Klassert.

14) Convert bridging to track VLANs using rhashtable entries rather than
    a bitmap.  From Nikolay Aleksandrov.

15) Make TCP listener handling completely lockless, this is a major
    accomplishment.  Incoming request sockets now live in the
    established hash table just like any other socket too.

    From Eric Dumazet.

15) Provide more bridging attributes to netlink, from Nikolay
    Aleksandrov.

16) Use hash based algorithm for ipv4 multipath routing, this was very
    long overdue.  From Peter Nørlund.

17) Several y2038 cures, mostly avoiding timespec.  From Arnd Bergmann.

18) Allow non-root execution of EBPF programs, from Alexei Starovoitov.

19) Support SO_INCOMING_CPU as setsockopt, from Eric Dumazet.  This
    influences the port binding selection logic used by SO_REUSEPORT.

20) Add ipv6 support to VRF, from David Ahern.

21) Add support for Mellanox Spectrum switch ASIC, from Jiri Pirko.

22) Add rtl8xxxu Realtek wireless driver, from Jes Sorensen.

23) Implement RACK loss recovery in TCP, from Yuchung Cheng.

24) Support multipath routes in MPLS, from Roopa Prabhu.

25) Fix POLLOUT notification for listening sockets in AF_UNIX, from Eric
    Dumazet.

26) Add new QED Qlogic river, from Yuval Mintz, Manish Chopra, and
    Sudarsana Kalluru.

27) Don't fetch timestamps on AF_UNIX sockets, from Hannes Frederic
    Sowa.

28) Support ipv6 geneve tunnels, from John W Linville.

29) Add flood control support to switchdev layer, from Ido Schimmel.

30) Fix CHECKSUM_PARTIAL handling of potentially fragmented frames, from
    Hannes Frederic Sowa.

31) Support persistent maps and progs in bpf, from Daniel Borkmann.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1790 commits)
  sh_eth: use DMA barriers
  switchdev: respect SKIP_EOPNOTSUPP flag in case there is no recursion
  net: sched: kill dead code in sch_choke.c
  irda: Delete an unnecessary check before the function call "irlmp_unregister_service"
  net: dsa: mv88e6xxx: include DSA ports in VLANs
  net: dsa: mv88e6xxx: disable SA learning for DSA and CPU ports
  net/core: fix for_each_netdev_feature
  vlan: Invoke driver vlan hooks only if device is present
  arcnet/com20020: add LEDS_CLASS dependency
  bpf, verifier: annotate verbose printer with __printf
  dp83640: Only wait for timestamps for packets with timestamping enabled.
  ptp: Change ptp_class to a proper bitmask
  dp83640: Prune rx timestamp list before reading from it
  dp83640: Delay scheduled work.
  dp83640: Include hash in timestamp/packet matching
  ipv6: fix tunnel error handling
  net/mlx5e: Fix LSO vlan insertion
  net/mlx5e: Re-eanble client vlan TX acceleration
  net/mlx5e: Return error in case mlx5e_set_features() fails
  net/mlx5e: Don't allow more than max supported channels
  ...
2015-11-04 09:41:05 -08:00
Linus Torvalds
9ff3ca58b0 * Convert EDAC to debugfs wrappers and make drivers use those. (Borislav Petkov)
* L3 and SoC support for xgene_edac. (Loc Ho)
 
 * AMD F15h, models 0x60-6f support to amd64_edac. (Aravind Gopalakrishnan)
 
 * Fixes and cleanups all over the place.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWNzViAAoJEBLB8Bhh3lVKXPsP/3AQvoVcDh/EA7f/egoY8clA
 gfCUbkO2wexq+W1afdEVRFft+U+1QQVeK18MzqWvneZFFefbSMx2hrnAFQwGxKk7
 yEvAqbuNj6xYoR3k76N2UgJXYPLq4r7QCDY/dVd2q6aAc38bVyk9tQANgUwDoT6k
 Ugdb02WBFSKm5SJy24XaF6rqsEIySSuvQFOMZL25d4q2fdOx0/6gErNDdm2zfCct
 yUygoWwyKi99v2Ip4iwLDVMpG9q0pNctSupa0m0R5Y6NDFJiXPRAIdp9cB483IJP
 gfDGUS3TmR5xzwV6jOhY/9gq6jdJ2EhyiTv3DEC0ztndtd6EdptBOuFzj6SvE/kD
 huLWa1l2LSR905xdZC1iJEtbRrlikQgxywCcvuU+Fo9Z1TuvQ37PwWs7BV2/4T2O
 6xRj0E4qgcCmeITjoqzsLeBqoGljBi5LimFymkqaxq0Yaw0ep+OUcGOK+FY04ro5
 u5mRFWNfTo33MuDq7FUw+cV84glCkPfMPWIWgk5Ln69EoFdsyvBmK3QCfpQCi5qq
 1fRJhkifWalLf1fTz4S96EeVGgkhlNg1xAzZSJOa3ipYLWM+dQDVNGVD4+fMsQ3I
 zy7wUT4AgYz1lRhgUXOromDxbtsqBdxKBfym+O1sZJg4Qbr0UVtWZ6JEi+tBRN9i
 2XEn4OvTtfdqHuQR7gLu
 =Ek5l
 -----END PGP SIGNATURE-----

Merge tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:
 "A bunch of fixes all over the place and some hw enablement this time.

   - Convert EDAC to debugfs wrappers and make drivers use those
     (Borislav Petkov)

   - L3 and SoC support for xgene_edac (Loc Ho)

   - AMD F15h, models 0x60-6f support to amd64_edac (Aravind
     Gopalakrishnan)

   - Fixes and cleanups all over the place"

* tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits)
  EDAC: Fix PAGES_TO_MiB macro misuse
  EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_EN
  EDAC: Use edac_debugfs_remove_recursive()
  EDAC, ppc4xx_edac: Fix module autoload for OF platform driver
  Documentation/EDAC: Add reference documents section for amd64_edac
  EDAC, amd64_edac: Update copyright and remove changelog
  EDAC, amd64_edac: Extend scrub rate support to F15hM60h
  EDAC: Don't allow empty DIMM labels
  EDAC: Fix sysfs dimm_label store operation
  EDAC: Fix sysfs dimm_label show operation
  arm64, EDAC: Add L3/SoC DT subnodes to the APM X-Gene SoC EDAC node
  EDAC, xgene: Add SoC support
  EDAC, xgene: Fix possible sprintf() overflow issue
  EDAC, xgene: Add L3 support
  EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodes
  EDAC, sb_edac: Fix TAD presence check for sbridge_mci_bind_devs()
  EDAC, ghes_edac: Remove redundant memory_type array
  EDAC, xgene: Convert to debugfs wrappers
  EDAC, i5100: Convert to debugfs wrappers
  EDAC, altera: Convert to debugfs wrappers
  ...
2015-11-02 12:14:50 -08:00
Linus Walleij
980bbff018 ARM64: juno: disable NOR flash node by default
After discussing on the mailing list it turns out that
accessing the flash memory from the kernel can disrupt CPU
sleep states and CPU hotplugging, so let's disable this
DT node by default. Setups that want to access the flash
can modify this entry to enable the flash again.

Quoting Sudeep Holla: "the firmware assumes the flash is
always in read mode while Linux leaves NOR flash in
"read id" mode after initialization."

Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Leif Lindholm <leif.lindholm@arm.com>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Fixes: 5078f77e14 "ARM64: juno: add NOR flash to device tree"
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-31 01:31:01 +00:00
yankejian
6d08f61787 net: hisilicon: updates HNS config and documents
updates the bindings documents and dtsi file according to the review
comments[https://lkml.org/lkml/2015/9/21/670] from Rob Herring <robh@kernel.org>

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: yankejian <yankejian@huawei.com>
Signed-off-by: huangdaode <huangdaode@hisilicon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-27 20:20:24 -07:00
Rob Herring
d58d76efff arm64: enable building of all dtbs
Enable building all dtb files when CONFIG_OF_ALL_DTBS is enabled. The dtbs
are not really dependent on a platform being enabled or any other kernel
config, so for testing coverage it is convenient to build all of the dtbs.
This builds all dts files in the tree, not just targets listed. This
is simpler for arm64 which has a bunch of sub-dirs.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
2015-10-27 16:12:14 -05:00
Olof Johansson
8713181dce Merge branch 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld into next/arm64
* 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld:
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-27 08:51:50 +09:00
Liviu Dudau
c770d19459 arm64: Juno: Add support for the PCIe host bridge on Juno R1
Juno R1 board sports a functional PCIe host bridge that is
compliant with the SBSA standard found [1] here. With the right
firmware that initialises the XpressRICH3 controller one can
use the generic Host Bridge driver to use the PCIe hardware.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>

[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0029a/
2015-10-26 10:02:47 +00:00
Olof Johansson
17e2aa01e4 Samsung arm64 DT update for v4.4
- add BUS1 instance pinctrl support on exynos7 SoC
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJWKp+HAAoJEA0Cl+kVi2xqHeEP/2fw46aLdl1lF5g3FLbDSue4
 jVFPHLX3VFr8Jjtfd/gZ5OvFKmjeY1WYSnEJoiH9bfHiewhPzZ84KlpZx79A37Iu
 rtDUwgiWlSaI7e2IhnKE/wS1983GCE8eUKMEwOQZCdIgBpxqK+kSBkOEBLQHuUO3
 IN6Pb3IJjKbckc/Wgk45Hz7YhIHGWpMVqQthZrN/3q2t0mGK/OdWiiwX65WR4tkl
 SLHtgHLcgScnFdKP1/R/T7z3c+Suza1J92/jHg1iZE720U6Cm07Oi4APtu2jDURK
 BWa2tBOh0GpefpMyqTSi12O2rt37uxPs2NlwADjm5CDfO3h9EFXJQZbImED0Fn3K
 783hvXrjxbq/1Z4Mr0KKj1ioKEGI5GDtSKbFpX8y77Zx+s3uT/jZYleCsXLxWL9a
 8LAhMali+85EMwFEpANjjBUPyxsHkGSmCaLs5ztVRWvb1AAvNfOW3NQHK08Ovwtr
 1ltLULjxjXflJFRMGyV5w5mKF4+H6IDAPZCJUQjRcg0W7aprqWaCk2e7beyLxIcv
 vICsQxBotQAlYUoYoOogGRO3dfgqej1rCfbXIu9p3+2yoNEvZan9NU91Gz0OdWlU
 3CQqQd7RFdwkXRka88OvIEBI6Q86p2DpaYAMtZcPj+AIpRQp+w547Nd9Vk+PSBQ+
 LIYXClwU2/VIqvZS6wrr
 =kH8/
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/arm64

Samsung arm64 DT update for v4.4

- add BUS1 instance pinctrl support on exynos7 SoC

* tag 'samsung-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  arm64: dts: Add BUS1 instance pinctrl support for exynos7

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-26 10:17:36 +09:00
Bhupesh Sharma
41adfe8202 dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
This patch adds build support for LS2080a QDS & RDB board DTS files
in the arm64 DTS Makefile.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:37:57 +02:00
Bhupesh Sharma
b9925d5979 dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
This patch adds the LS2080a DTS files for QDS and RDB boards
which support the LS2080a SoC.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:37:50 +02:00
Bhupesh Sharma
066230950e dts/ls2080a: Update Simulator DTS to add support of various peripherals
This patch updates the LS2080a simulator DTS to add support of various
peripherals which are supported on the simulator platform and explicitly
disables those which are yet not supported on the platform.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:36:51 +02:00
Bhupesh Sharma
cff412ef9d dts/ls2080a: Remove text about writing to Free Software Foundation
Checkpatch complains about the text suggesting writing to
Free Software Foundation for GPLv2 license copy.

This patch removes the same from the .dtsi and .dts

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:36:43 +02:00
Bhupesh Sharma
5461597f6c dts/ls2080a: Update DTSI to add support of various peripherals
This patch updates the LS2080a DTSI (DTS Include) file to add
support for the following peripherals:
	- USB 3.0 Host
	- PMU
	- CCN-504
	- SATA
	- SPI
	- PCIe

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:32:54 +02:00
Bhupesh Sharma
f43a4b8507 arm64: Rename FSL LS2085A SoC support code to LS2080A
Freescale is renaming the LS2085A SoC to LS2080A. This patch
addresses the same.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:24:29 +02:00
Bhupesh Sharma
53a5fde05d arm64: Use generic Layerscape SoC family naming
Freescale will be a spinning-out a set of ARMv8 based SoCs which
will be based on a similar overall SoC architecture. So, this patch
converts the existing infrastructure in the arm64/dts, arm64/Kconfig
and arm64/configs to use the generic convention ARCH_LAYERSCAPE
in place of the more specific FSL_LS2085A, to save code duplication
later-on.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23 22:24:21 +02:00
Olof Johansson
dd5cf711ff Correct i2c DTS node names in mt8173.dtsi.
Add spi DTS node to the mt8173 and mt8173-evb.
 
 Add dts nodes for the subsystem clocks on mt8173.
 This includes mmsys, imgsys, vdecsys, vencsys, vencltsys.
 
 Add clock nodes to the scpsys binding, which are needed to
 access the registers of venc and venc_lt power domains.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWI4R2AAoJELQ5Ylss8dNDnkUP/2vZMvegCQLgoEn8Y0U8KeT6
 IhmfNCWtLGa2f57Fj+edxmEQ6ldIshgyShO8sJtnDtzZ9toRWihpO2KAzvrmO/SC
 eN/IfJe1in9xy257Xv0wurS9OBXoscvaS0ThQTqNJZYU8CZNZXhHkmSIQf2sPZfw
 KHXNnPBN8sXb+uTYsD/AVJPBWfh1gwtaQEVsQkqJfCus1ToK2N+uVvLyCIzq4Zej
 TFo8GhkVwIeqnRmHFPh66vppQSkxj6YmpZJ8uAWNcK/ZW+fbYcESnTNhtxCXlkDX
 y1coYd8RWN/cvHU4tKdU+WkyhRANdsMULFjubpxqMafgJKAOCex6TIVR5diIif39
 OlXaH86Iy6KsL2YCoejQKpg3Pq/9Hg5ha2/8FV0q+iFxMtavWcTWGGqFXJ4awz7n
 Cdgb62JzB1XT1u/wvAe/sdBY0ySxlqSGDBPQ9V3bfnmSTFJvLq1MhCMSiYKdwFI4
 PYeOIEJdYudr9RzKNG8j9kIIzPcIB3cVZHlEE5M3PRX3KOOpLKySWY0FNq0pf5nS
 e5Q3PlVDVxCbuAWQRezvbKl8BAtsoKg1ln4Z6P7FiO4/gdg6abjD0mx62woDOZXa
 I+eR1Nt6jLUwzw96gDZFbyxU5A51TRbUzEcHkGo9JGC4F2d2/J89l5B3uSpl+bYl
 XY8ETgVkQaZjFIzaTHfQ
 =laqA
 -----END PGP SIGNATURE-----

Merge tag 'v4.3-next-arm64' of https://github.com/mbgg/linux-mediatek into next/arm64

Correct i2c DTS node names in mt8173.dtsi.

Add spi DTS node to the mt8173 and mt8173-evb.

Add dts nodes for the subsystem clocks on mt8173.
This includes mmsys, imgsys, vdecsys, vencsys, vencltsys.

Add clock nodes to the scpsys binding, which are needed to
access the registers of venc and venc_lt power domains.

* tag 'v4.3-next-arm64' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173: Add clocks for SCPSYS unit
  arm64: dts: mt8173: Add subsystem clock controller device nodes
  arm64: dts: Add spi bus dts
  arm64: mt8173.dtsi: correct i2c node names

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-23 10:25:51 -07:00
Sudeep Holla
4db7062c9a ARM: dts: fix gpio-keys wakeup-source property
The keyboard driver for GPIO buttons(gpio-keys) checks for one of the
two boolean properties to enable gpio buttons as wakeup source:
1. "wakeup-source" or
2. the legacy "gpio-key,wakeup"

However juno, ste-snowball and emev2-kzm9d dts file have a undetected
"wakeup" property to indictate the wakeup source.

This patch fixes it by making use of "wakeup-source" property.

Cc: Magnus Damm <magnus.damm@gmail.com>
Acked-by: Simon Horman <horms@verge.net.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-22 09:53:57 -07:00
Arnd Bergmann
ee04242bec Qualcomm ARM64 Updates for v4.4
* Add RNG device tree node
 * Add MSM8x16 serial UART1 node
 * Enable eMMC on apq8016-sbc board
 * Fix I2C pinconf sleep state function
 * Add MSM8916 I2C nodes
 * Enable I2C busses on LS and HS on APQ8016-sbc
 * Enable SPI busses on LS and HS on APQ8016-sbc
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJWHcRMAAoJEFKiBbHx2RXVNzYP/19jGaB621TS81MhbUPARaTj
 AsZCGy+YOejlBd7kCbBm7tSVlNQ1CRi1iESnhIzYptvpOz4Net2gpT66pexrJHag
 2wvbk1zUepl3cNwOLHjFSBBf+6cmgS9Hy57vdGM5ucqre60LemDAj1okV0CMxGOt
 REv+MjGWrWgz99qvJ8w1zPxDUDunH/94uqGXV5k19ziH8QqhoCvTdeshmYLy2lsa
 jmxPww9jCxsLDLlMWIH2k4toSOUzZcmr2N4R1e/HRcSlgTBLcwrlGDqO5wIwVw5m
 eTmKCryndrYEx8AzafHNfEWD3AX0rIgD3MfgMDpuVy6s8R0Lgl86ewmeYLj+1TcF
 Vtu9PKQ2VDAXC6m883TIWnT1yV+ggXOrK/8VQWu4YVFToBTAEUNYnuQ6b8+sig3J
 7KvUY6PEsGF3uldTx7prnhXsBd/2gDTxnFgcGq44ZdyEKdPuL6iJxUfbkJ2hzVhR
 Qh7kqf8WHTHCPFPjp52L+8AKxpCRJGJBKTZYm+yYeAPEEZzFWCEfnzVsQzZiEt1M
 /6lojXSv5SNR0NezAvFGbELJrTEbBglYp+VfcO8gOm3xfvyRwL9JF/7LtWdIpFa5
 LGxDXpxgSFQYnQAwKQtqT39aWVQIicOID5EeuXUxXBd30uBsfGKJAPN8x6z/YLiQ
 rhgbXuIMDFoweMJPCWHE
 =pMvh
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/dt

Pull "Qualcomm ARM64 Updates for v4.4" from Andy Gross:

* Add RNG device tree node
* Add MSM8x16 serial UART1 node
* Enable eMMC on apq8016-sbc board
* Fix I2C pinconf sleep state function
* Add MSM8916 I2C nodes
* Enable I2C busses on LS and HS on APQ8016-sbc
* Enable SPI busses on LS and HS on APQ8016-sbc

* tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
  arm64: dts: apq8016-sbc: enable spi buses on LS and HS
  arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
  arm64: dts: qcom: Add msm8916 I2C nodes.
  arm64: dts: fix i2c pinconf sleep state function
  arm64: dts: qcom: Enable eMMC on apq8016-sbc board
  arm64: dts: qcom: Add 8x16 Serial UART1 node
  arm64: dts: qcom: Add RNG device tree node
2015-10-15 23:09:17 +02:00
Arnd Bergmann
3b2c05644b SCPI support on ARM64 Juno Development Platform
1. SRAM, MHU mailbox and SCPI support
   2. CPU topology using cpu-map
   3. Clock support for all the cpus
   4. Support for SoC sensors
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJWF7sKAAoJEABBurwxfuKYrEAP/2EqYNykediW8cxct7xyMls3
 L6KEOl29HfOJueYT0xY3/9rRuL+a+3rXe/MxnlL/E5FO88080b/ITJFP19DcLW5e
 /NmV9O4t9S7ZDYiQiGsTjbwaqYXxQA3xcnO25g3oACiMoBety/Axw/FTzEQEpQWL
 8UhWbiaONiwlvbe/rOq9VL2gdsN9wpS9W0I+SnCJcHv/UvCRTfalT5wP1azy/liq
 E+Z8SCinH2Pj0SCVuNg/4YzM0UXDIt2b4fqqp6Yb+lKiUnkACYqK+VsCtT/f+qmY
 ICMDLDoapq/96SwCCUf0pmvMErx270r8WJeC+Mv4EtkMYnbzGdHIR70yHWCcDbW7
 6umapM/QcDfazj2wkPh4dYSTLe1bkijKGEaiMWG5dmn0HtC8dq/mUw1Midgo0z9e
 n0Mr9dGyMj0oxT0+d1NhuL/XtValCfGxJQu1D3p22KYDliN2Bs8Oa3q0ERArytbe
 KYhHXJ36AvP66ZjYWTv/Cs3s5RfsW3+ZzDtlB6tl6nh8QgsrUxKcVrCrw15w5qWN
 1z00v2Iw5zFe3i5YbPCvGtarYMvGJEyIdv7+D3mIsIU1BA2iff2iB4lq77G7ZoNA
 UbbeFTZqV8pKtbejDjHkPN4r+Ws5i8A2E3k+kIviqQO46AB8gRyzIUOXj8Di8h0S
 gMgyo8NkC+6CBlXfPfrC
 =wBcv
 -----END PGP SIGNATURE-----

Merge tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Merge "SCPI support on ARM64 Juno Development Platform" from Sudeep Holla:

  1. SRAM, MHU mailbox and SCPI support
  2. CPU topology using cpu-map
  3. Clock support for all the cpus
  4. Support for SoC sensors

* tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: Add sensor node to Juno dt
  arm64: dts: add clock support for all the cpus
  arm64: dts: add CPU topology on Juno
  arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno
2015-10-15 22:38:10 +02:00
Arnd Bergmann
d819e7a752 Qualcomm ARM Based Device Tree Updates for v4.4
* Add DT binding document for SMEM
 * Add SMD, RPM, and Regulator nodes on MSM8974
 * Remove extra reg element from iadc device
 * Remove redunandant i2c pinctrl properties on APQ8064
 * Remove unnecessary eeprom label on IFC6410
 * Remove unnecessary eeprom label from QS600
 * Add PM8921 RTC support on APQ8064
 * Add PM8921 pwrkey support on APQ8064
 * Prefix GSBI6 uart pins on APQ8064 correctly
 * Add missing GSBI7 uart pinctrl on APQ8064
 * Add missing GSBI7 uart pinctrl on IFC6410
 * Add missing GSBI7 pinctrl uart property on QS600
 * Add pwrseq support for WLAN on IFC6410
 * Add pwrseq support for WLAN on QS600
 * Add notify led support on IFC6410
 * Add SD card detect support onQS600
 * Add #power-domain-cells property to documentation
 * Add Qualcomm SMBB binding document
 * Add PM8941 charge node
 * Fix typo in disabled property on MSM8974
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJWHXppAAoJEFKiBbHx2RXVMTQQAJ1tNvm4khE+PiTaImD+WzKx
 Z+gUoJyKKxL67f1yaR48VEYusC3Jy2uX5tIiGLBrCyArXL3WDaRdCmISLp9p0GjT
 P0Y47Y+3+lCJih/WHsHbPNYFJnA3bsff0dMkC0aHbqJ+76YdPUc1nIm9IIsfTQLr
 Aj22v5iVBiJ/cdbGbgb+TYr0ymw0ErkUYbZi2TDPWV4NdUSViQFcyn48pXZPIus1
 ajXVD5N5pmdB/Az+SKzwdpFO2XN7pUR5RXI13cqWuavX1yuVMfIR+JQdSYu8FLel
 DrkkhvSGzOYAO4PtWqRpxMLWOdK/IuFlgWfONpjV7h/cPOVLivrnYE7qB8f0Q8KU
 BIhnFeN5xG+vrJdpRgYHKGbQzlIj0wRovZb10iZQ4felv5t0dHt6DQmLdQO+Y/L6
 +f+sJCG4bh9mc8t9oRSAddVm8J6sAR5Aq9sPthWiJkbTr+xBT5chlMstDQEHQZqK
 xOY0UMCwXuG1OLn93YCTzbq9xlw0cApYKjdRrjOS1mOVitVbUX26hiovdc/NdHnT
 g8159a7h1mdWhYOHssbAGZ0TgsTHtBy0ntKRIZerTTmpXdaNwPlRJB9OeM4/FQ9G
 3xlVFH4vy+xSlGNt2LAIHe3aDyc81xA9+rKbZGOpyMi7PO1+9ptRvczbmwA1q565
 jhTg1dVjwh0v7DBx9Aht
 =maQs
 -----END PGP SIGNATURE-----

Merge tag 'qcom-dt-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/dt

Pull "Qualcomm ARM Based Device Tree Updates for v4.4" from Andy Gross:

* Add DT binding document for SMEM
* Add SMD, RPM, and Regulator nodes on MSM8974
* Remove extra reg element from iadc device
* Remove redunandant i2c pinctrl properties on APQ8064
* Remove unnecessary eeprom label on IFC6410
* Remove unnecessary eeprom label from QS600
* Add PM8921 RTC support on APQ8064
* Add PM8921 pwrkey support on APQ8064
* Prefix GSBI6 uart pins on APQ8064 correctly
* Add missing GSBI7 uart pinctrl on APQ8064
* Add missing GSBI7 uart pinctrl on IFC6410
* Add missing GSBI7 pinctrl uart property on QS600
* Add pwrseq support for WLAN on IFC6410
* Add pwrseq support for WLAN on QS600
* Add notify led support on IFC6410
* Add SD card detect support onQS600
* Add #power-domain-cells property to documentation
* Add Qualcomm SMBB binding document
* Add PM8941 charge node
* Fix typo in disabled property on MSM8974

* tag 'qcom-dt-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
  ARM: dts: msm8974: fix typo in "disabled" property
  ARM: dts: qcom-pm8941: Add charger node
  dt-binding: power: Add Qualcomm SMBB binding
  arm: dts: qcom: Add #power-domain-cells property
  ARM: dts: qs600: Add SD card detect support.
  ARM: dts: apq8064-ifc6410: add notify led support.
  ARM: dts: qs600: add pwrseq support to WLAN
  ARM: dts: ifc6410: Add pwrseq support for WLAN
  ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
  ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
  ARM: dts: apq8064: add missing gsbi7 uart pinctrl
  ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
  ARM: dts: apq8064: add pm8921 pwrkey support
  ARM: dts: apq8064: add pm8921 rtc
  ARM: dts: qs600: remove unnecessary eeprom label
  ARM: dts: ifc6410: remove unnecessary eeprom label
  ARM: dts: apq8064: remove redundant i2c pinctrl properties
  ARM: dts: qcom: Remove extra reg element from iadc device
  ARM: dts: msm8974: Add smd, rpm and regulator nodes
  soc: qcom: Add device tree binding for SMEM
2015-10-15 17:21:01 +02:00
Linus Walleij
5078f77e14 ARM64: juno: add NOR flash to device tree
The Juno motherboard has a NOR flash on the motherboard, enable
this to be accessed with the CFI flash driver. Results after
enabling MTD, MTD_CFI, MTD_PHYSMAP, MTD_PHYSMAP_OF,
MTD_CFI_INTELEXT:

8000000.flash: Found 2 x16 devices at 0x0 in 32-bit bank.
Manufacturer ID 0x000089 Chip ID 0x008919
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Using buffer write method
Using auto-unlock on power-up/resume
cfi_cmdset_0001: Erase suspend on write enabled
erase region 0: offset=0x0,size=0x40000,blocks=255
erase region 1: offset=0x3fc0000,size=0x10000,blocks=4

Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-15 17:20:12 +02:00
Ian Campbell
8ee57b8182 ARM64: dts: vexpress: Use a symlink to vexpress-v2m-rs1.dtsi from arch=arm
Commit 9ccd608070 "arm64: dts: add device tree for ARM SMM-A53x2 on
LogicTile Express 20MG" added a new dts file to arch/arm64 which
included "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi", i.e. a
.dtsi supplied by arch/arm.

Unfortunately this causes some issues for the split device tree
repository[0], since things get moved around there. In that context
the new .dts ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
while the include is at src/arm/vexpress-v2m-rs1.dtsi.

The sharing of the .dtsi is legitimate since the baseboard is the same
for various vexpress systems whatever processor they use.

Previously I attempted to resolve this by creating a shared location
for such things but we have been unable to come to a consensus on
where that should be.

Instead this patch simply replaces the use of ../../ in the dts
/include/ with a symlink in arch/arm64/boot/dts/arm pointing to the
file arch/arm/boot/dts.

Since the split device tree repo will shortly be required to flatten
symlinks for other reasons this will cause the dtsi file to appear in
both src/arm and src/arm64 in the split repo, which is an improvement
on not building for arm64 now.

[0] https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kristina Martsenko <kristina.martsenko@arm.com>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Frank Rowand <frank.rowand@sonymobile.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: arm@kernel.org
Cc: linux-kbuild@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-14 17:55:50 +02:00
Arnd Bergmann
c52864fbc2 Marvell Berlin ARM64 DT for 4.4 take 1
- add BG4CT GPIO nodes
 - add BG4CT STB reference board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWDZScAAoJEN2kpao7fSL49T8QAIHC1L432XXufw8+CmYblr7F
 8VtVXHwFCO1qSSXotaUr4H7R86ALCTJWZtEKAwLfu3qhvBc+iSQHww8AEW6WOP+s
 K+2VOnrYzKVEtwKs30y8ii0pMA0cm1qvUwuNQTwGsWpb72vleu1u6pPPWQ4qCGpA
 7bZdf0AWCg7+g3QSy3SF0PvzyzM3gi7FTUdHyofLwvP5DsT9/Nvgqu8eC2R5htoO
 SS19520IZfDGdhtZ+3klJim/kWJPz0ylN5ZSGQEa2EFgvKJjBVCCYjMY0DKi4F0m
 IzlTNJMLJ9xbtIl4J6O312JCa7SOx93kyDPGe9IibVSImQGv2TDqrEveofK5ixLL
 9KtwfHM7SOZAIdVvomW1PZnIe1qg61zzpzvBnxYKzBWXKBcPrCdhnqIgHC8Jxcb6
 msm89OoPgNNxM7giEUgu9yvGNg3DAuhqjjTv51T7GIv8s+ctFQ+/OCLfdxQXYtHk
 kCxoTg2IaF1xpwCt89kAcRONAOMlsPIqC34zaJNggZTl1nyXHFd9sFHfX3gUqtm1
 7uCbW1bGZ6Jn43UWHUqj2mVaotkyF6Z7Xj9TNN+znJSxENS/nxQMl00FxpYJ5dLj
 0+4W7rWMtnbqaapiiypEoNHs9LizGYClr30SAAQO4uLeuSwZQiDvPEyTYrEf9e1B
 iSG2mOCq/xygGR5NjQ30
 =Qytq
 -----END PGP SIGNATURE-----

Merge tag 'berlin64-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt

Merge "Marvell Berlin ARM64 DT for 4.4 take 1" from Sebastian Hesselbarth:
- add BG4CT GPIO nodes
- add BG4CT STB reference board

* tag 'berlin64-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  arm64: dts: add dts file for Marvell Berlin4CT STB board
  arm64: dts: berlin4ct: add GPIO nodes
2015-10-14 17:45:38 +02:00
James Liao
e34573c95a arm64: dts: mt8173: Add clocks for SCPSYS unit
Add clocks needed by Mediatek VENC and VENC_LT power domianis.
These clocks were needed by accessing subsystem's registers,
so they need to be enabled before power on these subsystems.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-10-14 15:43:13 +02:00
James Liao
67e56c5651 arm64: dts: mt8173: Add subsystem clock controller device nodes
This patch adds device nodes providing subsystem clocks on MT8173,
includes mmsys, imgsys, vdecsys, vencsys and vencltsys.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-10-14 15:24:16 +02:00
Srinivas Kandagatla
00a9e053da arm64: dts: apq8016-sbc: enable spi buses on LS and HS
This patch enables spi buses on low speed and high speed expansion
connectors on DB410C

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:03 -05:00
Srinivas Kandagatla
7c6764b052 arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
This patch enables i2c buses on low speed and high speed expansion
connectors on DB410C.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:03 -05:00
Srinivas Kandagatla
7f5b092168 arm64: dts: qcom: Add msm8916 I2C nodes.
This patch adds missing support for i2c0 and i2c6, this support is
required to connect the i2c slaves on LS expansion on DB410c.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:03 -05:00
Srinivas Kandagatla
dce4f63b12 arm64: dts: fix i2c pinconf sleep state function
This patch fixes the i2c pinctrl sleep state by changing the pinconf
function to be in gpio mode rather than i2c.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:03 -05:00
Georgi Djakov
5941c9bb9f arm64: dts: qcom: Enable eMMC on apq8016-sbc board
Enable the eMMC on the APQ8016 SBC board (also known as DragonBoard 410c),
so that we can use its internal storage.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:02 -05:00
Andy Gross
9f43020dc4 arm64: dts: qcom: Add 8x16 Serial UART1 node
This patch adds the nodes required to support the UART1 node on the
MSM8916 and also fixes the sleep pins function for UART2.

Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:02 -05:00
Stanimir Varbanov
f6d24bf30c arm64: dts: qcom: Add RNG device tree node
Adds rng device tree node for msm8916 SoCs.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 21:53:02 -05:00
Rajendra Nayak
89c7e67128 arm: dts: qcom: Add #power-domain-cells property
clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-10-13 16:40:01 -05:00
Punit Agrawal
dfacaf0e7c arm64: dts: Add sensor node to Juno dt
The SCP firmware on Juno provides access to SoC sensors via the
SCPI. Add the sensor nodes to the device tree to enable this support.

Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
2015-10-09 10:26:41 +01:00
Sudeep Holla
a738459888 arm64: dts: add clock support for all the cpus
This patch adds the CPU clocks so that the CPU DVFS can be enabled.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
2015-10-09 10:23:49 +01:00
Sudeep Holla
050c69e876 arm64: dts: add CPU topology on Juno
This patch adds CPU topology on Juno. It will be useful for ther other
IP blocks depending on this topology.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
2015-10-09 10:23:49 +01:00
Sudeep Holla
ff9a6262b9 arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno
This patch adds support for the MHU mailbox peripheral used on Juno by
application processors to communicate with remote SCP handling most of
the CPU/system power management. It also adds the SRAM reserving the
shared memory and SCPI message protocol using that shared memory.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
2015-10-09 10:23:49 +01:00
Alim Akhtar
c60ce7fe82 arm64: dts: Add BUS1 instance pinctrl support for exynos7
This adds BUS1 instance pinctrl for exynos7 soc.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-10-08 07:18:33 +09:00
Mark Rutland
01a507a371 arm64: dts: juno: describe PMUs separately
The A57 and A53 PMUs in Juno support different events, so describe them
separately in both the Juno and Juno R1 DTs.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-10-07 14:25:41 +01:00
Tyler Baker
a362ec8f67 arm64: dts: add all hi6220 uart nodes
This patch adds all UART nodes for the Hi6220 SoC. Recently a board[1] has
been developed to standardize UART access across all the 96boards consumer
edition boards. To use this hardware on HiKey we must configure and enable
UART3. However, to ensure backward compatibility we must keep UART0 enabled
as well.

I have removed the hard coded clock index values in favor of using the ones
already defined in include/dt-bindings/clock/hi6220-clock.h.

Since UART0 needs to be soldered, it has been suggested to use the UART3 as
the default console.

This patch was boot tested on top of next-20150930, with both UART
configurations.

[1] http://www.seeedstudio.com/depot/96Boards-UART-p-2525.html?ref=newInBazaar

Signed-off-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-06 16:34:40 +02:00
Arnd Bergmann
90656b8414 SoCFPGA DTS updates for v4.4
- Add base arm64 dts for Statrix 10
 - Peripheral updates for Arria10(USB,I2C,UART)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJWE5f9AAoJEBmUBAuBoyj08/MQAJXkM1yd7kTK9HMJPnYZPD2f
 J6GHP9elKhFUieIaXB3uTJEUP/BjRd0rRFgMcHqLOrybICCbiynyJKvZGjGSIrks
 zjNkkDjiBEfxTCkvO0bF0kszh2mHNKtIXo8yzAnDUCHTR8uo4PnQUFbDz7+EbOqf
 WoGVCP+9o6zd0wQUM5JgEjKeEDiD7CWmh7KQXhFFlgzTAR72TpBhYY5eYQ/LVzEE
 XAFbW1z+Iz0d4jD9EkA73DwkZpYuc7viLqWlASGa6Khq80ZMZRMS5ydG+sWnw8g5
 W18IRQURVeGOTF/wSSra2FclC7PhYPiWeAShQf7rhbsIji0uU1jDQCJLSXMTiVW2
 t/SJaCVBerkCyCmNOmn0k5bE+7aaxF1bYMmsOBg+8TDCLRiZpvcJzc7M92kZAMpR
 gZSbNnAj+ZcnCUiWDS3Um6UQqz3fUGeJ2T7dSHeRTQ6VZoiCqspom+1VVOYCTrOe
 SzwU+V9ZgGrXqcU6lMJbMkeYtGDDxEb9kQX5uvUSSNuLfTsy2Wf66BPhTIsAQvvv
 c04LOaUHyzDEKPj40DjHyPVnu0SWteaKicNmMthpx1OqPzD/A3qloM14WzBufaNZ
 6sI5h8OZWDNOGHE7ZJum8n1zTUMU134QgX7RlQrbl5h0Et4q1FhCsOw4NuL5BAZ6
 WlyIkTV3pJEwnMNHYbWW
 =3A9d
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

Merge "SoCFPGA DTS updates for v4.4" from Dinh Nguyen:
- Add base arm64 dts for Statrix 10
- Peripheral updates for Arria10(USB,I2C,UART)

* tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: Add base stratix 10 dtsi
  ARM: socfpga: dts: enable USB and I2C on Arria10 SoCDK
  ARM: socfpga: dts: add clock fields for I2C, UART and USB on Arria10
2015-10-06 16:31:17 +02:00
Arnd Bergmann
b8faca6af8 X-Gene DTS changes queued for v4.4
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV+0vrAAoJEB11UG/BVQ/g2bEP/RCrmy3VyDQJgt3aTvoPKjJN
 x0cIJOeEwA7YXhQB7l0w7d71v2aHvbOY3FzOddKJisCFlDuu5RfmQXL8BOO6YBbU
 wRe94U4M32zjb9AbyOdLVEuonMjFr1lbxGNVaSKRYm/39qW7Knd6KXx/EGw8AIUR
 Oz1SjM9qCVp/dXq4tfhbGZa7ZT/k2J8933vYm0mEwqcflkp02017InWMZuwAzshW
 8hDeFo5MWcIxRgY6fMpgY4LRXlTachbQtz+SGyfO8z//AuepgCSDen2iBsewQVyN
 OP4BYgvEIU3a7RNpi/frYNS25OJ6MlFmMUKMtnKJVJDC9mF1rmDYzPnZrCU/a9lW
 ca7FIl88HxzXrymlS1FhQJt2MI4eDryB1oeeFcx2J6avnqDEE5pd3Wym1YG9cu4S
 C6/6NtJeyEQMbo1zooyV4zO2cNDvGD9wd5zUlnNi/Ye4UPxJbGd7w7ZpFItNNWnU
 Q01QCt2Nn2BFStiMZPUvpP1Jp+c2huAc3FmjcCqMLOL/HXkSBB8pu0ILY148dOdu
 +hJdthoDF9jilNM7V9JkSb9belMtbyvtK2wQQpCR24TQzbpTy8GHLX9OcEjkP9E8
 2Z3pbqDMjQ1yGrHWPwZBrWXa0a+LCmNDWbgqB/xYNVgCyMq9XimawbQpLnLTDG9R
 mireHhD8xc3+QwfC9MJ1
 =IW/G
 -----END PGP SIGNATURE-----

Merge tag 'xgene-dts-for-v4.4-1' of https://github.com/AppliedMicro/xgene-next into next/dt

Merge "X-Gene DTS changes queued for v4.4" from Duc Dang:

* tag 'xgene-dts-for-v4.4-1' of https://github.com/AppliedMicro/xgene-next:
  arm64: dts: Add poweroff device nodes for APM X-Gene 2 platform
  arm64: dts: Add APM X-Gene 2 standby GPIO controller DTS entries
  arm64: dts: Add PMU node for APM X-Gene Storm SOC
  Documentation: arm: pmu: Add Potenza PMU binding
  arm64: dts: Add X-Gene v2 reboot driver dts node
  arm64: dts: add APM Merlin Board device tree
  power: reset: Add syscon poweroff device node for APM X-Gene platform
  arm64: dts: Add X-Gene reboot driver dts node
  Documentation: arm64: add SCU dts binding documentation to linux kernel
  MAINTAINERS: Add Applied Micro (APM) X-Gene Device Tree maintainer
2015-10-06 16:28:37 +02:00
Arnd Bergmann
f85e64b540 ARM64: DT: Hisilicon hip05 soc and D02 board updates for 4.3
- Updated the hisilicon devicetree bindings document to support hip05-D02 board
 - Added dts files for hip05 SoC and D02 board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWACysAAoJEAvIV27ZiWZcSXgP/0WdQv4rUnE9gEno8l8QTGam
 S7MJO7hfrGlTwOXVPGjXUd8vSsCtl0BObiuy5sf8swGlWGtfuncnu5Fp2ArKd2gm
 +15gVVBasAQFvMnsvVFQ5VxVgbFpa2QFTlXzgd3tJC/U86qr9Ij+1eNw5C5LtGKO
 gqiPmu2bHYugRZOYRg+xHAeDgXBgSE6Kz88RDZTWSf/QxQY7ik0mc1H67VLIbJJ1
 KZ+KO1Gj1VJn/aymvTB+7bK+hc+2BHPoGWz59f5sExwZWpHdp3p34zxzs7ENiYU2
 n/m0NeZXRqpHVrquRd4noMTceo20v2nRi1sw7xFGQ3Jm9mZqgBDH1IA6ejvP+x7t
 DeFn38kHqO2NNPDM+BpUBcCs5Z1cfpfxnZjcs6rM2shoYf7rtAcu0tlQMdplqoI+
 WG1hJElZdAx0jpXXxC2F/U208GzurgditqHdVQoQ2SU7fEgobS95TF7s1cxY1FIG
 8cef68NVWkBInwzJL9gH8Ukq78q0TZY0g7sydVG2vCSmcpk4BUvSF4xpsz0C2okO
 jsUT38/m17O75eRhSc57GF7vhSpsW02s0Fd7TFQJ+8JUqFqTt2Y8qk4W0b9gaSK7
 8j02xMUsGnin72XwdU2qtLgZutHkhNqYu8TD9NBNas00U7c7Jfma9rK+IiK9Vh79
 FgVJlyNdrFGl/uzDNBq6
 =Swzi
 -----END PGP SIGNATURE-----

Merge tag 'hip05-dt-for-4.3' of git://github.com/hisilicon/linux-hisi into next/dt

Merge "ARM64: DT: Hisilicon hip05 soc and D02 board updates for 4.3" from Wei Xu:

- Updated the hisilicon devicetree bindings document to support hip05-D02 board
- Added dts files for hip05 SoC and D02 board

* tag 'hip05-dt-for-4.3' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board
  arm64: hip05-d02: Document devicetree bindings for Hisilicon Hip05-D02 Board
2015-10-06 16:20:52 +02:00
Dinh Nguyen
78cd6a9d8e arm64: dts: Add base stratix 10 dtsi
Add the base DTS for Altera's SoCFPGA Stratix 10 platform.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Add a non-zero ranges property for /soc node
v3: change #address-cells and #size-cells to <2>
    change the GIC address to 0xfffc1000
    update the GIC virtual CPU reg length to 0x2000
v2: use interrupt-affinity for pmu node
2015-10-06 04:42:38 -05:00
Leilk Liu
b0c936f59c arm64: dts: Add spi bus dts
This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Reviewed-and-Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-09-27 15:31:55 +02:00