There is a fairly large number of bug fixes for Qualcomm platforms,
most of them addressing issues with the devicetree files for the
newly added Snapdragon X1 based laptops to make them more reliable.
The Qualcomm driver changes address a few build-time issues as well
as runtime problems in the tzmem and scm firmware, the USB Type-C
driver, and the cmd-db and pmic_glink soc drivers.
The NXP i.MX usually gets a bunch of devicetree fixes that is proportional
to the number of supported machines. This includes both warning fixes
and correctness for the 64-bit i.MX9, i.MX8 and layerscape platforms,
as well as a single fix for a 32-bit i.MX6 based board.
The other changes are the usual minor changes, including an update to the
MAINTAINERS file, an omap3 dts file and a SoC driver for mpfs (risc-v).
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbSNOgACgkQYKtH/8kJ
UieuWg//eW9qg16Fw7ZeEDSrq7s7Mrr03zcF+Xqb1wpZZqDbUqgSWqaDDapd//bW
st7eR2rxm5yySBRbYFNa/jjB7YQA1GSlYtFn3cBEe/lFiuhOeP5yWwKTT05yeWDr
RzkPSDIt30YDsYV6+k5HpyzRNeuOd7QaVOz9XKqnEgzuRKC89OcSkHmXQUhvvbrg
f+5/uSFTZBAYjUpuH3ZRX9elRYsHSYlsmLI71HWRIBZrvNWwv3O4N0nySbCdhE0V
8hb3fCo/39rdjWjKuGHigsvxMLLmooFNvu/r/oZtqUjFDIjOkVzxI14K/yl2al7v
nmEHnwFqTsTIGP21CmRV4fzrS/80gld3ieLavC9kZaWqfV9yMjF1+jg40qsrUXcR
/Gfzq7XCrqx9CpFA62uytjkQZI5tk9Ip9FQHK80+OsDq8/zCJs77NIwR26VNT3O/
HIf9yTdC4bzZW1hUpTsIy+/piSWja5kkSKHn5Zcqby05hPUjWe/utiBKW3lTE9OI
EJ4swrHOenGea0AEeR2Rp5WOVfq26q12m4GYCi5YM+FGr64KHf5URQ1GoRTxorAx
YLa8xGm88CfIU3rnW90b2/5lYgqAyL3xEq9p1qt9HmZx/0SuoGbV1EekgfPd52yV
hrkn2gnNGS+A2ldqSRGZVJQSxKIpISORDj4y3sAI+JEQmm0UEM0=
=tK5m
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-6.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"There is a fairly large number of bug fixes for Qualcomm platforms,
most of them addressing issues with the devicetree files for the newly
added Snapdragon X1 based laptops to make them more reliable.
The Qualcomm driver changes address a few build-time issues as well as
runtime problems in the tzmem and scm firmware, the USB Type-C driver,
and the cmd-db and pmic_glink soc drivers.
The NXP i.MX usually gets a bunch of devicetree fixes that is
proportional to the number of supported machines. This includes both
warning fixes and correctness for the 64-bit i.MX9, i.MX8 and
layerscape platforms, as well as a single fix for a 32-bit i.MX6 based
board.
The other changes are the usual minor changes, including an update to
the MAINTAINERS file, an omap3 dts file and a SoC driver for mpfs
(risc-v)"
* tag 'arm-fixes-6.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (50 commits)
firmware: microchip: fix incorrect error report of programming:timeout on success
soc: qcom: pd-mapper: Fix singleton refcount
firmware: qcom: tzmem: disable sdm670 platform
soc: qcom: pmic_glink: Actually communicate when remote goes down
usb: typec: ucsi: Move unregister out of atomic section
soc: qcom: pmic_glink: Fix race during initialization
firmware: qcom: qseecom: remove unused functions
firmware: qcom: tzmem: fix virtual-to-physical address conversion
firmware: qcom: scm: Mark get_wq_ctx() as atomic call
arm64: dts: qcom: x1e80100: Fix Adreno SMMU global interrupt
arm64: dts: qcom: disable GPU on x1e80100 by default
arm64: dts: imx8mm-phygate: fix typo pinctrcl-0
arm64: dts: imx95: correct L3Cache cache-sets
arm64: dts: imx95: correct a55 power-domains
arm64: dts: freescale: imx93-tqma9352-mba93xxla: fix typo
arm64: dts: freescale: imx93-tqma9352: fix CMA alloc-ranges
ARM: dts: imx6dl-yapp43: Increase LED current to match the yapp4 HW design
arm64: dts: imx93: update default value for snps,clk-csr
arm64: dts: freescale: tqma9352: Fix watchdog reset
arm64: dts: imx8mp-beacon-kit: Fix Stereo Audio on WM8962
...
On X1E the GPU node is disabled by default, to be enabled in the
individual devices once the developers install the required firmware.
The generic EDP panel driver used on the X1E CRD is replaced with the
Samsung ATNA45AF01 driver, in order to ensure backlight is brought back
up after being turned off.
The pin configuration for PCIe-related pins are corrected across all the
X1E targets. The PCIe controllers gain a minimum OPP vote, and PCIe
domain numbers are corrected.
WiFi calibration variant information is added to the Lenovo Yoga Slim
7x, to pick the right data from the firmware packages.
The incorrect Adreno SMMU global interrupt is corrected.
For IPQ5332, the IRQ triggers for the USB controller are corrected.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmbMnc4VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FTmEQANIITSDMgMOy6NIqXiCeejSl0wKz
/aJhJK9iot+dYzcXZfswNxKDstYB3MJ0TIQMKw0uGZ7dyQS+InpD/+PAR1CX4dPz
yEpdWvvMDbnVp3IkkvtLjdBCS2Ri11j9ybheGuQWml8/lZs+YzzHObybygNAkKbj
3w6CiPU4lNSXw0bLkxxldC7Dl3UYAWPVtp3sye31ybS8WMLED1N0ANYVheCV/8YT
lFPVrFHW+nI+2iyvEg5lIHu+eprgk3a7u32XCm9RE68NTRxCsEkLlgc0r9mbhqMk
i/bKN96In/W4mt15SzOj+/wK1SGKCIgeZhYnkZe86NqvBfojvSvwfzbZhM8VveAM
aiUpJ9gRm/1QBZt3V84OkdX3w4+RZKpKfEmk9yMMEcHmrhv039lF8PJEEBYPbsIA
8WAaPQ3iauSz5tz4fhObHwAqSnBMvxV5/5HouRyHJfOBjh6Ui7zieVc0RtVhudsd
6d8P/UdDFOeK2LnOdgniPUVvWAMVM2XsFELmjUb9jRDpi3pd4t+Owvbozg6W2SaD
ChVDyAeGVSBlqHBsYX/OvwuXFx/GLj+zo49noFD2Ci/qoxGIy40au9miSwFzMa4K
BV/wl6Hi+urlvv89MPJi/CDptYc75tr8Dui9DbWMaYP4g3b02Zej0OP+oJqyx0ZT
BRHaDLySwJnAC/v5
=ymuZ
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbPiGEACgkQYKtH/8kJ
Uid/RxAA39/ZFMx6QEzhA0KAv4xEm73UDsPV8ozB+5asDeDuht1UHq4nwRSmFJaE
4gy+zMipHl8kMvnYBZv1S7rNJ1D27wKOkGBTJrIznB/UBLPxkFJZnjAy8kMWuu9l
/Z6X1Fqf8hkxTNet+70y8j2LCQbhyxBd77SvpHiLjHdxs+JH7Vtl7OHbk6+XXDzj
OxJu6Iy7CbS4mGqx5pYpOnnl0g9WE1gNEabmH1kSa+aW1nU2fjGVr9gCu1h4tb/D
vD1xb8laNs2FmP+HpcootlWWgD0wzU0u1WU5qBzen1B/qm0WyEp/xyUTvM4EiSeN
qb3obRx8EbASmcXUtUIfPR9Sz774Gx3J740V7J7ZikxvUnr2cImC955hZzP8U60b
+qiTmiFoqTXt5eb4H+w0aB28z4h5hizT9uV50u1K1awdZIP72IucPqfNkvu95MIR
0C/GZraDQl6j0XJocaXp4nSLk09Vo6uejXMCYGeHIm1CgEOwBiezrPy9BQ96an+E
9Efh+5NLm+qXicFqBdTkJ2q06Qkqv5i+rTXcVDdm2VQScn9/u/FdEktIV3C/20Hp
mpGG1BVoWcGNFeldF/65R7uRDzX0zXJnn3nXWTKM16d2YqhAd55i9cHjqMZOZqrc
Rg5DTbjRkwS7c+rBOSxmGOx9PpcUYuUeRKyGGCs6z2/2KYmB4ME=
=oFQA
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 DeviceTree fixes for v6.11
On X1E the GPU node is disabled by default, to be enabled in the
individual devices once the developers install the required firmware.
The generic EDP panel driver used on the X1E CRD is replaced with the
Samsung ATNA45AF01 driver, in order to ensure backlight is brought back
up after being turned off.
The pin configuration for PCIe-related pins are corrected across all the
X1E targets. The PCIe controllers gain a minimum OPP vote, and PCIe
domain numbers are corrected.
WiFi calibration variant information is added to the Lenovo Yoga Slim
7x, to pick the right data from the firmware packages.
The incorrect Adreno SMMU global interrupt is corrected.
For IPQ5332, the IRQ triggers for the USB controller are corrected.
* tag 'qcom-arm64-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits)
arm64: dts: qcom: x1e80100: Fix Adreno SMMU global interrupt
arm64: dts: qcom: disable GPU on x1e80100 by default
arm64: dts: qcom: x1e80100-crd: Fix backlight
arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios
arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down
arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply
arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios
arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull down
arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply
arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios
arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down
arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply
arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios
arm64: dts: qcom: x1e80100-crd: disable PCIe6a perst pull down
arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100: add missing PCIe minimum OPP
arm64: dts: qcom: x1e80100: fix PCIe domain numbers
...
Link: https://lore.kernel.org/r/20240826152426.1648383-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the Samsung ATNA33XC20 display panel driver, as we switched from
the generic EDP panel for some of the X1E devices in v6.11.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmbMl8AVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F6EcP/36z5R0RyFBhf85g5P1WUlli/SPX
byA2XLNqHbhqhwu9Ao5x/QQw9e/hM7yOvMoPlzKdbR1On3o9VSYij22eKExg4KTK
omh35mQC5UX4wUeECRZdWBsPaGzK7t+LVkeDhGlrfHsnOYO/sL63WMxSf+pi/3GT
RuyfKLP5CiCmjqoE3zAwWUEFS+50UhEPt2sk4E8gEeA0XBLi44agaQHfDYC6COlX
A18qgMqZ7NSYsgp1ctTJ8kFklLfTd5c4H/rUkJpkttPti6o/NzeCKmRzwKb/1Ih+
/vrvypk/TFNHdnMqp7LNN7zKb9cAEf+LS4DHuyrwqL+PtdUuOfbJr3Fad6vn/fJi
e2e2bKZRG7ShgVocU13nGXUjPrjKPir+NUZPuWycCNr/IJ4HxVOaB+ZsO17wVeo2
FdxM6tPUIJ0RSi96RCRX+roY9tqPykrYZEdN4gS80eIjzyUwbAkYlb8K5wmSrgMQ
8lcEiyvIpE6ZcfQMdkwU59hIpLJUaA/FuGpZUH4aJPTxmWiHHgPoSc4d2x7eobvR
l08+H3IhPOvYML3cVmdFuPlHg0ePKG/FWCuOm24WYPgpTrc94siOdGRPsavv0iLj
lafdN6j8Xs5VqNj1KADlut2m9+5PVpZO4YJpVOOZlGyhoV/GKdXtC5FYlZjTUX8q
fq9uqaUIsFqN68xM
=Wl9S
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbPiFEACgkQYKtH/8kJ
UifDsw/9EU0lymxO5TbSvAGrJO9qM0W6ZSFttDrBwx22W+687NUz5UaMd5VOS2q+
kPkj8Jekxz9mk2NV2+g/MIRf0DHEjsYhOkX59w62ZBwIGw68DHc4BpE6ISlK83/Z
Z7wa0xEoiA7dagz4ik+hgkIcWg5TwdCK4SpuQdZ2LlsB22Ib7yQ7jcTFOxWcaJps
K22DyjF1usYeY1Uc35hViA4j189JhB7ZDa31I9nO6HgWfBB7UG8j04Wd+PcudgBR
WMCFGxRzTkO3/OvrfaEBF+NXHRYwQskqKeoMGb81DoIJauS45dCKUdVdtrNZ8Ogu
5h/sIWLiDYt+JUZDOSQpIS20FPZLVSrjMAbRi8QkDFrdySgkfGhPThPHzy4NzFv5
2mi1Onu93S5epNVeCHlxvAniw8SB1ugWvgH3aXKhgN/2WDdEAcB6l9V3LX2mhBlP
ekKGjpH4SkmYsEKFMVIYuPkE0LxXGOEMYMfJheLAk9p+x0DD1TdqubZ9xAiMVsSU
uwIPFTtuF9tIHwLVVXR70jfbSoVU1UCdbL/23lPnBFZuD6DDBs7h7Dyy+PU525Ml
7vX/IPGf+RCSdnAr+rm82YvPpojTWTjaU5F8awodreYjeJkuBw/zU88EtTjViEev
bTwQs4g+YcqzuHo+xX8XUDOv4gM2nvyIvUZlbra7jqMhglJE2kI=
=qe2j
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 defconfig fix for 6.11
Enable the Samsung ATNA33XC20 display panel driver, as we switched from
the generic EDP panel for some of the X1E devices in v6.11.
* tag 'qcom-arm64-defconfig-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: Add CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20
Link: https://lore.kernel.org/r/20240826145736.1646729-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- One imx8mp-beacon-kit change from Adam Ford to fix the broken WM8962
audio support
- One pinctrl property typo fix for imx8mm-phygate
- One layerscape fix from Krzysztof Kozlowski to get thermal nodes
correct name length
- A couple of imx93-tqma9352 fixes from Markus Niebel, one on CMA
alloc-ranges and the other on SD-Card cd-gpios typo
- One change from Michal Vokáč to fix imx6dl-yapp43 LED current to match
the HW design
- A couple of imx95 fixes from Peng Fan, one to correct a55 power
domains and the other to correct L3Cache cache-sets
- One tqma9352 watchdog reset fix from Sascha Hauer
- One imx93 change from Shenwei Wang to fix the default value for STMMAC
EQOS snps,clk-csr
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAma7a9EUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM4FFAf/RVBrDLv5/Bj6IJl6gJSGw31l6mz/
gb3uCDbSF7JxNrGCbTz5IcDJmDJnDrg68m+UiNS3vwq0tXd3rN2MXy55bxE0XA7n
4drzyFuV0Cuqpr8snAgxzvX5F4w+vT1z9vk5fDxY5YAvxGbtYFMYnanE6w2Fs2g+
2nVxChCWlAqHEfO5E/hQKZzMtjU/ATKHZMqOG1ZFypoyBuO96GTDNMoYlZrfYiRh
7alnxUnvMNJ2UX0OC9SLb3CVAtt9lxGKT5KEps2LSeiRw1dQ8KdTpjreIkoh7mMh
MDHiHORgO5VAyOLPv/jUb23q9KzT3HSqpl/TMtG34pvHb7E9YODRZLwGCg==
=Tzc4
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbPiDEACgkQYKtH/8kJ
Uies+g/7BmPr1bujROQO0C9dmn/B9gCMsE+sajpltVUpVdFWlSbxHs2HTbyElsQc
Wxo1KsBxs3dtm71tp4NNMuiyrUjPaGgoEPNmEd8O5Jfu7fnpl+OwpxaqnyLKAmUA
iCHUuRLNQx8Ilz0LUxKkeovCOT2d+T4EzawRqLdNs4ioHsUuumiqbyBbR1XtzaCW
CyHKQLmthIZeZTPzpyEM7+D+zt/SrF0FnI+c4p0gixnl2hDmCtrxI9qwtuSuw+ca
5Bj85KTUSyR3drKgJ0peKmDxMamfyRaAKU1B5XzAD/IfUie/SsSi+M59NGS+3pVo
l1rA/iUcDwzEE2e1u/7/jTK4zwdFWjUvG4rhrgAypSsijMem2qiLGOWKnkVz2DOx
LjDcL4i1sapTAramGzbfrn6Ky+ZMQEOYskRAGTT4G9QP7meaqiQ7dn60/7oLPzK4
ktdYnrGqw9INfAUIfOlae7n89M89URU3T4rt7AbyE0oFOiTjUa4xAFkk+IDltcH0
9E+VY5XMixJhXVloKjdXo2xRDFZRusgB/gIJrBxql1++Sp1QyraAR/f4s9zyOhql
9C1zLi/QArfgKKJZbEYSldHxkkwedEfwVL6IGUcPEpgppXVzTp5e+EKh0Rp7QsIT
ME7Mb9+ipVtKhQLuX8OyBRc71zmt1UWUU28/6X+nUBoSioXg+IQ=
=gOQs
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 6.11:
- One imx8mp-beacon-kit change from Adam Ford to fix the broken WM8962
audio support
- One pinctrl property typo fix for imx8mm-phygate
- One layerscape fix from Krzysztof Kozlowski to get thermal nodes
correct name length
- A couple of imx93-tqma9352 fixes from Markus Niebel, one on CMA
alloc-ranges and the other on SD-Card cd-gpios typo
- One change from Michal Vokáč to fix imx6dl-yapp43 LED current to match
the HW design
- A couple of imx95 fixes from Peng Fan, one to correct a55 power
domains and the other to correct L3Cache cache-sets
- One tqma9352 watchdog reset fix from Sascha Hauer
- One imx93 change from Shenwei Wang to fix the default value for STMMAC
EQOS snps,clk-csr
* tag 'imx-fixes-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8mm-phygate: fix typo pinctrcl-0
arm64: dts: imx95: correct L3Cache cache-sets
arm64: dts: imx95: correct a55 power-domains
arm64: dts: freescale: imx93-tqma9352-mba93xxla: fix typo
arm64: dts: freescale: imx93-tqma9352: fix CMA alloc-ranges
ARM: dts: imx6dl-yapp43: Increase LED current to match the yapp4 HW design
arm64: dts: imx93: update default value for snps,clk-csr
arm64: dts: freescale: tqma9352: Fix watchdog reset
arm64: dts: imx8mp-beacon-kit: Fix Stereo Audio on WM8962
arm64: dts: layerscape: fix thermal node names length
Link: https://lore.kernel.org/r/ZrtsTO1+jXhJ6GSM@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Don't drop references on LPIs that weren't visited by the vgic-debug
iterator
- Cure lock ordering issue when unregistering vgic redistributors
- Fix for misaligned stage-2 mappings when VMs are backed by hugetlb
pages
- Treat SGI registers as UNDEFINED if a VM hasn't been configured for
GICv3
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmbIxBQACgkQa9axLQDI
XvFZexAAhvACqWrq+Ns/WmBq6WlRx+xizwZACmwRppMsn6TtLlFU/Z4WQU3KODLl
0QHmR3/q8dX9BqhAFqBtVpkUkU/mMYhamFm0v+wH1UB5ata6oxsx1z/31bgrw4Vd
hFFUWv4DVvcO6cMxJvFu4QzHgxzCOF7FUFwttFkwwY+6MHF0tpKqTYk2kTGytYF0
Or8ro1rs8+wR6SGlI8f0T3WRFY6kMLB+XkkRv++jogzgjUJ9of0uc3qGWjEA4Fkd
1Jmx/La3/IWSEySjQL/skQlnCCrsc70kzXYpTqPiLNBbBiRLPdFjdqDgSISQLquE
6FO59KoI6uunvTT9iey1Psn7JMfz5TbiVKhEEozFH9e3icZkR9iUrN5IWiebKBUh
KLbaOJjrsLD31vBjc/wgmGOwRvxFNXrJPi5O20MrW5qFbBPQLP5uVI45Us/Wdl3i
s/7Cr+OvZvhzZlvf9/4PebAk8JnGkaF1XLEoLcYRU3q+5wfsrNqqG1ngE0JVayFM
swKmydUvR6KoYBJXTI2Qt3xGDaC/ZMrL8SrH+w5AVmoy202YRtvJ5hBMZYfwuOtJ
v6DZpT45Q+cXtacWtj432iCci+R8gT88PJnVGxZIxgLbZIf+rdoTiXnxewTPdR4J
LzdrDX15BtGzuZoVP3fZiB4oHZfVwO2xzeai4rklJr2dSM70AJc=
=MQRv
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 kvm fixes from Catalin Marinas:
- Don't drop references on LPIs that weren't visited by the vgic-debug
iterator
- Cure lock ordering issue when unregistering vgic redistributors
- Fix for misaligned stage-2 mappings when VMs are backed by hugetlb
pages
- Treat SGI registers as UNDEFINED if a VM hasn't been configured for
GICv3
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
KVM: arm64: Make ICC_*SGI*_EL1 undef in the absence of a vGICv3
KVM: arm64: Ensure canonical IPA is hugepage-aligned when handling fault
KVM: arm64: vgic: Don't hold config_lock while unregistering redistributors
KVM: arm64: vgic-debug: Don't put unmarked LPIs
- Don't drop references on LPIs that weren't visited by the
vgic-debug iterator
- Cure lock ordering issue when unregistering vgic redistributors
- Fix for misaligned stage-2 mappings when VMs are backed by hugetlb
pages
- Treat SGI registers as UNDEFINED if a VM hasn't been configured for
GICv3
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQSNXHjWXuzMZutrKNKivnWIJHzdFgUCZsb21xccb2xpdmVyLnVw
dG9uQGxpbnV4LmRldgAKCRCivnWIJHzdFkrnAP943OLc8UYPCQruiNuzDvzjF4Sf
zI1bdOczyL7QerD/GAD/cVa6I9RigjI+QQd9JeY7V8FUpo6B0KejGvB6DPXIfA8=
=7wBh
-----END PGP SIGNATURE-----
Merge tag 'kvmarm-fixes-6.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into for-next/fixes
KVM/arm64 fixes for 6.11, round #2
- Don't drop references on LPIs that weren't visited by the
vgic-debug iterator
- Cure lock ordering issue when unregistering vgic redistributors
- Fix for misaligned stage-2 mappings when VMs are backed by hugetlb
pages
- Treat SGI registers as UNDEFINED if a VM hasn't been configured for
GICv3
* tag 'kvmarm-fixes-6.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm:
KVM: arm64: Make ICC_*SGI*_EL1 undef in the absence of a vGICv3
KVM: arm64: Ensure canonical IPA is hugepage-aligned when handling fault
KVM: arm64: vgic: Don't hold config_lock while unregistering redistributors
KVM: arm64: vgic-debug: Don't put unmarked LPIs
KVM: arm64: vgic: Hold config_lock while tearing down a CPU interface
KVM: selftests: arm64: Correct feature test for S1PIE in get-reg-list
KVM: arm64: Tidying up PAuth code in KVM
KVM: arm64: vgic-debug: Exit the iterator properly w/o LPI
KVM: arm64: Enforce dependency on an ARMv8.4-aware toolchain
docs: KVM: Fix register ID of SPSR_FIQ
KVM: arm64: vgic: fix unexpected unlock sparse warnings
KVM: arm64: fix kdoc warnings in W=1 builds
KVM: arm64: fix override-init warnings in W=1 builds
KVM: arm64: free kvm->arch.nested_mmus with kvfree()
On a system with a GICv3, if a guest hasn't been configured with
GICv3 and that the host is not capable of GICv2 emulation,
a write to any of the ICC_*SGI*_EL1 registers is trapped to EL2.
We therefore try to emulate the SGI access, only to hit a NULL
pointer as no private interrupt is allocated (no GIC, remember?).
The obvious fix is to give the guest what it deserves, in the
shape of a UNDEF exception.
Reported-by: Alexander Potapenko <glider@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240820100349.3544850-2-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Zenghui reports that VMs backed by hugetlb pages are no longer booting
after commit fd276e71d1 ("KVM: arm64: nv: Handle shadow stage 2 page
faults").
Support for shadow stage-2 MMUs introduced the concept of a fault IPA
and canonical IPA to stage-2 fault handling. These are identical in the
non-nested case, as the hardware stage-2 context is always that of the
canonical IPA space.
Both addresses need to be hugepage-aligned when preparing to install a
hugepage mapping to ensure that KVM uses the correct GFN->PFN translation
and installs that at the correct IPA for the current stage-2.
And now I'm feeling thirsty after all this talk of IPAs...
Fixes: fd276e71d1 ("KVM: arm64: nv: Handle shadow stage 2 page faults")
Reported-by: Zenghui Yu <yuzenghui@huawei.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240822071710.2291690-1-oliver.upton@linux.dev
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
We recently moved the teardown of the vgic part of a vcpu inside
a critical section guarded by the config_lock. This teardown phase
involves calling into kvm_io_bus_unregister_dev(), which takes the
kvm->srcu lock.
However, this violates the established order where kvm->srcu is
taken on a memory fault (such as an MMIO access), possibly
followed by taking the config_lock if the GIC emulation requires
mutual exclusion from the other vcpus.
It therefore results in a bad lockdep splat, as reported by Zenghui.
Fix this by moving the call to kvm_io_bus_unregister_dev() outside
of the config_lock critical section. At this stage, there shouln't
be any need to hold the config_lock.
As an additional bonus, document the ordering between kvm->slots_lock,
kvm->srcu and kvm->arch.config_lock so that I cannot pretend I didn't
know about those anymore.
Fixes: 9eb18136af ("KVM: arm64: vgic: Hold config_lock while tearing down a CPU interface")
Reported-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Tested-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20240819125045.3474845-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
If there were LPIs being mapped behind our back (i.e., between .start() and
.stop()), we would put them at iter_unmark_lpis() without checking if they
were actually *marked*, which is obviously not good.
Switch to use the xa_for_each_marked() iterator to fix it.
Cc: stable@vger.kernel.org
Fixes: 85d3ccc8b7 ("KVM: arm64: vgic-debug: Use an xarray mark for debug iterator")
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240817101541.1664-1-yuzenghui@huawei.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
- Fix the arm64 __get_mem_asm() to use the _ASM_EXTABLE_##type##ACCESS()
macro instead of the *_ERR() one in order to avoid writing -EFAULT to
the value register in case of a fault
- Initialise all elements of the acpi_early_node_map[] to NUMA_NO_NODE.
Prior to this fix, only the first element was initialised
- Move the KASAN random tag seed initialisation after the per-CPU areas
have been initialised (prng_state is __percpu)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAma/d5sACgkQa9axLQDI
XvGt7xAAm1Pc3IEoODXMZ4Io8yhXDvpMzYVIDHhiexKrxAMLCJfIRCrYPvmpHfNS
lQMdgTw61htAk7IukgQA2yKjqQ3C2H1hZ0Ofa9T+oH3ZmCleyWzgmk+nQgVF6aOw
HipG9e2bgfRrJujJ4oZEaSaUtusaeS6qK39Jam2VdiaSCJYOu1yCMn2biyvj5PX0
0Eh5H6uE1gc5n84QGUEDj9ZXLdjx+N8NXhBxAqaDjQ8nhvcDFMlQoDY0XS2e0TrT
35QB8z6nb1jNITlIQ2p1X+ahT8urfVYxzBmi+wvLE7dCSCsPR3wwWS+fQ+9Fq9gv
u2VqnaVasmai1xiWSA/+TrQYiVnWBqhaNb5iOZuUMNN6BUNuXZq5ItZEsGp58NOA
Ircluc+ad5xQGGeTYKNiEq0pRucuoTRODHzrv+XfueJ63TJ7IXfFxbJtGL0yhVa7
lqJ4wK4nIRRealAa2SqIgF9KN3E9QdHhQJr1Bv228gsXxByhOoG05bChUXF+Ckx7
OOHdq5cLkoLfV3liXqNP7hrzLFpUVvn0lNzcZECNz8XEjIqwp81N/HF6rOf8p8G8
h7fXEAzPGuMZYFUnwx9Nsyi9vkLiy3i1QkcAsTV+xHzcZJNLu08OO/ypme/Qp6O/
T0O02MwzQRzVfu9LI8GYzvLwYySPAD/5b6mNTwPwe/A0RM46rio=
=XCox
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- Fix the arm64 __get_mem_asm() to use the _ASM_EXTABLE_##type##ACCESS()
macro instead of the *_ERR() one in order to avoid writing -EFAULT to
the value register in case of a fault
- Initialise all elements of the acpi_early_node_map[] to NUMA_NO_NODE.
Prior to this fix, only the first element was initialised
- Move the KASAN random tag seed initialisation after the per-CPU areas
have been initialised (prng_state is __percpu)
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: Fix KASAN random tag seed initialization
arm64: ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE
arm64: uaccess: correct thinko in __get_mem_asm()
Currently, kasan_init_sw_tags() is called before setup_per_cpu_areas(),
so per_cpu(prng_state, cpu) accesses the same address regardless of the
value of "cpu", and the same seed value gets copied to the percpu area
for every CPU. Fix this by moving the call to smp_prepare_boot_cpu(),
which is the first architecture hook after setup_per_cpu_areas().
Fixes: 3c9e3aa110 ("kasan: add tag related helper functions")
Fixes: 3f41b60938 ("kasan: fix random seed generation for tag-based mode")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com>
Link: https://lore.kernel.org/r/20240814091005.969756-1-samuel.holland@sifive.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The GPU on X1E80100 requires ZAP 'shader' file to be useful. Since the
file is signed by the OEM keys and might be not available by default,
disable the GPU node and drop the firmware name from the x1e80100.dtsi
file. Devices not being fused to use OEM keys can specify generic
location at `qcom/x1e80100/gen70500_zap.mbn` while enabling the GPU.
The CRD and QCP were lucky enough to work with the default settings, so
reenable the GPU on those platforms and provide correct firmware-name
(including the SoC subdir).
Fixes: 721e38301b ("arm64: dts: qcom: x1e80100: Add gpu support")
Cc: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Link: https://lore.kernel.org/r/20240715-x1e8-zap-name-v3-1-e7a5258c3c2e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Currently, only acpi_early_node_map[0] was initialized to NUMA_NO_NODE.
To ensure all the values were properly initialized, switch to initialize
all of them to NUMA_NO_NODE.
Fixes: e189624916 ("arm64: numa: rework ACPI NUMA initialization")
Cc: <stable@vger.kernel.org> # 4.19.x
Reported-by: Andrew Jones <ajones@ventanamicro.com>
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Link: https://lore.kernel.org/r/853d7f74aa243f6f5999e203246f0d1ae92d2b61.1722828421.git.haibo1.xu@intel.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
In the CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y version of __get_mem_asm(), we
incorrectly use _ASM_EXTABLE_##type##ACCESS_ERR() such that upon a fault
the extable fixup handler writes -EFAULT into "%w0", which is the
register containing 'x' (the result of the load).
This was a thinko in commit:
86a6a68feb ("arm64: start using 'asm goto' for get_user() when available")
Prior to that commit _ASM_EXTABLE_##type##ACCESS_ERR_ZERO() was used
such that the extable fixup handler wrote -EFAULT into "%w0" (the
register containing 'err'), and zero into "%w1" (the register containing
'x'). When the 'err' variable was removed, the extable entry was updated
incorrectly.
Writing -EFAULT to the value register is unnecessary but benign:
* We never want -EFAULT in the value register, and previously this would
have been zeroed in the extable fixup handler.
* In __get_user_error() the value is overwritten with zero explicitly in
the error path.
* The asm goto outputs cannot be used when the goto label is taken, as
older compilers (e.g. clang < 16.0.0) do not guarantee that asm goto
outputs are usable in this path and may use a stale value rather than
the value in an output register. Consequently, zeroing in the extable
fixup handler is insufficient to ensure callers see zero in the error
path.
* The expected usage of unsafe_get_user() and get_kernel_nofault()
requires that the value is not consumed in the error path.
Some versions of GCC would mis-compile asm goto with outputs, and
erroneously omit subsequent assignments, breaking the error path
handling in __get_user_error(). This was discussed at:
https://lore.kernel.org/lkml/ZpfxLrJAOF2YNqCk@J2N7QTR9R3.cambridge.arm.com/
... and was fixed by removing support for asm goto with outputs on those
broken compilers in commit:
f2f6a8e887 ("init/Kconfig: remove CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND")
With that out of the way, we can safely replace the usage of
_ASM_EXTABLE_##type##ACCESS_ERR() with _ASM_EXTABLE_##type##ACCESS(),
leaving the value register unchanged in the case a fault is taken, as
was originally intended. This matches other architectures and matches
our __put_mem_asm().
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20240807103731.2498893-1-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
- Use kvfree() for the kvmalloc'd nested MMUs array
- Set of fixes to address warnings in W=1 builds
- Make KVM depend on assembler support for ARMv8.4
- Fix for vgic-debug interface for VMs without LPIs
- Actually check ID_AA64MMFR3_EL1.S1PIE in get-reg-list selftest
- Minor code / comment cleanups for configuring PAuth traps
- Take kvm->arch.config_lock to prevent destruction / initialization
race for a vCPU's CPUIF which may lead to a UAF
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQSNXHjWXuzMZutrKNKivnWIJHzdFgUCZrVPUBccb2xpdmVyLnVw
dG9uQGxpbnV4LmRldgAKCRCivnWIJHzdFoCrAP9ZGQ1M7GdCe4Orm6Ex4R4OMVcz
MWMrFCVM73rnSoCbMwEA7le7M8c+X5i/4oqFOPm/fEr1i5RZT512RL5lc7MxBQ8=
=DG57
-----END PGP SIGNATURE-----
Merge tag 'kvmarm-fixes-6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 6.11, round #1
- Use kvfree() for the kvmalloc'd nested MMUs array
- Set of fixes to address warnings in W=1 builds
- Make KVM depend on assembler support for ARMv8.4
- Fix for vgic-debug interface for VMs without LPIs
- Actually check ID_AA64MMFR3_EL1.S1PIE in get-reg-list selftest
- Minor code / comment cleanups for configuring PAuth traps
- Take kvm->arch.config_lock to prevent destruction / initialization
race for a vCPU's CPUIF which may lead to a UAF
Fix typo pinctrcl-0 with pinctrl-0.
Fix below warning:
arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rs485.dtb: gpio@30220000: 'pinctrl-0' is a dependency of 'pinctrl-names'
from schema $id: http://devicetree.org/schemas/pinctrl/pinctrl-consumer.yaml#
arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rs485.dtb: uart4_rs485_en: $nodename:0: 'uart4_rs485_en' does not match '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$
Fixes: 8d97083c0b ("arm64: dts: phygate-tauri-l: add overlays for RS232 and RS485")
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The L3Cache size is 512KB.
Size = Cache Line Size(64) * num sets(512) * Assoc(0x10).
Correct the number of Cache sets.
Fixes: 5e3cbb8e42 ("arm64: dts: freescale: add i.MX95 basic dtsi")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The A55 power domains is for SCMI performance usage, so for device power
on/off. Correct the power-domains entry to use scmi_perf not scmi_devpd.
Fixes: 5e3cbb8e42 ("arm64: dts: freescale: add i.MX95 basic dtsi")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
DRAM starts at 0x80000000.
Fixes: c982ecfa79 ("arm64: dts: freescale: add initial device tree for MBa93xxLA SBC board")
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On the tqma9352 the board is reset through an external PMIC, so
set the fsl,ext-reset-output property to enable triggering the
output pin on a watchdog trigger.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The L/R clock needs to be controlled by the SAI3 instead of the
CODEC to properly achieve stereo sound. Doing this allows removes
the need for unnecessary clock manipulation to try to get the
CODEC's clock in sync with the SAI3 clock, since the CODEC can cope
with a wide variety of clock inputs.
Fixes: 161af16c18 ("arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock")
Fixes: 69e2f37a6d ("arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODEC")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There are three sets of patches for the soc tree:
- Marek Behún addresses multiple build time regressions caused
by changes to the cznic turris-omnia support
- Dmitry Torokhov fixes a regression in the legacy "gumstix"
board code he cleaned up earlier
- The TI K3 maintainers found multiple bugs in the in gpio,
audio and pcie devicetree nodes.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAma2O9cACgkQYKtH/8kJ
Uic5lxAAm+b0+LEFjs3YRJgb0EM6WIOYLG1MDoaHO/jvX4eQuTxvaTXTMBqpZlnU
q2L+rMVG5G3u8y+ltw+v5BiOS9OaUYyad0isX/vjeNKa+O4ijbQTZ0+CSGXzsnI0
VaCgpyd0FmksHTsCLYg6/acb7rHJnOuDdPLWAB45+5ul4J574HFhE06R83kma4IH
nDacY4UZjMB9+o8Dpd3ZU61ifYCwWGrrGobZtVyevqpC2wFsKkRb8O7Ygp8AENzQ
3PEeEnorwTXvxnV3tLIZnDDhCXesxBZz0Jk/Z27vPTvGZ+fx+TTPtmQiH1oeR272
1oI1cHB23XVeai2rung4mt8GfhXFWd9t8Jto/wM1+vIqeWkyBw/9J2sUfKPeAWIT
SwtmYksziAhdG4huWvA7ANOxOQoVWD5DoczkIoJ+wbV7x9OsByZz//y5PrAo0F6q
THrlvPYM1UyMhudKmFUV6yg93HFH8oLqNt0Llet/5XsCFjB6oQY1OSEur9b5aRDl
24UgQICqvfWXkFUUnqRpYP4x06bglUZS28+33Za91oA8QVmT8W9uE4IjemIKqPN7
+FZrqnfFdflDGpFUHsnSqFqfF+62EUXvwvzuLagJT6QLp1skhiyFSIlI+22FPcJx
ooa403e9moZcKKKdgUwK75BjGZPnqHlrxS39qVMnKL89e/p97sc=
=jBZN
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"There are three sets of patches for the soc tree:
- Marek Behún addresses multiple build time regressions caused by
changes to the cznic turris-omnia support
- Dmitry Torokhov fixes a regression in the legacy "gumstix" board
code he cleaned up earlier
- The TI K3 maintainers found multiple bugs in the in gpio, audio and
pcie devicetree nodes"
* tag 'arm-fixes-6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: pxa/gumstix: fix attaching properties to vbus gpio device
doc: platform: cznic: turris-omnia-mcu: Use double backticks for attribute value
doc: platform: cznic: turris-omnia-mcu: Fix sphinx-build warning
platform: cznic: turris-omnia-mcu: Make GPIO code optional
platform: cznic: turris-omnia-mcu: Make poweroff and wakeup code optional
platform: cznic: turris-omnia-mcu: Make TRNG code optional
platform: cznic: turris-omnia-mcu: Make watchdog code optional
arm64: dts: ti: k3-j784s4-main: Correct McASP DMAs
arm64: dts: ti: k3-j722s: Fix gpio-range for main_pmx0
arm64: dts: ti: k3-am62p: Fix gpio-range for main_pmx0
arm64: dts: ti: k3-am62p: Add gpio-ranges for mcu_gpio0
arm64: dts: ti: k3-am62-verdin-dahlia: Keep CTRL_SLEEP_MOCI# regulator on
arm64: dts: ti: k3-j784s4-evm: Consolidate serdes0 references
arm64: dts: ti: k3-j784s4-evm: Assign only lanes 0 and 1 to PCIe1
Tearing down a vcpu CPU interface involves freeing the private interrupt
array. If we don't hold the lock, we may race against another thread
trying to configure it. Yeah, fuzzers do wonderful things...
Taking the lock early solves this particular problem.
Fixes: 03b3d00a70 ("KVM: arm64: vgic: Allocate private interrupts on demand")
Reported-by: Alexander Potapenko <glider@google.com>
Tested-by: Alexander Potapenko <glider@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240808091546.3262111-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Tidy up some of the PAuth trapping code to clear up some comments
and avoid clang/checkpatch warnings. Also, don't bother setting
PAuth HCR_EL2 bits in pKVM, since it's handled by the hypervisor.
Signed-off-by: Fuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20240722163311.1493879-1-tabba@google.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
In case the guest doesn't have any LPI, we previously relied on the
iterator setting
'intid = nr_spis + VGIC_NR_PRIVATE_IRQS' && 'lpi_idx = 1'
to exit the iterator. But it was broken with commit 85d3ccc8b7 ("KVM:
arm64: vgic-debug: Use an xarray mark for debug iterator") -- the intid
remains at 'nr_spis + VGIC_NR_PRIVATE_IRQS - 1', and we end up endlessly
printing the last SPI's state.
Consider that it's meaningless to search the LPI xarray and populate
lpi_idx when there is no LPI, let's just skip the process for that case.
The result is that
* If there's no LPI, we focus on the intid and exit the iterator when it
runs out of the valid SPI range.
* Otherwise we keep the current logic and let the xarray drive the
iterator.
Fixes: 85d3ccc8b7 ("KVM: arm64: vgic-debug: Use an xarray mark for debug iterator")
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240807052024.2084-1-yuzenghui@huawei.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
With the NV support of TLBI-range operations, KVM makes use of
instructions that are only supported by binutils versions >= 2.30.
This breaks the build for very old toolchains.
Make KVM support conditional on having ARMv8.4 support in the
assembler, side-stepping the issue.
Fixes: 5d476ca57d ("KVM: arm64: nv: Add handling of range-based TLBI operations")
Reported-by: Viresh Kumar <viresh.kumar@linaro.org>
Suggested-by: Arnd Bergmann <arnd@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20240807115144.3237260-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Commit 5e5c50964e ("arm64: dts: ti: k3-j722s: Add gpio-ranges
properties") introduced pinmux range definition for gpio-ranges, however
missed a hole within gpio-range for main_pmx0. As a result, automatic
mapping of GPIO to pin control for gpios within the main_pmx0 domain is
broken. Fix this by correcting the gpio-range.
Fixes: 5e5c50964e ("arm64: dts: ti: k3-j722s: Add gpio-ranges properties")
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240801210414.715306-4-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges
properties") introduced pinmux range definition for gpio-ranges, however
missed a hole within gpio-range for main_pmx0. As a result, automatic
mapping of GPIO to pin control for gpios within the main_pmx0 domain is
broken. Fix this by correcting the gpio-range.
Fixes: d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties")
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240801210414.715306-3-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges
properties") introduced pinmux range definition for gpio-ranges, however
missed introducing the range description for the mcu_gpio node. As a
result, automatic mapping of GPIO to pin control for mcu gpios is
broken. Fix this by introducing the proper ranges.
Fixes: d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties")
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240801210414.715306-2-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This reverts commit 3935fbc87d.
CTRL_SLEEP_MOCI# is a signal that is defined for all the SoM
implementing the Verdin family specification, this signal is supposed to
control the power enable in the carrier board when the system is in deep
sleep mode. However this is not possible with Texas Instruments AM62
SoC, IOs output buffer is disabled in deep sleep and IOs are in
tri-state mode.
Given that we cannot properly control this pin, force it to be always
high to minimize potential issues.
Fixes: 3935fbc87d ("arm64: dts: ti: k3-am62-verdin-dahlia: support sleep-moci")
Cc: <stable@vger.kernel.org>
Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1361669/am625-gpio-output-state-in-deep-sleep/5244802
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240731054804.6061-1-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
Linux kernel expects thermal zone node names to be maximum of 19
characters (see THERMAL_NAME_LENGTH, including terminating NUL byte) and
bindings/dtbs_check points that:
fsl-ls2088a-rdb.dtb: thermal-zones: 'core-cluster1-thermal', 'core-cluster2-thermal', 'core-cluster3-thermal', 'core-cluster4-thermal'
do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$', 'pinctrl-[0-9]+'
Name longer than 19 characters leads to driver probe errors when
registering such thermal zone.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- Expand the speculative SSBS errata workaround to more CPUs
- Ensure jump label changes are visible to all CPUs with a
kick_all_cpus_sync() (and also enable jump label batching as part of
the fix)
- The shadow call stack sanitiser is currently incompatible with Rust,
make CONFIG_RUST conditional on !CONFIG_SHADOW_CALL_STACK
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmatFc0ACgkQa9axLQDI
XvFwmA/9GlYeqB/YTVxBjUOSY/cZZha8W+h+sN0HQH9jUkK3LvVpdZb392XGbY/O
fY1e3I4QNMqqDNGMZT58m4Wu9UWSMn6jlwU3DuaJmKgCG5UjowjWd7BKisokXssX
UZSXMtZwsg5di43rI7Y9XiuI1KTbDclvg+dv18XapOaaEsVbeWaUcxn5GRRhCIkY
+WjRkGeP1/kdyzsM8peciFs5FlnHicL6uD+SlM2a1nw/Rl9lmV6r++rn5pyjeS16
k2QaIse0BsySHNEr+1SVzCClgRT8g+ycrObb6cyq9pmIhrrVXppwZ7mHsU1myXp/
Lp2bslVbVmN5Iqxco9NFghttgftaVzIY0q7rU/QV4QS38ysxaRHYx3k5M7qOXTK/
48Dd/b9O03zFbHq5RIdR5hnXIaDeQx6pwaS5DM3ElUd7bt+lKV104lpMSjaJ3qKy
8EBTdSd8RKKrcoPMGq0BxuEMenLBMcTKJ5lBe6y+Q3CqcciyBfDT4g7E/LZbrBlJ
vvSjVsVg9E6Rp5ZmRjjRdfhkhZindSuCSQe5MYqphmVJITgX8vZH+hVI9on8hcbY
6cDyu18WYPSUH8ojHytzdrrK4udtjaZklCeuezRNi27dnMXuhHE0xK1dNX7SXpVP
w1DdAyLjg82etXXJI6fFBxbKuSyHPLh2Cq87NbXduYHV+7g7VVg=
=AShX
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- Expand the speculative SSBS errata workaround to more CPUs
- Ensure jump label changes are visible to all CPUs with a
kick_all_cpus_sync() (and also enable jump label batching as part of
the fix)
- The shadow call stack sanitiser is currently incompatible with Rust,
make CONFIG_RUST conditional on !CONFIG_SHADOW_CALL_STACK
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: jump_label: Ensure patched jump_labels are visible to all CPUs
rust: SHADOW_CALL_STACK is incompatible with Rust
arm64: errata: Expand speculative SSBS workaround (again)
arm64: cputype: Add Cortex-A725 definitions
arm64: cputype: Add Cortex-X1C definitions
Get rid of unexpected unlock sparse warnings in vgic code
by adding an annotation to vgic_queue_irq_unlock().
arch/arm64/kvm/vgic/vgic.c:334:17: warning: context imbalance in 'vgic_queue_irq_unlock' - unexpected unlock
arch/arm64/kvm/vgic/vgic.c:419:5: warning: context imbalance in 'kvm_vgic_inject_irq' - different lock contexts for basic block
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240723101204.7356-4-sebott@redhat.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Fix kdoc warnings by adding missing function parameter
descriptions or by conversion to a normal comment.
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240723101204.7356-3-sebott@redhat.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Add -Wno-override-init to the build flags for sys_regs.c,
handle_exit.c, and switch.c to fix warnings like the following:
arch/arm64/kvm/hyp/vhe/switch.c:271:43: warning: initialized field overwritten [-Woverride-init]
271 | [ESR_ELx_EC_CP15_32] = kvm_hyp_handle_cp15_32,
|
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240723101204.7356-2-sebott@redhat.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
kvm->arch.nested_mmus is allocated with kvrealloc(), hence free it with
kvfree() instead of kfree().
Fixes: 4f128f8e1a ("KVM: arm64: nv: Support multiple nested Stage-2 mmu structures")
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240723142204.758796-1-dakr@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Although the Arm architecture permits concurrent modification and
execution of NOP and branch instructions, it still requires some
synchronisation to ensure that other CPUs consistently execute the newly
written instruction:
> When the modified instructions are observable, each PE that is
> executing the modified instructions must execute an ISB or perform a
> context synchronizing event to ensure execution of the modified
> instructions
Prior to commit f6cc0c5016 ("arm64: Avoid calling stop_machine() when
patching jump labels"), the arm64 jump_label patching machinery
performed synchronisation using stop_machine() after each modification,
however this was problematic when flipping static keys from atomic
contexts (namely, the arm_arch_timer CPU hotplug startup notifier) and
so we switched to the _nosync() patching routines to avoid "scheduling
while atomic" BUG()s during boot.
In hindsight, the analysis of the issue in f6cc0c5016 isn't quite
right: it cites the use of IPIs in the default patching routines as the
cause of the lockup, whereas stop_machine() does not rely on IPIs and
the I-cache invalidation is performed using __flush_icache_range(),
which elides the call to kick_all_cpus_sync(). In fact, the blocking
wait for other CPUs is what triggers the BUG() and the problem remains
even after f6cc0c5016, for example because we could block on the
jump_label_mutex. Eventually, the arm_arch_timer driver was fixed to
avoid the static key entirely in commit a862fc2254
("clocksource/arm_arch_timer: Remove use of workaround static key").
This all leaves the jump_label patching code in a funny situation on
arm64 as we do not synchronise with other CPUs to reduce the likelihood
of a bug which no longer exists. Consequently, toggling a static key on
one CPU cannot be assumed to take effect on other CPUs, leading to
potential issues, for example with missing preempt notifiers.
Rather than revert f6cc0c5016 and go back to stop_machine() for each
patch site, implement arch_jump_label_transform_apply() and kick all
the other CPUs with an IPI at the end of patching.
Cc: Alexander Potapenko <glider@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Fixes: f6cc0c5016 ("arm64: Avoid calling stop_machine() when patching jump labels")
Signed-off-by: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240731133601.3073-1-will@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The __NR_newfstat and __NR_newfstatat macros accidentally got renamed
in the conversion to the syscall.tbl format, dropping the 'new' portion
of the name.
In an unrelated change, the two syscalls are no longer architecture
specific but are once more defined on all 64-bit architectures, so the
'newstat' ABI keyword can be dropped from the table as a simplification.
Fixes: Fixes: 4fe53bf2ba ("syscalls: add generic scripts/syscall.tbl")
Closes: https://lore.kernel.org/lkml/838053e0-b186-4e9f-9668-9a3384a71f23@app.fastmail.com/T/#t
Reported-by: Florian Weimer <fweimer@redhat.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS
special-purpose register does not affect subsequent speculative
instructions, permitting speculative store bypassing for a window of
time.
We worked around this for a number of CPUs in commits:
* 7187bb7d0b ("arm64: errata: Add workaround for Arm errata 3194386 and 3312417")
* 75b3c43eab ("arm64: errata: Expand speculative SSBS workaround")
Since then, similar errata have been published for a number of other Arm
Ltd CPUs, for which the same mitigation is sufficient. This is described
in their respective Software Developer Errata Notice (SDEN) documents:
* Cortex-A76 (MP052) SDEN v31.0, erratum 3324349
https://developer.arm.com/documentation/SDEN-885749/3100/
* Cortex-A77 (MP074) SDEN v19.0, erratum 3324348
https://developer.arm.com/documentation/SDEN-1152370/1900/
* Cortex-A78 (MP102) SDEN v21.0, erratum 3324344
https://developer.arm.com/documentation/SDEN-1401784/2100/
* Cortex-A78C (MP138) SDEN v16.0, erratum 3324346
https://developer.arm.com/documentation/SDEN-1707916/1600/
* Cortex-A78C (MP154) SDEN v10.0, erratum 3324347
https://developer.arm.com/documentation/SDEN-2004089/1000/
* Cortex-A725 (MP190) SDEN v5.0, erratum 3456106
https://developer.arm.com/documentation/SDEN-2832921/0500/
* Cortex-X1 (MP077) SDEN v21.0, erratum 3324344
https://developer.arm.com/documentation/SDEN-1401782/2100/
* Cortex-X1C (MP136) SDEN v16.0, erratum 3324346
https://developer.arm.com/documentation/SDEN-1707914/1600/
* Neoverse-N1 (MP050) SDEN v32.0, erratum 3324349
https://developer.arm.com/documentation/SDEN-885747/3200/
* Neoverse-V1 (MP076) SDEN v19.0, erratum 3324341
https://developer.arm.com/documentation/SDEN-1401781/1900/
Note that due to the manner in which Arm develops IP and tracks errata,
some CPUs share a common erratum number and some CPUs have multiple
erratum numbers for the same HW issue.
On parts without SB, it is necessary to use ISB for the workaround. The
spec_bar() macro used in the mitigation will expand to a "DSB SY; ISB"
sequence in this case, which is sufficient on all affected parts.
Enable the existing mitigation by adding the relevant MIDRs to
erratum_spec_ssbs_list. The list is sorted alphanumerically (involving
moving Neoverse-V3 after Neoverse-V2) so that this is easy to audit and
potentially extend again in future. The Kconfig text is also updated to
clarify the set of affected parts and the mitigation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20240801101803.1982459-4-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add cputype definitions for Cortex-A725. These will be used for errata
detection in subsequent patches.
These values can be found in the Cortex-A725 TRM:
https://developer.arm.com/documentation/107652/0001/
... in table A-247 ("MIDR_EL1 bit descriptions").
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20240801101803.1982459-3-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add cputype definitions for Cortex-X1C. These will be used for errata
detection in subsequent patches.
These values can be found in the Cortex-X1C TRM:
https://developer.arm.com/documentation/101968/0002/
... in section B2.107 ("MIDR_EL1, Main ID Register, EL1").
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20240801101803.1982459-2-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The backlight does not work correctly with the current display panel
configuration: It works after boot, but once the display gets disabled it
is not possible to get it back on. It turns out that the ATNA45AF01 panel
needs exactly the same non-standard power sequence as implemented by the
panel-samsung-atna33xc20 driver for sc7180-trogdor-homestar.
Switch the panel in the DT to the new compatible and make two more changes
to make it work correctly:
1. Add the missing GPIO for the panel EL_ON3 line (EDP_BL_EN on CRD and
enable-gpios in the DT).
2. Drop the regulator-always-on for the panel regulator. The panel does
not seem to power off properly if the regulator stays on.
Fixes: d7e03cce04 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240715-x1e80100-crd-backlight-v2-3-31b7f2f658a3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Disable the PCIe6a perst pull-down resistor to save some power.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240722095459.27437-12-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The PCIe6a pinctrl node appears to have been copied from the sc8280xp
CRD dts (via the x1e80100 CRD dts), which has the NVMe on pcie2a and
uses some funny indentation.
Fix up the node name to match the x1e80100 use and label and use only
tabs for indentation.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240722095459.27437-11-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
