Commit Graph

64835 Commits

Author SHA1 Message Date
Roland Stigge
8998316c42 ARM: LPC32xx: clock.c: Missing header file
This patch fixes the compiler warnings regarding the EXPORT_SYMBOL usage

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-09 15:55:49 -08:00
Roland Stigge
bd356337cf ARM: LPC32XX: Remove broken non-static declaration
This patch fixes a GCC compile error ("static declaration follows non-static
declaration") for LPC32XX's watchdog, removing the extern declaration since
it's not called externally.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-09 15:55:49 -08:00
Roland Stigge
b845186251 ARM: LPC32xx: clock.c: Fix mutex lock issues
This patch fixes the mutex issue in clock.c, as done in Kevin Wells' original
driver update:

In some cases, the clock drivers could grab a mutex twice in an improper
context. This patch changes the mutex mechanism to a simple irq lock/unlock
mechanism and removes un-needed locks from some functions.

(See also git.lpclinux.com)

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-09 15:55:49 -08:00
Roland Stigge
0cf0d815ba ARM: LPC32xx: clock.c: warning fix
This patch removes the debug warning on local_clk_disable() as done in Kevin
Wells' driver update

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-09 15:55:49 -08:00
Roland Stigge
4ee1c5716d ARM: LPC32xx: Added lpc32xx_defconfig
This patch adds a working defconfig for the LPC32XX architecture. It is a
general default configuration for the PHY3250 reference board and others
based on LPC32XX.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-09 15:55:49 -08:00
Linus Torvalds
883120eb32 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  [S390] dasd: revalidate server for new pathgroup
  [S390] dasd: revert LCU optimization
  [S390] cleanup entry point definition
2012-01-30 09:02:10 -08:00
Linus Torvalds
f07d4a7647 Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze
* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze: generic atomic64 support
2012-01-30 08:59:46 -08:00
Linus Torvalds
6c334f4f6a Merge branch 'stable/for-linus-fixes-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen
* 'stable/for-linus-fixes-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
  xen/granttable: Disable grant v2 for HVM domains.
  x86: xen: size struct xen_spinlock to always fit in arch_spinlock_t
2012-01-28 18:15:33 -08:00
Linus Torvalds
deb9b4ce97 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm: (31 commits)
  ARM: 7304/1: ioremap: fix boundary check when reusing static mapping
  ARM: 7301/1: Rename the T() macro to TUSER() to avoid namespace conflicts
  ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2
  ARM: 7298/1: realview: fix mapping of MPCore private memory region
  PCMCIA: fix sa1111 oops on remove
  ARM: 7288/1: mach-sa1100: add missing module_init() call
  ARM: 7297/1: smp_twd: make sure timer is stopped before registering it
  ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guards
  ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE block
  ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP
  ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs
  ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundary
  ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes
  MFD: ucb1x00-ts: fix resume failure
  MFD: ucb1x00-core: fix gpiolib direction_output handling
  MFD: ucb1x00-core: fix missing restore of io output data on resume
  MFD: mcp-core: fix mcp_priv() to be more type safe
  MFD: mcp-core: fix complaints from the genirq layer
  Revert "ARM: sa11x0: Implement autoloading of codec and codec pdata for mcp bus."
  Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources."
  ...

Fix up conflict due to arch/arm/mach-mx5/Kconfig having been merged into
mach-imx5 (commit 784a90c0a7: "ARM i.MX: Merge i.MX5 support into
mach-imx"), but the ARM_L1_CACHE_SHIFT_6 entry was moved to be driven by
the CPU_V7 logic from it in the old location in rmk's branch (commit
a092f2b153: "ARM: 7291/1: cache: assume 64-byte L1 cachelines for
ARMv7 CPUs").
2012-01-28 13:27:10 -08:00
Linus Torvalds
81bc3009e0 arm-soc fixes for 3.3-rc:
AT91 needed reset fixes which resulted in some minor code refactoring,
 it also adds a feature-removal for one of their platforms for 3.4.
 The USB patches have been acked by Greg K-H.
 
 i.MX and ux500 both have some minor fixes, nothing controversial.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

arm-soc fixes for 3.3-rc:

AT91 needed reset fixes which resulted in some minor code refactoring,
it also adds a feature-removal for one of their platforms for 3.4.
The USB patches have been acked by Greg K-H.

i.MX and ux500 both have some minor fixes, nothing controversial.

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmap
  ARM: imx: iomux-v1.h: Fix build error due to __init annotation
  ARM: at91: Fix at91sam9g45 and at91cap9 reset
  ARM: at91: make rstc soc independent
  ARM: at91: introduce AT91_SAM9_ALT_RESET to select the at91sam9 alternative reset
  ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.h
  ARM: at91: fix cap9 ddrsdr register
  ARM/USB: at91/ohci-at91: rename vbus_pin_inverted to vbus_pin_active_low
  USB: at91: fix clk_get error handling
  ARM: at91: removal of CAP9 SoC family
  ARM: at91: fix at91rm9200 soc subtype handling
  mach-ux500: no MMC_CAP_SD_HIGHSPEED on Snowball
  mach-ux500: enable ARM errata 764369
  mach-ux500: do not override outer.inv_all
  mach-ux500: musb: now musb is always in OTG mode
  ARM: imx6: add missing twd_clk for imx6q clock
2012-01-28 13:21:54 -08:00
Pawel Moll
3c424f3598 ARM: 7304/1: ioremap: fix boundary check when reusing static mapping
Since commit 576d2f2525 "ARM: add
generic ioremap optimization by reusing static mappings" ioremap()
is trying to reuse existing static mapping when possible.

The condition checking boundaries of the requested and existing
mappings didn't take in-page offset into consideration though,
which lead to obscure and hard to debug problems when requested
mapping crossed end of the static one.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-27 21:26:38 +00:00
Konrad Rzeszutek Wilk
6c02b7b161 Merge commit 'v3.3-rc1' into stable/for-linus-fixes-3.3
* commit 'v3.3-rc1': (9775 commits)
  Linux 3.3-rc1
  x86, syscall: Need __ARCH_WANT_SYS_IPC for 32 bits
  qnx4: don't leak ->BitMap on late failure exits
  qnx4: reduce the insane nesting in qnx4_checkroot()
  qnx4: di_fname is an array, for crying out loud...
  KEYS: Permit key_serial() to be called with a const key pointer
  keys: fix user_defined key sparse messages
  ima: fix cred sparse warning
  uml: fix compile for x86-64
  MPILIB: Add a missing ENOMEM check
  tpm: fix (ACPI S3) suspend regression
  nvme: fix merge error due to change of 'make_request_fn' fn type
  xen: using EXPORT_SYMBOL requires including export.h
  gpio: tps65910: Use correct offset for gpio initialization
  acpi/apei/einj: Add extensions to EINJ from rev 5.0 of acpi spec
  intel_idle: Split up and provide per CPU initialization func
  ACPI processor: Remove unneeded variable passed by acpi_processor_hotadd_init V2
  tg3: Fix single-vector MSI-X code
  openvswitch: Fix multipart datapath dumps.
  ipv6: fix per device IP snmp counters
  ...
2012-01-27 11:14:02 -05:00
Olof Johansson
5e96386431 Merge branch 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes
* 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
  arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmap
  ARM: imx: iomux-v1.h: Fix build error due to __init annotation
2012-01-26 23:15:11 -08:00
Olof Johansson
d8c4cd7463 Merge branch 'fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes
* 'fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  mach-ux500: no MMC_CAP_SD_HIGHSPEED on Snowball
  mach-ux500: enable ARM errata 764369
  mach-ux500: do not override outer.inv_all
  mach-ux500: musb: now musb is always in OTG mode
2012-01-26 23:13:20 -08:00
Olof Johansson
3c8cee3b40 Merge branch 'imx6/fixes' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
* 'imx6/fixes' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: imx6: add missing twd_clk for imx6q clock
2012-01-26 23:12:17 -08:00
Linus Torvalds
c75d5c5d82 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc32: forced setting of mode of sun4m per-cpu timers
2012-01-26 17:00:38 -08:00
Russell King
9a95b9e741 Merge branch 'sa11x0-mcp-fixes' into fixes 2012-01-26 21:06:54 +00:00
Linus Torvalds
2d3c7efa50 Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode_amd: Add support for CPU family specific container files
  x86/amd: Add missing feature flag for fam15h models 10h-1fh processors
  x86/boot-image: Don't leak phdrs in arch/x86/boot/compressed/misc.c::Parse_elf()
  x86/numachip: Drop unnecessary conflict with EDAC
  x86/uv: Fix uninitialized spinlocks
  x86/uv: Fix uv_gpa_to_soc_phys_ram() shift
2012-01-26 12:46:07 -08:00
Linus Torvalds
0dbfe8ddaa Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
  m68k: Fix assembler constraint to prevent overeager gcc optimisation
  mac_esp: rename irq
  mac_scsi: dont enable mac_scsi irq before requesting it
  macfb: fix black and white modes
  m68k/irq: Remove obsolete IRQ_FLG_* definitions

Fix up trivial conflict in arch/m68k/kernel/process_mm.c as per Geert.
2012-01-26 12:43:57 -08:00
Julia Lawall
945f82f25f arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmap
Add missing iounmap in error handling code, in a case where the function
already preforms iounmap on some other execution path.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression e;
statement S,S1;
int ret;
@@
e = \(ioremap\|ioremap_nocache\)(...)
... when != iounmap(e)
if (<+...e...+>) S
... when any
    when != iounmap(e)
*if (...)
   { ... when != iounmap(e)
     return ...; }
... when any
iounmap(e);
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-26 12:56:37 +01:00
Fabio Estevam
7c0c34544d ARM: imx: iomux-v1.h: Fix build error due to __init annotation
Fix the following build error found when building imx_v4_v5_defconfig:

  CC      arch/arm/mach-imx/mach-imx27ipcam.o
In file included from arch/arm/plat-mxc/include/mach/iomux-mx27.h:23,
                 from arch/arm/mach-imx/mach-imx27ipcam.c:22:
arch/arm/plat-mxc/include/mach/iomux-v1.h:99: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'imx_iomuxv1_init'

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-26 12:56:37 +01:00
Andreas Herrmann
5b68edc91c x86/microcode_amd: Add support for CPU family specific container files
We've decided to provide CPU family specific container files
(starting with CPU family 15h). E.g. for family 15h we have to
load microcode_amd_fam15h.bin instead of microcode_amd.bin

Rationale is that starting with family 15h patch size is larger
than 2KB which was hard coded as maximum patch size in various
microcode loaders (not just Linux).

Container files which include patches larger than 2KB cause
different kinds of trouble with such old patch loaders. Thus we
have to ensure that the default container file provides only
patches with size less than 2KB.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: <stable@kernel.org>
Link: http://lkml.kernel.org/r/20120120164412.GD24508@alberich.amd.com
[ documented the naming convention and tidied the code a bit. ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-26 12:06:39 +01:00
Andreas Herrmann
652847aa44 x86/amd: Add missing feature flag for fam15h models 10h-1fh processors
That is the last one missing for those CPUs.

Others were recently added with commits

 fb215366b3
 (KVM: expose latest Intel cpu new features (BMI1/BMI2/FMA/AVX2) to guest)

and

 commit 969df4b829
 (x86: Report cpb and eff_freq_ro flags correctly)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Link: http://lkml.kernel.org/r/20120120163823.GC24508@alberich.amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-26 12:06:38 +01:00
Jesper Juhl
5067cf53ca x86/boot-image: Don't leak phdrs in arch/x86/boot/compressed/misc.c::Parse_elf()
We allocate memory with malloc(), but neglect to free it before
the variable 'phdrs' goes out of scope --> leak.

Signed-off-by: Jesper Juhl <jj@chaosbits.net>
Link: http://lkml.kernel.org/r/alpine.LNX.2.00.1201232332590.8772@swampdragon.chaosbits.net
[ Mostly harmless. ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-26 11:30:29 +01:00
Daniel J Blueman
3fe54564a6 x86/numachip: Drop unnecessary conflict with EDAC
EDAC detection no longer crashes multi-node systems, so don't
conflict on it with NumaChip.

Signed-off-by: Daniel J Blueman <daniel@numascale-asia.com>
Cc: Steffen Persvold <sp@numascale.com>
Link: http://lkml.kernel.org/r/1327473349-28395-1-git-send-email-daniel@numascale-asia.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-26 11:03:03 +01:00
Cliff Wickman
d2ebc71d47 x86/uv: Fix uninitialized spinlocks
Initialize two spinlocks in tlb_uv.c and also properly define/initialize
the uv_irq_lock.

The lack of explicit initialization seems to be functionally
harmless, but it is diagnosed when these are turned on:

        CONFIG_DEBUG_SPINLOCK=y
        CONFIG_DEBUG_MUTEXES=y
        CONFIG_DEBUG_LOCK_ALLOC=y
        CONFIG_LOCKDEP=y

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Cc: <stable@kernel.org>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Link: http://lkml.kernel.org/r/E1RnXd1-0003wU-PM@eag09.americas.sgi.com
[ Added the uv_irq_lock initialization fix by Dimitri Sivanich ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-26 10:58:34 +01:00
Russ Anderson
5a51467b14 x86/uv: Fix uv_gpa_to_soc_phys_ram() shift
uv_gpa_to_soc_phys_ram() was inadvertently ignoring the
shift values.  This fix takes the shift into account.

Signed-off-by: Russ Anderson <rja@sgi.com>
Cc: <stable@kernel.org>
Link: http://lkml.kernel.org/r/20120119020753.GA7228@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-01-26 10:58:27 +01:00
Catalin Marinas
4e7682d077 ARM: 7301/1: Rename the T() macro to TUSER() to avoid namespace conflicts
This macro is used to generate unprivileged accesses (LDRT/STRT) to user
space.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25 11:07:40 +00:00
Rabin Vincent
d68133b5a8 ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2
The dynamic ftrace ops startup test currently fails on Thumb-2 kernels:

 Testing tracer function: PASSED
 Testing dynamic ftrace: PASSED
 Testing dynamic ftrace ops #1: (0 0 0 0 0) FAILED!

This is because while the addresses in the mcount records do not have
the zero bit set, the IP reported by the mcount call does have it set
(because it is copied from the LR).  This mismatch causes the ops
filtering in ftrace_ops_list_func() to not call the relevant tracers.

Fix this by clearing the zero bit before adjusting the LR for the mcount
instruction size.  Also, combine the mov+sub into a single sub
instruction.

Acked-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25 09:24:37 +00:00
Marc Zyngier
34ae6c96a6 ARM: 7298/1: realview: fix mapping of MPCore private memory region
Since commit 0536bdf33f (ARM: move iotable mappings within
the vmalloc region), the RealView PB11MP cannot boot anymore.

This is caused by the way the mappings are described on this
platform (define replaced by hex values for clarity):

{	/* GIC CPU interface mapping */
        .virtual        = IO_ADDRESS(0x1F000100),
        .pfn            = __phys_to_pfn(0x1F000100),
        .length         = SZ_4K,
        .type           = MT_DEVICE,
}, {	/* GIC distributor mapping */
        .virtual        = IO_ADDRESS(0x1F001000),
        .pfn            = __phys_to_pfn(0x1F001000),
        .length         = SZ_4K,
        .type           = MT_DEVICE,
}

The first mapping ends up reserving two pages, and clashes with
the second one, which triggers a BUG_ON in vm_area_add_early().

In order to solve this problem, treat the MPCore private memory
region (containing the SCU, the GIC and the TWD) as a single region,
as described in the TRM:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/CACGDJJC.html

The EB11MP is converted the same way, even if it manages to avoid
the problem.

Tested on both PB11MP and EB11MP.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-25 09:24:36 +00:00
Linus Torvalds
a86b4ad6da Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix build on some non-freescale platforms
  powerpc/powernv: Fix PCI resource handling
  powerpc/crash: Fix build error without SMP
  powerpc/cpuidle: Make it a bool, not a tristate
  powerpc/85xx: Add dr_mode property in USB nodes
  powerpc/85xx: Enable USB2 controller node for P1020RDB
  powerpc/85xx: Fix cmd12 bug and add the chip compatible for eSDHC
  arch/powerpc/sysdev/fsl_pci.c: add missing iounmap
  powerpc: fix compile error with 85xx/p1022_ds.c
2012-01-24 21:17:51 -08:00
Benjamin Herrenschmidt
3493c85366 powerpc: Fix build on some non-freescale platforms
Commit 9deaa53ac7 broke build
on platforms that use legacy_serial.c without also having
CONFIG_SERIAL_8250_FSL enabled due to an unconditional code
to a routine in that module.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-01-25 13:33:22 +11:00
Benjamin Herrenschmidt
f7ea82beb2 powerpc/powernv: Fix PCI resource handling
Recent changes to the handling of PCI resources for host bridges
are breaking the PowerNV code for assigning resources on IODA.

The root of the problem is that the pci_bus attached to a host
bridge no longer has its "legacy" resource pointers populated
but only uses the newer list instead.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-01-25 13:32:00 +11:00
Linus Torvalds
701b259f44 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Davem says:

1) Fix JIT code generation on x86-64 for divide by zero, from Eric Dumazet.

2) tg3 header length computation correction from Eric Dumazet.

3) More build and reference counting fixes for socket memory cgroup
   code from Glauber Costa.

4) module.h snuck back into a core header after all the hard work we
   did to remove that, from Paul Gortmaker and Jesper Dangaard Brouer.

5) Fix PHY naming regression and add some new PCI IDs in stmmac, from
   Alessandro Rubini.

6) Netlink message generation fix in new team driver, should only advertise
   the entries that changed during events, from Jiri Pirko.

7) SRIOV VF registration and unregistration fixes, and also add a
   missing PCI ID, from Roopa Prabhu.

8) Fix infinite loop in tx queue flush code of brcmsmac, from Stanislaw Gruszka.

9) ftgmac100/ftmac100 build fix, missing interrupt.h include.

10) Memory leak fix in net/hyperv do_set_mutlicast() handling, from Wei Yongjun.

11) Off by one fix in netem packet scheduler, from Vijay Subramanian.

12) TCP loss detection fix from Yuchung Cheng.

13) TCP reset packet MD5 calculation uses wrong address, fix from Shawn Lu.

14) skge carrier assertion and DMA mapping fixes from Stephen Hemminger.

15) Congestion recovery undo performed at the wrong spot in BIC and CUBIC
    congestion control modules, fix from Neal Cardwell.

16) Ethtool ETHTOOL_GSSET_INFO is unnecessarily restrictive, from Michał Mirosław.

17) Fix triggerable race in ipv6 sysctl handling, from Francesco Ruggeri.

18) Statistics bug fixes in mlx4 from Eugenia Emantayev.

19) rds locking bug fix during info dumps, from your's truly.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (67 commits)
  rds: Make rds_sock_lock BH rather than IRQ safe.
  netprio_cgroup.h: dont include module.h from other includes
  net: flow_dissector.c missing include linux/export.h
  team: send only changed options/ports via netlink
  net/hyperv: fix possible memory leak in do_set_multicast()
  drivers/net: dsa/mv88e6xxx.c files need linux/module.h
  stmmac: added PCI identifiers
  llc: Fix race condition in llc_ui_recvmsg
  stmmac: fix phy naming inconsistency
  dsa: Add reporting of silicon revision for Marvell 88E6123/88E6161/88E6165 switches.
  tg3: fix ipv6 header length computation
  skge: add byte queue limit support
  mv643xx_eth: Add Rx Discard and Rx Overrun statistics
  bnx2x: fix compilation error with SOE in fw_dump
  bnx2x: handle CHIP_REVISION during init_one
  bnx2x: allow user to change ring size in ISCSI SD mode
  bnx2x: fix Big-Endianess in ethtool -t
  bnx2x: fixed ethtool statistics for MF modes
  bnx2x: credit-leakage fixup on vlan_mac_del_all
  macvlan: fix a possible use after free
  ...
2012-01-24 15:51:40 -08:00
Christian Kujau
897e01a08c powerpc/crash: Fix build error without SMP
I could not find cpus_in_crash anywhere in the sourcetree, except for
arch/powerpc/kernel/crash.c. Moving the definition into the CONFIG_SMP
fixes it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-01-25 09:47:45 +11:00
Deepthi Dharwar
f7aa554510 powerpc/cpuidle: Make it a bool, not a tristate
As pointed out, asm/system.h has empty inline implementations for
update_smt_snooze_delay and pseries_notify_cpuidle_add_cpu, which are
used when CONFIG_PSERIES_IDLE is undefined. Since those two functions
are used in core power architecture functions (store_smt_snooze_delay
at kernel/sysfs.c and smp_xics_setup_cpu at platforms/pseries/smp.c),

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-01-25 09:43:06 +11:00
Benjamin Herrenschmidt
407a362f94 Merge remote-tracking branch 'kumar/merge' into merge 2012-01-25 09:40:34 +11:00
David Vrabel
7a7546b377 x86: xen: size struct xen_spinlock to always fit in arch_spinlock_t
If NR_CPUS < 256 then arch_spinlock_t is only 16 bits wide but struct
xen_spinlock is 32 bits.  When a spin lock is contended and
xl->spinners is modified the two bytes immediately after the spin lock
would be corrupted.

This is a regression caused by 84eb950db1
(x86, ticketlock: Clean up types and accessors) which reduced the size
of arch_spinlock_t.

Fix this by making xl->spinners a u8 if NR_CPUS < 256.  A
BUILD_BUG_ON() is also added to check the sizes of the two structures
are compatible.

In many cases this was not noticable as there would often be padding
bytes after the lock (e.g., if any of CONFIG_GENERIC_LOCKBREAK,
CONFIG_DEBUG_SPINLOCK, or CONFIG_DEBUG_LOCK_ALLOC were enabled).

The bnx2 driver is affected. In struct bnx2, phy_lock and
indirect_lock may have no padding after them.  Contention on phy_lock
would corrupt indirect_lock making it appear locked and the driver
would deadlock.

Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
CC: stable@kernel.org #only 3.2
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-01-24 12:10:19 -05:00
Linus Torvalds
eaed435a7b Consolidate i.MX 5 platforms to be under the new shared i.MX 3/5/6 tree.
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Merge tag 'arm-soc-imx-move' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Consolidate i.MX 5 platforms to be under the new shared i.MX 3/5/6 tree.

* tag 'arm-soc-imx-move' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM i.MX: Update defconfig
  ARM i.MX: Merge i.MX5 support into mach-imx
  ARM i.MX5: remove unnecessary includes from board files

Fix up fairly trivial conflicts due to various changes nearby in
arch/arm/{mach,plat}-imx/{Kconfig,Makefile}

Pull request had been sent to the wrong email address, but happened
before the merge window closed.  I'm merging the MX 5 consolidation,
since it apparently will help the next development window and will avoid
conflicts later as per Arnd.
2012-01-23 14:50:30 -08:00
Dan Rosenberg
c25a785d66 score: fix off-by-one index into syscall table
If the provided system call number is equal to __NR_syscalls, the
current check will pass and a function pointer just after the system
call table may be called, since sys_call_table is an array with total
size __NR_syscalls.

Whether or not this is a security bug depends on what the compiler puts
immediately after the system call table.  It's likely that this won't do
anything bad because there is an additional NULL check on the syscall
entry, but if there happens to be a non-NULL value immediately after the
system call table, this may result in local privilege escalation.

Signed-off-by: Dan Rosenberg <drosenberg@vsecurity.com>
Cc: <stable@vger.kernel.org>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Lennox Wu <lennox.wu@gmail.com>
Cc: Eugene Teo <eugeneteo@kernel.sg>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-01-23 08:38:49 -08:00
Michael Holzheu
cb78edfdce kdump: define KEXEC_NOTE_BYTES arch specific for s390x
kdump only allocates memory for the prstatus ELF note.  For s390x,
besides of prstatus multiple ELF notes for various different register
types are stored.  Therefore the currently allocated memory is not
sufficient.  With this patch the KEXEC_NOTE_BYTES macro can be defined
by architecture code and for s390x it is set to the correct size now.

Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-01-23 08:38:48 -08:00
Linus Walleij
b3945bcbc3 ARM: 7288/1: mach-sa1100: add missing module_init() call
The Jornada SSP driver is supposed to be initialized by a
module_init() call, but it was missed at some merge point. Since
the driver mostly pass calls through it magically works anyway,
but needs to be rectified.

Cc: Kristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:21:38 +00:00
Marc Zyngier
c214455f32 ARM: 7297/1: smp_twd: make sure timer is stopped before registering it
On secondary CPUs, the Timer Control Register is not reset
to a sane value before the timer is registered, and the TRM
doesn't seem to indicate any reset value either. In some cases,
the kernel will take an interrupt too early, depending on what
junk was present in the registers at reset time.

The fix is to set the Timer Control Register to 0 before
registering the clock_event_device and enabling the interrupt.

Problem seen on VE (Cortex A5) and Tegra.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:07 +00:00
Will Deacon
612539e81f ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guards
On v7, we use the same cache maintenance instructions for data lines
as for unified lines. This was not the case for v6, where HARVARD_CACHE
was defined to indicate the L1 cache topology.

This patch removes the erroneous compile-time check for HARVARD_CACHE in
proc-v7.S, ensuring that we perform I-side invalidation at boot.

Reported-and-Acked-by: Shawn Guo <shawn.guo@linaro.org>

Cc: stable <stable@vger.kernel.org>
Acked-by: Catalin Marinas <Catalin.Marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:06 +00:00
Will Deacon
868dbf9052 ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE block
The merging of commits 1b6ba46b ("ARM: LPAE: MMU setup for the 3-level
page table format") and b4244738 ("ARM: 7202/1: Add Cortex-A7 proc info")
during the merge window ended up putting the Cortex-A7 proc_info into a
code block guarded by !CONFIG_ARM_LPAE. This makes Cortex-A7 platforms
unbootable when LPAE is enabled.

This patch moves the proc_info structure for Cortex-A7 outside of the
guarded block.

Cc: Pawel Moll <pawel.moll@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:06 +00:00
Will Deacon
eb50439b92 ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP
It turns out that the logical CPU mapping is useful even when !CONFIG_SMP
for manipulation of devices like interrupt and power controllers when
running a UP kernel on a CPU other than 0. This can happen when kexecing
a UP image from an SMP kernel.

In the future, multi-cluster systems running AMP configurations will
require something similar for mapping cluster IDs, so it makes sense to
decouple this logic in preparation for this support.

Acked-by: Yang Bai <hamo.by@gmail.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reported-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:05 +00:00
Will Deacon
a092f2b153 ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs
To ensure correct alignment of cacheline-aligned data, the maximum
cacheline size needs to be known at compile time.

Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely
that there will be future ARMv7 implementations with the same line size)
then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline
size. For CPUs with smaller caches, this will result in some harmless
padding but will help with single zImage work and avoid hitting subtle
bugs with misaligned data structures.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:05 +00:00
Will Deacon
972da06470 ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundary
The exception fixup table is currently aligned to a 32-byte boundary.
Whilst this won't cause any problems, the exception_table_entry
structures contain only a pair of unsigned longs, so 4-byte alignment
is all that is required. If the table was walked from start to end,
cacheline alignment may bring some performance benefits, but since a
binary search is used, the access pattern is random and will not benefit
from a stricter alignment.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:04 +00:00
Will Deacon
f0d5375e3c ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes
The linker script assumes a cacheline size of 32 bytes when aligning
the .data..cacheline_aligned and .data..percpu sections.

This patch updates the script to use L1_CACHE_BYTES, which should be set
to 64 on platforms that require it.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:04 +00:00
Andreas Schwab
2a3535069e m68k: Fix assembler constraint to prevent overeager gcc optimisation
Passing the address of a variable as an operand to an asm statement
doesn't mark the value of this variable as used, so gcc may optimize its
initialisation away.  Fix this by using the "m" constraint instead.

Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: stable@vger.kernel.org
2012-01-22 14:50:20 +01:00