Commit Graph

8 Commits

Author SHA1 Message Date
Martin Blumenstingl
2c323c43a3 ARM: dts: meson8: add and use the real clock controller
This removes the dummy clk81 gate and replaces it with the actual clock
controller's CLKID_CLK81. This will also allow us to pass the real clock
IDs to all devices where the clock is controlled by clkc in the future.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-09 11:21:21 -07:00
Carlo Caione
bbe5b23dfd ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b
This patch extends the L2 cache controller node for the Amlogic Meson8
and Meson8b SoCs with some missing parameters. These are taken from the
Amlogic GPL kernel source.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
[apply the change to Meson8 and Meson8b and updated description]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-05-26 11:23:08 -07:00
Martin Blumenstingl
200a575b68 ARM: dts: meson: organize devices in their corresponding busses
The Amlogic Meson SoCs have most of the internal peripherals organized
in busses. Use them to make the dts easier to read and to avoid
duplicated register (bus) offset definitions.

The bus information is taken from the vendor kernel:
	#define IO_CBUS_PHY_BASE        0xc1100000  ///2M
	#define IO_AOBUS_PHY_BASE       0xc8100000  ///1M

There are more internal busses (such as the abp bus which seems to
contain audio, HDMI and Mali registers), but since we don't have
drivers for them yet these are not added (yet).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: minor whitespace fix]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-05-26 11:23:08 -07:00
Neil Armstrong
90f349ade2 ARM: dts: meson8: Add gpio-ranges properties
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28 07:56:06 -07:00
Carlo Caione
b60e1157d8 ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: Kevin Hilman <khilman@baylibre.com>
2016-03-30 19:51:57 +02:00
Beniamino Galvani
d9fea88c4f ARM: dts: meson8: add pinctrl node
Add pinctrl node to the DTSI file for meson8 and sub-nodes for some
standard mux configurations.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
2015-03-02 11:00:59 +01:00
Beniamino Galvani
550ab390d7 ARM: meson: DTS: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
2014-11-18 16:36:14 +01:00
Beniamino Galvani
aeff05a39a ARM: dts: add dtsi for Amlogic Meson8 SoCs
This adds a dtsi for Amlogic Meson8 SoCs. It differs from the Meson6
dtsi for the number of Cortex-A9 cores (4 vs 2) and for the frequency
of clk81.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
2014-11-18 16:36:06 +01:00