With all the helper functions in place, add OTP support for the Winbond
W25Q32JW and W25Q32FW.
Both were tested on a LS1028A SoC with a NXP FSPI controller.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20210321235140.8308-4-michael@walle.cc
spi_nor_parse_sfdp(nor, nor->params);
passes for the second argument a member within the first argument.
Drop the second argument and obtain it directly from the first,
and do it across all the children functions. This is a follow up for
'commit 69a8eed58c ("mtd: spi-nor: Don't copy self-pointing struct around")'
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20210306095002.22983-4-tudor.ambarus@microchip.com
Add support for w25q512jvq. This is of the same series chip with
w25q256jv, which is already supported, but with size doubled and
different JEDEC ID.
Tested on Intel whitley platform with dd from/to the flash for
read/write respectly, and flash_erase for erasing the flash.
Signed-off-by: Shuhao Mai <shuhao.mai.1990@gmail.com>
[ta: put flash_info flags in order, first SPI_NOR_DUAL_READ, then
SPI_NOR_QUAD_READ]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20210208075303.4200-1-shuhao.mai.1990@gmail.com
Add support Winbond w25q{64,128,256}jwm which are identical to existing
w25q32jwm except for their sizes.
This was tested with w25q64jwm, basic erase/write/readback and
lock/unlock both lower/upper blocks were okay.
Signed-off-by: ikjn@chromium.org <ikjn@chromium.org>
Signed-off-by: Xingyu Wu <wuxy@bitland.corp-partner.google.com>
Signed-off-by: ST Lin <stlin2@winbond.com>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20200928060631.2090541-1-ikjn@chromium.org
Both w25q64 and s25fl064k nor flash support QUAD and DUAL read
command, hence update the same in flash_info table.
This is tested on Broadcom Stingray SoC (bcm958742t).
s25fl064k and w25q64 share the same JEDEC ID. The search alg will
return the first hit, so s25fl064k even for the winbond parts. We
should differentiate between these flashes, but it's not in the
scope of this patch. Related discussion at:
Link: https://lore.kernel.org/patchwork/patch/628090/
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Link: https://lore.kernel.org/r/20200529071655.739-1-rayagonda.kokatanur@broadcom.com
[tudor.ambarus@microchip.com: Update commit message and indicate that
s25fl064k and w25q64 share the same JEDEC ID]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This chip is (nearly) identical to the Winbond w25q64 which is
already supported by Linux. Compared to the w25q64, the 'jvm'
has a different JEDEC ID.
Signed-off-by: Sven Van Asbroeck <thesven73@gmail.com>
[tudor.ambarus@microchip.com: Order entry alphabetically, update
subject, update Sven's email address]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200629195306.1030-1-TheSven73@gmail.com
There are 2 different chips (w25q256fv and w25q256jv) that share
the same JEDEC ID. Only w25q256jv fully supports 4-byte opcodes.
Use SFDP header version to differentiate between them.
Fixes: 10050a02f7 ("mtd: spi-nor: Add 4B_OPCODES flag to w25q256")
Signed-off-by: Mantas Pucka <mantas@8devices.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The SPI NOR controllers drivers must not be able to use structures that
are meant just for the SPI NOR core.
struct spi_nor_flash_parameter is filled at run-time with info gathered
from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter
should be opaque to the SPI NOR controller drivers, make sure it is.
spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command,
spi_nor_read_command_index and spi_nor_pp_command_index are defined for the
core use, make sure they are opaque to the SPI NOR controller drivers.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Create a SPI NOR manufacturer driver for Winbond chips, and move the
Winbond definitions outside of core.c.
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
