The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
version based on the RK3568 SoC and an industrial version based on the
RK3568J SoC.
Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240627211737.1985549-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This reverts commit eb9d53d4a9.
As Marc pointed out on the list [*], this patch is wrong, and those who
find themselves in the SOB chain should have their heads checked.
Annoyingly, the architecture has some FGT trap bits that are negative
(i.e. 0 implies trap), and there was some confusion how KVM handles
this for nested guests. However, it is clear now that KVM honors the
RES0-ness of FGT traps already, meaning traps for features never exposed
to the guest hypervisor get handled at L0. As they should.
Link: https://lore.kernel.org/kvmarm/86bk3c3uss.wl-maz@kernel.org/T/#mb9abb3dd79f6a4544a91cb35676bd637c3a5e836
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
This enables the newly introduce Shared Memory Bridge driver which
improves the mechansim with which buffers are shared with TrustZone.
It turns MSM8996, SM8150 and SM8350 interconnect providers to builtin,
as debug UART now depends on these. The SM8350 GPU clock controller is
enabled.
The secure QFPROM driver is enabled, to provide access to OTP
configuration for the LLCC driver on the QDU1000 platform.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaJaGsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F5zwQAMidZd3wszmWZ945zWq/p+kNNqxx
N+/Stb4Yxg/6jvjROiWZ8XhFEpjEBlV/90EdruQfs1NuRjtHZowRtPhsTPOw1DQ1
DssJOZBWPJu5E5ar0WVi/JYQJA2S18FwgCn3PB5BSvTaHnA495HBpqMd8EJ+0hO6
rkWI585xRNAyyFISfsFLR7S5c3STyRnDnSBafTFkXPlALwiRg/6rl/JGIA246Z4Q
lDWmrt1tMUtrL97JR9fm9qDSiZ5AF22s1DujlaeVtXym7Ob0iwJsMpoRml/uH4Wv
sZP/LGi39YCFTa+l8C+Ymx/LSlXmTfjGQPx/y/GUQSpLte92yNckaYtP0TvOZeVr
4iPaq4LDUdNK++iOJJOOsJvOgRYv39CRLAMfoP8RWi0r1V2Ds014waaQX62b43bx
Xo9cam8IeuvJTstvYiz7n4KjANZJ3XVvxdDY67ClJwXxHRJghQtCrj7QVgR6F7mN
EMe79YiwZtGAZubxD4OeGQP2LfyphQyxVo67gHI8Zf3SP2YBzgFyNh+Xiiurqxx+
6WVaE1ZQqxzpGvdrqa4W4hEC7KOoTMmbFs7n+CbTTJTYzqSXUfMDN56IT7CGioAV
U1POw6mMDtGVwcQwCcSOusPoAqfaJMjVq4D/4sLg03KQfOrUrLQJUl/N9oiTRFKx
sbsN5wPzBcBTSbP2
=NYA7
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaMPrgACgkQYKtH/8kJ
UieBbRAA3F0Kx6xXTjsUe+3bkUXszN2ZwRA+tLlUU9wQ0iC4FqKz2itrYfOBUgzm
fNsH9Xrv2+zNgbcQiJBmAQyax7v2D5Z6Cnk46ZVU1hkd2zqxhJEKok2M86tt1U9F
uRAOCf6Ct3Xi3ZAFA+fbpUUyVxvjevdi/Hg5kqHQzpvLImu9YznYzI5SHsj/6eTw
p8xJQt6Hy9TaRTrESj7W+9/rf77Ly064YwaQARkuQ8uEMENeoudndVSX1Vgu2f0o
8EQB25M7krVzzd8rUybhm6r03EVTmcuf0avt8nJFFlcD0X7G0o+lpgl4lhDNRk6M
agMluwa6wneTQP4UD6QZT02qAjqa6zF2riryakqw7lvhKAtocdQjEkO81I3857RC
YheP1Y2F7W2Dc2gEZD5+E/WlBJoDH51stzHuAAZrVS5YTiVwbvr0mAlxwkqv2EsT
kqqFKiY6hEdwKXZ8o5pTIBZyZT4wTpyBXK8172cSgu9ecwfgQ1Xa1HhXXGmeYhCq
rhIF2xA0IPP7xaVnGFZHRfFfMDUQzCr5pPAXSPm0Dmx5+8cZ9w+0c1orMkpVhMWX
wRKrH3iD/WH0MzDOJDoXA39l+xtl0XE0tEEqUEyw1kl9nRLzfy2S2gcW8HjIy6y3
bzwEzNDQ0ep9QY0OVFj4oLlpqQde+k8HH4s4uNXdcaFiyiT+YDg=
=SFGH
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
Qualcomm Arm64 defconfig updates for v6.11
This enables the newly introduce Shared Memory Bridge driver which
improves the mechansim with which buffers are shared with TrustZone.
It turns MSM8996, SM8150 and SM8350 interconnect providers to builtin,
as debug UART now depends on these. The SM8350 GPU clock controller is
enabled.
The secure QFPROM driver is enabled, to provide access to OTP
configuration for the LLCC driver on the QDU1000 platform.
* tag 'qcom-arm64-defconfig-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: enable SHM Bridge support for the TZ memory allocator
arm64: defconfig: Enable secure QFPROM driver
arm64: defconfig: enable several Qualcomm interconnects
arm64: defconfig: make CONFIG_INTERCONNECT_QCOM_SM8350 built-in
arm64: defconfig: enable CONFIG_SM_GPUCC_8350
Link: https://lore.kernel.org/r/20240706155347.16207-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for the Lunzn Fastrhino R6xS boards, allowing dma on uarts connected
to bluetooth modules and an update for the gpu operating points on
rk356x. As well as some minor fixes for missing power-dmains and
ethernet phy binding adherence.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmaL+iUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgbyuB/9Uwa5aie3zf/KRuXdb19UAigKxt1HWxU0f
z7hHyFEZoLpByFsE1H0MtKiGdIkuIrwACoPU0bRLFoPOGpvT3ZbiO5vYmjOe/pmb
U2jYKR42TOKbWtAW8jlB+OCKnltVgDyUzetersRpLBFT6ukGK5asEapfcSer3p6u
NFM/92wNDgf3KU8oY4cxZlXs11p3kRXSU+TV38qYCxGVo9hzZASPqsCCAwBgMK9N
v6bPdZBkv0n/iANPZQcM4lrn0p28gbkDuHrgX9gnd/megh0F4XPxmVdZaM8umdmv
/O+woP0/9q4ZY4/+qNRYnZOVL84Gi/QWg52Iu7npYQ7509p7PK05
=LRjK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaMCg4ACgkQYKtH/8kJ
UiexpQ//WMMP4xLj8Nv/MRNxvT8XM2k0ExgrshuRQ2JoDv4sXkDvt7/MKTFRzs+G
4vDmk+kdmgEcBOnV/ZtRu2e4ECZOpfVytOAINqUHYIlkvOFrERAoa8qQ+GWonRMx
v+dQubDDin79OJzaNyipL5CIR9Ux8Xw0T800IP6ppgLa6Cpy853haD0/XxxFvtb3
YHYhwx9qwcNKGCCpl77VrPIj7HIoMp/43M3XOVq6cFSyJ1X24fOVDIxSs5w2Oadd
YyOxeiyNvqYqRNMJ6UWcHX/87HyXXvx/mh7vxzelG7XdOVSzzTPkGY8KnDKpvQRZ
mvQzo1XGuC7a7o4LF+5Cfmq1uxvf19IFHISoMc78KpINXbTQeeDKaz7oJ33kej0K
h3Y4YyITKwTYQV2XuZIU4HfVpeQzRpeRWSmuq+fc4J16G35S5wqYVfC4u94JSzcR
NJ1XKWTHpdqEGPlLoVCiTOr+mqTEsPgpb1jNJJmBPxXUX9msKauWWHB9zotYNtNr
wat3l8fqwhmG9o0hKH4ijs7eWLFI41v9lMxzqliqggXlXjS/cY6/7Oa5dmLKqTHr
/YOLB/sIMO/0vkq176RRlufzZMpjlw2K1rMGtfhc/Erq+0rURKqG64D/BjYKY04k
JMNDCVnlY0cRXcx8FNEok9Dswe8W/g0YkBeIT2c8WA5gCLeGnWM=
=A0a5
-----END PGP SIGNATURE-----
Merge tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
One new board, the pretty interesting Rock 5 ITX, some improvements
for the Lunzn Fastrhino R6xS boards, allowing dma on uarts connected
to bluetooth modules and an update for the gpu operating points on
rk356x. As well as some minor fixes for missing power-dmains and
ethernet phy binding adherence.
* tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add ROCK 5 ITX board
dt-bindings: arm: rockchip: Add ROCK 5 ITX board
arm64: dts: rockchip: Add dma-names to uart1 on Pine64 rk3566 devices
arm64: dts: rockchip: Add avdd supplies to hdmi on rock64
arm64: dts: rockchip: fixes PHY reset for Lunzn Fastrhino R68S
arm64: dts: rockchip: disable display subsystem for Lunzn Fastrhino R6xS
arm64: dts: rockchip: remove unused usb2 nodes for Lunzn Fastrhino R6xS
arm64: dts: rockchip: fix pmu_io supply for Lunzn Fastrhino R6xS
arm64: dts: rockchip: fix usb regulator for Lunzn Fastrhino R6xS
arm64: dts: rockchip: fix regulator name for Lunzn Fastrhino R6xS
arm64: dts: rockchip: Add dma-names to uart1 on quartz64-b
arm64: dts: rockchip: Update GPU OPP voltages in RK356x SoC dtsi
arm64: dts: rockchip: Add GPU OPP voltage ranges to RK356x SoC dtsi
arm64: dts: rockchip: Drop ethernet-phy-ieee802.3-c22 from PHY compatible string on all RK3588 boards
arm64: dts: rockchip: Add missing power-domains for rk356x vop_mmu
Link: https://lore.kernel.org/r/1998182.CrzyxZ31qj@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The imx-spdif machine driver creates audio card to directly use an
S/PDIF device. However, it doesn't support interacting with an ASRC.
fsl-asoc-card already has the support to create audio card which can
use the ASRC.
Merge the S/PDIF support from imx-spdif into driver fsl-asoc-card
to extend the support of S/PDIF audio card with the use of ASRC devices.
fsl-asoc-card uses slightly different DT properties than imx-spdif:
* the "spdif-controller" property from imx-spdif is named "audio-cpu" in
fsl-asoc-card.
* fsl-asoc-card uses codecs explicitly declared in DT
with "audio-codec".
With an SPDIF, codec drivers spdif_transmitter and
spdif_receiver should be used.
Driver imx-spdif used instead the dummy codec and a pair of
boolean properties, "spdif-in" and "spdif-out".
To keep backward compatibility, support for "spdif-controller",
"spdif-in" and "spdif-out" is also added to fsl-asoc-card.
However, it is recommended to use the new properties if possible.
It is better to declare transmitter and/or receiver in DT
than using the dummy codec.
DTs using compatible "fsl,imx-audio-spdif" are still compatible, and
fsl-asoc-card will behave the same as imx-spdif
for these DTs.
Signed-off-by: Elinor Montmasson <elinor.montmasson@savoirfairelinux.com>
Link: https://patch.msgid.link/20240627083104.123357-5-elinor.montmasson@savoirfairelinux.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This introduces 11 new boards, namely:
* ASUS Vivobook S 15
* Lenovo Smart Tab M10 DTS
* Motorola Moto E 2015 LTE (surnia)
* Motorola Moto G 2015 (osprey)
* Motorola Moto G4 Play (harpia)
* Qualcomm AIM300 AIoT development board
* Qualcomm SM8650 Hardware Development Kit (HDK)
* SHIFTphone 8
* Samsung Galaxy Z Fold5
* Schneider HMIBSC board DTS
* TP-Link Archer AX55 v1
Of particular interest here is the Asus Vivobook, the first supported X1
Elite consumer laptop.
For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is
described.
The improvements to MSM8916-based devices continues, with sound and
mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter
also gaining BMS support. Samsung Galaxy devices gains PMIC and charger
definitions, NFC support and MUIC. Accelerometer and magnetometer
support is added to the Samsung Galaxy Grand Prime devices.
On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem,
and Adreno GPU are added.
On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are
added for the audio DSP, glink-edges are described where available, the
display subsystem reset is added.
Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to
allow ath10k to come up.
GPU support is added to QCM2290 and enabled on the RB1 development
board.
The I2C controller used for communicating with the LT9611UXC HDMI
bridge is temporarily replaced with i2c-gpio while issues with the
builtin controller is diagnosed. The same is done for RB2, on the
QRB4210 platform.
On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is
marked as always on to match expectations.
On the QDU1000 platform, USB is added, secure QFPROM is introduced to
allow LLCC to access OTP data. USB is enabled on the two IDP boards.
SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL
info regions. Nodes are marked as dma-coherent as needed, a dedicated
carveout for shared memory bridge allocations is introduced.
The SA8775P ride device is split in the two versions r2 and r3.
The SC7180 Trogdor clamshell/detachable fragments are refactored for
convenience, and pwmleds are disabled where unused.
On SC7280 the APR nodes for interfacing with the audio services in audio
DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to
enable improved debug support. QoS clocks are added to interconnects, as
needed in order to operate the QoS settings on some buses.
SuperSpeed in park is disabled for the primary DWC3 instance to address
host controller issues under load.
The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are
named for better output, and firmware name for IPA is adjusted to the
preferred file format.
The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are
enabled.
The Type-C port manager found in PM7250b is enabled, for targets not
using pmic-glink firmware for Type-C management.
SC8180X gets a number of smaller corrections, and some cleanups -
related to both functional issues and DeviceTree validation.
The PSHOLD node is marked reserved, after reports that this causes
issues during shutdown. Description of the USB signals are updated to
match the signal path. The PM8008 camera PMIC is added to Lenovo
ThinkPad X13s.
The PM660 PMIC is extended with charger and rradc definitions, and the
SDM670 gains a SMEM region definition.
On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved
debug output during faults etc. The UFS PHY is associated with its GDSC,
and the DisplayPort controller is wired up to the QMP PHY.
The Lenovo Yoga C630 Embedded Controller is introduced, adding battery
and Type-C port management and altmode support. The C630 also gains WiFI
calibration variant information, to cause selection of the right data.
The missing IPA firmware path is corrected.
For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and
SPI nodes are introduced. SD-card support is added to the IDP board.
CPUfreq support is introduced for the SM4450 platform.
Missing reset is added to the SDHC controller of SM6115. The UFS PHY
is associated with its GDSC, so is the PHY on SM6350.
On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are
named for more informative debug output, and USB role switching is
enabled.
On the Fairphone 3, vibrator support is added and enabled.
On SM8250, the USB signal paths are properly described in the OF graph,
the UFS PHY gains its required power-domains description.
Thanks to the introduction of PCI power sequence support, the QRB5165
RB5 WiFi chip can now be powered up, so this is added.
Touchscreen interrupt flags are corrected accross a number of Sony
Xperia devices, to remove the unexpected traces from downstream.
On SM8450 an OPP-table is introduced for the PCIe controllers, to
specify the bandwidth and performance state requirements for the
different genrations and link widths. For this the PCIe controllers also
gains interconnect path definitions. The LLCC register layout is
corrected, and the UFS PHY is associated with its GDSC.
On the SM8550 development boards speaker port mapping is added. WiFi
support is finally enabled on the QRD board.
The new AIM300 development platform/board is introduced.
For SM8650 video and camera clock controller are introduced. SCM node
gains details necessary to trigger USB ramdump (download mode) upon a
system crash.
WiFi support and speaker port mapping is added to the QRD and the newly
introduced HDK. On the MTP the USB Type-C connector is describe to be
routed to the PHY.
In addition to the base HDK, a Display Card overlay is also introduced.
For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe
6a instance are added. Thermal zones are described. Pmic-glink is
introduced for both CRD and QCP devices, and remaining PMICs are
described. Audio support is also added to the QCP.
An explicit, larger, chunk of CMA memory is added to the various
devices, in order to compensate for the lack of IOMMU for PCIe.
Across a wide range of platforms, the thermal zone polling delays are
removed as supplies are interrupt driven anyways. Also thermal related
is the introduction of GPU thermal throttling, across many SoCs.
The old SMSM implementation is finally transitioned to using the
mailbox-based description and implementation for invoking interrupts on
remote processors. As such interrupt-triggering is converted to use this
mechanism on related platforms.
The usb-role-switch property is removed for all USB instances hard coded
to either host or peripheral across a range of boards.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaJfz0VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FxOMQALOlJsncvYy+WBZ+ganw3VTY43x+
CYtmM+cvy/oEEmqLLKWO63XyPtiDuhwjjmjO9H7019Zhi7dB2odXfr8PH4Wz315G
/nW99uEoR1kgdHtMwMhBv+gMSf00c6D5X3fbFxVbt2lqlaB9blZeqbA/PsAcC2Dr
FId/ji6/cMdEmC1qbWtvBMSc9Cku7WNt/90qe9q5KuwKbRVF/FKPj+lfBxGnrjQ8
vaKHmqVOYSV+cfuWqA/HrIe3WUds9eXv/F+O2nx22BTqEiBmlOxVR63LwQGFV9D+
fOpRaIR30TxBk+DK/i4jnNu7UEA9lPf//0RDiKeyySAffLfQWBpURGcRUrF6X+yz
7qdi8Ep/L1v7M+FKdPdCDooVxM91JHErPB65+/T/gLbI2Oe7MZED+hY/3UcTY8cr
SkSH+3VeZk8M4DDFuVdgXcTBk1d/d1zqaKKokm9IkIqdAspDYJNvlOHMfgg1bsQe
Ny9epqR+RR5wFulJ0W0YWGibOYkcubduAytvtad1lawmSTCmMI8SZb8K9n1l2RI3
vYEgaSfOo0SHprgZlpULc+LqPF9n9W2RrME8iFIqpfsZ9ovFccr3QgNbHdtVZyoN
t0DhAUk5UKEM4iQ4vf/7+T2WjFA2LMAg1Bznv8X4L69BVkAH/VwRudbwQe429Yqm
psehVa9nc/+upil7
=Hsda
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL+k8ACgkQYKtH/8kJ
UiffeBAAlBRO7Pp8MCFco+63SXZQTGJ0UXmmrkWLiXW6iCGDuUrllCLuygOGZx8O
FVQ9dBQ5AXQbOy++LTYvHIzWt3pCJSIlnbhiv9Na04IgBFnZ3Uy+e+Iikq25o51M
gC2lIvLfwDaTVe8KMvLdNoTUN7jWFv6dZerNo35K6mLxf5nwU6bucljM2Vn0naSK
6G4HMXA+ByvCMgSVOp4/5Qd3+XadH8604W+48n6aRM9YtLhTgV2bRRNY23y8hiAI
IItgCMjzS30mbd6yrnXJOix0IoNhe9IxNKoKh8P0+G0CvAzH8s7KcVAlU+tiTsnR
0vMKYcYPK6PW8T4umHSvTTEG3HR+uvC5vyWAnCKvlx2OElD80JoVp/IWvmy4n9Fv
U3hltgntDkn8raupGgQ9oeM6EoVR6fq5UtzuaZgkElWyuSigVK9jOsG8hrqf1gdo
w7I6APX4c1D8ArEvCbBUmff0hy4LqnScwz+7evFwZORMDYiYxhy2ybRZVYGknozA
miEkVGZr+MHLCszF8kzetHOFhhddqvTWx6IEh/5SMPTkqnGfaOTc667rJ/hfHt8/
8AYw3dfpKrXsf3KxeNVlVpJDNexZU3yHK2glNEpr0yvXAuYYXfmXhhNo2DHNDzyg
VHd6J24UoWMpQisszsfFPBtBsianBTzsPhfCfmprg8um2f0MaKY=
=2vUa
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.11
This introduces 11 new boards, namely:
* ASUS Vivobook S 15
* Lenovo Smart Tab M10 DTS
* Motorola Moto E 2015 LTE (surnia)
* Motorola Moto G 2015 (osprey)
* Motorola Moto G4 Play (harpia)
* Qualcomm AIM300 AIoT development board
* Qualcomm SM8650 Hardware Development Kit (HDK)
* SHIFTphone 8
* Samsung Galaxy Z Fold5
* Schneider HMIBSC board DTS
* TP-Link Archer AX55 v1
Of particular interest here is the Asus Vivobook, the first supported X1
Elite consumer laptop.
For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is
described.
The improvements to MSM8916-based devices continues, with sound and
mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter
also gaining BMS support. Samsung Galaxy devices gains PMIC and charger
definitions, NFC support and MUIC. Accelerometer and magnetometer
support is added to the Samsung Galaxy Grand Prime devices.
On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem,
and Adreno GPU are added.
On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are
added for the audio DSP, glink-edges are described where available, the
display subsystem reset is added.
Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to
allow ath10k to come up.
GPU support is added to QCM2290 and enabled on the RB1 development
board.
The I2C controller used for communicating with the LT9611UXC HDMI
bridge is temporarily replaced with i2c-gpio while issues with the
builtin controller is diagnosed. The same is done for RB2, on the
QRB4210 platform.
On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is
marked as always on to match expectations.
On the QDU1000 platform, USB is added, secure QFPROM is introduced to
allow LLCC to access OTP data. USB is enabled on the two IDP boards.
SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL
info regions. Nodes are marked as dma-coherent as needed, a dedicated
carveout for shared memory bridge allocations is introduced.
The SA8775P ride device is split in the two versions r2 and r3.
The SC7180 Trogdor clamshell/detachable fragments are refactored for
convenience, and pwmleds are disabled where unused.
On SC7280 the APR nodes for interfacing with the audio services in audio
DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to
enable improved debug support. QoS clocks are added to interconnects, as
needed in order to operate the QoS settings on some buses.
SuperSpeed in park is disabled for the primary DWC3 instance to address
host controller issues under load.
The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are
named for better output, and firmware name for IPA is adjusted to the
preferred file format.
The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are
enabled.
The Type-C port manager found in PM7250b is enabled, for targets not
using pmic-glink firmware for Type-C management.
SC8180X gets a number of smaller corrections, and some cleanups -
related to both functional issues and DeviceTree validation.
The PSHOLD node is marked reserved, after reports that this causes
issues during shutdown. Description of the USB signals are updated to
match the signal path. The PM8008 camera PMIC is added to Lenovo
ThinkPad X13s.
The PM660 PMIC is extended with charger and rradc definitions, and the
SDM670 gains a SMEM region definition.
On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved
debug output during faults etc. The UFS PHY is associated with its GDSC,
and the DisplayPort controller is wired up to the QMP PHY.
The Lenovo Yoga C630 Embedded Controller is introduced, adding battery
and Type-C port management and altmode support. The C630 also gains WiFI
calibration variant information, to cause selection of the right data.
The missing IPA firmware path is corrected.
For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and
SPI nodes are introduced. SD-card support is added to the IDP board.
CPUfreq support is introduced for the SM4450 platform.
Missing reset is added to the SDHC controller of SM6115. The UFS PHY
is associated with its GDSC, so is the PHY on SM6350.
On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are
named for more informative debug output, and USB role switching is
enabled.
On the Fairphone 3, vibrator support is added and enabled.
On SM8250, the USB signal paths are properly described in the OF graph,
the UFS PHY gains its required power-domains description.
Thanks to the introduction of PCI power sequence support, the QRB5165
RB5 WiFi chip can now be powered up, so this is added.
Touchscreen interrupt flags are corrected accross a number of Sony
Xperia devices, to remove the unexpected traces from downstream.
On SM8450 an OPP-table is introduced for the PCIe controllers, to
specify the bandwidth and performance state requirements for the
different genrations and link widths. For this the PCIe controllers also
gains interconnect path definitions. The LLCC register layout is
corrected, and the UFS PHY is associated with its GDSC.
On the SM8550 development boards speaker port mapping is added. WiFi
support is finally enabled on the QRD board.
The new AIM300 development platform/board is introduced.
For SM8650 video and camera clock controller are introduced. SCM node
gains details necessary to trigger USB ramdump (download mode) upon a
system crash.
WiFi support and speaker port mapping is added to the QRD and the newly
introduced HDK. On the MTP the USB Type-C connector is describe to be
routed to the PHY.
In addition to the base HDK, a Display Card overlay is also introduced.
For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe
6a instance are added. Thermal zones are described. Pmic-glink is
introduced for both CRD and QCP devices, and remaining PMICs are
described. Audio support is also added to the QCP.
An explicit, larger, chunk of CMA memory is added to the various
devices, in order to compensate for the lack of IOMMU for PCIe.
Across a wide range of platforms, the thermal zone polling delays are
removed as supplies are interrupt driven anyways. Also thermal related
is the introduction of GPU thermal throttling, across many SoCs.
The old SMSM implementation is finally transitioned to using the
mailbox-based description and implementation for invoking interrupts on
remote processors. As such interrupt-triggering is converted to use this
mechanism on related platforms.
The usb-role-switch property is removed for all USB instances hard coded
to either host or peripheral across a range of boards.
* tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (279 commits)
dt-bindings: arm: qcom: Document samsung,ms013g
arm64: dts: qcom: Add device tree for ASUS Vivobook S 15
dt-bindings: arm: qcom: Add ASUS Vivobook S 15
arm64: dts: qcom: qrb4210-rb2: Correct max current draw for VBUS
arm64: dts: qcom: msm8998: add venus node
arm64: dts: qcom: sa8775p-ride-r3: add new board file
arm64: dts: qcom: move common parts for sa8775p-ride variants into a .dtsi
dt-bindings: arm: qcom: add sa8775p-ride Rev 3
arm64: dts: qcom: sm8550-qrd: add port mapping to speakers
arm64: dts: qcom: sm8550-mtp: add port mapping to speakers
arm64: dts: qcom: sm8550-hdk: add port mapping to speakers
arm64: dts: qcom: sm8650-qrd: add port mapping to speakers
arm64: dts: qcom: sm8650-mtp: add port mapping to speakers
arm64: dts: qcom: sm8650-hdk: add port mapping to speakers
arm64: dts: qcom: sm7225-fairphone-fp4: Name the regulators
arm64: dts: qcom: pm8916: correct thermal zone name
arm64: dts: qcom: x1e80100: Add gpu support
arm64: dts: qcom: x1e80100: Fix USB HS PHY 0.8V supply
arm64: dts: qcom: qcs6490-rb3gen2: enable hdmi bridge
arm64: dts: qcom: sm6115: add resets for sdhc_1
...
Link: https://lore.kernel.org/r/20240706173140.18887-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmaH7ZodHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIUnhg/+PwLoDlTR8+Mo5IXr
81tN6imRXIS9EfV/XTsQAqAWFqpEtdtQOlcogrK1nOkdpRsjYTkrNmz/4dLthhoA
6xFVLwxNBjqwSxM4pfDWr7pC01OLKCG92J+vnPU+ytXJGodwHj4c2cJKQqDPNcPZ
b3C9MhYmY322O/oh6CxgsFZRqZmpELPPVOJTpI7V+E85+CngY55I5ovBMqFpo9P1
rh2ubk7UdgUuawrkqJptrOLcceLgYWdEHTbzfNySROtwTuEZoVvOq11DMdcdFnLt
6ojAvnJ2GTTVMHmCA53mBoOKKjME1kNbhnHuuJneZ6ZHyK3hY4z8xNVstZHE7zV5
3HGCYkSBaLzp6G1JbXMTDUJQ+Nv0fIRoBB9cJLTXdsRyQTqf2f94EMZH2MbRADCi
hoHbKpSyLMu2r8XmwA9e4+37+HmMrLyKqh1tk7kYrGuG+mwRw6iwFvO9UE0jr03D
Ahzuwvle4OWOff85gZ166SacdM5ju0z6aQbj/N8zaasaxBx/aWfpYZfU8EdCR+ym
+AWb9OCzt2Y7j/BAoUXWD4ckMiZn17yMZ7h5YyPLORCvjbR+RWU0ayQ6nT4MMfBq
ttPWepJPDcxaH7dlrAThWAJ7p+H9iZPdHu0wZjhTBfPNrOL87OxNm5dwbznVLjdP
22OIMoRg/t08hBeORECboSOeGxM=
=sjji
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL+KUACgkQYKtH/8kJ
UiehdRAAn8dwWo+MPfd7fRIxQrYm0SOiiFTC4j4LHNzCDQd7JV93p5FjYo3TpHAA
wXtKYqFDZ8rbxWca3say015iOkYvLmRWOXM9Zs19U6gpsoW0OeiJvQs0pnPYQdXL
ZJxL2YOn3nFfZ3IHxlTcyzoayX5uPZ/KJ/HE6ZLfMk8hCOdzPXoixH/WH1YQgXgc
0EXiSxVbthDb8XbSLF8mz4jZpW0neFwetskkjoUUUO4wbyUi53IThxShAMyyFnBf
ypoG1XTl1bD3DZFOrTQeILh+gR2Hg+EMttvqzooP8B/OAzHC6R/v0H92k3muE+FD
bH4PrFc7aYmV7NnZI61FJzAXjSLrZ8pRFkjyKbenGiSLN9De57pH8CVXC8yeoTzy
HKvk6E9VXmOh+KOwAXY+oQTHp4HMamWH8wFvOSf3nDNyW77u4q4g+Mh60uPeCek5
RlwO/qe+3aOZoem3KskZ4/68iUDftcs+4Ga9O3jceQi/EEjAhz6gV54dNYC9OYi2
VwouIqkS0JWJwH/1hfAgmbYhPdxfKds4kbAGFBjb9rsrf2okjeg/MY0NuZgtehqu
iJ2Q2wTfS8mpX+DbBRHZLXe/pxTiw83Ftkq/x0K8gAArfltJxbqzVuGec9aUdvJI
xyZrekj5MmsSsV0FpqBsgiHDG6GP9yPOy2zkMDYK6//qn+tyvFQ=
=EqEk
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.11, round 1
Highlights:
----------
-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
* tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (31 commits)
arm64: dts: st: describe power supplies for stm32mp257f-ev1 board
arm64: dts: st: add scmi regulators on stm32mp25
regulator: Add STM32MP25 regulator bindings
ARM: dts: stm32: omit unused pinctrl groups from stm32mp13 dtb files
arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board
arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25
arm64: dts: st: add HPDMA nodes on stm32mp251
ARM: dts: stm32: Add ethernet support for DH STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: order stm32mp13-pinctrl nodes
ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board
ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13
ARM: dts: stm32: Document output pins for PWMs on stm32mp135f-dk
ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards
ARM: dts: stm32: Missing clocks for stm32f429's syscfg.
ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
dt-bindings: arm: stm32: Add compatible string for DH electronics STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: osd32: move pwr_regulators to common
...
Link: https://lore.kernel.org/r/8f10bd29-d067-4060-89ff-2e1a605f3141@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This includes a commit shared with the clk tree. This commit adds clock
and reset indices to the device tree binding, and thus is needed for
both the device tree and driver changes.
ARM64 device tree and binding-only changes
- Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC
- Add cache information for A64, H6, and H616 SoCs
- Correct model names and descriptions for Pine64 boards
- Add GPADC (general purpose ADC) for H616 SoC
- Add ADC joysticks based on GPADC for anbernic-rg35xx-h board
- Add additional CPU OPPs for the H700 on top of existing H616 ones
- Enable DVFS for rg35xx boards
- Add IOMMU for H616 SoC
RISC-V device tree changes
- Add system LDOs to D1s/T113 SoC
- Add ClockworkPi and DevTerm device trees
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmaC5BEOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDDszRAAohtAXVlhcOZUyY6jnToNDRhRDe4WR2dKNuth
D/sM93uBxEtHkHsV11xKdmXALYszT3c1IxA84Cj3uwBvutIK4/KQUDbtDvGedz/o
90v3bgAR1ETf7RrQFCxpQUFYNufpnXb5ZHA5jRSdxyg9coLR7sDab0r6UCh/EzyN
rykvB2oSmjxyG0OjBUU3IcR0B5nliGRc9esVhdSW4cGblaJaT/NrlsmUGL39hXP2
BayJ3FFfS2izs5uHMOeQUaveadBGssc/kzJvnwy/jeM+76uY4SlH58/dl0ivWM0/
h5mifWbMIdl5kUEkUz7OaPT9O6K/1O1/heQYrQSHNKtgD6NN9uS4QWuGyfsWcpUo
iRXnYrscWuGQH8ICAG9upNCto2RXn1nS3+FYv/CmNQ+Nl39RpGGWKW9KPesCttdr
OgjWGgspyBT3xh4NhrxLbEOmZaCg6ZGfr8Vp4VrXLMbSOrV6Qu8VsJcRWkfwm3yb
tg9ONSFrSBNwmWQIqjtpWt3j81sOKkz2WYV6+hNgDyQ5HZQZWNHhOUVQ2W912TNh
vJ9d+3jgtn9wj2DyPdkzPRaNaVK+KqRbpUIXLc7TUAJaMcHzX6+ekt1576ZBNUYL
hFOoMvzu6k02Fmr8qUe9PX2p5Ie6ubF+2/aWGkZ0pF2cdht1Q6IDiXsSX3PW+VBU
acB1TT0=
=3vmg
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9/8ACgkQYKtH/8kJ
UifiHRAA0qHvjj5uaQiQnjJgOFF+Rmf3goNje2S9f35ziO2AGKqsfp651mBbZFpJ
yFkIMlELMBLmgB9cEXfvoWlvUjITxduiMjn0aNfu4czRhhk1qiqwy+CVhDHT681g
71s1crZ0gT/B9hNQkfHz6AmrvMl6k9NPHioaci4abRNXsGNrZuuSFNOAC82l8nrb
PLJZtNOEbtkVP5pdBatTlsdJywOLpl1KwYvXbbC8oXvMobywUSsW/gjcHV0hUjlp
4kwDEyi1cUGeNEuPAcp2Pp0H+WtHJsaTN1BhIy3kyCGiCXX3ShkZiaYIPwBGdUrz
NJihJ/WoU2pMzlX5OH2L2d1KybZhOPB+kzSqw2TWyZuKNc+HY3BaXeZ8uVUz59Tv
WSml2dz4+T816jDcBrK9sFC1uiJlbieKNJsH8Ol0FykJcfjD48tP7Y1uMhqN3ict
y/FZ6nvPNEf7YPGGTXDjn0d5ifXAyGXLhIWxRXBP701HAzTkUPeTEdMLwj+6H1eh
HBxFaa4yeAtH9+0c/Tf1Ge244OxbavwjJU4ufyD7X440nHqFVXQvF2FD451tBd5F
HbXZ3cm+E8/zg55L0sAcY++5W+Aa2S+TvK64nrKcGEEDonBj3WwdNL5iwtzugWCv
/AQg1UP3uQIyPvrwcyyoG8lenyHjOhZnACH3qbxpO9JnnwEIXQk=
=Emn4
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner SoC device tree changes for 6.11
This includes a commit shared with the clk tree. This commit adds clock
and reset indices to the device tree binding, and thus is needed for
both the device tree and driver changes.
ARM64 device tree and binding-only changes
- Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC
- Add cache information for A64, H6, and H616 SoCs
- Correct model names and descriptions for Pine64 boards
- Add GPADC (general purpose ADC) for H616 SoC
- Add ADC joysticks based on GPADC for anbernic-rg35xx-h board
- Add additional CPU OPPs for the H700 on top of existing H616 ones
- Enable DVFS for rg35xx boards
- Add IOMMU for H616 SoC
RISC-V device tree changes
- Add system LDOs to D1s/T113 SoC
- Add ClockworkPi and DevTerm device trees
* tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees
riscv: dts: allwinner: d1s-t113: Add system LDOs
arm64: dts: allwinner: h616: add IOMMU node
arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling
arm64: dts: allwinner: h616: add additional CPU OPPs for the H700
arm64: dts: allwinner: anbernic-rg35xx-h: Add ADC joysticks
arm64: dts: allwinner: h616: Add GPADC device node
dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
ARM: dts: sunxi: remove duplicated entries in makefile
arm64: dts: allwinner: Add cache information to the SoC dtsi for H616
arm64: dts: allwinner: Add cache information to the SoC dtsi for A64
arm64: dts: allwinner: Correct the model names for Pine64 boards
dt-bindings: arm: sunxi: Correct the descriptions for Pine64 boards
arm64: dts: allwinner: Add cache information to the SoC dtsi for H6
ARM: dts: sun50i: Add LRADC node
dt-bindings: input: sun4i-lradc-keys: Add H616 compatible
Link: https://lore.kernel.org/r/ZoQa8r1N8yi7FlPV@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: imx8mm-iot-gateway, imx93-9x9-qsb, imx95-19x19-evk,
imx8mp-tqma8mpql-mba8mp-ras314, etc.
- A series from Adam Ford that improves imx8mp-beacon-kit support by
fixing dtschema issues and enabling HDMI bridge HPD
- A set of changes from Alexander Stein that adds partitions subnode
to spi-nor
- A great number of changes from Frank Li that add audio, flexcan, gpmi
related devices for imx8dxl, imx8qm based boards
- A bunch of layerscape dtschema issue fixes from Frank Li
- A series from Krzysztof Kozlowski to use defines for interrupts
- A number of improvements on i.MX8MP DHCOM devices from Marek Vasut
- A couple of changes from Parthiban Nallathambi that add PCIe PHY and
RS232/RS485 overlays for phygate-tauri-l board
- A series from Shengjiu Wang that adds bt-sco and XCVR sound card
support for imx8mp-evk
- A series from Tim Harvey that fixes dt-schema warnings and adds DP83867
configuration for i.MX8M Venice devices
- Other random feature additions and improvments on various boards
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmaEB9sUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM50fQf+LLdjIw/Y2qL1nGtONR2ztD2pykGf
8EDXlEjYBKPgnEqm9Fx04KNlITG4rVZx8vPODTWqbgg/LMyxhoT5oc79Y3cgPU2N
+mLYEWWS4M5tCbBsPyM2eVGCGlL6ljU9oAzpCOjeKCWcoALfAKw0Ra0McSDcmnUW
numO5gynIJtMk8Vn7bxoOwbdNFWPY+egT9VQiWYz3SQzxND5nDfzO4sWNvZ8A5h2
6lScii47uZd4LOiZy9fijX2xxm8Hc4VXvJyiN+pNcWWlxc/tAzwvq28/xoZcUu90
pK9l3ZYyuUumKEaCc9up7BqNV3KuYpcodk7tufSzuqtSYnVenQU81xZUgA==
=JIHm
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL95oACgkQYKtH/8kJ
Uif1aQ/6AyIOvlb9LohxzMkR7DXjiPYp3yjOuAJm9+afLfQ7m5eHhF+F0MUVlhCp
Kcrc+XoYBjxYKjNg09GiWSywZH6dqn0vcBjdTmLXHuiQAovalv6uuIIS3mk3uYVw
x0/FvrWVdBXoOB5c6jmQip4tuyacMzQseDBe7Bejw5YOEZ0havrZ+cGwxCHrmWzT
ngsw5IBRs/ItljyP0w9kkgLaXw6UAgavB892przfdxbZVR1axLbBI+eKe7pj/nHC
A1GUv4j/i3rOTNUfMdNgtid+ke2S0awqKEsol8k4WvIWeoD1Pie2pdcLPR0q8oZu
MR5PPXDNf89wZ5DYDkhDHwmqC01k33EIEF2LJQBjSBy6FhsY8EbcZmN+X2wUGpEu
gPzIxX2AmXkhVIWN0jTxpDhFzSTnhXqHgzAm74xXWuE3/5+hXKX41OgcJrZTpd3n
z9oRecsVejJc1JTSs+vQOOjVBNL6nwFMH8T8W3UTxDbrQOP0iGVTvN1TeIgtJLkI
OyNDSN5t9hRsx2rvR6NDTUWqk3DVVSkhZvb/E7Wk4NKO6dNQwbE4qniK7OUMqrVH
CCze4n3RUJ3R4SM7H+MRDtdB7rtCrxhrD0nXlyoVoM1+dvV9uHO/shAl4Nb+08v1
ch3Vaet5zv3cGVKAmnn8BceaOtxcmz8iz1mhDubPjGOhrb7I+RU=
=Orkt
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree change for 6.11:
- New board support: imx8mm-iot-gateway, imx93-9x9-qsb, imx95-19x19-evk,
imx8mp-tqma8mpql-mba8mp-ras314, etc.
- A series from Adam Ford that improves imx8mp-beacon-kit support by
fixing dtschema issues and enabling HDMI bridge HPD
- A set of changes from Alexander Stein that adds partitions subnode
to spi-nor
- A great number of changes from Frank Li that add audio, flexcan, gpmi
related devices for imx8dxl, imx8qm based boards
- A bunch of layerscape dtschema issue fixes from Frank Li
- A series from Krzysztof Kozlowski to use defines for interrupts
- A number of improvements on i.MX8MP DHCOM devices from Marek Vasut
- A couple of changes from Parthiban Nallathambi that add PCIe PHY and
RS232/RS485 overlays for phygate-tauri-l board
- A series from Shengjiu Wang that adds bt-sco and XCVR sound card
support for imx8mp-evk
- A series from Tim Harvey that fixes dt-schema warnings and adds DP83867
configuration for i.MX8M Venice devices
- Other random feature additions and improvments on various boards
* tag 'imx-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (91 commits)
arm64: dts: imx8mp: Remove 'snps,rx-sched-sp'
arm64: dts: imx8mm-verdin: add TPM device
arm64: dts: imx8mp-evk: Add audio XCVR sound card
arm64: dts: imx8mp: Add audio XCVR device node
arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM rev.200
arm64: dts: imx8mp: Do not reconfigure Audio PLL2 on DH i.MX8M Plus DHCOM SoM
arm64: dts: layerscape: rename b(q)man-portals to b(q)man-portals-bus
arm64: dts: fsl-ls1046a: rename thermal node name
arm64: dts: fsl-ls1043a: remove unused clk-name at watchdog node
arm64: dts: layerscape: rename aux_bus to aux-bus
arm64: dts: layerscape: change pcie interrupt order
arm64: dts: layerscape: rename node name "wdt" to "watchdog"
arm64: dts: layerscape: add #dma-cells for qdma
arm64: dts: layerscape: remove compatible string 'fsl,fman-xmdio' for fman3
arm64: dts: layerscape: replace node name 'nor' with 'flash'
arm64: dts: fsl-ls1012a: remove property 'snps,host-vbus-glitches'
arm64: dts: fsl-lx2160a: fix #address-cells for pinctrl-single
arm64: dts: layerscape: add platform special compatible string for gpio
arm64: dts: layerscape: rename node 'timer' as 'rtc'
arm64: dts: imx8qxp-mek: Pass memory-region to the DSP node
...
Link: https://lore.kernel.org/r/20240702142153.413061-4-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The ROCK 5 ITX as the name suggests is made in the ITX form factor and
actually built in a form to be used in a regular case even providing
connectors for regular front-panel io.
It can be powered either by 12V, ATX power-supply or PoE.
Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot,
2*2.5Gb PCIe-connected Ethernet NICs.
As of yet unsupported display options consist of 2*HDMI, DP via USB-c,
eDP + 2*DSI via PCB connectors.
USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel
connector.
Schematics for the board can be found on
- https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf
- https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240704153815.837392-3-heiko@sntech.de
Similar to bf6f26deb0 ("arm64: dts: rockchip: Add dma-names to uart1
on quartz64-b") also add the dma-names property to the other rk3566
devices from Pine64 with bluetooth functionality.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Tested-by: Riley Trautman <asonix.dev@gmail.com>
Link: https://lore.kernel.org/r/20240705163004.29678-4-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pine64's Rock64 was missing the avdd supply properties on the hdmi node,
causing the following warnings:
dwhdmi-rockchip ff3c0000.hdmi: supply avdd-0v9 not found, using dummy regulator
dwhdmi-rockchip ff3c0000.hdmi: supply avdd-1v8 not found, using dummy regulator
In the Rock64 Schematic document version 2.0 those supplies are marked
as DVIDEO_AVDD_1V0 and DVIDEO_AVDD_1V8 respectively, but in version 3.0
those are named HDMI_AVDD_1V0 and HDMI_AVDD_1V8, which is a bit clearer.
In both versions those are connected to LDO3 and LDO1 respectively.
While the DeviceTree property is named 'avdd-0v9-supply' the
'rockchip,dw-hdmi.yaml' binding document notes the following:
A 0.9V supply that powers up the SoC internal circuitry. The actual
pin name varies between the different SoCs and is usually
HDMI_TX_AVDD_0V9 or sometimes HDMI_AVDD_1V0.
So the 'vdd_10' reference is not an error.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240704191919.38856-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1. Google GS101: Minor cleanup and add fake regulators to USB phy, to
satisfy dtbs_check. The PMIC providing these regulators is not yet
implemented.
2. Exynos850: Add True Random Number Generator.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmaDnzkQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+DCEACQ4QFZWkBZimCpTOacg9GHBCHgcYgQ5OGS
Z7gOsDcSHUYBgSPmo5hEtt0Y3qalCNgQz914ozqkpCwlF2SZCpiTTrk7Eou86jQ/
VOUiG3k49Crw3QAzhAVW/xw4+tsFO5oRDL7Z06pPIfO5QjFF9Ass+mfW+aXIQ+X3
+jG7+ms4hY9n6X8+a4sCQ+E1TFo2L9cJp/AyMnBDGXYeRNs/o+lYLxggW8CzIRAz
jMRELQ/qyMgNupnZpALe4uxbNQ3M5/dgiwx3yV+8c5gx6YcgMBtsktI5b/X6Yu7W
Dfe9EFBmPYBdD0zSlM0tZBPzLkuvv9InV+NTRN5JlstVPeR0YIu1Qf3UfDP3ay1f
U6eXCu91XxGt+zGPCsjzVxKMll2HYb9VZ8NF5VvxWUHlk81cJ6aKJTUF2fBKJjbk
6FNFALncrX7RQagZW1wfq2cKMHsXvh86QQAwt9hihdsmOwwq3E9wKWqLxa6mak70
i1fYa18xBaFUsaxRgqWW7HPx1ma62P294lGsbSp6wS5nM0kaqfZkfFuh5Xw8mYpJ
Z+L86pnfT/f6I3ljqjm4rQ7bI697ZhG2P1snIhb0PjXuY18hGtv+bNVum02SF9aO
IimG55wSBvxHF9ZjvZplQfpbrvpy6uMc18hie/2DrsKQkX6xJL7RI2QH8HZyFlma
UKIc88whoA==
=Oc6g
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9n8ACgkQYKtH/8kJ
UiePdxAA1MDnDBAbOckYjqhSNZd4dJBrzgb9ryufoPoBfA3rfn4cvB72b4jUR6KO
JWJtbbzpFmIyxUn3hNyQF0DfhrW6Vy2icmxZ+z8C3qZR9g0QnSAhhfZ7Pusf55G8
rVPT3Ie8PeBLnmf26r3OSt6J21W1f6aCrK46wpowdTCe54vBsMlBrsLE1M92+ubO
GamrvCehsHDBX9qVeV6e2I70zLtyYdoFddV0ZurgQu9Dox+1IZH1dZ/x5LMudoI1
wPcMYwwPdUcnC8fQ8MDEYz6pd0BJzJ22RW5ZybtshDlWbcbG/WBkYgMqhZQCcHfD
uF0zp2WufUX0zXt/q+FYm9Nqye6cOqJDmwZCP07xQWYU4vovTwmrKRdWlcT2pqQ6
8eA9q+hBAWmSyuutS/4s14YUzRZRdIm4n9t/uOn7A1ducCjtSZftoW32zxEomyIy
MQS75D8aso+vXmcddPSptoJ3Xc4M5I0TJ58n3y9AF0ZO4G6gQcGvM9jw4yGF72Ge
WNqoM/MNwT/UzI42AZsbnBpKiW21vwyhxDjzjX202aN3CLiH5HQNgWBiZfDcrDgf
8aY4t59PHbe8vtVjnLuuiBWNt5jhPi7u+HrRSd0BJkeAy1dooYRWRkHta/+ZxVOR
ccAtKuSsHo1Ok1QCAple9RP3riMQdsLzeGXzMyIJqm7lzTaBZJI=
=SKUS
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10
1. Google GS101: Minor cleanup and add fake regulators to USB phy, to
satisfy dtbs_check. The PMIC providing these regulators is not yet
implemented.
2. Exynos850: Add True Random Number Generator.
* tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos850: Enable TRNG
arm64: dts: exynos: gs101-oriole: add placeholder regulators for USB phy
arm64: dts: exynos: gs101: reorder properties as per guidelines
Link: https://lore.kernel.org/r/20240702063514.6215-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains one patch that reworks the device tree structure for
Jetson Orin NX and Jetson Orin Nano, which are both within the same
family. This restructuring makes it easier to extend both platforms
in a consistent way in the future.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmZ+3YsACgkQ3SOs138+
s6E6qg//eJu9trfH6Tgqvga/YDV98jLHXl6mbjk1zpYOE6K51gM2E9ypaU2Xaefz
uwZwKe4rDs9GPeKzm2lyd9hHvYUSgzQ5JYfkw8a9G3Ne8E+fbZZ//ElGrUAAbKbd
C6uN/uXg5udsiTKuXMf/PSAzyvUbUJOY4DC7CA4ilu0GO3pmtafpcaBPvUAWGqDR
IWVJGFjlYNPWB+ROmyhTYCtpDQX/4Ok5JgjLyOiSzYq/qBZ3AA1OaZW9u10nbcH+
cBeCBjt/0Pd1bqSxgPwdSxztR6EdmA34zAhi77rJ5shjfR/lqEntwZabg7SezTXK
ZiduASpTr95kHWdJ6+v25Dj0JzXG8b/9KV6WDMhBY6SBQDiJoWwsGaRcMjbAolHN
0t58Y/h8mlSREbQc1Yrd9Gk6g/Z9tSfa0TJ3bY4I+squw01Xtl3zB0kw8dBPKMU6
d5YoTci5QCpih9r7fQ+6YCOA2/QcSxpFURa0Hlm7MjGPRpkmaOt8ZhrfdkFs97mG
H9I1KZ4URX7YwVahvO6G+bRSJLvJNqO3IwZIk/vbCOZQCyXz2RX7vHKN9J734ZBA
ThtdTvYCDBo0B70h/SAQYza3o40+WXHaDiEUbDa+3ExGOL0vg6hIzoLB5Gyc56CY
xKlaDeJUX2XcPoZ11feLbvYu0ylCThmsP/DR7t+qgfkqYfMM8Dw=
=+CSv
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9gIACgkQYKtH/8kJ
UicCFBAA5AQQaTZ7ru6bZnGMPMphO26fYTWokqLuRtky3Js6+MD8z6E9CE+KAqMe
uETX2ANP3yjIWRKO0ktRndckdA5IzOcyOP9Dp2VuQyuc6OCk7RU2gOvepazYgIu1
JTP/cjka+UwG6asCSQx8+5Ly00RZOTGoVfjfgu48gB3mE3tWPLN0L5C5MzqT4RgY
AQ4PWogpyj3GDq82eZtd3cXs+oTuz20x240pwZME9fP7Kja0dyp2Jm5ZrkrIcO+B
vV73MZM8eK2nePnpMC+2pUvvB9xH1/MJsaeJT6uz6RN6plex4MabobeZMrjhnPIG
43AaLMM7FMyfjW8hD0b8tQKyda3kXqsYsg/SlVqrA0d92XU//zTWLd7+EeJmEqsf
TxjmEKkgwK5tDnwuptnfnZLfvwXPRPqs5X6E+dXTUpTXFsXTTpXDvu3Tjn+B0prC
nk4PQBdHKPGxc2PY1L1uscPpGVjMSGjHAaXqIeup6BOuXoptorUCSzl6jKOiNlIc
787kqtlIgE/s0cdUjW2ma1oVhMJZcgAoxJi9UJoQ0ZzwBaBRaMhWYP+J19yGPx4D
joLmFFLH3M2sNQC+sFpL+aWtx+1/EShAJ6W3Bqt6yZ3DXyjyi35+Z2vlq31NMIT2
gDwWLFK+fa/t0mPzmtlmtO0nlUaISxZjr9jTs1Szwkro+Ik/SNo=
=CUSX
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.11-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.11-rc1
This contains one patch that reworks the device tree structure for
Jetson Orin NX and Jetson Orin Nano, which are both within the same
family. This restructuring makes it easier to extend both platforms
in a consistent way in the future.
* tag 'tegra-for-6.11-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Restructure Orin NX/Nano device tree
Link: https://lore.kernel.org/r/20240628210818.3627404-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the Elan I2C HID driver, to enable the touchscreen on devices
such as the Lenovo Thinkpad X13s.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaDbHgVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FapsQAIwlMQ6e5qgywmF54bKBVqMDLY+B
M/26B2SDz7oelSNTOR08xrnwumy7q65QSxE4zdIyDSR2D7PjbGhfdwmgXxTPNYdi
FK2k3btL2nRDQ96tnuujq8KMLH8sZHa9q+niSdEUhwRTvi40n7nbSJHLXMAE2ijd
wy94U8Kwvbd1wIiH/rAIsZs5u5PLmLlmJZPOgJQYGJIMXDRDkVPcyrQoShVgkCXU
0J9u2NCnKaZ9I/FVze0+rzXun6hGbszLTn88cdmUR02YiT5EvNaau/X74mz30nfY
Q9MsLdDpikR6LZWIE9bJS+sg+EHEFUVt7QVfUh7wywLYUtSXyXAFEu/2I0LK1Eb8
0ndVtozxUxo8OvdZGvGRk/JSt+ymhyr4sYGpu3dJhtpHHN2hA8pb5xCdhC7ZV/3w
Rwp0nstE5XyjFRm+1DQBmUntBH83wPut8cvghgXaInoLBXr9v/Ju22QqSvapdUcc
7dkXpDj23UqwKVGpOJ9gz4BdcEGJ00GX03fTKhPBcSsfMndkNC5bv9l4vNJNavjj
qF/b5MJTtL7Ohb0yDRL3JbcKDaUlzz6LKz+vVGej3Awz9AKrrkqRjBcw7IgDaiVb
WHi6wrVv2tLe+/mDiBWWhwPl3BKL/q2hBcXlWaGZFLuzL1P5/whxgnCBMvZGk87E
qRX78pGYJ8RAOUas
=Scit
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9NUACgkQYKtH/8kJ
UiduHg/+IWxteg40rG7DAa+IRXxWlKIBvO/8AhIoSPj/oJaSUJ2tDBXMeCzq5Waf
pR4+BQymnQIzubCRuPLdWvigeR0KOQ0wtPMhLVy7WQz4Ca+Hh1sLquszHxH3os6H
Fg8sXOIfaapEzYeU9J4wnQXdAeip1z7ZAXVtE18f5U5tz+t0spAHyv3+1zcitAuq
EcG5Oj28kdQQY+WpK4rnsXkg/NplQfZiQfUF16tZ8Q0SFRyrYk3G0JTHGc12E/8V
r9q7XooJ3t6uHlwsBUdWq6yTo4fUVpudK7FaypPwMtgzyN+H7LPIl3i+MvuUb9cd
/bExn6addfeaMFQiv4upZdZvu5GsAgX9cs9JMW+s2Z4Xchdo4B4iy6ijaQw2oNIW
8IOZYAKdEVAtIvNGB0Z5G7d+boQSbXlDpLobvB6qkLLDL8b8o3dGsmj0ZPn4rqO0
07yIbRi9QBKFBdeG6c3SFBI9dfyM+8Z7gSQ2I3WICQrndCSdTR54bwGYARiTdrDk
XJNNoW8zfHeg8JJnKttd3E0g5NQK4qDWkKtzdtihg7d8u9gr1i7yHMlbS4GamOY8
fAVH4poEJAGaYwzBPtiC1uin+Aa/00Mkthi9RaS0v3zxSRZlzL4SUHE0rFKhr6ab
2GeP19hyIiBY92lyrnSGk7MP/3Tnf2i+YbKdY6aRBz2s0Ndvv0g=
=IFD2
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 defconfig fixes for v6.10
Enable the Elan I2C HID driver, to enable the touchscreen on devices
such as the Lenovo Thinkpad X13s.
* tag 'qcom-arm64-defconfig-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: enable Elan i2c-hid driver
Link: https://lore.kernel.org/r/20240702025740.339563-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This marks the PSHOLD node on SC8280XP as reserved, to resolve a
regression where a reset is triggered instead of a clean shutdown. Also
on SC8280XP the touchscreen properties are adjusted to make it properly
described on CRD and make it work on the Lenovo Thinkpad X13s.
Corrects the LLCC definitions on SC8180X and QDU1000 to allow these
drivers and their dependencies to probe.
X1 Elite CRD is given more CMA space, to avoid running out during boot,
as PCIe SMMU is not accessible. Audio configuration is corrected, on
the same.
SM6115 SDHC is given an IOMMU stream, to avoid access issues.
Lastly the EL2 non-secure physical timer interrupt on SA8775P is
corrected from its previous incorrect value.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaDbysVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FjB4P/i8+CZGdqXeUbfX+QuRKr91W9m7H
NIdya6FZ6bg3RhmrLLlhmyG3iVVQNYvZ1mjAsK43xtnOU2DX/OMrNAUAdmagC5cI
VfjPGlHKbGmK5rfDfxYNRocszo/zh4CFQQmVElsBSaZyi1pPkfOWnUZjTzlAetS4
FMbrDjJyFDPxhzdhPZWyAEAd6eeYMbpEeXOB0NZGdsv3ncfg311cBy2MHEn052J9
lAOexSfhw1hNTMPSfjK/8OKQiAKuA5DWUxZL+/7/5P72zB0GZUCzDJABRRlaWjsM
d8eJenuHpluRZxSTtmw5uSmBjbKUW6Q3lhMNeVIcxDhyaMNq2Asw3LIiJFAXQmB3
goQek5Lc33VRAdnw6Vfphzy2nUBAeT5YBl+aGJb8cVR12BKWN0JiVVm1/Ewxd23j
GcfKTsLSMI1ZPOsjNgtoqa8O6y76vX1c0+Vn5GvG/8iSa5qlzattMD7hWra5erll
MhlOr3OikH1rhTTlJNc6WPJwmYbnf4DAemUyzvF9oIXZf5J05ljDW7KUBJyFH7ip
oIfi6JNsuABcDmT2vMFofw2jJwbo6wb1bxUoTYDITRy45GOs44pZAfuxFz5Z0vST
kGeqqi4xz3JhNTSLDf50ahJBOHapg5C1c+OSZ22muLGl/7Hzpmd2FhdI85e1+arL
TcF+8NCZBkpcraLa
=rkld
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9IAACgkQYKtH/8kJ
UifKORAAmbEROkWShKsTmVk9sl863SUqu3wPOyFUgY0Dw+xsUZum5yk1mxeuJCaE
3o5EzRerPwAyEcMw3jWXIYmKvwP4ocIMo7FVKLqD4icEteufM6uq03AeTMfkWi6v
J97zXSrl7lxr3hRnb5NvKm/gUakuHThRAUkzPxccHrgJz2bMbqD/Jz/lKUw+boip
Yjw/bk0rz+otSEk5uwG39lDP5eJgukH5cAMBo4YnmAd2KKr56TNPjqRCu2XGNHnU
HnJnw8v9iar3imUH7RlM6XBbdd2YDAe9nAcgHZ11ACVaO9eYtsLVHA4Ms6p3zUPE
kVtW8NcObc6MDLABc2x5J4lposaPuuVRquchlaPE7UTSidqkq2jvTcME40Mse+lp
MfoMhHN35FDtogYFVjvD4dmB1Q0bY74YPl9xa+NuymORJcft/Y3dAbInmsRhBdiC
ifK892Z76m7eob+ul7egNeY2uDitoSpY8GKL41EG98G+u/g93J/kv9wjO0o2JH62
RDJge8FY38noqLK3GIk3BIXq9730N+Tau9HGn/Lpqt8JWEAbTcgAH/wjXmKl/GkU
zFSgyRTbiyOx8tLsW9RF3D/YMPyzyhyAnwz03llX+iFXIws4o2LSGQ2u6ESsAXxP
BQ+XOj2WxGpaRMN8XIrgV08+TZwP6MkqaNK0PRSRAr+JEpRNVio=
=R3Mv
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 DeviceTree fixes for v6.10
This marks the PSHOLD node on SC8280XP as reserved, to resolve a
regression where a reset is triggered instead of a clean shutdown. Also
on SC8280XP the touchscreen properties are adjusted to make it properly
described on CRD and make it work on the Lenovo Thinkpad X13s.
Corrects the LLCC definitions on SC8180X and QDU1000 to allow these
drivers and their dependencies to probe.
X1 Elite CRD is given more CMA space, to avoid running out during boot,
as PCIe SMMU is not accessible. Audio configuration is corrected, on
the same.
SM6115 SDHC is given an IOMMU stream, to avoid access issues.
Lastly the EL2 non-secure physical timer interrupt on SA8775P is
corrected from its previous incorrect value.
* tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: qdu1000: Fix LLCC reg property
arm64: dts: qcom: sm6115: add iommu for sdhc_1
arm64: dts: qcom: x1e80100-crd: fix DAI used for headset recording
arm64: dts: qcom: x1e80100-crd: fix WCD audio codec TX port mapping
arm64: dts: qcom: sc8280xp-crd: use external pull up for touch reset
arm64: dts: qcom: sc8280xp-x13s: fix touchscreen power on
arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI
arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
arm64: dts: qcom: sc8280xp: Set status = "reserved" on PSHOLD
arm64: dts: qcom: x1e80100-*: Allocate some CMA buffers
arm64: dts: qcom: sc8180x: Fix LLCC reg property again
Link: https://lore.kernel.org/r/20240702030913.340814-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit adds initial support for the LG K10 smartphone.
Support for the following features is included:
- Serial
- Keys
- Battery and charger
- Accelerometer, magnetometer
- Touchscreen
- Sound and modem
- Haptic
Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com>
[Nikita: Minor cleanup]
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240623-msm8916-lg-initial-v1-2-6fbcf714d69b@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
IPQ SoCs dont involve RPM in managing NoC related clocks and
there is no NoC scaling. Linux itself handles these clocks.
However, these should not be exposed as just clocks and align
with other Qualcomm SoCs that handle these clocks from a
interconnect provider.
Hence include icc provider capability to the gcc node so that
peripherals can use the interconnect facility to enable these
clocks.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20240430064214.2030013-7-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add a node for the vibrator module found inside the PM6150.
Signed-off-by: Jens Reidel <adrian@travitia.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240606181027.98537-3-adrian@travitia.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable download mode setting for sc7280 which can help collect
ramdump for this SoC.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240705143443.1491956-1-quic_mojha@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Configure the thermals for the PA_THERM1, MSM_THERM, PA_THERM0,
RFC_CAM_THERM, CAM_FLASH_THERM and QUIET_THERM thermistors connected to
PM6150L.
Due to hardware constraints we can only register 4 zones with
pm6150l_adc_tm, the other 2 we can register via generic-adc-thermal.
The trip points can really only be considered as placeholders, more
configuration with cooling etc. can be added later.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240705-fp4-thermals-v2-2-a4870a8d084f@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Configure the thermals for the XO_THERM thermistor connected to the
PMK8003 (which is called PMK8350 in software).
The ADC configuration for PMK8350_ADC7_AMUX_THM1_100K_PU has already
been added in the past.
The trip points can really only be considered as placeholders, more
configuration with cooling etc. can be added later.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240705-fp4-thermals-v2-1-a4870a8d084f@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SDM845, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SDM845 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: ca4db2b538 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-9-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like MSM8996, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for MSM8996 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 1e39255ed2 ("arm64: dts: msm8996: Add device node for qcom,dwc3")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-8-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SM6350, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SM6350 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 23737b9557 ("arm64: dts: qcom: sm6350: Add USB1 nodes")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-7-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SM6115, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SM6115 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 97e563bf5b ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-6-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SDM630, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SDM630 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: c65a4ed2ea ("arm64: dts: qcom: sdm630: Add USB configuration")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-5-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like MSM8998, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for MSM8998 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 026dad8f58 ("arm64: dts: qcom: msm8998: Add USB-related nodes")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-4-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like IPQ8074, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for IPQ8074 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 5e09bc51d0 ("arm64: dts: ipq8074: enable USB support")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like IPQ6018, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for IPQ6018 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 20bb9e3dd2 ("arm64: dts: qcom: ipq6018: add usb3 DT description")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-2-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add an initial devicetree for the Lenovo Yoga slim 7x with support for
Display, usb, keyboard, touchpad, touchscreen, PMICs, speaker audio, gpu,
NVMe and remoteprocs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Rob Clark <robdclark@gmail.com>
Link: https://lore.kernel.org/r/20240703-yoga-slim7x-v2-2-3b297dab8db1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add description for the SolidRun CN9131 SolidWAN, based on CN9130 SoM
with an extra communication processor on the carrier board.
This board differentiates itself from CN9130 Clearfog by providing
additional SoC native network interfaces and pci buses:
2x 10Gbps SFP+
4x 1Gbps RJ45
1x miniPCI-E
1x m.2 b-key with sata, usb-2.0 and usb-3.0
1x m.2 m-key with pcie and usb-2.0
1x m.2 b-key with pcie, usb-2.0, usb-3.0 and 2x sim slots
1x mpcie with pcie only
2x type-a usb-2.0/3.0
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add description for the SolidRun CN9130 SoM, and Clearfog Base / Pro
reference boards.
The SoM has been designed as a pin-compatible replacement for the older
Armada 388 based SoM. Therefore it supports the same boards and a
similar feature set.
Most notable upgrades:
- 4x Cortex-A72
- 10Gbps SFP
- Both eMMC and SD supported at the same time
The developer first supporting this product at SolidRun decided to use
different filenames for the DTBs: Armada 388 uses the full
"clearfog" string while cn9130 uses the abbreviation "cf".
This name is already hard-coded in pre-installed vendor u-boot and can
not be changed easily.
NOTICE IN CASE ANYBODY WANTS TO SELF-UPGRADE:
CN9130 SoM has a different footprint from Armada 388 SoM.
Components on the carrier board below the SoM may collide causing
damage, such as on Clearfog Base.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Bindings expect the LED node names to follow certain pattern, see
dtbs_check warnings:
armada-3720-gl-mv1000.dtb: leds: 'power', 'vpn', 'wan' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Bindings expect the GPIO key node names to follow certain pattern, see
dtbs_check warnings:
armada-3720-gl-mv1000.dtb: keys: 'reset' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)...
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
ETHERNET2 instance is connected to Realtek PHY in RGMII mode
Ethernet is SNSP IP with GMAC5 version.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add pinctrl entry related to ETH2 in stm32mp25-pinctrl.dtsi
ethernet2: RGMII with crystal.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Both instances ethernet based on GMAC SNPS IP on stm32mp25.
GMAC IP version is SNPS 5.3
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The High Performance Direct Memory Access (HPDMA) controller is used to
perform programmable data transfers between memory-mapped peripherals
and memories (or between memories) via linked-lists.
There are 3 instances of HPDMA on stm32mp251, using stm32-dma3 driver, with
16 channels per instance and with one interrupt per channel.
Channels 0 to 7 are implemented with a FIFO of 8 bytes.
Channels 8 to 11 are implemented with a FIFO of 32 bytes.
Channels 12 to 15 are implemented with a FIFO of 128 bytes.
Thanks to stm32-dma3 bindings, the user can ask for a channel with specific
FIFO size.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fixed the PHY address and reset GPIOs (does not match the corresponding
pinctrl) for gmac0 and gmac1.
Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-7-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The R66S and R68S boards do not have HDMI output, so disable
the display subsystem.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240701143028.1203997-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix the following error when booting:
[ 15.851853] platform fd800000.usb: deferred probe pending
[ 15.852384] platform fd840000.usb: deferred probe pending
[ 15.852881] platform fd880000.usb: deferred probe pending
This is due to usb2phy1 is not enabled. There is no USB 2.0
port on the board, just remove it.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-5-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fixes pmu_io_domains supply according to the schematic. Among them,
the vccio3 is responsible for the io voltage of sdcard. There is no
sdcard slot on the R68S, and it's connected to vcc_3v3, so describe
the supply of vccio3 separately.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-4-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Remove the non-existent usb_host regulator and fix the supply according
to the schematic. Also remove the unnecessary always-on and boot-on for
the usb_otg regulator.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240701143028.1203997-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There have been several attempts to set the dma-names property on the
SoC level (in rk356x.dtsi), but that appears to cause problems when set
on channels without flow control.
Quoting part of a previous attempt for clarification:
> Nah, enabling it for bluetooth is fine because you have flow control.
> My issues have been on channels without flow control. Without DMA it
> simply drops messages or the channel hangs until you close and reopen
> it. With DMA, when an overflow locks up the channel it is usually
> unavailable until the board is rebooted.
Setting it on the board level for the bluetooth connection was deemed
safe, so do so for the Quartz64 Model B.
This fixes the following error/warning:
of_dma_request_slave_channel: dma-names property of node
'/serial@fe650000' missing or empty
dw-apb-uart fe650000.serial: failed to request DMA
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://libera.irclog.whitequark.org/armlinux/2024-02-29
Link: https://lore.kernel.org/linux-rockchip/18284546.sWSEgdgrri@diego/
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240628120130.24076-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add support for voltage ranges to the GPU OPPs defined in the SoC dtsi for
Rockchip RK356x. This is, for example, useful for RK356x-based boards that
are designed to use the same power supply for the GPU and NPU portions of
the SoC, which is described further in the following documents:
- Rockchip RK3566 Hardware Design Guide, version 1.1.0, page 37
- Rockchip RK3568 Hardware Design Guide, version 1.2, page 78
The values for the exact GPU OPP voltages and the lower limits for the GPU
OPP voltage ranges differ from the values found in the vendor kernel source
(cf. downstream commit f8b9431ee38e ("arm64: dts: rockchip: rk3568: support
adjust opp-table by otp")), [1][2] and present the exact GPU OPP voltage
values that have served us well so far.
[1] f8b9431ee3
[2] https://raw.githubusercontent.com/rockchip-linux/kernel/f8b9431ee38ed561650be7092ab93f564598daa9/arch/arm64/boot/dts/rockchip/rk3568.dtsi
Suggested-by: Diederik de Haas <didi.debian@cknow.org>
Helped-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/7e9ba70fd54a21d6f1f267df11e0acabff8d24e0.1719763100.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rtl82xx DT bindings do not require ethernet-phy-ieee802.3-c22
as the fallback compatible string. There are fewer users of the
Realtek PHY compatible string with fallback compatible string than
there are users without fallback compatible string, so drop the
fallback compatible string from the few remaining users:
$ git grep -ho ethernet-phy-id001c....... | sort | uniq -c
1 ethernet-phy-id001c.c816",
2 ethernet-phy-id001c.c915",
2 ethernet-phy-id001c.c915";
5 ethernet-phy-id001c.c916",
13 ethernet-phy-id001c.c916";
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406290316.YvZdvLxu-lkp@intel.com/
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240630034910.173552-2-marex@denx.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The iommu@fe043e00 on RK356x SoC shares the VOP power domain, but the
power-domains property was not provided when the node has been added.
The consequence is that an attempt to reload the rockchipdrm module will
freeze the entire system. That is because on probe time,
pm_runtime_get_suppliers() gets called for vop@fe040000, which blocks
when pm_runtime_get_sync() is being invoked for iommu@fe043e00.
Fix the issue by adding the missing property.
Fixes: 9d6c6d978f ("arm64: dts: rockchip: rk356x: Add VOP2 nodes")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240702-rk356x-fix-vop-mmu-v1-1-a66d1a0c45ea@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
For varying privacy and security reasons, sometimes we would like to
completely silence the _serial_ console, and only enable it when needed.
But there are many existing systems that depend on this _serial_ console,
so add acpi=nospcr to disable console in ACPI SPCR table as default
_serial_ console.
Signed-off-by: Liu Wei <liuwei09@cestc.cn>
Suggested-by: Prarit Bhargava <prarit@redhat.com>
Suggested-by: Will Deacon <will@kernel.org>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Prarit Bhargava <prarit@redhat.com>
Link: https://lore.kernel.org/r/20240625030504.58025-1-liuwei09@cestc.cn
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Declare that the host controller supports ATS, so the OS can enable it
for ATS-capable PCIe endpoints.
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20240607105415.2501934-5-jean-philippe@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
This replaces custom macros usage (i.e ID_AA64PFR0_EL1_ELx_64BIT_ONLY and
ID_AA64PFR0_EL1_ELx_32BIT_64BIT) and instead directly uses register fields
from ID_AA64PFR0_EL1 sysreg definition. Finally let's drop off both these
custom macros as they are now redundant.
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20240613102710.3295108-3-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Although we now have support for nXS-flavoured TLBI instructions,
we still don't expose the feature to the guest thanks to a mixture
of misleading comment and use of a bunch of magic values.
Fix the comment and correctly express the masking of LS64, which
is enough to expose nXS to the world. Not that anyone cares...
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240703154743.824824-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Reserve 576MiB of CMA as global CMA pool starting after initial 1GiB of
DDR.
AM62ax has different multimedia components such as Camera, Display, H.264
VPU and JPEG Encoder which use CMA for buffer allocations.
The 12x 720x480 realtime VPU decode use-case requires 544MiB of CMA,
additional 32MiB is kept as buffer in case some other peripheral also
require it while VPU is running.
The reason to choose latter 1GiB is to not overlap with existing memory map
which is utilizing initial 1GiB for remoteproc firmwares as shared here
[1].
Also some drivers such as JPEG require 32bit addressing so not allocating
from higher DDR address.
Link: https://lore.kernel.org/all/20240605124859.3034-5-hnagalla@ti.com [1]
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Tested-by: Brandon Brnich <b-brnich@ti.com>
Reviewed-by: Randolph Sapp <rs@ti.com>
Link: https://lore.kernel.org/r/20240613150902.2173582-3-devarsht@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reserve 128MiB of global CMA which is also marked as re-usable
so that OS can also use the same if peripheral drivers are not using the
same.
AM62x supports multimedia components such as GPU, dual Display and Camera.
Assuming the worst-case scenario where all 3 are run in parallel below
is the calculation :
1) OV5640 camera sensor supports 1920x1080 resolution
-> 1920 width x 1080 height x 2 bytesperpixel x 8 buffers
(default in yavta) : 32MiB
2) 1920x1200 Microtips LVDS panel supported
-> 1920 width x 1080 height x 4 bytesperpixel x 2 buffers :
16 MiB
3) 1920x1080 HDMI display supported
-> 1920 width x 1080 height x 4 bytesperpixel x 2 buffers :
15.82 MiB which is ~16 MiB
4) IMG GPU shares with display allocated buffers while rendering
but in case some dedicated operation viz color conversion,
keeping same window of ~16 MiB for GPU too.
Total is 80 MiB and adding 32 MiB for other peripherals and extra
16 MiB to keep as buffer for fragmentation thus rounding total to 128
MiB.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Randolph Sapp <rs@ti.com>
Link: https://lore.kernel.org/r/20240613150902.2173582-2-devarsht@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The arm64 asm/arm_pmuv3.h depends on defines from
linux/perf/arm_pmuv3.h. Rather than depend on include order, follow the
usual pattern of "linux" headers including "asm" headers of the same
name.
With this change, the include of linux/kvm_host.h is problematic due to
circular includes:
In file included from ../arch/arm64/include/asm/arm_pmuv3.h:9,
from ../include/linux/perf/arm_pmuv3.h:312,
from ../include/kvm/arm_pmu.h:11,
from ../arch/arm64/include/asm/kvm_host.h:38,
from ../arch/arm64/mm/init.c:41:
../include/linux/kvm_host.h:383:30: error: field 'arch' has incomplete type
Switching to asm/kvm_host.h solves the issue.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240626-arm-pmu-3-9-icntr-v2-5-c9784b4f4065@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Replace the fixed regulator for USB VBUS and use the proper one that
controls regulator based on VBUS detection.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240702180032.207275-5-biju.das.jz@bp.renesas.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
ASUS Vivobook S 15 is a laptop based on the Qualcomm Snapdragon X Elite
SoC (X1E78100).
Add the device tree for the laptop with support for the following features:
- CPU frequency scaling up to 3.4GHz
- NVMe storage on PCIe 6a (capable of Gen4x4, currently limited to Gen4x2)
- Keyboard and touchpad
- WCN7850 Wi-Fi
- Two Type-C ports on the left side (USB3 only in one orientation)
- internal eDP display
- ADSP and CDSP remoteprocs
Further details could be found in the cover letter.
Signed-off-by: Xilin Wu <wuxilin123@gmail.com>
Link: https://lore.kernel.org/r/20240701-asus-vivobook-s15-v4-2-ce7933b4d4e5@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
According to downstream sources, maximum current for PMI632 VBUS
is 1A.
Taken from msm-4.19 (631561973a034e46ccacd0e53ef65d13a40d87a4)
Line 685-687 in drivers/power/supply/qcom/qpnp-smb5.c
Fixes: a06a2f12f9 ("arm64: dts: qcom: qrb4210-rb2: enable USB-C port handling")
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240702-qrd4210rb2-vbus-volt-v3-1-fbd24661eec4@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Now that the venus clocks are fixed, we can add the DT node.
Signed-off-by: Pierre-Hugues Husson <phhusson@freebox.fr>
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Acked-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Link: https://lore.kernel.org/r/6d86a6a3-4d99-4fda-9a38-7688587237e6@freebox.fr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
According to nxp,dwmac-imx.yaml, 'snps,rx-sched-sp' is not a valid
property.
Remove it from the imx8mp board devicetree files to avoid
dt-schema warnings:
... 'snps,tx-sched-sp' does not match any of the regexes
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Revision 3 of the sa8775p-ride board uses a different PHY for the two
ethernet ports and supports 2.5G speed. Create a new file for the board
reflecting the changes.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240627114212.25400-4-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
In order to support multiple revisions of the sa8775p-ride board, create
a .dtsi containing the common parts and split out the ethernet bits into
the actual board file as they will change in revision 3.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20240627114212.25400-3-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add appropriate mappings of Soundwire ports of WSA8845 speaker. This
solves second (south) speaker sound distortions when playing audio.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240627122015.30945-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add appropriate mappings of Soundwire ports of WSA8845 speaker. This
solves second (right) speaker sound distortions when playing audio.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240627122015.30945-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add appropriate mappings of Soundwire ports of WSA8845 speaker. This
solves second (south) speaker sound distortions when playing audio.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240627122015.30945-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add appropriate mappings of Soundwire ports of WSA8845 speaker
to correctly map the Speaker ports to the WSA macro ports.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240627-topic-sm8650-upstream-was-port-mapping-v1-3-4700bcc2489a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add appropriate mappings of Soundwire ports of WSA8845 speaker
to correctly map the Speaker ports to the WSA macro ports.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240627-topic-sm8650-upstream-was-port-mapping-v1-2-4700bcc2489a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add appropriate mappings of Soundwire ports of WSA8845 speaker
to correctly map the Speaker ports to the WSA macro ports.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240627-topic-sm8650-upstream-was-port-mapping-v1-1-4700bcc2489a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Without explicitly specifying names for the regulators they are named
based on the DeviceTree node name. This results in multiple regulators
with the same name, making debug prints and regulator_summary impossible
to reason about.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240627-fp4-regulator-name-v1-1-66931111a006@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Correct the name for the thermal zone on PM8916 PMIC. I ended up with
c&p mistake, which wasn't noticed until the patch got merged.
Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Fixes: b7a28d8a7b ("arm64: dts: qcom: pm8916: add temp-alarm thermal zone")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240701-fix-pm8916-tz-v1-1-02f8a713f577@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add the necessary dt nodes for gpu support in X1E80100.
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240629015111.264564-6-quic_akhilpo@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
According to the power grid documentation, the 0.8v HS PHY shared
regulator is actually LDO3 from PM8550ve id J. Fix both CRD and QCP
boards.
Fixes: d7e03cce04 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240629-x1e80100-dts-fix-hsphy-0-8v-supplies-v1-1-de99ee030b27@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
A number of devicetree fixes came in for the rockchip platforms, correcting
some of the address information, and reverting a change to the MMC controller
configuration that caused regressions.
Four drivers have one code change each, addressing minor build issues for
the optee firmware driver, the litex SoC platform driver and two reset
drivers.
The riscv fixes as also simple, mainly turning off device nodes in the
canaan dts files unless they are actually usable on a particular board.
Finally, Drew takes over maintaining the THEAD RISC-V SoC platform.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaCpVIACgkQYKtH/8kJ
UieIfQ/+KtxzYPfLsUgSZJCeKa6d1A9EgtTBtcEn6gI4HAc5NFDGvYIIetWI/RYN
2+zOLRdQ8t3CIi2c1sTqy1m+j5vX94p4/2WSW41zASHxN+ryz8VM2SKzE5TGV8IE
WyHv5fBIHY97u2zegq8K4c/ze2W7bdwBd1V5tYwk7tZnm6VFNMCESQ+Q4mu7kjdy
irCdxr0j+uDO0cGppwuGWSSR+BiCCCDhu9YjmluD9B57IIB95lyQRgdGy/V9cT9D
yJS6VwEi+EFBNbzt7TzNrPiXvymQzDeC5K7JavfSRRxW1a/rWLmkmxripiSVZirf
nHR7cIivj0gvjeZiM3UH/ZMPUdzRk4YXr9889EbO+JQ/iZy/1YIJHKuqLbCjAQZp
RgjuYYAuG91aHeCHN6cSflNoC49FmmBi9k1GkBdWviU0mhBrfaNfqspMkWUuH34g
w49H9iflFzJsh6p18h2wG3pB28zubUhLfpmbG5EOP4kXBYvgegAsY9mgSNWcdFFk
JBxcJlToCm6ooha8bBCpsnDf8/Y1LMlUIcP2Spd/iZ0pxtF2wR8Pt80KDuVko+fj
TZF3UTu3wuDCyHnSvX0Fc0YTQV0huVawd23upWBxpcdOa4vsScnUbMdKqBIjA6TX
cGK+fCtVSk45KoAlRi4eLcnNmgse1G2J+ujcrs0QakLxdCx+Ggk=
=+O9s
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-6.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC fixes from Arnd Bergmann:
"A number of devicetree fixes came in for the rockchip platforms,
correcting some of the address information, and reverting a change to
the MMC controller configuration that caused regressions.
Four drivers have one code change each, addressing minor build issues
for the optee firmware driver, the litex SoC platform driver and two
reset drivers.
The riscv fixes as also simple, mainly turning off device nodes in the
canaan dts files unless they are actually usable on a particular
board.
Finally, Drew takes over maintaining the THEAD RISC-V SoC platform"
* tag 'arm-fixes-6.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
drivers/soc/litex: drop obsolete dependency on COMPILE_TEST
tee: optee: ffa: Fix missing-field-initializers warning
arm64: dts: rockchip: Add sound-dai-cells for RK3368
arm64: dts: rockchip: Fix the i2c address of es8316 on Cool Pi 4B
reset: hisilicon: hi6220: add missing MODULE_DESCRIPTION() macro
reset: gpio: Fix missing gpiolib dependency for GPIO reset controller
MAINTAINERS: thead: update Maintainer
arm64: dts: rockchip: fix PMIC interrupt pin on ROCK Pi E
riscv: dts: starfive: Set EMMC vqmmc maximum voltage to 3.3V on JH7110 boards
arm64: dts: rockchip: make poweroff(8) work on Radxa ROCK 5A
Revert "arm64: dts: rockchip: remove redundant cd-gpios from rk3588 sdmmc nodes"
ARM: dts: rockchip: rk3066a: add #sound-dai-cells to hdmi node
arm64: dts: rockchip: Fix the value of `dlg,jack-det-rate` mismatch on rk3399-gru
arm64: dts: rockchip: set correct pwm0 pinctrl on rk3588-tiger
riscv: dts: canaan: Disable I/O devices unless used
riscv: dts: canaan: Clean up serial aliases
arm64: dts: rockchip: Rename LED related pinctrl nodes on rk3308-rock-pi-s
arm64: dts: rockchip: Fix SD NAND and eMMC init on rk3308-rock-pi-s
arm64: dts: rockchip: Fix rk3308 codec@ff560000 reset-names
arm64: dts: rockchip: Fix the DCDC_REG2 minimum voltage on Quartz64 Model B
Both ACPI_PROCESSOR and HOTPLUG_CPU are needed by ACPI_HOTPLUG_CPU.
Otherwise, we can have compiling error with the following configurations.
CONFIG_HOTPLUG_CPU=n
CONFIG_ACPI_PROCESSOR=y
CONFIG_ACPI_HOTPLUG_CPU=y
arch/arm64/kernel/smp.c: In function ‘arch_unregister_cpu’:
arch/arm64/kernel/smp.c:563:9: error: implicit declaration of \
function ‘unregister_cpu’; did you mean ‘register_cpu’? \
[-Werror=implicit-function-declaration]
563 | unregister_cpu(c);
| ^~~~~~~~~~~~~~
| register_cpu
Fix it by enabling ACPI_HOTPLUG_CPU when both ACPI_PROCESSOR and
HOTPLUG_CPU are enabled, consistent with other architectures like
x86 and loongarch.
Fixes: 9d0873892f ("arm64: Kconfig: Enable hotplug CPU on arm64 if ACPI_PROCESSOR is enabled.")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406300437.XnuW0n34-lkp@intel.com/
Signed-off-by: Gavin Shan <gshan@redhat.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240701001132.1585153-1-gshan@redhat.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Fix the following warnings when compiling dtbs with W=1:
../arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi:343.10-353.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/tps6598x@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62-main.dtsi:633.22-643.5: Warning (graph_child_address): /bus@f0000/dwc3-usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Tested-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240626101520.1782320-3-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Fix the following warnings that are thrown when building dtbs with W=1:
../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:367.10-376.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/usb-power-controller@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi:647.22-657.5: Warning (graph_child_address): /bus@f0000/usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
also defined at ../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:517.7-528.3
Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240626101520.1782320-2-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The AM67A/J722S/TDA4AEN platform is a derivative of AM62P platform
and we have no single 1:1 relation regarding index of GPIO and pin
controller. The GPIOs and pin controller registers have mapping and
holes in the map. These have been extracted from the J722S data
sheet. The MCU mapping is carried forward as is with J722S, however the
main GPIO block has differences that needs to be accounted for.
Mux mode input is selected as it is bi-directional. In case a specific
pull type or a specific pin level drive setting is desired, the board
device tree files will have to explicitly mux those pins for the GPIO
with the desired setting.
Ref: J722S Data sheet https://www.ti.com/lit/gpn/tda4aen-q1
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20240627162539.691223-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
On the AM62P platform we have no single 1:1 relation regarding index
of GPIO and pin controller. The GPIOs and pin controller registers
have mapping and holes in the map. These have been extracted from the
AM62P data sheet.
MCU pinctrl definition is shared as it is common between AM62P and
J722S, but that is not the case for main domain.
Ref: AM62P Data sheet https://www.ti.com/lit/gpn/am62p
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20240627162539.691223-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Introduce a GPIO mux mode macro for easier readability. All K3 devices
use mux mode 7 to switch to GPIO mux and this allows the gpio-ranges to
be defined for pinctrl-single clearly.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20240627162539.691223-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The WKUP system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-8-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The WKUP system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-7-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-6-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-5-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-4-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-3-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240628151518.40100-2-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC.
It can be used in combination with different carrier boards.
This module can come with different sizes and models for
DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family.
A development Kit, called phyBOARD-Lyra [2] is used as a carrier board
reference design with a mapper board being used to allow the phyCORE-AM62Ax
to fit the phyBOARD-Lyra.
Supported features:
* Debug UART
* SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* GPIO Expander
* LEDs
* USB
* HDMI
* USB-C
* Audio
For more details, see:
[1] Product page SoM: https://www.phytec.com/product/phycore-am62a
[2] Product page CB: https://www.phytec.com/product/phyboard-am62a
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240626155244.3311436-4-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
PHYTECs phyBOARD-Lyra carrier board is able to accomidate multiple SoMs.
Refactor k3-am625-phyboard-lyra-rdk.dts into an include file so it can
be reused in combination with our phyCORE-AM62Ax SoM.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240626155244.3311436-2-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The audio support on J784S4-EVM is using PCM3168A[0] codec
connected to McASP0 serializers.
- Add the nodes for sound-card, audio codec, MAIN_I2C3 and
McASP0.
- Add pinmux for I2C3, McASP0 and AUDIO_EXT_REFCLK1.
- Add necessary GPIO hogs to route the MAIN_I2C3 lines and
McASP serializer.
- Add idle-state as 1 in mux1 to route McASP clock signals.
[0]: <https://www.ti.com/lit/gpn/pcm3168a>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20240626101645.36764-4-j-choudhary@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
On J784S4 SoC, the AUDIO_REFCLK1 can be used as input to external
peripherals when configured through CTRL_MMR.
Add audio_refclk1 node which would be used as system clock for
audio codec PCM3168A.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20240626101645.36764-3-j-choudhary@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add McASP 0-4 instances and keep them disabled because several
required properties are missing as they are board specific.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20240626101645.36764-2-j-choudhary@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The NAND expansion card (PROC143E1) connects over the User/MCU/PRU
Expansion port on the am62-lp-sk EVM.
The following pins are shared between McASP1 and GPMC-NAND so
both cannot work simultaneously.
Pin name McASP1 function GPMC function
======== =============== =============
J17 MCASP1_AXR0 GPMC0_WEN
P21 MCASP1_AFSX GPMC0_WAIT0
K17 MCASP1_ACLKX GPMC0_BE0N_CLE
K20 MCASP1_AXR2 GPMC0_ADVN_ALE
The factory default sets the pins for McASP1 use. (i.e.
Resistor Array RA1 installed, RA4 not installed).
For NAND use, RA1 has to be removed and RA4 must be
installed.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240622-am62lp-sk-nand-v1-2-caee496eaf42@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The audio support on J722S-EVM is using TLV320AIC3106[0] codec
connected to McASP1 serializers.
- Add the nodes for sound-card, audio codec and McASP1.
- Add hog for TRC_MUX_SEL to select between McASP and TRACE signals
- Add hogs for GPIO_AUD_RSTn and MCASP1_FET_SEL which is used to
switch between HDMI audio and codec audio.
- Add pinmux for MCASP1 and AUDIO_EXT_REFCLK1.
[0]: <https://www.ti.com/lit/gpn/TLV320AIC3106>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20240625113301.217369-3-j-choudhary@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
On J722S SoC, the AUDIO_REFCLK1 can be used as input to external
peripherals when configured through CTRL_MMR.
Add audio_refclk1 node which would be used as system clock for the
audio codec TLV320AIC3106.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20240625113301.217369-2-j-choudhary@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
AM68 SK has an OSPI NOR flash on its SOM connected to OSPI0 instance.
Enable support for the same. Also, describe the OSPI flash partition
information through the device tree, according to the offsets in the
bootloader.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240622161835.3610348-1-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add an overlay to change from the default OSPI NOR to QSPI NOR
for all am6xx-phycore-som boards.
The EEPROM on am6xx-phycore-soms contains information about the
configuration of the SOM. The standard configuration of the SOM
has an ospi nor, but if qspi nor is populated, the EEPROM will
indicate that change and we can use this overlay to cleanly change to
qspi nor.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Link: https://lore.kernel.org/r/20240621233143.2077941-1-nmorrisson@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
MIT license was added to the AM64x SoC DTSIs in commit 6248b20e32
("arm64: dts: ti: k3-am64: Add MIT license along with GPL-2.0"). Apply
the same license change to the TQMa64xxL SoM and MBaX4XxL baseboard
Device Trees.
The copyright year is updated to indicate the license change.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20240625110244.9881-1-matthias.schiffer@ew.tq-group.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add TPM device found on Verdin iMX8M Mini PID4 0090 variant.
While adding the node, rename `pinctrl_pmic_tpm_ena` to
`pinctrl_tpm_spi_cs`.
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add audio XCVR sound card, which supports SPDIF TX & RX,
eARC RX, ARC RX functions.
HDMI_HPD is shared with the HDMI module so use pinctrl_hog.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
XCVR (Audio Transceiver) is a on-chip functional module found
on i.MX8MP. It supports HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
The reset controller is provided by the audio block control driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The production DH i.MX8MP DHCOM SoM rev.200 uses updated PHY MDIO addresses
for the Fast ethernet PHYs. Update the base SoM DT to cater for this change.
Prototype rev.100 SoM was never publicly available and was manufactured in
limited series, anything currently available is rev.200 or newer, so it is
safe to update the DT this way.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DH i.MX8M Plus DHCOM SoM uses Audio PLL2 to supply clock to CLKOUT2
output. Those clock are used to supply on-SoM TC9595 DSI-to-(e)DP bridge
with RefClk and must not be reconfigured, otherwise the bridge cannot
work correctly. Stop reconfiguring Audio PLL2 on this SoM.
Fixes: f560da940e ("arm64: dts: imx8mp: Initialize audio PLLs from audiomix subsystem")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename b(q)man-portals to b(q)man-portals-bus to fix below CHECK_DTB
warnings.
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dtb:
bman-portals@508000000: $nodename:0: 'bman-portals@508000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add thermal subfix for thermal node to fix below CHECK_DTB warnings.
thermal-zones: '...' do not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$'
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
clk-name is undocument property and never used in watchdog driver. Remove
it and fix below CHECK_DTB warning.
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dtb: watchdog@2ad0000: Unevaluated properties are not allowed ('big-endian', 'clock-names' were unexpected)
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename aux_bus to aux-bus to fix below CHECK_DTBS warning.
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dtb:
aux_bus: $nodename:0: 'aux_bus' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
from schema $id: http://devicetree.org/schemas/simple-bus.yam
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change pcie interrupt order to fix below warning.
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: pcie@3400000: interrupt-names:0: 'pme' was expected
from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: pcie@3400000: interrupt-names:1: 'aer' was expected
from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename node name "wdt" to "watchdog" to fix below warning:
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dtb:
wdt@c000000: $nodename:0: 'wdt@c000000' does not match '^(timer|watchdog)(@.*|-([0-9]|[1-9][0-9]+))?$
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add #dma-cells for qdma to fix below warning.
dma-controller@8380000: '#dma-cells' is a required property
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fman3 should use 'fsl,fman-memac-mdio'. 'fsl,fman-xmdio' is for fman2.
Fix below CHECK_DTBS warning.
fman@1a00000: mdio@eb000:compatible: ['fsl,fman-memac-mdio', 'fsl,fman-xmdio'] is too long
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Replace node name 'nor' with 'flash' to fix below CHECK_DTBS warning.
nor@0,0: $nodename:0: 'nor@0,0' does not match '^(flash|.*sram|nand)(@.*)?$'
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Workaround already applied unconditional at
commit a6ba1e4531 ("usb: dwc3: apply snps,host-vbus-glitches workaround unconditionally")
Remove it to fix CHECK_DTBS warning:
usb@2f00000: Unevaluated properties are not allowed ('snps,host-vbus-glitches' was unexpected)
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change #addres-cells to 1 and #size-cells to 0 to align binding doc
requiremement.
Fix below warning:
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dtb: pinmux@70010012c: #address-cells:0:0: 1 was expected
from schema $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add platform special compatible string for all gpio controller to fix
below warning.
gpio@2300000: compatible: 'oneOf' conditional failed, one must be fixed:
['fsl,qoriq-gpio'] is too short
'fsl,qoriq-gpio' is not one of ['fsl,mpc5121-gpio', 'fsl,mpc5125-gpio', 'fsl,mpc8349-gpio', 'fsl,mpc8572-gpio', 'fsl,mpc8610-gpio', 'fsl,pq3-gpio']
'fsl,qoriq-gpio' is not one of ['fsl,ls1021a-gpio', 'fsl,ls1028a-gpio', 'fsl,ls1043a-gpio', 'fsl,ls1088a-gpio', 'fsl,ls2080a-gpio']
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ftm_alarm is rtc. Correct the name as 'rtc' to fix DTB_CHECK warning.
timer@29d0000: $nodename:0: 'timer@29d0000' does not match '^rtc(@.*|-([0-9]|[1-9][0-9]+))?$'
from schema $id: http://devicetree.org/schemas/rtc/fsl,ls-ftm-alarm.yaml
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to fsl,dsp.yaml, 'memory-region' is a required property.
Pass 'memory-region' to fix the following dt-schema warning:
imx8qxp-mek.dtb: dsp@596e8000: 'memory-region' is a required property
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add lpi2c7 and expander gpio pcal6524.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add '#address-cells' and '#size-cells' for all I2C to avoid duplicate these
at every board files.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use SPI common properties 'spi-cs-setup-delay-ns' and
'spi-cs-hold-delay-ns', mark private properties 'fsl,spi-cs-sck-delay'
and 'fsl,spi-sck-cs-delay' as deprecated.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reorder lpi2c2, lpi2c3, mu1 and mu2 label in alphabetical order.
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move node "rtc@53" to existed "&lpi2c3" and remove redundant
"&lpi2c3" label.
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- Fix GPIO number for reg_usdhc2_vmmc on imx8qm-mek board.
- Enable hysteresis for SODIMM_17 pin on imx8mm-verdin board to increase
immunity against noise.
- Remove 'no-sdio' property for uSDHC2 on imx93-11x11-evk board, so that
SDIO cards could also work.
- Fix BT shutdown GPIO for imx8mp-venice-gw73xx-2x board.
- Fix panel node deleting on imx53-qsb-hdmi, as /delete-node/ directive
doesn't really delete a node in a DT overlay.
- Fix TC9595 input clock on DH i.MX8M Plus DHCOM SoM.
- Fix GPU speed for imx8mm-verdin board by enabling overdrive mode in
the SOM dtsi.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmZvsOEUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5gAAf/dv5/cYTuA8MRKAM9Zf0Mf+FKGTDa
/kgfsMz/zkSUke54ZI9clo9laoTyhucPjPu6mUJ7AkbsMiptUQ3fiV1mM+TWuQLV
inlg5qUDvD6JFTiR1Dkm5ML0kyiqbRV6/bHGSCT/tmsqj14xZRgWgavh2e4UKavs
upY1Rj1jaxjc+bycSW9IBTdPvpbNGDgEmBw1YkJysrqnRK3YSOU1QD/xYFKyEtJh
X9gyYc8dmTmuNw3P8Go7T0ABQfYSz/m1hyZEEXWq6rx7xm11LtW+/TnNTcRXxtNM
2WA/DBbCSlaUafZ2zwavb4l+ibr80VlVEechzEJxfrf5Df6Kq8Sv+Qh9eg==
=GHYs
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-6.10' into imx/dt64
i.MX fixes for 6.10:
- Fix GPIO number for reg_usdhc2_vmmc on imx8qm-mek board.
- Enable hysteresis for SODIMM_17 pin on imx8mm-verdin board to increase
immunity against noise.
- Remove 'no-sdio' property for uSDHC2 on imx93-11x11-evk board, so that
SDIO cards could also work.
- Fix BT shutdown GPIO for imx8mp-venice-gw73xx-2x board.
- Fix panel node deleting on imx53-qsb-hdmi, as /delete-node/ directive
doesn't really delete a node in a DT overlay.
- Fix TC9595 input clock on DH i.MX8M Plus DHCOM SoM.
- Fix GPU speed for imx8mm-verdin board by enabling overdrive mode in
the SOM dtsi.
The various pgv_vpu nodes have a mismatch between the value after
the @ symbol and what is referenced by 'reg' so reorder the nodes
to align.
Fixes: df680992dd ("arm64: dts: imx8mp: add vpu pgc nodes")
Suggested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewd-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW7400 has an onboard DP83867 RGMII GbE PHY:
- add RGMII delay and FIFO configuration
- add LED configuration required to use them via netdev trigger:
two LED's (LED1 and LED2, skipping LED0).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW702x SoM has an onboard DP83867 RGMII GbE PHY that drives two
LED's (LED1 and LED2, skipping LED0). Add the appropriate dt bindings to
allow these PHY LED's to be controlled via a netdev trigger.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW700x SoM has an onboard DP83867 RGMII GbE PHY that drives two
LED's (LED1 and LED2, skipping LED0). Add the appropriate dt bindings to
allow these PHY LED's to be controlled via a netdev trigger.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix the dt-schema warnings due to #address-cells/#size-cells being
unnecessary when there are no children with reg cells.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pgc_mlmix shows a power-domain@24, but the reg value is
IMX8MP_POWER_DOMAIN_MLMIX which is set to 4.
The stuff after the @ symbol should match the stuff referenced
by 'reg' so reorder the pgc_mlmix so it to appear as power-domain@4.
Fixes: 834464c850 ("arm64: dts: imx8mp: add mlmix power domain")
Fixes: 4bedc468b7 ("arm64: dts: imx8mp: Add NPU Node")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add imx8dxl_cm4, lsio mu5 and related memory region.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for TQMa8MPQL module on MBa8MP-RAS314 board.
Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
With the recent defining of preferred naming for fixed clock and
regulator nodes, convert the Arm Ltd. boards to use the preferred
names. In the cases which had a unit-address, warnings about missing
"reg" property are fixed.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/20240528191536.1444649-2-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240630-arm-dts-fixes-2-v1-1-a32ba57e5b1d@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
or wrong properties, this reverts the previous move away from
cd-gpios to the mmc-controller's internal card-detect.
With this change applied, it was reported that boards could not
detect card anymore, so this go reverted of course.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmZ92SwQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgSDBB/95oWtHr8L4LZYeedAQLuf6regICaIIfjas
7skbt+e4Nryl5B0eaieHd9UtotS+FWw/1T6fOIoACMLILUsbqtffUOyhP+yJsG3O
fXFvi+8Mn9OOCbY1X28UTMnaLG1BLfc4TnMKXZsl6Rxt+pV0ktL9ZVUPzZOMA1tW
Ssj7xgNDfi/xqjx5PqNluHWM3XHXABWjUWwRjNebbgmyVWdo3vmU5QxayVPd0AzF
iSisrWojWLEVfL4+aQi2ten7udfSre7eB80KIySIQIoWzArqpt88/8LF+KM1jYpU
uTGqbC2azGXqAgOnSKcAlj/ogmZpkjb+oPdJKtBuFjPvgMBFAqQR
=vK3N
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaCohgACgkQYKtH/8kJ
Uif56g/9ESQjQdCzSxHxqjaBML3yaFfvoYgaRwLf2HGiplN5y8GLaVmvjhMYRR0B
j9p2tZzSEe9kNTqPYfavaSd45OMJcJhDc3aiZ+NmSON2VS80zZoB+x7qiCGrskEj
VBZQYAEDenUiIA6Um3ikaLMlGJIjWsqcP3+wrIPVEWUYnEG9DyLjPou4f8anSPZo
Rx2tTFsuvnFfwaQE6q/OxoGu7m2aYNj6qSMAKrLgCu9sGnGafWrLrozZY/4LaW2K
BaXEoK8/RFqGK+6rm3KpctnW0sn2tSQOsbeqZbMdYRR6ntkIjLKZO/JNOvsT3pWK
ZDFXgKE/qaoQdhjFGs+3yjR8UenqLm2eoV8ubp5qpOPXyanRzHbK4M+wV0eAiSEI
SbgfvVUe5tiF98Sw6QxZ+f+PJs19gzLAlvEIQp/ziLPypw8sxegSScx5DiC6kQV4
NLQ8qtmNt/INczXaQplwTPjYwJUFcRIo6bMBlR6nkdOMwlsl00p4UqJ4tcHbUqHo
EPzjM/X25JIEFLjcuPuKunaR0J3/oIC4jXwjBcJzS/8tziKw/bBe5oGo3zgvhNW7
kmAjP3qbsvM6oN0UYE4iVKsyfKk8b2L3SUavkeesr+FgkIPiMrC0net7CL4mtBZ5
2QtnDgqVO7j/kCO4OsVQPe1/sLnxOTpqkJx79fY71a+UVt7YQ8Q=
=be1d
-----END PGP SIGNATURE-----
Merge tag 'v6.10-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Apart from the regular dts fixes for wrong addresses, missing
or wrong properties, this reverts the previous move away from
cd-gpios to the mmc-controller's internal card-detect.
With this change applied, it was reported that boards could not
detect card anymore, so this go reverted of course.
* tag 'v6.10-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add sound-dai-cells for RK3368
arm64: dts: rockchip: Fix the i2c address of es8316 on Cool Pi 4B
arm64: dts: rockchip: fix PMIC interrupt pin on ROCK Pi E
arm64: dts: rockchip: make poweroff(8) work on Radxa ROCK 5A
Revert "arm64: dts: rockchip: remove redundant cd-gpios from rk3588 sdmmc nodes"
ARM: dts: rockchip: rk3066a: add #sound-dai-cells to hdmi node
arm64: dts: rockchip: Fix the value of `dlg,jack-det-rate` mismatch on rk3399-gru
arm64: dts: rockchip: set correct pwm0 pinctrl on rk3588-tiger
arm64: dts: rockchip: Rename LED related pinctrl nodes on rk3308-rock-pi-s
arm64: dts: rockchip: Fix SD NAND and eMMC init on rk3308-rock-pi-s
arm64: dts: rockchip: Fix rk3308 codec@ff560000 reset-names
arm64: dts: rockchip: Fix the DCDC_REG2 minimum voltage on Quartz64 Model B
Link: https://lore.kernel.org/r/10237789.nnTZe4vzsl@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add True Random Number Generator (TRNG) node to Exynos850 SoC dtsi.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240618204523.9563-8-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
R-Car V4H (R8A779G0) supports only 1 AUDIO_CLKOUT and 1 SSI,
thus, #clock-cells / #sound-dai-cells are both fixed to zero.
(#sound-dai-cells is needed for Simple-Audio-Card, but not needed for
Audio-Graph-Card). Fix this up.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/87frt3kxew.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: e20396d65b ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/884c683fb6c1d1bf7d0d383a8df8f65a0a424dc7.1718890849.git.geert+renesas@glider.be
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: 7c2b8198f4 ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/834244e77e5f407ee6fab1ab5c10c98a8a933085.1718890849.git.geert+renesas@glider.be
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: 68a4552529 ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/21f556eb7e903d5b9f4c96188fd4b6ae0db71856.1718890849.git.geert+renesas@glider.be
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: cf40c9689e ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/15cc7a7522b1658327a2bd0c4990d0131bbcb4d7.1718890849.git.geert+renesas@glider.be
The four Cortex-A76 CPU cores on R-Car V4M share their Operating
Performance Points (OPP) table, but they have independent clocks.
All cores in the cluster can switch DVFS states independently, hence
the cluster's OPP table should not have an "opp-shared" property.
Fixes: 6bd8b0bc44 ("arm64: dts: renesas: r8a779h0: Add CA76 operating points")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/4e0227ff4388485cdb1ca2855ee6df92754e756e.1718890585.git.geert+renesas@glider.be
In order to move arch_register_cpu() to be called via the same path
for initially present CPUs described by ACPI and hotplugged CPUs
ACPI_HOTPLUG_CPU needs to be enabled.
The protection against invalid IDs in acpi_map_cpu() is needed as
at least one production BIOS is in the wild which reports entries
in DSDT (with no _STA method, so assumed enabled and present)
that don't match MADT.
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240529133446.28446-18-Jonathan.Cameron@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The ARM64 architecture does not support physical CPU HP today.
To avoid any possibility of a bug against such an architecture if defined
in future, check for the physical CPU HP case (not present) and
return an error on any such attempt.
On ARM64 virtual CPU Hotplug relies on the status value that can be
queried via the AML method _STA for the CPU object.
There are two conditions in which the CPU can be registered.
1) ACPI disabled.
2) ACPI enabled and the acpi_handle is available.
_STA evaluates to the CPU is both enabled and present.
(Note that in absence of the _STA method they are always in this
state).
If neither of these conditions is met the CPU is not 'yet' ready
to be used and -EPROBE_DEFER is returned.
Success occurs in the early attempt to register the CPUs if we
are booting with DT (no concept yet of vCPU HP) if not it succeeds
for already enabled CPUs when the ACPI Processor driver attaches to
them. Finally it may succeed via the CPU Hotplug code indicating that
the CPU is now enabled.
For ACPI if CONFIG_ACPI_PROCESSOR the only path to get to
arch_register_cpu() with that handle set is via
acpi_processor_hot_add_init() which is only called from an ACPI bus
scan in which _STA has already been queried there is no need to
repeat it here. Add a comment to remind us of this in the future.
Suggested-by: Rafael J. Wysocki <rafael@kernel.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240529133446.28446-17-Jonathan.Cameron@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
When a CPU is marked as disabled, but online capable in the MADT, PSCI
applies some firmware policy to control when it can be brought online.
PSCI returns DENIED to a CPU_ON request if this is not currently
permitted. The OS can learn the current policy from the _STA enabled bit.
Handle the PSCI DENIED return code gracefully instead of printing an
error.
Note the alternatives to the PSCI cpu_boot() callback do not
return -EPERM so the change in smp.c has no affect.
See https://developer.arm.com/documentation/den0022/f/?lang=en page 58.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
[ morse: Rewrote commit message ]
Signed-off-by: James Morse <james.morse@arm.com>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Tested-by: Vishnu Pajjuri <vishnu@os.amperecomputing.com>
Tested-by: Jianyong Wu <jianyong.wu@arm.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240529133446.28446-16-Jonathan.Cameron@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
To support virtual CPU hotplug, ACPI has added an 'online capable' bit
to the MADT GICC entries. This indicates a disabled CPU entry may not
be possible to online via PSCI until firmware has set enabled bit in
_STA.
This means that a "usable" GIC redistributor is one that is marked as
either enabled, or online capable. The meaning of the
acpi_gicc_is_usable() would become less clear than just checking the
pair of flags at call sites. As such, drop that helper function.
The test in gic_acpi_match_gicc() remains as testing just the
enabled bit so the count of enabled distributors is correct.
What about the redistributor in the GICC entry? ACPI doesn't want to say.
Assume the worst: When a redistributor is described in the GICC entry,
but the entry is marked as disabled at boot, assume the redistributor
is inaccessible.
The GICv3 driver doesn't support late online of redistributors, so this
means the corresponding CPU can't be brought online either.
Rather than modifying cpu masks that may already have been used,
register a new cpuhp callback to fail this case. This must run earlier
than the main gic_starting_cpu() so that this case can be rejected
before the section of cpuhp that runs on the CPU that is coming up as
that is not allowed to fail. This solution keeps the handling of this
broken firmware corner case local to the GIC driver. As precise ordering
of this callback doesn't need to be controlled as long as it is
in that initial prepare phase, use CPUHP_BP_PREPARE_DYN.
Systems that want CPU hotplug in a VM can ensure their redistributors
are always-on, and describe them that way with a GICR entry in the MADT.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240529133446.28446-15-Jonathan.Cameron@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
In a review discussion of the changes to support vCPU hotplug where
a check was added on the GICC being enabled if was online, it was
noted that there is need to map back to the cpu and use that to index
into a cpumask. As such, a valid ID is needed.
If an MPIDR check fails in acpi_map_gic_cpu_interface() it is possible
for the entry in cpu_madt_gicc[cpu] == NULL. This function would
then cause a NULL pointer dereference. Whilst a path to trigger
this has not been established, harden this caller against the
possibility.
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240529133446.28446-13-Jonathan.Cameron@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
ACPI identifies CPUs by UID. get_cpu_for_acpi_id() maps the ACPI UID
to the Linux CPU number.
The helper to retrieve this mapping is only available in arm64's NUMA
code.
Move it to live next to get_acpi_id_for_cpu().
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Tested-by: Vishnu Pajjuri <vishnu@os.amperecomputing.com>
Tested-by: Jianyong Wu <jianyong.wu@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Acked-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Link: https://lore.kernel.org/r/20240529133446.28446-12-Jonathan.Cameron@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
- Fix spurious page-table warning when clearing PTE_UFFD_WP in a live
pte
- Fix clearing of the idmap pgd when using large addressing modes
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmZ9gJgQHHdpbGxAa2Vy
bmVsLm9yZwAKCRC3rHDchMFjNKEdB/9wDzyoyo+tMp2csPFk66ufbytbsSV2LWys
kvUZdTYLAV4YlI6jTxXJ/3I3rXggc5SsXE/WosDQ1zfb1KsE/3sWaexIURHxeT73
PUUqREUfvA7Ormv65A4zlKbVzfsPlM8VWT7mmSj3k6rV5TvNBkjm53x5t4QEPHxO
VwHRd/JRm+8+JvhXUhPiECFWCalBvJKXxOsCK9Plj1uIOY+eFw3nYp59H2hE30be
VDmdgBQ6u1mZvqgSv8P6jDV9r69qBxRbig5fo9C89E8ptS9u3piHvcBEtg6FAztA
SYyrfxBbYvejM5cN4aEWc035kWW0o1K1MimQgZYpyYlqKNHywTw0
=JzVF
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Will Deacon:
"A pair of small arm64 fixes for -rc6.
One is a fix for the recently merged uffd-wp support (which was
triggering a spurious warning) and the other is a fix to the clearing
of the initial idmap pgd in some configurations
Summary:
- Fix spurious page-table warning when clearing PTE_UFFD_WP in a live
pte
- Fix clearing of the idmap pgd when using large addressing modes"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: Clear the initial ID map correctly before remapping
arm64: mm: Permit PTE SW bits to change in live mappings
An unintended consequence of commit 9c573cd313 ("randomize_kstack:
Improve entropy diffusion") was that the per-architecture entropy size
filtering reduced how many bits were being added to the mix, rather than
how many bits were being used during the offsetting. All architectures
fell back to the existing default of 0x3FF (10 bits), which will consume
at most 1KiB of stack space. It seems that this is working just fine,
so let's avoid the confusion and update everything to use the default.
The prior intent of the per-architecture limits were:
arm64: capped at 0x1FF (9 bits), 5 bits effective
powerpc: uncapped (10 bits), 6 or 7 bits effective
riscv: uncapped (10 bits), 6 bits effective
x86: capped at 0xFF (8 bits), 5 (x86_64) or 6 (ia32) bits effective
s390: capped at 0xFF (8 bits), undocumented effective entropy
Current discussion has led to just dropping the original per-architecture
filters. The additional entropy appears to be safe for arm64, x86,
and s390. Quoting Arnd, "There is no point pretending that 15.75KB is
somehow safe to use while 15.00KB is not."
Co-developed-by: Yuntao Liu <liuyuntao12@huawei.com>
Signed-off-by: Yuntao Liu <liuyuntao12@huawei.com>
Fixes: 9c573cd313 ("randomize_kstack: Improve entropy diffusion")
Link: https://lore.kernel.org/r/20240617133721.377540-1-liuyuntao12@huawei.com
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Heiko Carstens <hca@linux.ibm.com> # s390
Link: https://lore.kernel.org/r/20240619214711.work.953-kees@kernel.org
Signed-off-by: Kees Cook <kees@kernel.org>
and Neardi LBA3368.
Interesting core changes: dropping of the rk3399pro dtsi - Dragan dug
through available information, boards and found out that the pcie-stuff
described in the existing rk3399pro dtsi is actually not true and the
file can go away.
And also a bit of reorganizing of rk3588 dtsi files. There are number
of rk3588 variants in existence that select between two sets of
peripherals and also multiple sets of operating points. So the change
sorts it differently so that we stop including one soc-variant into
others and also make room for the operating points.
The rk3308 got io domains, a number of additions to the rk3308-rock-pi-s
board (wifi, io-domains, otp, ethernet, uart, sdmmc).
And then there are of course the usual set of new additions like
rk3588 pcie endpoint support and individual peripherals for boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmZ+p5wQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgRR1B/47XZQRe94xg0is7nptf9UehEE6UaoDSrMj
9C0JLEt6CLrlaCDVbd387/8+Ehm0Mc1SpXWZa+/JUROKiIaAMNesVsCDkrlsF5W/
Df0z1Bxg3WOii2RNNidl4FC3UbZDJ+SQc8kRnk4AARsIJZEXtRuGv8ExrNTVjURC
PwST1e7yL8xk4Mq5f7SVcT0V/vL6O/Ae27w464q45o8dFtoTKdgXHhEHZYqPiv1e
XIvoVBBfkqFZcj+YbrPJHJWS9XguEHjUvzXVp3TO1WoHnwtjJeQbqdI9H2AWF5DY
xYqRMrLDv0azqU4QwpkA9C81zSOko1EpqN7p2b9k/4V3NgmSzI7H
=rZGA
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+28YACgkQYKtH/8kJ
UieK0Q//X4sGDnswiUtOqQdZIGxYCLkiQgO8zCdywUrAfm+a9mBQwljc7iL30a/a
SAN80SVStELC6IP3cI1efn7bvimIeNMQEfo68+IKvBtmWoS6IhSiDWJAPeitZrJs
iZXIOwx2lXVlC/5Y1r6ZCaGysSnwdREvQQpdG4tWj00n0WxadK4pFiIuz94taUaI
hWm64BH/vkKwZQ+18QDw3F+QkXmsLQ09FIpXz8DwhW9G2GuFOwNw2Dmhkpc+lFjI
BDDdzTIsonYpy1kIXzH7IWpkNCrXZCGLScZK/g+2xd+XUOJhMKsLu+glo7zHQ7f3
7su7wN1ehjPMRgAudXS7yxfOhoKb5x/w51BcuKa7fBU3E7Zid/Hnrp700KYrnZjq
W2Du9ptvyh0QnfncWJVl3Y3fls25IkfDiGRooqRE8D8RY126Ln/ysFnSJRTHryty
6NVQly4uQinbMmBV336ufmyRiWnafvVzf8mL4LGrdrXxdHqGs7WBaP3/GC0edzd0
oDP6etYWLGhDA+Qt37cZXuPDJdaOBVTIWe1dn40O2uV5a26IxnuXDfeDu9kqMNL1
oylY5/nvzQTWLFXXCf7X9Ez7+eax8le3AzbplLciXSURECuGDrqA61UUpHP9alZh
hSCXwY+0tayFTBUCsiVLx2WyCMxwQXK93EB7bk++NLldFHYq+A0=
=yOYl
-----END PGP SIGNATURE-----
Merge tag 'v6.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards, the Radxa ROCK S0, Radxa ZERO 3W/3E, CM3588 NAS solution
and Neardi LBA3368.
Interesting core changes: dropping of the rk3399pro dtsi - Dragan dug
through available information, boards and found out that the pcie-stuff
described in the existing rk3399pro dtsi is actually not true and the
file can go away.
And also a bit of reorganizing of rk3588 dtsi files. There are number
of rk3588 variants in existence that select between two sets of
peripherals and also multiple sets of operating points. So the change
sorts it differently so that we stop including one soc-variant into
others and also make room for the operating points.
The rk3308 got io domains, a number of additions to the rk3308-rock-pi-s
board (wifi, io-domains, otp, ethernet, uart, sdmmc).
And then there are of course the usual set of new additions like
rk3588 pcie endpoint support and individual peripherals for boards.
* tag 'v6.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (42 commits)
arm64: dts: rockchip: Delete the SoC variant dtsi for RK3399Pro
arm64: dts: rockchip: Fix mic-in-differential usage on rk3568-evb1-v10
arm64: dts: rockchip: Fix mic-in-differential usage on rk3566-roc-pc
arm64: dts: rockchip: Drop invalid mic-in-differential on rk3568-rock-3a
arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode
arm64: dts: rockchip: Add PCIe endpoint mode support
arm64: dts: rockchip: Increase VOP clk rate on RK3328
arm64: dts: rockchip: add gpio-line-names to radxa-zero-3
arm64: dts: rockchip: Split GPU OPPs of RK3588 and RK3588j
arm64: dts: rockchip: Add OPP data for CPU cores on RK3588j
arm64: dts: rockchip: Add OPP data for CPU cores on RK3588
arm64: dts: rockchip: Add CPU/memory regulator coupling for 2 RK3588 boards
arm64: dts: rockchip: fix mmc aliases for Radxa ZERO 3E/3W
arm64: dts: rockchip: Add Neardi LBA3368 board
dt-bindings: arm: rockchip: Add Neardi LBA3368
dt-bindings: vendor-prefixes: Add Neardi Technology
arm64: dts: rockchip: Enable PinePhone Pro vibrator
arm64: dts: rockchip: Enable PinePhone Pro IMU sensor
arm64: dts: rockchip: Add Pinephone Pro support for GPIO LEDs
arm64: dts: rockchip: Enable SPI flash on PinePhone Pro
...
Link: https://lore.kernel.org/r/4901395.GXAFRqVoOG@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces the new Airoha (MediaTek) EN7581 home networking
platform (routers) in early stages, but with support for its
Evaluation Board, a few more MediaTek based machines, and
improvements for existing ones.
For the MT7981 router SoC we get pinctrl support, along with the
enablement of its watchdog, eFuse/nvmem, I2C and integrated WiFi
controller, other than the introduction of new machines based on
this chip: the Cudy WR3000 V1 router and the OpenWRT One.
MT7986 gets a new machine: the BananaPi R3 Mini.
Some advancements have been done also on the MT7988 SoC, which
gains support for its I2C, PWM and USB XHCI controllers.
MediaTek Genio SoCs also get attention, with the introduction of a
basic device tree for the MT8390 Genio 700-EVK board, and for the
MT8395 Genio 1200 powered Kontron 3.5"-SBC-i1200.
Additionally, the Genio 1200 Radxa NIO12L board gets support for
USB Role Switching and proper PCI-Express controller PM suspend
and resume, other than finally enabling CPU and GPU frequency
and voltage scaling for improved efficiency.
Speaking of MediaTek Kompanio SoCs (Chromebooks) instead, thanks
to community interest and help in testing, there comes support for
the MT8195-powered HP Chromebook X360 13b-ca0002sa, while Google
contributed support for the MT8186-powered Acer Chromebook 311.
Moreover, MT8188 gets support for its integrated power domains,
other than its Global Command Engine (GCE) mailboxes, initial
basic support for the VDO0/1 blocks for multimedia, and its GPU
(ARM Mali G57-MC3, Valhall-JM) with Panfrost.
Besides that, this also adds a few other cleanups and improvements
for all machines using the MT8183, MT8192, MT8195/MT8395 SoCs and
adds generation of symbols on base devicetrees of machines using
Device Tree Overlay(s) (DTBO).
In particular:
- The MediaTek Smart Voltage Scaling (SVS) is now fully working
those SoCs, bringing further power efficiency improvements;
- Thermal zones were refactored on MT8183 for consistency with
the other MediaTek SoCs and for readability
- Sound DAI links are now consistently specified in device tree
on MT8195 and MT8186 machines
- Newly supported machines/boards
- EN7581: EVK
- MT7981: Cudy WR3000 V1, OpenWRT One
- MT7986: BananaPi R3 Mini
- MT8186: Acer Chromebook 311 (Corsola Voltorb)
- MT8195: HP Chromebook X360 13b-ca0002sa (Cherry Dojo)
- MT8390/8188: Genio 700 EVK
- Some cleanups for unused/legacy devicetree properties
-----BEGIN PGP SIGNATURE-----
iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZn0thSgcYW5nZWxvZ2lv
YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4B94BANp1
sg23FYuR+RIMOtJ7542D1HVRr/l3D27XFSAw0yjbAP9cTg5ps+SR4fsr+ipectwP
MBqhJLJu7KriAl63aY2/BQ==
=paIN
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+2boACgkQYKtH/8kJ
Uieq2xAAvzQQUlIbLUm8GUZ+GzcMpYcXiuf1ngxym8dmc2ZJo+PB0XnI8R8bwM8p
AffGi2sE6it8NjcPAw9Sg9x16p/HOloeQq/V36XeBGWyz8AVR4bA676J73yRVnNo
fDEhdD5dcGE3SkmGX1V+FrwosEoYLjK6Jso/RB+IAWOgIesbU8yfObjl9NAfXsK1
B+qA7HTJeKtpMORZLbA6sMGxOrR0EVv+7Ni1kkPnCqEw4q1FLGi9MUZ4pHNXXoDd
9kDHL6QpWjfjr14rmpvV+C0vqbzcso3h1ZUmI2IDRN0PcOUuEaDHfmE4Tu+UNefE
sfEvJCPPscgBJfCHH8fE9CgBu9wSfITRh4um4cEWo+XdiLaG5PTF/JAp+n+ugldr
eKNFUZTx5xP7yReo0lzC2EExhugtPTXjabb64jtFst9WSjlFO34yoJ1R786gedKx
C85pv3lQ0H2/NADB2cYsKdHVK+1tHZyl3yYU/clx3yp+iQwv5kr22wvQt68MAHL4
oiepBhdqeLmMjn/cTJZLddp90t6ge+li3miyv0yisrQn57h4NjJapuNIVZnATbUa
xJAH7BLdQPqxb8d9AXNR2h+Tqu/CqFdqEb8qdsYwdjmPrHuwQPVlCL7eMbI2+7Rn
A5ME/9DSRs+zWKP7Q97dziKU0/otXkx7t+en+4O6eylxxMwF2AA=
=lO7d
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts64-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DTS updates for v6.11
This introduces the new Airoha (MediaTek) EN7581 home networking
platform (routers) in early stages, but with support for its
Evaluation Board, a few more MediaTek based machines, and
improvements for existing ones.
For the MT7981 router SoC we get pinctrl support, along with the
enablement of its watchdog, eFuse/nvmem, I2C and integrated WiFi
controller, other than the introduction of new machines based on
this chip: the Cudy WR3000 V1 router and the OpenWRT One.
MT7986 gets a new machine: the BananaPi R3 Mini.
Some advancements have been done also on the MT7988 SoC, which
gains support for its I2C, PWM and USB XHCI controllers.
MediaTek Genio SoCs also get attention, with the introduction of a
basic device tree for the MT8390 Genio 700-EVK board, and for the
MT8395 Genio 1200 powered Kontron 3.5"-SBC-i1200.
Additionally, the Genio 1200 Radxa NIO12L board gets support for
USB Role Switching and proper PCI-Express controller PM suspend
and resume, other than finally enabling CPU and GPU frequency
and voltage scaling for improved efficiency.
Speaking of MediaTek Kompanio SoCs (Chromebooks) instead, thanks
to community interest and help in testing, there comes support for
the MT8195-powered HP Chromebook X360 13b-ca0002sa, while Google
contributed support for the MT8186-powered Acer Chromebook 311.
Moreover, MT8188 gets support for its integrated power domains,
other than its Global Command Engine (GCE) mailboxes, initial
basic support for the VDO0/1 blocks for multimedia, and its GPU
(ARM Mali G57-MC3, Valhall-JM) with Panfrost.
Besides that, this also adds a few other cleanups and improvements
for all machines using the MT8183, MT8192, MT8195/MT8395 SoCs and
adds generation of symbols on base devicetrees of machines using
Device Tree Overlay(s) (DTBO).
In particular:
- The MediaTek Smart Voltage Scaling (SVS) is now fully working
those SoCs, bringing further power efficiency improvements;
- Thermal zones were refactored on MT8183 for consistency with
the other MediaTek SoCs and for readability
- Sound DAI links are now consistently specified in device tree
on MT8195 and MT8186 machines
- Newly supported machines/boards
- EN7581: EVK
- MT7981: Cudy WR3000 V1, OpenWRT One
- MT7986: BananaPi R3 Mini
- MT8186: Acer Chromebook 311 (Corsola Voltorb)
- MT8195: HP Chromebook X360 13b-ca0002sa (Cherry Dojo)
- MT8390/8188: Genio 700 EVK
- Some cleanups for unused/legacy devicetree properties
* tag 'mtk-dts64-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (58 commits)
arm64: dts: mediatek: Declare drive-strength numerically
arm64: dts: mt7622: fix switch probe on bananapi-r64
arm64: dts: mediatek: Add MT8186 Voltorb Chromebooks
dt-bindings: arm: mediatek: Add MT8186 Voltorb Chromebooks
arm64: dts: mediatek: Makefile: Generate symbols for DTBO support
arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add ports node for anx7625
arm64: dts: mediatek: mt8183-pico6: Fix wake-on-X event node names
arm64: dts: mt8173: Add G2Touch touchscreen node
arm64: dts: mediatek: mt8183-kukui: Fix the value of `dlg,jack-det-rate` mismatch
arm64: dts: mediatek: mt8188: Add support for Mali GPU on Panfrost
arm64: dts: mediatek: mt8188: Add support for SoC power domains
arm64: dts: mediatek: mt8188: Add VDOSYS0/1 support for multimedia
arm64: dts: mediatek: mt8188: Add Global Command Engine mailboxes
arm64: dts: mediatek: mt8173-elm: drop PMIC's syscon node
arm64: dts: mediatek: mt8365: use a specific SCPSYS compatible
arm64: dts: mediatek: mt8365: drop incorrect power-domain-cells
arm64: dts: mediatek: mt7981: add I2C controller
arm64: dts: mediatek: mt7622: fix "emmc" pinctrl mux
arm64: dts: mediatek: mt7988: add I2C controllers
arm64: dts: mediatek: mt7988: add PWM controller
...
Link: https://lore.kernel.org/r/20240628093801.126013-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Orin NX and Orin Nano boards share a common carrier board and the
module boards for both platforms are very similar. Therefore,
restructure the Orin NX/Nano device-tree source files to adhere to a
simple hierarchical format. This will help make clear where changes
should go, and eliminates redundancy within the files.
Previously the carrier board file was independent. However, given
that it is so tightly coupled with the module design, it will be
more practical to combine files together for a simpler layout.
Following changes are made to restructure the device tree source files:
1) Change include hierarchy. Top-level dts includes board dtsi.
Board dtsi includes module dtsi. Module dtsi includes SoC dtsi.
2) Data from the top level dts file that is common to both Orin NX
and Orin Nano is in tegra234-p3768-0000+p3767.dtsi.
3) Only data that is unique to NX/Nano is present in the top-level dts.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The commit 587b4ee24f ("arm64: dts: rockchip: add core dtsi file for
RK3399Pro SoCs") describes the RK3399Pro's PCI Express interface as the way
built-in NPU communicates with the rest of the SoC. All available evidence
shows this not to be accurate, as described in detail below. Moreover, the
rk3399pro.dtsi isn't used anywhere, so let's delete it.
The publicly available schematics of the Radxa Rock Pi N10 carrier board [1]
and the Vamrs VMARC RK3399Pro SoM, [2] which put together form the currently
single supported RK3399Pro-based board, clearly show that the PCI Express x4
interface of this SoC is fully functional and actually not used by the SoC
to communicate with the built-in NPU. In more detail, the VMARC SoM exports
the SoC's PCI Express interface at its board-to-board connector, and the Rock
Pi N10 routes it to an M.2 M-key slot with four PCI Express lanes.
Both the Rockchip RK3399Pro datasheet, version 1.1, [3] and the Rockchip
RK3399Pro technical reference manual (TRM), first part of the version 1.0, [4]
don't describe that the SoC's PCI Express interface is reserved for the NPU.
Instead, the RK3399Pro TRM describes that the NPU uses AHB and AXI interfaces
as the host interface (HIF). The RK3399Pro datasheet clearly describes that
the PCI Express x4 interface is available for general-purpose use, just like
it's the case with the standard Rockchip RK3399 SoC, [5] albeit with a bit
shorter feature list provided in the RK3399Pro datasheet.
Even the publicly available reference RK3399Pro schematic from Rockchip [6]
shows the availability of a standard PCI Express slot with four lanes, which
would be pretty much impossible if the PCI Express interface was reserved
for the communication with the built-in NPU.
Based on the RK3399Pro datasheet [3] and the board schematics, [2][6] the
built-in NPU actually exports NPU_PCIE as a separate PCI Express x2 interface
that's partially pinmuxed with the NPU's separate USB 3.0 interface, which is
described further in the next paragraph. However, the NPU's separate PCI
Express x2 interface is left undocumented in the publicly available RK3399Pro
documentation, in which it's clearly described as reserved for internal use
and not intended for the communication with the NPU. Finally, the evidently
independent nature of the separate NPU_PCIE x2 interface makes ignoring it
safe when it comes to determining the nature and the availability of the
RK3399Pro's main PCI Express x4 interface.
The actual application-level communication with the built-in NPU, including
powering it up and down and uploading the NPU firmware, is performed through
the separate USB 2.0 and USB 3.0 interfaces exported by the NPU, [7] which
the VMARC SoM [2] and the reference board design from Rockchip [6] route to
the SoC's standard USB 2.0 and USB 3.0 interfaces, to make the NPU accessible
to software running on the SoC's ARM cores.
[1] https://dl.radxa.com/rockpin10/docs/hw/rockpi_n10_sch_v1.1_20190909.pdf
[2] https://dl.radxa.com/rockpin10/docs/hw/VMARC_RK3399Pro_sch_V1.1_20190619.pdf
[3] https://www.rockchip.fr/RK3399Pro%20datasheet%20V1.1.pdf
[4] https://www.rockchip.fr/Rockchip%20RK3399Pro%20TRM%20V1.0%20Part1.pdf
[5] https://www.rockchip.fr/RK3399%20datasheet%20V1.8.pdf
[6] https://opensource.rock-chips.com/images/e/e4/RK_EVB_RK3399PRO_LP3S178P332SD8_V11_20181113_RZF.pdf
[7] https://wiki.radxa.com/RockpiN10/dev/NPU-booting
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/4449f7d4eead787308300e2d1d37b88c9d1446b2.1717308862.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The 'mic-in-differential' DT property supported by the RK809/RK817 audio
codec driver is actually valid if prefixed with 'rockchip,':
DTC_CHK arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dtb
rk3568-evb1-v10.dtb: pmic@20: codec: 'mic-in-differential' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml#
Make use of the correct property name.
Fixes: 3e4c629ca6 ("arm64: dts: rockchip: enable rk809 audio codec on the rk3568 evb1-v10")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-5-c0db420d3639@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The 'mic-in-differential' DT property supported by the RK809/RK817 audio
codec driver is actually valid if prefixed with 'rockchip,':
DTC_CHK arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dtb
rk3566-roc-pc.dtb: pmic@20: codec: 'mic-in-differential' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml#
Make use of the correct property name.
Fixes: a8e35c4beb ("arm64: dts: rockchip: add audio nodes to rk3566-roc-pc")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-4-c0db420d3639@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The 'mic-in-differential' DT property supported by the RK809/RK817 audio
codec driver is actually valid if prefixed with 'rockchip,':
DTC_CHK arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dtb
rk3568-rock-3a.dtb: pmic@20: codec: 'mic-in-differential' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml#
However, the board doesn't make use of differential signaling, hence
drop the incorrect property and the now unnecessary 'codec' node.
Fixes: 22a442e658 ("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")
Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-3-c0db420d3639@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add rock5b overlays for PCIe endpoint mode support.
If using the rock5b as an endpoint against a normal PC, only the
rk3588-rock-5b-pcie-ep.dtbo needs to be applied.
If using two rock5b:s, with one board as EP and the other board as RC,
rk3588-rock-5b-pcie-ep.dtbo and rk3588-rock-5b-pcie-srns.dtbo has to
be applied to the respective boards.
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Link: https://lore.kernel.org/r/20240607-rockchip-pcie-ep-v1-v5-13-0a042d6b0049@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a device tree node representing PCIe endpoint mode.
The controller can either be configured to run in Root Complex or Endpoint
mode.
If a user wants to run the controller in endpoint mode, the user has to
disable the pcie3x4 node and enable the pcie3x4_ep node.
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240607-rockchip-pcie-ep-v1-v5-12-0a042d6b0049@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
HDMI Tx needs the system clock set on the xtal rate.
This clock is managed by the main clock controller of the related SoCs.
Currently 2 part of the display drivers race to setup the HDMI system
clock by directly poking the controller register. The clock API should
be used to setup the rate instead.
Use assigned-clock to setup the HDMI system clock.
Fixes: 6939db7e0d ("ARM64: dts: meson-gx: Add support for HDMI output")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20240626152733.1350376-3-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
The clocks provided to HDMI tx are not consistent between gx and g12:
* gx receives the peripheral clock as 'isfr' while g12 receives it as
'iahb'
* g12 gets the HDMI system clock as 'isfr' but gx does not even get it.
It surely needs that clock since the driver is directly poking around
the clock controller's registers for that clock.
Align gx SoCs with g12 and provide:
* the HDMI peripheral clock as 'iahb'
* the HDMI system clock as 'isfr'
Fixes: 6939db7e0d ("ARM64: dts: meson-gx: Add support for HDMI output")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20240626152733.1350376-2-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Rb3Gen2 has a lt9611uxc DSI-to-HDMI bridge on i2c0, with
reset gpio from pm7250b gpio2 and irq gpio from tlmm gpio24.
Bridge supplies are Vdd connected to input supply directly
and vcc to L11c. Enable HDMI output, bridge and corresponding
DSI output.
Signed-off-by: Venkata Prahlad Valluru <quic_vvalluru@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240528141954.7567-1-quic_vvalluru@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Cross-merge networking fixes after downstream PR.
No conflicts.
Adjacent changes:
e3f02f32a0 ("ionic: fix kernel panic due to multi-buffer handling")
d9c0420999 ("ionic: Mark error paths in the data path as unlikely")
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Addition of dedicated FPGA syscon compatible for Juno platforms. Also
enablement of GPU device node now that the panfrost driver is already
enabled as a module in defconfig.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmZz7qcACgkQAEG6vDF+
4piYSA/+OvKsSMJAo7M0QKX7xfFtZloisVdfsVU3ZruPChrhzk3/k9gDhgk2ov4m
KCZprXYyF1MF2LAZ1fvMmkEZA0h4t0njuGoMbHyzm5w7ycxX5SAeeL4NO58hmz+s
Rl51Gl64HP6urXbFrsHxwkpl07pacmdecejJ2RNDtBCjq8qW9u3m58aC8xroKrQe
lmhCZRcTXDjE85su2PE40E5BLqQb+Ns4RhdtLbkoLYAzz+OYrLchd+twZtk236f1
4e7iNkiXWeDWbqL5TuzNG3+6jH+6o2QI/qbNV8HkaprGqoqH7g/c5dsJjNRg/dA2
KpHvFRWt4KOiFOgavTzLkP8MHmVBgxc1qay8rsy/HlRC1iiQM16B24XJ0fYrRcOH
o8Ly8uw/udTi9MLGLoESvoqHyzMvi07uYnb/qIFZKAakKWZINoqxaf76Q90CMcj1
5tTBiTbQyWldKNZVcNeRdqZwkAEYfTjijUucpy4hKvSedemOwAt66fTcU+vPZ1lw
Yz/ORJtyerg+IxDTulNv4QjY6yEX1WKkktseGOOfpeoUwBos92M561v8X9jmubYK
KjU3xO0LjSRLcxhLUtxkZqZgR5UpzvcgKzRvEF0g05cjttJXwBY+UrS4ZURdpSwZ
eDHKDykWVOVX+4LIWYoxy5GgZRlFNQe8GEg8sd7VhgUdTVp0KkE=
=trlg
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ9eQQACgkQYKtH/8kJ
UicGig//TjADx5oCnrfGawk/Xg8cF4ddJN9gK8BvUVzW3PkTeB64zdtMsvRxq1IO
dIjFXJzUsquG373UpXBAx+lJ54w3zMX/Hq/D61+6g8uDrVFmTNqGqD/EWtYy9wv1
7aDrNCAOKUHN/Ub+nAAZGfFmPaziLk1dKF6dgVpjQ1ibM+cFWUK7p6p5AM90LS2o
7Je6F0gmT++50fHWhdixsuWJg/ypU5sB/pzVvp8lfQUB4FipRpcWfIN99nkZ5774
YxJmzXqLhWuufBIxgwbHzoUP4prYGM7Zh0Su8xKu4Anjaztwer8+pVtOlV+8KH/o
mTa4Y8IOludFSe3k8FIBZe7HXM3oLMNHSWaIQgKStomW2ploK95QyZnNwfTFTruq
RWHklQxvGBgEOSVTpbjlNJWxDl4mMlKMvf6YZ1SHz9E1qqmAyXjG/b6sCqW37nq9
lmOWY5IT4yBDeQgQk0HeNpR861ae1e1R0HELA832s+Zn4TCHLaWcbZcqsv5pbV9x
laivZv/8ypx/2t4s591bo1ec63eMTYdsysOETr92SQVN+e5/pfQvGovoSxoyE/x7
hhEjt4JR8OuezYCD9uwpkQ5hWSTZlMX//IlZgR16A5AmcjMTyoZ6v/8X/J2ctmP3
0uc/KOCgLcpaX2sy+fOs9QaGrk4idq0xOd7NZlDhWu9q7mNIXjY=
=lU78
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Arm Juno updates for v6.11
Addition of dedicated FPGA syscon compatible for Juno platforms. Also
enablement of GPU device node now that the panfrost driver is already
enabled as a module in defconfig.
* tag 'juno-updates-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Enable GPU
arm64: dts: juno: add dedicated FPGA syscon compatible
dt-bindings: arm: arm,juno-fpga-apb-regs: document FPGA syscon
Link: https://lore.kernel.org/r/20240620093924.375244-2-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>