Commit Graph

3687 Commits

Author SHA1 Message Date
Ben Skeggs
7ff51f8200 drm/nouveau/fb/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
0cbe26f0a5 drm/nouveau/imem/gp100: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
c7b511ba70 drm/nouveau/devinit/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
339e32c0ec drm/nouveau/bios/rammap: 32-bit bios pointers
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
32341039e0 drm/nouveau/bios/pll: initial support for BIT 'C' version 2
Just enough to get at the PLL table.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
79bf9552e4 drm/nouveau/bios/dp: initial support for 4.2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
7481d0553a drm/nouveau/bios/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
4eeb039b3b drm/nouveau/tmr/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
45aa4d0774 drm/nouveau/pci/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
be61c54cbe drm/nouveau/mc/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
51012a39ec drm/nouveau/top/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
7f53abdb95 drm/nouveau/core: recognise GP100 chipset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
cb7b5ea9be drm/nouveau/core: increase maximum nvenc instances to 3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
34bf50cd20 drm/nouveau/core: increase maximum ce instances to 6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
c73baa831f drm/nouveau/fb/gf100-: allow selection of an alternate big page size
GFxxx/GM1xx support the selection of 64/128KiB big pages globally.

GM2xx supports the same, as well as another mode where the page size
can be selected per-instance.

We default to 128KiB pages (With per-instance for GM200, but the current
code selects 128KiB there already) as the MMU code isn't currently able
to handle otherwise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
2100292c95 drm/nouveau: prevent oops if no mmu subdev present
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
2a4bd8ac2f drm/nouveau/disp/g94: implement workaround for dvi issue on fx380
Fixes the second DVI output on Quadro FX380.

Thanks to NVIDIA for providing the details on the full workaround.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
2f96e8e3e0 drm/nouveau/bios: pointers beyond end of first image need special handling
Makes common the code that was previously used by the PMU table parsing,
as it appears other tables need this too.

Not much of an idea what this is all about...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
4d4e9907ff drm/nouveau/bios: guard against out-of-bounds accesses to image
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
1fe8c02fbc drm/nouveau/fifo/gk104-: translate engidx into human-readable name in debug output
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
9a2b8131c3 drm/nouveau/disp/nv50-: fix lookup of udisp table under certain circumstances
Some VBIOS have separate tables for each link of a given output path,
which means we have to specify the specific link we're using instead
of all possible links.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
86b40432bd drm/nouveau/ltc/gm107-: decode interrupt status to human-readable strings
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Julia Lawall
b1687b3e3b drm/nouveau/gr/gk20a: delete unneeded second newline
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Roy Spliet
f8fa2e4b37 drm/nouveau/clk/gf100: Read secondary bypass postdiv when required
v2: fix typo it's -> its

Signed-off-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Roy Spliet
0f7fbb990c drm/nouveau/clk/gf100-: Clean up PLL locking test
Corresponds with GT215. Don't rely on the lock test logic being
unconditionally enabled, and disable test logic when done (presumably
to save power).

v2: Remove warning, nvkm_msec already warns on time-out

Signed-off-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
20560a9a3c drm/nouveau/secboot: lazy-load firmware and be more resilient
Defer the loading of firmware files to the chip-specific part of secure
boot. This allows implementations to retry loading firmware if the first
attempt failed ; for the GM200 implementation, this happens when trying
to reset a falcon, typically in reaction to GR init.

Firmware loading may fail for a variety of reasons, such as the
filesystem where they reside not being ready at init time. This new
behavior allows GR to be initialized the next time we try to use it if
the firmware has become available.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
4f3c15569e drm/nouveau/secboot/gm200: make firmware loading re-callable
Make it possible to call gm20x_secboot_prepare_blobs() several times
after either success or failure without re-building already existing
blobs. The function will now try to load firmware files that have
previously failed before returning success.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
7fcab83901 drm/nouveau/gr/gf100: handle secure boot errors
Handle and propagate secure boot errors. Failure to do so results in
Nouveau incorrectly believing init has succeeded and a completely
black display during boot. If we propagate the error, GR init will fail
and the user will at least have a working display.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
e5da20a88e drm/nouveau/secboot: fix kerneldoc for secure boot structures
Some members were documented in the wrong structure.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Karol Herbst
b66ad32d6d drm/nouveau/hwmon: add in_min and in_max
it is a little help for hardware monitoring tools

Signed-off-by: Karol Herbst <karolherbst@gmail.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Karol Herbst
437bb44d38 drm/nouveau/volt: save the voltage range we are able to set
We shouldn't set voltages below the min or above the max voltage the gpu is
able to set, so save the range for future lookups.

Signed-off-by: Karol Herbst <karolherbst@gmail.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
22b6c9e8fe drm/nouveau/clk/gm20b: add glitchless and DFS support
This patch adds support for advanced features supported by the
Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be
updated without disabling the PLL first if the SYNC_MODE bit of the CFG
register is set.

More significantly, DFS allows the PLL to monitor the actual input
voltage and to dynamically lower the output frequency accordingly. This
allows the clock to be more tolerant of lower voltages.

These improvements are only supported for Tegra speedos >= 1.

Also add the voltage table that is suitable for GM20B's NAPLL. This
change needs to be done atomically for the right voltages to be used by
the clock driver.

v2. Fix build on non-Tegra platforms

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
3786c41518 drm/nouveau/clk/gk20a: rename constructor
Strip the _ prefix off the gk20a clock constructor.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
6ed7e74219 drm/nouveau/clk/gk20a: improve MNP programming
Split the MNP programming function into two functions for the cases
where we allow sliding or not, instead of making it take a parameter for
this. This results in less conditionals in the code and makes it easier
to read.

Also make the MNP programming functions take the PLL parameters as
arguments, and move bits of code to more relevant places (previous
programming tended to be just-in-time, which added more conditionnals in
the code).

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
afea21c917 drm/nouveau/clk/gk20a: factorize n_lo computation code
Use a dedicated function instead of always calculating n_lo on the fly.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
89d3a912fc drm/nouveau/clk/gk20a: parameterize PLL settings
Make functions manipulating PLL settings take them as an argument,
instead of assuming we want to work on the copy in the gk20a_clk
structure. This makes these functions more flexible, which we will need
in GM20B.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
a9608c9ba9 drm/nouveau/clk/gk20a: add and use MNP programming functions
Add relevant functions to work with the gk20a_pll structure and use them
where they ought to be instead of directly manipulating registers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
9102240c69 drm/nouveau/clk/gk20a: use nvkm_ functions in slide()
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
d7ca1106d6 drm/nouveau/clk/gk20a: reorganize MNP calculation a bit
Move variables declarations to their actual scope of use, and simplify
code a bit.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
f5f1b06eea drm/nouveau/clk/gk20a: setup slide once during init
Slide setup needs to be performed only once, during init. Also
use the proper parameters for different clock speeds.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
9772605ce8 drm/nouveau/clk/gk20a: properly protect macro argument
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
791eeea2dc drm/nouveau/volt/gm20b: add support for vmin parameter
Chips may be characterized for a minimum voltage. Support this extra
parameter and select the appropriate minimum voltage for the detected
GPU speedo.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
ebe5e526c1 drm/nouveau/volt/gk20a: rename constructor
Strip the _ prefix off the gk20a volt constructor.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
ff318a51bf drm/nouveau/volt/gk20a: constify and name v_scale
Give a name to this constant so we at least get an idea of what it is
for.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
328bee464b drm/nouveau/volt/gk20a: make unused public functions static
Nobody else is using these, so make them private.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Alexandre Courbot
d2680907c2 drm/nouveau/tegra: fetch gpu_speedo_id
The GPU speedo ID is required to select the right clk/volt parameters on
GM20B.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
5dfc5dbf65 drm/nouveau/secboot: use nvkm_mc_enable/disable()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
2b80bb74fb drm/nouveau/secboot: use nvkm_mc_intr_mask/unmask()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
8a90b6fe8c drm/nouveau/mc/gk104-: add pmu reset mask
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
9b02baf19f drm/nouveau/mc/gf100-: support for masking interrupts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00