Merge arm64 support for proper 'unsafe' user accessor functionality,
with 'asm goto' for handling exceptions.
The arm64 user access code used the slow fallback code for the user
access code, which generates horrendous code for things like
strncpy_from_user(), because it causes us to generate code for SW PAN
and for range checking for every individual word.
Teach arm64 about 'user_access_begin()' and the so-called 'unsafe' user
access functions that take an error label and use 'asm goto' to make all
the exception handling be entirely out of line.
[ These user access functions are called 'unsafe' not because the
concept is unsafe, but because the low-level accessor functions
absolutely have to be protected by the 'user_access_begin()' code,
because that's what does the range checking.
So the accessor functions have that scary name to make sure people
don't think they are usable on their own, and cannot be mis-used the
way our old "double underscore" versions of __get_user() and friends
were ]
The "(early part)" of the branch is because the full branch also
improved on the "access_ok()" function, but the exact semantics of TBI
(top byte ignore) have to be discussed before doing that part. So this
just does the low-level accessor update to use "asm goto".
* 'arm64-uaccess' (early part):
arm64: start using 'asm goto' for put_user()
arm64: start using 'asm goto' for get_user() when available
While Documentation/kbuild/kconfig-language.rst provides a brief
explanation, there are recurring confusions regarding the usage of a
prompt followed by 'if <expr>'. This conditional controls _only_ the
prompt.
A typical usage is as follows:
menuconfig BLOCK
bool "Enable the block layer" if EXPERT
default y
When EXPERT=n, the prompt is hidden, but this config entry is still
active, and BLOCK is set to its default value 'y'. This is reasonable
because you are likely want to enable the block device support. When
EXPERT=y, the prompt is shown, allowing you to toggle BLOCK.
Please note that it is different from 'depends on EXPERT', which would
enable and disable the entire config entry.
However, this conditional prompt has never worked in a choice block.
The following two work in the same way: when EXPERT is disabled, the
choice block is entirely disabled.
[Test Code 1]
choice
prompt "choose" if EXPERT
config A
bool "A"
config B
bool "B"
endchoice
[Test Code 2]
choice
prompt "choose"
depends on EXPERT
config A
bool "A"
config B
bool "B"
endchoice
I believe the first case should hide only the prompt, producing the
default:
CONFIG_A=y
# CONFIG_B is not set
The next commit will change (fix) the behavior of the conditional prompt
in choice blocks.
I see several choice blocks wrongly using a conditional prompt, where
'depends on' makes more sense.
To preserve the current behavior, this commit converts such misuses.
I did not touch the following entry in arch/x86/Kconfig:
choice
prompt "Memory split" if EXPERT
default VMSPLIT_3G
This is truly the correct use of the conditional prompt; when EXPERT=n,
this choice block should silently select the reasonable VMSPLIT_3G,
although the resulting PAGE_OFFSET will not be affected anyway.
Presumably, the one in fs/jffs2/Kconfig is also correct, but I converted
it to 'depends on' to avoid any potential behavioral change.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Merge minor word-at-a-time instruction choice improvements for x86 and
arm64.
This is the second of four branches that came out of me looking at the
code generation for path lookup on arm64.
The word-at-a-time infrastructure is used to do string operations in
chunks of one word both when copying the pathname from user space (in
strncpy_from_user()), and when parsing and hashing the individual path
components (in link_path_walk()).
In particular, the "find the first zero byte" uses various bit tricks to
figure out the end of the string or path component, and get the length
without having to do things one byte at a time. Both x86-64 and arm64
had less than optimal code choices for that.
The commit message for the arm64 change in particular tries to explain
the exact code flow for the zero byte finding for people who care. It's
made a bit more complicated by the fact that we support big-endian
hardware too, and so we have some extra abstraction layers to allow
different models for finding the zero byte, quite apart from the issue
of picking specialized instructions.
* word-at-a-time:
arm64: word-at-a-time: improve byte count calculations for LE
x86-64: word-at-a-time: improve byte count calculations
Merge runtime constants infrastructure with implementations for x86 and
arm64.
This is one of four branches that came out of me looking at profiles of
my kernel build filesystem load on my 128-core Altra arm64 system, where
pathname walking and the user copies (particularly strncpy_from_user()
for fetching the pathname from user space) is very hot.
This is a very specialized "instruction alternatives" model where the
dentry hash pointer and hash count will be constants for the lifetime of
the kernel, but the allocation are not static but done early during the
kernel boot. In order to avoid the pointer load and dynamic shift, we
just rewrite the constants in the instructions in place.
We can't use the "generic" alternative instructions infrastructure,
because different architectures do it very differently, and it's
actually simpler to just have very specific helpers, with a fallback to
the generic ("old") model of just using variables for architectures that
do not implement the runtime constant patching infrastructure.
Link: https://lore.kernel.org/all/CAHk-=widPe38fUNjUOmX11ByDckaeEo9tN4Eiyke9u1SAtu9sA@mail.gmail.com/
* runtime-constants:
arm64: add 'runtime constant' support
runtime constants: add x86 architecture support
runtime constants: add default dummy infrastructure
vfs: dcache: move hashlen_hash() from callers into d_hash()
* kvm-arm64/nv-tcr2:
: Fixes to the handling of TCR_EL1, courtesy of Marc Zyngier
:
: Series addresses a couple gaps that are present in KVM (from cover
: letter):
:
: - VM configuration: HCRX_EL2.TCR2En is forced to 1, and we blindly
: save/restore stuff.
:
: - trap bit description and routing: none, obviously, since we make a
: point in not trapping.
KVM: arm64: Honor trap routing for TCR2_EL1
KVM: arm64: Make PIR{,E0}_EL1 save/restore conditional on FEAT_TCRX
KVM: arm64: Make TCR2_EL1 save/restore dependent on the VM features
KVM: arm64: Get rid of HCRX_GUEST_FLAGS
KVM: arm64: Correctly honor the presence of FEAT_TCRX
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
* kvm-arm64/nv-sve:
: CPTR_EL2, FPSIMD/SVE support for nested
:
: This series brings support for honoring the guest hypervisor's CPTR_EL2
: trap configuration when running a nested guest, along with support for
: FPSIMD/SVE usage at L1 and L2.
KVM: arm64: Allow the use of SVE+NV
KVM: arm64: nv: Add additional trap setup for CPTR_EL2
KVM: arm64: nv: Add trap description for CPTR_EL2
KVM: arm64: nv: Add TCPAC/TTA to CPTR->CPACR conversion helper
KVM: arm64: nv: Honor guest hypervisor's FP/SVE traps in CPTR_EL2
KVM: arm64: nv: Load guest FP state for ZCR_EL2 trap
KVM: arm64: nv: Handle CPACR_EL1 traps
KVM: arm64: Spin off helper for programming CPTR traps
KVM: arm64: nv: Ensure correct VL is loaded before saving SVE state
KVM: arm64: nv: Use guest hypervisor's max VL when running nested guest
KVM: arm64: nv: Save guest's ZCR_EL2 when in hyp context
KVM: arm64: nv: Load guest hyp's ZCR into EL1 state
KVM: arm64: nv: Handle ZCR_EL2 traps
KVM: arm64: nv: Forward SVE traps to guest hypervisor
KVM: arm64: nv: Forward FP/ASIMD traps to guest hypervisor
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
* kvm-arm64/el2-kcfi:
: kCFI support in the EL2 hypervisor, courtesy of Pierre-Clément Tosi
:
: Enable the usage fo CONFIG_CFI_CLANG (kCFI) for hardening indirect
: branches in the EL2 hypervisor. Unlike kernel support for the feature,
: CFI failures at EL2 are always fatal.
KVM: arm64: nVHE: Support CONFIG_CFI_CLANG at EL2
KVM: arm64: Introduce print_nvhe_hyp_panic helper
arm64: Introduce esr_brk_comment, esr_is_cfi_brk
KVM: arm64: VHE: Mark __hyp_call_panic __noreturn
KVM: arm64: nVHE: gen-hyprel: Skip R_AARCH64_ABS32
KVM: arm64: nVHE: Simplify invalid_host_el2_vect
KVM: arm64: Fix __pkvm_init_switch_pgd call ABI
KVM: arm64: Fix clobbered ELR in sync abort/SError
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
* kvm-arm64/ctr-el0:
: Support for user changes to CTR_EL0, courtesy of Sebastian Ott
:
: Allow userspace to change the guest-visible value of CTR_EL0 for a VM,
: so long as the requested value represents a subset of features supported
: by hardware. In other words, prevent the VMM from over-promising the
: capabilities of hardware.
:
: Make this happen by fitting CTR_EL0 into the existing infrastructure for
: feature ID registers.
KVM: selftests: Assert that MPIDR_EL1 is unchanged across vCPU reset
KVM: arm64: nv: Unfudge ID_AA64PFR0_EL1 masking
KVM: selftests: arm64: Test writes to CTR_EL0
KVM: arm64: rename functions for invariant sys regs
KVM: arm64: show writable masks for feature registers
KVM: arm64: Treat CTR_EL0 as a VM feature ID register
KVM: arm64: unify code to prepare traps
KVM: arm64: nv: Use accessors for modifying ID registers
KVM: arm64: Add helper for writing ID regs
KVM: arm64: Use read-only helper for reading VM ID registers
KVM: arm64: Make idregs debugfs iterator search sysreg table directly
KVM: arm64: Get sys_reg encoding from descriptor in idregs_debug_show()
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
* kvm-arm64/shadow-mmu:
: Shadow stage-2 MMU support for NV, courtesy of Marc Zyngier
:
: Initial implementation of shadow stage-2 page tables to support a guest
: hypervisor. In the author's words:
:
: So here's the 10000m (approximately 30000ft for those of you stuck
: with the wrong units) view of what this is doing:
:
: - for each {VMID,VTTBR,VTCR} tuple the guest uses, we use a
: separate shadow s2_mmu context. This context has its own "real"
: VMID and a set of page tables that are the combination of the
: guest's S2 and the host S2, built dynamically one fault at a time.
:
: - these shadow S2 contexts are ephemeral, and behave exactly as
: TLBs. For all intent and purposes, they *are* TLBs, and we discard
: them pretty often.
:
: - TLB invalidation takes three possible paths:
:
: * either this is an EL2 S1 invalidation, and we directly emulate
: it as early as possible
:
: * or this is an EL1 S1 invalidation, and we need to apply it to
: the shadow S2s (plural!) that match the VMID set by the L1 guest
:
: * or finally, this is affecting S2, and we need to teardown the
: corresponding part of the shadow S2s, which invalidates the TLBs
KVM: arm64: nv: Truely enable nXS TLBI operations
KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations
KVM: arm64: nv: Add handling of range-based TLBI operations
KVM: arm64: nv: Add handling of outer-shareable TLBI operations
KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information
KVM: arm64: nv: Tag shadow S2 entries with guest's leaf S2 level
KVM: arm64: nv: Handle FEAT_TTL hinted TLB operations
KVM: arm64: nv: Handle TLBI IPAS2E1{,IS} operations
KVM: arm64: nv: Handle TLBI ALLE1{,IS} operations
KVM: arm64: nv: Handle TLBI VMALLS12E1{,IS} operations
KVM: arm64: nv: Handle TLB invalidation targeting L2 stage-1
KVM: arm64: nv: Handle EL2 Stage-1 TLB invalidation
KVM: arm64: nv: Add Stage-1 EL2 invalidation primitives
KVM: arm64: nv: Unmap/flush shadow stage 2 page tables
KVM: arm64: nv: Handle shadow stage 2 page faults
KVM: arm64: nv: Implement nested Stage-2 page table walk logic
KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
* kvm-arm64/ffa-1p1:
: Improvements to the pKVM FF-A Proxy, courtesy of Sebastian Ene
:
: Various minor improvements to how host FF-A calls are proxied with the
: TEE, along with support for v1.1 of the protocol.
KVM: arm64: Use FF-A 1.1 with pKVM
KVM: arm64: Update the identification range for the FF-A smcs
KVM: arm64: Add support for FFA_PARTITION_INFO_GET
KVM: arm64: Trap FFA_VERSION host call in pKVM
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTFp0I1jqZrAX+hPRXbK58LschIgwUCZpGVmAAKCRDbK58LschI
gxB4AQCgquQis63yqTI36j4iXBT+TuxHEBNoQBSLyzYdrLS1dgD/S5DRJDA+3LD+
394hn/VtB1qvX5vaqjsov4UIwSMyxA0=
=OhSn
-----END PGP SIGNATURE-----
Merge tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
Daniel Borkmann says:
====================
pull-request: bpf-next 2024-07-12
We've added 23 non-merge commits during the last 3 day(s) which contain
a total of 18 files changed, 234 insertions(+), 243 deletions(-).
The main changes are:
1) Improve BPF verifier by utilizing overflow.h helpers to check
for overflows, from Shung-Hsi Yu.
2) Fix NULL pointer dereference in resolve_prog_type() for BPF_PROG_TYPE_EXT
when attr->attach_prog_fd was not specified, from Tengda Wu.
3) Fix arm64 BPF JIT when generating code for BPF trampolines with
BPF_TRAMP_F_CALL_ORIG which corrupted upper address bits,
from Puranjay Mohan.
4) Remove test_run callback from lwt_seg6local_prog_ops which never worked
in the first place and caused syzbot reports,
from Sebastian Andrzej Siewior.
5) Relax BPF verifier to accept non-zero offset on KF_TRUSTED_ARGS/
/KF_RCU-typed BPF kfuncs, from Matt Bobrowski.
6) Fix a long standing bug in libbpf with regards to handling of BPF
skeleton's forward and backward compatibility, from Andrii Nakryiko.
7) Annotate btf_{seq,snprintf}_show functions with __printf,
from Alan Maguire.
8) BPF selftest improvements to reuse common network helpers in sk_lookup
test and dropping the open-coded inetaddr_len() and make_socket() ones,
from Geliang Tang.
* tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next: (23 commits)
selftests/bpf: Test for null-pointer-deref bugfix in resolve_prog_type()
bpf: Fix null pointer dereference in resolve_prog_type() for BPF_PROG_TYPE_EXT
selftests/bpf: DENYLIST.aarch64: Skip fexit_sleep again
bpf: use check_sub_overflow() to check for subtraction overflows
bpf: use check_add_overflow() to check for addition overflows
bpf: fix overflow check in adjust_jmp_off()
bpf: Eliminate remaining "make W=1" warnings in kernel/bpf/btf.o
bpf: annotate BTF show functions with __printf
bpf, arm64: Fix trampoline for BPF_TRAMP_F_CALL_ORIG
selftests/bpf: Close obj in error path in xdp_adjust_tail
selftests/bpf: Null checks for links in bpf_tcp_ca
selftests/bpf: Use connect_fd_to_fd in sk_lookup
selftests/bpf: Use start_server_addr in sk_lookup
selftests/bpf: Use start_server_str in sk_lookup
selftests/bpf: Close fd in error path in drop_on_reuseport
selftests/bpf: Add ASSERT_OK_FD macro
selftests/bpf: Add backlog for network_helper_opts
selftests/bpf: fix compilation failure when CONFIG_NF_FLOW_TABLE=m
bpf: Remove tst_run from lwt_seg6local_prog_ops.
bpf: relax zero fixed offset constraint on KF_TRUSTED_ARGS/KF_RCU
...
====================
Link: https://patch.msgid.link/20240712212448.5378-1-daniel@iogearbox.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Cross-merge networking fixes after downstream PR.
Conflicts:
drivers/net/ethernet/broadcom/bnxt/bnxt.c
f7ce5eb2cb ("bnxt_en: Fix crash in bnxt_get_max_rss_ctx_ring()")
20c8ad72eb ("eth: bnxt: use the RSS context XArray instead of the local list")
Adjacent changes:
net/ethtool/ioctl.c
503757c809 ("net: ethtool: Fix RSS setting")
eac9122f0c ("net: ethtool: record custom RSS contexts in the XArray")
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
On powerpc 8xx huge_ptep_get() will need to know whether the given ptep is
a PTE entry or a PMD entry. This cannot be known with the PMD entry
itself because there is no easy way to know it from the content of the
entry.
So huge_ptep_get() will need to know either the size of the page or get
the pmd.
In order to be consistent with huge_ptep_get_and_clear(), give mm and
address to huge_ptep_get().
Link: https://lkml.kernel.org/r/cc00c70dd384298796a4e1b25d6c4eb306d3af85.1719928057.git.christophe.leroy@csgroup.eu
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Oscar Salvador <osalvador@suse.de>
Cc: Jason Gunthorpe <jgg@nvidia.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Peter Xu <peterx@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Subnodes were added to serdes0 in two different spots (due to independent
development of their consumer usage). Let's go ahead and combine those
into one reference for readability's sake.
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240710-k3-j784s4-evm-serdes0-cleanup-v1-2-03850fe33922@redhat.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Currently PCIe1 is setup to use SERDES0 lanes 0 thru 3, and USB0 is
setup to use SERDES0 lane 3 as well.
This overlap in lanes causes the following reset related lane splat:
[ 4.846266] WARNING: CPU: 4 PID: 308 at drivers/reset/core.c:792 __reset_control_get_internal+0x128/0x160
...
[ 4.846405] Call trace:
[ 4.846407] __reset_control_get_internal+0x128/0x160
[ 4.846413] __of_reset_control_get+0x4e0/0x528
[ 4.846418] of_reset_control_array_get+0xa4/0x1f8
[ 4.846423] cdns_torrent_phy_probe+0xbc8/0x1068 [phy_cadence_torrent]
[ 4.846445] platform_probe+0xb4/0xe8
...
[ 4.846577] cdns-torrent-phy 5060000.serdes: phy@0: failed to get reset
Let's limit the PCIe1 SERDES0 lanes to 0 and 1 to avoid overlap here.
This works since PCIe1 operates in x2 mode and doesn't need 4 SERDES0
lanes.
Fixes: 27ce26fe52 ("arm64: dts: ti: k3-j784s4-evm: Enable PCIe0 and PCIe1 in RC Mode")
Suggested-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240710-k3-j784s4-evm-serdes0-cleanup-v1-1-03850fe33922@redhat.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* for-next/vcpu-hotplug: (21 commits)
: arm64 support for virtual CPU hotplug (ACPI)
irqchip/gic-v3: Fix 'broken_rdists' unused warning when !SMP and !ACPI
arm64: Kconfig: Fix dependencies to enable ACPI_HOTPLUG_CPU
cpumask: Add enabled cpumask for present CPUs that can be brought online
arm64: document virtual CPU hotplug's expectations
arm64: Kconfig: Enable hotplug CPU on arm64 if ACPI_PROCESSOR is enabled.
arm64: arch_register_cpu() variant to check if an ACPI handle is now available.
arm64: psci: Ignore DENIED CPUs
irqchip/gic-v3: Add support for ACPI's disabled but 'online capable' CPUs
irqchip/gic-v3: Don't return errors from gic_acpi_match_gicc()
arm64: acpi: Harden get_cpu_for_acpi_id() against missing CPU entry
arm64: acpi: Move get_cpu_for_acpi_id() to a header
ACPI: Add post_eject to struct acpi_scan_handler for cpu hotplug
ACPI: scan: switch to flags for acpi_scan_check_and_detach()
ACPI: processor: Register deferred CPUs from acpi_processor_get_info()
ACPI: processor: Add acpi_get_processor_handle() helper
ACPI: processor: Move checks and availability of acpi_processor earlier
ACPI: processor: Fix memory leaks in error paths of processor_add()
ACPI: processor: Return an error if acpi_processor_get_info() fails in processor_add()
ACPI: processor: Drop duplicated check on _STA (enabled + present)
cpu: Do not warn on arch_register_cpu() returning -EPROBE_DEFER
...
When BPF_TRAMP_F_CALL_ORIG is set, the trampoline calls
__bpf_tramp_enter() and __bpf_tramp_exit() functions, passing them
the struct bpf_tramp_image *im pointer as an argument in R0.
The trampoline generation code uses emit_addr_mov_i64() to emit
instructions for moving the bpf_tramp_image address into R0, but
emit_addr_mov_i64() assumes the address to be in the vmalloc() space
and uses only 48 bits. Because bpf_tramp_image is allocated using
kzalloc(), its address can use more than 48-bits, in this case the
trampoline will pass an invalid address to __bpf_tramp_enter/exit()
causing a kernel crash.
Fix this by using emit_a64_mov_i64() in place of emit_addr_mov_i64()
as it can work with addresses that are greater than 48-bits.
Fixes: efc9909fdc ("bpf, arm64: Add bpf trampoline for arm64")
Signed-off-by: Puranjay Mohan <puranjay@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Closes: https://lore.kernel.org/all/SJ0PR15MB461564D3F7E7A763498CA6A8CBDB2@SJ0PR15MB4615.namprd15.prod.outlook.com/
Link: https://lore.kernel.org/bpf/20240711151838.43469-1-puranjay@kernel.org
The Allwinner H616 SoC contains a crypto engine very similar to the H6
version, but with all base addresses in the DMA descriptors shifted by
two bits. This requires a new compatible string.
Also the H616 CE relies on the internal osciallator for the TRNG
operation, so we need to reference this clock.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240624232110.9817-5-andre.przywara@arm.com
[wens@csie.org: fix up register range size]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The generated asm/unistd_compat_32.h header file now contains
macros that can be used directly in the vdso and the signal
trampolines, so remove the duplicate definitions.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Change the asm/unistd.h header for arm64 to no longer include
asm-generic/unistd.h itself, but instead generate both the asm/unistd.h
contents and the list of entry points using the syscall.tbl scripts that
we use on most other architectures.
Once his is done for the remaining architectures, the generic unistd.h
header can be removed and the generated tbl file put in its place.
The Makefile changes are more complex than they should be, I need
a little help to improve those. Ideally this should be done in an
architecture-independent way as well.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a straight conversion from the old asm/unistd32.h into the
format used by 32-bit arm and most other architectures, calling scripts
to generate the asm/unistd32.h header and a new asm/syscalls32.h headers.
I used a semi-automated text replacement method to do the conversion,
and then used 'vimdiff' to synchronize the whitespace and the (unused)
names of the non-compat syscalls with the arm version.
There are two differences between the generated syscalls names and the
old version:
- the old asm/unistd32.h contained only a __NR_sync_file_range2
entry, while the arm32 version also defines
__NR_arm_sync_file_range with the same number. I added this
duplicate back in asm/unistd32.h.
- __NR__sysctl was removed from the arm64 file a while ago, but
all the tables still contain it. This should probably get removed
everywhere but I added it here for consistency.
On top of that, the arm64 version does not contain any references to
the 32-bit OABI syscalls that are not supported by arm64. If we ever
want to share the file between arm32 and arm64, it would not be
hard to add support for both in one file.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When clone3() was introduced, it was not obvious how each architecture
deals with setting up the stack and keeping the register contents in
a fork()-like system call, so this was left for the architecture
maintainers to implement, with __ARCH_WANT_SYS_CLONE3 defined by those
that already implement it.
Five years later, we still have a few architectures left that are missing
clone3(), and the macro keeps getting in the way as it's fundamentally
different from all the other __ARCH_WANT_SYS_* macros that are meant
to provide backwards-compatibility with applications using older
syscalls that are no longer provided by default.
Address this by reversing the polarity of the macro, adding an
__ARCH_BROKEN_SYS_CLONE3 macro to all architectures that don't
already provide the syscall, and remove __ARCH_WANT_SYS_CLONE3
from all the other ones.
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces support for Lenovo Thinkpad Yoga slim 7x, LG Leon LTE,
and LG K10 (K420n).
In addition to this, all Gen-1 platforms gets the DWC3 quirk to disable
"SuperSpeed in park mode", which resolves an instabliity issue seen in
host mode.
For Fairphone 4, PM6150L and PMK8003 thermal sensors are added and
thermal zones defined.
Two fastrpc contexts on SM6350 are marked as non-secure, to allow
non-secure usage.
The video clock controller on SM8150 is introduced. IPQ9574 GCC is
marked as a interconnect provider. The vibrator block in the PM6150 is
described.
On SC7280 the download mode register is defined for SCM, allowing it to
enable/disable the ramdump support during a system crash.
Lastly, add a mailmap entry for Luca Weiss.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaNjqMVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FdNwP/jMB1vTGZcaYwVGVEYIkUeuuflSr
xdrUShN0EzNlB7XPo2yRZakAY4ndINQssC89Z4WYvMMytf+2qWQgGNrAbWme/Nmo
/0r7Mqly2ueSN+fCG2s80HQRuuwjhM7KJ1WZ1PN46FNYOqis1eTchzv7Mi9biDgY
4HaVqqwNd6T6VZgIJJqV059XpmFw1RSKJdBjVD1ggn/7MMk2ueeY66iIJqSQC9KF
zjqo5pXfwlpHJWUMATNEzfUQwqJ2vD/uR36I7qUVNq7WLZKeWjhp8pYERw1jLt76
93wwMlTXV3vX0yin0ZviQyv+YcxNmTF6V99TZiEs8kSsQ47HgwpTVvdq5dGuKVIg
lfe+pfrltIoJn11wmz5hFFcRRvsLzDFOs5dY8kis3i+7nTzRE57gdM5YL4H+Z1VU
VA0Z0NImSC+l6PwOZ+QW5v78xRrdDZplj0MpKNvcNERnTXipTcp65oqZY3E+GAro
LrYAlLI3oAlNAKYSDk3YBRDami3WrjGy8BZwxKE/VXb0ZcEPCQKMt/17njwLBrqj
rslU5tlyeuSxebg08mSIML6N1xOOndO6Ny0FDmqsNf1MiMxPQ+0Cw22P71bnb+8W
VPhLmmq1YOAWPH6WKq1Ng4wId7J9GcwMOkvZZsFuwNx35RNLHhKH1Or961K0+vdI
/qKRNZjWFV6h7yBC
=Qc/t
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaNqgkACgkQYKtH/8kJ
UicSKxAAkXAizZjc3PBOQMPH6AwkawwRR7hZDSS5lPLk42cjC5OiWP26q+guulJj
SH6CYr9xftVshW9oSTlvEiI+pOp7lygaBNU76BPWmj9/cbS1pJPVBFz3BVdgCCZF
7Zxy7J1d01yIOtDTc+gpAsozWwRLN+frGgg5SJYPKt6sgnTtk4VaulW1rpvHXDJv
xdkSlcc34AidKODZ1rCCXrCM5Pi/lxRw8rmj4foSSEW+BZtaCSFT8SbsQ0F3XezS
xeIan3vN7uZydazKhefIrQlJfNiZ3gvYFsYYS//lCcGY7fim3pVwfHPnEq0MkPI3
b7YiqpGaLxUKg5pjqobo6ChvTISggbdS38gP/814IzusKIYE6xO4Ff5rEtBNtUMV
uzS1ZLok82EOYFtL9DBz3BHdAHOGqKoU5+qW823Th+XTfKJNLxkPRZhM+JB6ChPl
wJZDXc1YQdMrhjaP4MCZJL09b/pCfKh0ue8XJo9H7/7FtqSp6ACjvif47Rd36Yri
wFBl/EB2qouY6hhsWASE4Ag+P5+DgtBnpybFv88O9dVx7STb5xXNzO45i+9BEDES
HsAj+xHsNcMOW+YHhgHHZySYTYpFhvaO8AU4R6ZYgDi6Jg2VidBpvofgdzXslsKb
e+kDNOEy4I20ci/it05lJjX2D2oxlT37ooC1aZskuUCa0vCiYzs=
=naka
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
A few more Arm64 DeviceTree updates for v6.11
This introduces support for Lenovo Thinkpad Yoga slim 7x, LG Leon LTE,
and LG K10 (K420n).
In addition to this, all Gen-1 platforms gets the DWC3 quirk to disable
"SuperSpeed in park mode", which resolves an instabliity issue seen in
host mode.
For Fairphone 4, PM6150L and PMK8003 thermal sensors are added and
thermal zones defined.
Two fastrpc contexts on SM6350 are marked as non-secure, to allow
non-secure usage.
The video clock controller on SM8150 is introduced. IPQ9574 GCC is
marked as a interconnect provider. The vibrator block in the PM6150 is
described.
On SC7280 the download mode register is defined for SCM, allowing it to
enable/disable the ramdump support during a system crash.
Lastly, add a mailmap entry for Luca Weiss.
* tag 'qcom-arm64-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (22 commits)
mailmap: Update Luca Weiss's email address
arm64: dts: qcom: msm8916-lg-c50: add initial dts for LG Leon LTE
arm64: dts: qcom: msm8916-lg-m216: Add initial device tree
dt-bindings: arm: qcom: Add msm8916 based LG devices
arm64: dts: qcom: ipq9574: Add icc provider ability to gcc
dt-bindings: interconnect: Add Qualcomm IPQ9574 support
arm64: dts: qcom: sm8150: Add video clock controller node
arm64: dts: qcom: pm6150: Add vibrator
arm64: dts: qcom: sc7280: Enable download mode register write
arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals
arm64: dts: qcom: sm7225-fairphone-fp4: Add PMK8003 thermals
arm64: dts: qcom: sm6350: Add missing qcom,non-secure-domain property
arm64: dts: qcom: sdm845: Disable SS instance in Parkmode for USB
arm64: dts: qcom: msm8996: Disable SS instance in Parkmode for USB
arm64: dts: qcom: sm6350: Disable SS instance in Parkmode for USB
arm64: dts: qcom: sm6115: Disable SS instance in Parkmode for USB
arm64: dts: qcom: sdm630: Disable SS instance in Parkmode for USB
arm64: dts: qcom: msm8998: Disable SS instance in Parkmode for USB
arm64: dts: qcom: ipq8074: Disable SS instance in Parkmode for USB
arm64: dts: qcom: ipq6018: Disable SS instance in Parkmode for USB
...
Link: https://lore.kernel.org/r/20240709193406.3966-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTFp0I1jqZrAX+hPRXbK58LschIgwUCZoxN0AAKCRDbK58LschI
g0c5AQDa3ZV9gfbN42y1zSDoM1uOgO60fb+ydxyOYh8l3+OiQQD/fLfpTY3gBFSY
9yi/pZhw/QdNzQskHNIBrHFGtJbMxgs=
=p1Zz
-----END PGP SIGNATURE-----
Merge tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
Daniel Borkmann says:
====================
pull-request: bpf-next 2024-07-08
The following pull-request contains BPF updates for your *net-next* tree.
We've added 102 non-merge commits during the last 28 day(s) which contain
a total of 127 files changed, 4606 insertions(+), 980 deletions(-).
The main changes are:
1) Support resilient split BTF which cuts down on duplication and makes BTF
as compact as possible wrt BTF from modules, from Alan Maguire & Eduard Zingerman.
2) Add support for dumping kfunc prototypes from BTF which enables both detecting
as well as dumping compilable prototypes for kfuncs, from Daniel Xu.
3) Batch of s390x BPF JIT improvements to add support for BPF arena and to implement
support for BPF exceptions, from Ilya Leoshkevich.
4) Batch of riscv64 BPF JIT improvements in particular to add 12-argument support
for BPF trampolines and to utilize bpf_prog_pack for the latter, from Pu Lehui.
5) Extend BPF test infrastructure to add a CHECKSUM_COMPLETE validation option
for skbs and add coverage along with it, from Vadim Fedorenko.
6) Inline bpf_get_current_task/_btf() helpers in the arm64 BPF JIT which gives
a small 1% performance improvement in micro-benchmarks, from Puranjay Mohan.
7) Extend the BPF verifier to track the delta between linked registers in order
to better deal with recent LLVM code optimizations, from Alexei Starovoitov.
8) Fix bpf_wq_set_callback_impl() kfunc signature where the third argument should
have been a pointer to the map value, from Benjamin Tissoires.
9) Extend BPF selftests to add regular expression support for test output matching
and adjust some of the selftest when compiled under gcc, from Cupertino Miranda.
10) Simplify task_file_seq_get_next() and remove an unnecessary loop which always
iterates exactly once anyway, from Dan Carpenter.
11) Add the capability to offload the netfilter flowtable in XDP layer through
kfuncs, from Florian Westphal & Lorenzo Bianconi.
12) Various cleanups in networking helpers in BPF selftests to shave off a few
lines of open-coded functions on client/server handling, from Geliang Tang.
13) Properly propagate prog->aux->tail_call_reachable out of BPF verifier, so
that x86 JIT does not need to implement detection, from Leon Hwang.
14) Fix BPF verifier to add a missing check_func_arg_reg_off() to prevent an
out-of-bounds memory access for dynpointers, from Matt Bobrowski.
15) Fix bpf_session_cookie() kfunc to return __u64 instead of long pointer as
it might lead to problems on 32-bit archs, from Jiri Olsa.
16) Enhance traffic validation and dynamic batch size support in xsk selftests,
from Tushar Vyavahare.
bpf-next-for-netdev
* tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next: (102 commits)
selftests/bpf: DENYLIST.aarch64: Remove fexit_sleep
selftests/bpf: amend for wrong bpf_wq_set_callback_impl signature
bpf: helpers: fix bpf_wq_set_callback_impl signature
libbpf: Add NULL checks to bpf_object__{prev_map,next_map}
selftests/bpf: Remove exceptions tests from DENYLIST.s390x
s390/bpf: Implement exceptions
s390/bpf: Change seen_reg to a mask
bpf: Remove unnecessary loop in task_file_seq_get_next()
riscv, bpf: Optimize stack usage of trampoline
bpf, devmap: Add .map_alloc_check
selftests/bpf: Remove arena tests from DENYLIST.s390x
selftests/bpf: Add UAF tests for arena atomics
selftests/bpf: Introduce __arena_global
s390/bpf: Support arena atomics
s390/bpf: Enable arena
s390/bpf: Support address space cast instruction
s390/bpf: Support BPF_PROBE_MEM32
s390/bpf: Land on the next JITed instruction after exception
s390/bpf: Introduce pre- and post- probe functions
s390/bpf: Get rid of get_probe_mem_regno()
...
====================
Link: https://patch.msgid.link/20240708221438.10974-1-daniel@iogearbox.net
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This implements the runtime constant infrastructure for arm64, allowing
the dcache d_hash() function to be generated using as a constant for
hash table address followed by shift by a constant of the hash index.
[ Fixed up to deal with the big-endian case as per Mark Rutland ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This tag adds USB VBUS regulator control for Renesas RZ/G2L SoCs,
which also touches PHY driver and device tree, and pulls in a new
regulator_hardware_enable() helper.
The Tegra BPMP reset driver can be compiled under COMPILE_TEST now.
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCZoUaTRcccC56YWJlbEBw
ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwLORAQCMpFmwFHo92VYuDHb0td2cEwLV
ncK1WrlYWHfdAoqI1gEA/qZrIcutWXd+5DCu6W6cJKls00P+8h5vTnzGmIpXsg4=
=JbtH
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaM/xcACgkQYKtH/8kJ
Uiejaw//cwCzzJAZiPSpqqPIZ/eCZqZK0lKyLMFsjsMi/XCoP95ZFVRJ4IusWha3
c0NZzjd+7bBx//SbWJY0ENw31VWlkZjASLPOLLn5rMfaMEMNLT9J3LjcY5vITpll
OYIDDo/XtmjWzH3DGqbTb5Yi1YCESjeeMqtoJTxvgeVITuE7SIYc3O8sSSOpuJmB
DSABrncxhOLK0BHaugbt7/golMxvNDhHjKPTDAv4nSqJDYEhjXaAtW6QOKBXCMgz
uWDmzVyTXpTSkl/LIM+4i1Wald5CX5BTqHi8itrPDFZ/mbWQo+mT5fCh2KjeuJlk
+y/h7kDdPuqJSPXMqNjbtZU5rfonsc9bXLjMEVZaiy5GtbNhGgOQgCN8L8kflsei
5XN3CX0ydLoxypXRUD7EXRemU59btqy5/x02grewE/SXPMkcHIEbPD9hNf8Ly8Ee
Gdxl61YBAXLP4J5RcEHBoPQ1nY7hSzfgAP8BINTk8V6Thi3nOQOzEfaWuaJmYxM9
uH1S3lId4XoHldjLh9ob3sBtINGfjedrkZQ5aV72l9SuhiVnHkNjHRD8jAraxqdG
kasWEhesUe5KoqmaZSxE199JLU8CqmIfVx2hMOr9w19tSldWuscIqkx8vKYDkcnj
KXFa1qQY664B2HW/qamZp6MoolGvCjvu1LoJAScj8WyFL9gwYoA=
=RppS
-----END PGP SIGNATURE-----
Merge tag 'reset-for-v6.11-2' of git://git.pengutronix.de/pza/linux into soc/drivers
Reset controller updates for v6.11, part 2
This tag adds USB VBUS regulator control for Renesas RZ/G2L SoCs,
which also touches PHY driver and device tree, and pulls in a new
regulator_hardware_enable() helper.
The Tegra BPMP reset driver can be compiled under COMPILE_TEST now.
* tag 'reset-for-v6.11-2' of git://git.pengutronix.de/pza/linux:
arm64: dts: renesas: rz-smarc: Replace fixed regulator for USB VBUS
phy: renesas: phy-rcar-gen3-usb2: Control VBUS for RZ/G2L SoCs
reset: renesas: Add USB VBUS regulator device as child
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document USB VBUS regulator
reset: tegra-bpmp: allow building under COMPILE_TEST
regulator: core: Add helper for allow HW access to enable/disable regulator
Link: https://lore.kernel.org/r/20240703100809.2773890-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
allowing dma on uarts connected to bluetooth modules and an update for
the gpu operating points on rk356x. As well as some minor fixes for
missing power-dmains and ethernet phy binding adherence.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmaMZvcQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgaSfCAC1TuxdQmBvHYAn1aLdGLYpU6u1ezvPynGg
eR9dyiQZPiDAyHMCuZl5E8shIb+hnGJtvPP2+sleb1YVEK+FHNPKYu7ZD36Z3aHW
I1YVSVFq6r/dq5LPBxhAs4It6mTQ9sBrEOHFluSuR/Ny/ERsxBBh2QdG6q0f6vlF
lwWTxvQtGpFMgvf+UVeNTmjEbA//Xnvi/BP4NyrQkfNAfeTHav1JlpEVbuKRt+2R
WpFk/RviET9MuclNbGBlq8U1ggPxWch/o8f6Qz1R7wVymgiHihJwFIFk0eAFKyKd
rTdf+H01KrDWkasAEsaWYG/4bWId+lppKVA0YUlk3sPRuiewAKl8
=VcOx
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaM+WAACgkQYKtH/8kJ
UieAtg/+MinvUFuYNrsiUTsxnaMN0Z32nKM//WQ6pU8Rr4qK6X1Fa8WKkrB/sa2+
fqERdYTq6EX9U/zT3way9iuLkvLs4/tOnMGOOP0yKg5qMx3lYfAQ/r3ZfLnvurp4
+x/ErGfW63ZMSl95iq8+hM0tYK4lr+xl11zg7SCbC0zVeFn42wL70o3bNbSnW/cV
qZRMER6mDymqhZ9Bf1tM7PDhzC9JhlYH3ZLi1ovAOZlMZpcOVBUraTxupkAAvKJW
wp7WsA64PJ3uPyNVbQZG27kRgG9Qu5zjI8a1f065l20GAhoviZmgO7Ygy3gkXhi/
aSiKG31VIrXPb/bKhXlhbhKUPigAo3aJQ8teNochniTxSXoQxeLXeoopnHe2znG1
AYhlpaU+wecu3oGq9cI5rHBQ2I0glQYXbmTV9+CCJJoGxyr+kk6OmBBMbplbGltK
YCG6kNpnPbPJNAHyZesJNVfclKcJrKI/nepu56N0gFNkMQUWFgDFOLaHMdm/9zvm
GJO/OmB1p/uOL42TctQ3D5JoyyiohjB+aUWViujMPeFGjOvROLDhCllQSNE5gDK2
BpTKFdsyE69zy48BvZYIVg46bXa3iIn47d1et54Ze/kqhh6XYZ0RKNfr8m28ASSx
CEwABBj7UX5xwAA60pIdnHapyZx+KTNRg6eEs/ChTsao3EkC82k=
=lz4I
-----END PGP SIGNATURE-----
Merge tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
These are two additional boards, the Xunlong Orange Pi 3B and
the Add Radxa ROCK 3B.
* tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add Xunlong Orange Pi 3B
dt-bindings: arm: rockchip: Add Xunlong Orange Pi 3B
arm64: dts: rockchip: Add Radxa ROCK 3B
dt-bindings: arm: rockchip: Add Radxa ROCK 3B
Link: https://lore.kernel.org/r/2191200.GUh0CODmnK@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The IOT-GATE-iMX8 board has an Intel Wifi 6 AX200 module.
Enable the IWLWIFI driver so that Wifi can work by default.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Xunlong Orange Pi 3B is a single-board computer based on the
Rockchip RK3566 SoC.
Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240626230319.1425316-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
version based on the RK3568 SoC and an industrial version based on the
RK3568J SoC.
Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240627211737.1985549-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This reverts commit eb9d53d4a9.
As Marc pointed out on the list [*], this patch is wrong, and those who
find themselves in the SOB chain should have their heads checked.
Annoyingly, the architecture has some FGT trap bits that are negative
(i.e. 0 implies trap), and there was some confusion how KVM handles
this for nested guests. However, it is clear now that KVM honors the
RES0-ness of FGT traps already, meaning traps for features never exposed
to the guest hypervisor get handled at L0. As they should.
Link: https://lore.kernel.org/kvmarm/86bk3c3uss.wl-maz@kernel.org/T/#mb9abb3dd79f6a4544a91cb35676bd637c3a5e836
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
This enables the newly introduce Shared Memory Bridge driver which
improves the mechansim with which buffers are shared with TrustZone.
It turns MSM8996, SM8150 and SM8350 interconnect providers to builtin,
as debug UART now depends on these. The SM8350 GPU clock controller is
enabled.
The secure QFPROM driver is enabled, to provide access to OTP
configuration for the LLCC driver on the QDU1000 platform.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaJaGsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F5zwQAMidZd3wszmWZ945zWq/p+kNNqxx
N+/Stb4Yxg/6jvjROiWZ8XhFEpjEBlV/90EdruQfs1NuRjtHZowRtPhsTPOw1DQ1
DssJOZBWPJu5E5ar0WVi/JYQJA2S18FwgCn3PB5BSvTaHnA495HBpqMd8EJ+0hO6
rkWI585xRNAyyFISfsFLR7S5c3STyRnDnSBafTFkXPlALwiRg/6rl/JGIA246Z4Q
lDWmrt1tMUtrL97JR9fm9qDSiZ5AF22s1DujlaeVtXym7Ob0iwJsMpoRml/uH4Wv
sZP/LGi39YCFTa+l8C+Ymx/LSlXmTfjGQPx/y/GUQSpLte92yNckaYtP0TvOZeVr
4iPaq4LDUdNK++iOJJOOsJvOgRYv39CRLAMfoP8RWi0r1V2Ds014waaQX62b43bx
Xo9cam8IeuvJTstvYiz7n4KjANZJ3XVvxdDY67ClJwXxHRJghQtCrj7QVgR6F7mN
EMe79YiwZtGAZubxD4OeGQP2LfyphQyxVo67gHI8Zf3SP2YBzgFyNh+Xiiurqxx+
6WVaE1ZQqxzpGvdrqa4W4hEC7KOoTMmbFs7n+CbTTJTYzqSXUfMDN56IT7CGioAV
U1POw6mMDtGVwcQwCcSOusPoAqfaJMjVq4D/4sLg03KQfOrUrLQJUl/N9oiTRFKx
sbsN5wPzBcBTSbP2
=NYA7
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaMPrgACgkQYKtH/8kJ
UieBbRAA3F0Kx6xXTjsUe+3bkUXszN2ZwRA+tLlUU9wQ0iC4FqKz2itrYfOBUgzm
fNsH9Xrv2+zNgbcQiJBmAQyax7v2D5Z6Cnk46ZVU1hkd2zqxhJEKok2M86tt1U9F
uRAOCf6Ct3Xi3ZAFA+fbpUUyVxvjevdi/Hg5kqHQzpvLImu9YznYzI5SHsj/6eTw
p8xJQt6Hy9TaRTrESj7W+9/rf77Ly064YwaQARkuQ8uEMENeoudndVSX1Vgu2f0o
8EQB25M7krVzzd8rUybhm6r03EVTmcuf0avt8nJFFlcD0X7G0o+lpgl4lhDNRk6M
agMluwa6wneTQP4UD6QZT02qAjqa6zF2riryakqw7lvhKAtocdQjEkO81I3857RC
YheP1Y2F7W2Dc2gEZD5+E/WlBJoDH51stzHuAAZrVS5YTiVwbvr0mAlxwkqv2EsT
kqqFKiY6hEdwKXZ8o5pTIBZyZT4wTpyBXK8172cSgu9ecwfgQ1Xa1HhXXGmeYhCq
rhIF2xA0IPP7xaVnGFZHRfFfMDUQzCr5pPAXSPm0Dmx5+8cZ9w+0c1orMkpVhMWX
wRKrH3iD/WH0MzDOJDoXA39l+xtl0XE0tEEqUEyw1kl9nRLzfy2S2gcW8HjIy6y3
bzwEzNDQ0ep9QY0OVFj4oLlpqQde+k8HH4s4uNXdcaFiyiT+YDg=
=SFGH
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
Qualcomm Arm64 defconfig updates for v6.11
This enables the newly introduce Shared Memory Bridge driver which
improves the mechansim with which buffers are shared with TrustZone.
It turns MSM8996, SM8150 and SM8350 interconnect providers to builtin,
as debug UART now depends on these. The SM8350 GPU clock controller is
enabled.
The secure QFPROM driver is enabled, to provide access to OTP
configuration for the LLCC driver on the QDU1000 platform.
* tag 'qcom-arm64-defconfig-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: enable SHM Bridge support for the TZ memory allocator
arm64: defconfig: Enable secure QFPROM driver
arm64: defconfig: enable several Qualcomm interconnects
arm64: defconfig: make CONFIG_INTERCONNECT_QCOM_SM8350 built-in
arm64: defconfig: enable CONFIG_SM_GPUCC_8350
Link: https://lore.kernel.org/r/20240706155347.16207-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for the Lunzn Fastrhino R6xS boards, allowing dma on uarts connected
to bluetooth modules and an update for the gpu operating points on
rk356x. As well as some minor fixes for missing power-dmains and
ethernet phy binding adherence.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmaL+iUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgbyuB/9Uwa5aie3zf/KRuXdb19UAigKxt1HWxU0f
z7hHyFEZoLpByFsE1H0MtKiGdIkuIrwACoPU0bRLFoPOGpvT3ZbiO5vYmjOe/pmb
U2jYKR42TOKbWtAW8jlB+OCKnltVgDyUzetersRpLBFT6ukGK5asEapfcSer3p6u
NFM/92wNDgf3KU8oY4cxZlXs11p3kRXSU+TV38qYCxGVo9hzZASPqsCCAwBgMK9N
v6bPdZBkv0n/iANPZQcM4lrn0p28gbkDuHrgX9gnd/megh0F4XPxmVdZaM8umdmv
/O+woP0/9q4ZY4/+qNRYnZOVL84Gi/QWg52Iu7npYQ7509p7PK05
=LRjK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaMCg4ACgkQYKtH/8kJ
UiexpQ//WMMP4xLj8Nv/MRNxvT8XM2k0ExgrshuRQ2JoDv4sXkDvt7/MKTFRzs+G
4vDmk+kdmgEcBOnV/ZtRu2e4ECZOpfVytOAINqUHYIlkvOFrERAoa8qQ+GWonRMx
v+dQubDDin79OJzaNyipL5CIR9Ux8Xw0T800IP6ppgLa6Cpy853haD0/XxxFvtb3
YHYhwx9qwcNKGCCpl77VrPIj7HIoMp/43M3XOVq6cFSyJ1X24fOVDIxSs5w2Oadd
YyOxeiyNvqYqRNMJ6UWcHX/87HyXXvx/mh7vxzelG7XdOVSzzTPkGY8KnDKpvQRZ
mvQzo1XGuC7a7o4LF+5Cfmq1uxvf19IFHISoMc78KpINXbTQeeDKaz7oJ33kej0K
h3Y4YyITKwTYQV2XuZIU4HfVpeQzRpeRWSmuq+fc4J16G35S5wqYVfC4u94JSzcR
NJ1XKWTHpdqEGPlLoVCiTOr+mqTEsPgpb1jNJJmBPxXUX9msKauWWHB9zotYNtNr
wat3l8fqwhmG9o0hKH4ijs7eWLFI41v9lMxzqliqggXlXjS/cY6/7Oa5dmLKqTHr
/YOLB/sIMO/0vkq176RRlufzZMpjlw2K1rMGtfhc/Erq+0rURKqG64D/BjYKY04k
JMNDCVnlY0cRXcx8FNEok9Dswe8W/g0YkBeIT2c8WA5gCLeGnWM=
=A0a5
-----END PGP SIGNATURE-----
Merge tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
One new board, the pretty interesting Rock 5 ITX, some improvements
for the Lunzn Fastrhino R6xS boards, allowing dma on uarts connected
to bluetooth modules and an update for the gpu operating points on
rk356x. As well as some minor fixes for missing power-dmains and
ethernet phy binding adherence.
* tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add ROCK 5 ITX board
dt-bindings: arm: rockchip: Add ROCK 5 ITX board
arm64: dts: rockchip: Add dma-names to uart1 on Pine64 rk3566 devices
arm64: dts: rockchip: Add avdd supplies to hdmi on rock64
arm64: dts: rockchip: fixes PHY reset for Lunzn Fastrhino R68S
arm64: dts: rockchip: disable display subsystem for Lunzn Fastrhino R6xS
arm64: dts: rockchip: remove unused usb2 nodes for Lunzn Fastrhino R6xS
arm64: dts: rockchip: fix pmu_io supply for Lunzn Fastrhino R6xS
arm64: dts: rockchip: fix usb regulator for Lunzn Fastrhino R6xS
arm64: dts: rockchip: fix regulator name for Lunzn Fastrhino R6xS
arm64: dts: rockchip: Add dma-names to uart1 on quartz64-b
arm64: dts: rockchip: Update GPU OPP voltages in RK356x SoC dtsi
arm64: dts: rockchip: Add GPU OPP voltage ranges to RK356x SoC dtsi
arm64: dts: rockchip: Drop ethernet-phy-ieee802.3-c22 from PHY compatible string on all RK3588 boards
arm64: dts: rockchip: Add missing power-domains for rk356x vop_mmu
Link: https://lore.kernel.org/r/1998182.CrzyxZ31qj@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The imx-spdif machine driver creates audio card to directly use an
S/PDIF device. However, it doesn't support interacting with an ASRC.
fsl-asoc-card already has the support to create audio card which can
use the ASRC.
Merge the S/PDIF support from imx-spdif into driver fsl-asoc-card
to extend the support of S/PDIF audio card with the use of ASRC devices.
fsl-asoc-card uses slightly different DT properties than imx-spdif:
* the "spdif-controller" property from imx-spdif is named "audio-cpu" in
fsl-asoc-card.
* fsl-asoc-card uses codecs explicitly declared in DT
with "audio-codec".
With an SPDIF, codec drivers spdif_transmitter and
spdif_receiver should be used.
Driver imx-spdif used instead the dummy codec and a pair of
boolean properties, "spdif-in" and "spdif-out".
To keep backward compatibility, support for "spdif-controller",
"spdif-in" and "spdif-out" is also added to fsl-asoc-card.
However, it is recommended to use the new properties if possible.
It is better to declare transmitter and/or receiver in DT
than using the dummy codec.
DTs using compatible "fsl,imx-audio-spdif" are still compatible, and
fsl-asoc-card will behave the same as imx-spdif
for these DTs.
Signed-off-by: Elinor Montmasson <elinor.montmasson@savoirfairelinux.com>
Link: https://patch.msgid.link/20240627083104.123357-5-elinor.montmasson@savoirfairelinux.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This introduces 11 new boards, namely:
* ASUS Vivobook S 15
* Lenovo Smart Tab M10 DTS
* Motorola Moto E 2015 LTE (surnia)
* Motorola Moto G 2015 (osprey)
* Motorola Moto G4 Play (harpia)
* Qualcomm AIM300 AIoT development board
* Qualcomm SM8650 Hardware Development Kit (HDK)
* SHIFTphone 8
* Samsung Galaxy Z Fold5
* Schneider HMIBSC board DTS
* TP-Link Archer AX55 v1
Of particular interest here is the Asus Vivobook, the first supported X1
Elite consumer laptop.
For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is
described.
The improvements to MSM8916-based devices continues, with sound and
mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter
also gaining BMS support. Samsung Galaxy devices gains PMIC and charger
definitions, NFC support and MUIC. Accelerometer and magnetometer
support is added to the Samsung Galaxy Grand Prime devices.
On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem,
and Adreno GPU are added.
On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are
added for the audio DSP, glink-edges are described where available, the
display subsystem reset is added.
Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to
allow ath10k to come up.
GPU support is added to QCM2290 and enabled on the RB1 development
board.
The I2C controller used for communicating with the LT9611UXC HDMI
bridge is temporarily replaced with i2c-gpio while issues with the
builtin controller is diagnosed. The same is done for RB2, on the
QRB4210 platform.
On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is
marked as always on to match expectations.
On the QDU1000 platform, USB is added, secure QFPROM is introduced to
allow LLCC to access OTP data. USB is enabled on the two IDP boards.
SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL
info regions. Nodes are marked as dma-coherent as needed, a dedicated
carveout for shared memory bridge allocations is introduced.
The SA8775P ride device is split in the two versions r2 and r3.
The SC7180 Trogdor clamshell/detachable fragments are refactored for
convenience, and pwmleds are disabled where unused.
On SC7280 the APR nodes for interfacing with the audio services in audio
DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to
enable improved debug support. QoS clocks are added to interconnects, as
needed in order to operate the QoS settings on some buses.
SuperSpeed in park is disabled for the primary DWC3 instance to address
host controller issues under load.
The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are
named for better output, and firmware name for IPA is adjusted to the
preferred file format.
The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are
enabled.
The Type-C port manager found in PM7250b is enabled, for targets not
using pmic-glink firmware for Type-C management.
SC8180X gets a number of smaller corrections, and some cleanups -
related to both functional issues and DeviceTree validation.
The PSHOLD node is marked reserved, after reports that this causes
issues during shutdown. Description of the USB signals are updated to
match the signal path. The PM8008 camera PMIC is added to Lenovo
ThinkPad X13s.
The PM660 PMIC is extended with charger and rradc definitions, and the
SDM670 gains a SMEM region definition.
On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved
debug output during faults etc. The UFS PHY is associated with its GDSC,
and the DisplayPort controller is wired up to the QMP PHY.
The Lenovo Yoga C630 Embedded Controller is introduced, adding battery
and Type-C port management and altmode support. The C630 also gains WiFI
calibration variant information, to cause selection of the right data.
The missing IPA firmware path is corrected.
For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and
SPI nodes are introduced. SD-card support is added to the IDP board.
CPUfreq support is introduced for the SM4450 platform.
Missing reset is added to the SDHC controller of SM6115. The UFS PHY
is associated with its GDSC, so is the PHY on SM6350.
On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are
named for more informative debug output, and USB role switching is
enabled.
On the Fairphone 3, vibrator support is added and enabled.
On SM8250, the USB signal paths are properly described in the OF graph,
the UFS PHY gains its required power-domains description.
Thanks to the introduction of PCI power sequence support, the QRB5165
RB5 WiFi chip can now be powered up, so this is added.
Touchscreen interrupt flags are corrected accross a number of Sony
Xperia devices, to remove the unexpected traces from downstream.
On SM8450 an OPP-table is introduced for the PCIe controllers, to
specify the bandwidth and performance state requirements for the
different genrations and link widths. For this the PCIe controllers also
gains interconnect path definitions. The LLCC register layout is
corrected, and the UFS PHY is associated with its GDSC.
On the SM8550 development boards speaker port mapping is added. WiFi
support is finally enabled on the QRD board.
The new AIM300 development platform/board is introduced.
For SM8650 video and camera clock controller are introduced. SCM node
gains details necessary to trigger USB ramdump (download mode) upon a
system crash.
WiFi support and speaker port mapping is added to the QRD and the newly
introduced HDK. On the MTP the USB Type-C connector is describe to be
routed to the PHY.
In addition to the base HDK, a Display Card overlay is also introduced.
For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe
6a instance are added. Thermal zones are described. Pmic-glink is
introduced for both CRD and QCP devices, and remaining PMICs are
described. Audio support is also added to the QCP.
An explicit, larger, chunk of CMA memory is added to the various
devices, in order to compensate for the lack of IOMMU for PCIe.
Across a wide range of platforms, the thermal zone polling delays are
removed as supplies are interrupt driven anyways. Also thermal related
is the introduction of GPU thermal throttling, across many SoCs.
The old SMSM implementation is finally transitioned to using the
mailbox-based description and implementation for invoking interrupts on
remote processors. As such interrupt-triggering is converted to use this
mechanism on related platforms.
The usb-role-switch property is removed for all USB instances hard coded
to either host or peripheral across a range of boards.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaJfz0VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FxOMQALOlJsncvYy+WBZ+ganw3VTY43x+
CYtmM+cvy/oEEmqLLKWO63XyPtiDuhwjjmjO9H7019Zhi7dB2odXfr8PH4Wz315G
/nW99uEoR1kgdHtMwMhBv+gMSf00c6D5X3fbFxVbt2lqlaB9blZeqbA/PsAcC2Dr
FId/ji6/cMdEmC1qbWtvBMSc9Cku7WNt/90qe9q5KuwKbRVF/FKPj+lfBxGnrjQ8
vaKHmqVOYSV+cfuWqA/HrIe3WUds9eXv/F+O2nx22BTqEiBmlOxVR63LwQGFV9D+
fOpRaIR30TxBk+DK/i4jnNu7UEA9lPf//0RDiKeyySAffLfQWBpURGcRUrF6X+yz
7qdi8Ep/L1v7M+FKdPdCDooVxM91JHErPB65+/T/gLbI2Oe7MZED+hY/3UcTY8cr
SkSH+3VeZk8M4DDFuVdgXcTBk1d/d1zqaKKokm9IkIqdAspDYJNvlOHMfgg1bsQe
Ny9epqR+RR5wFulJ0W0YWGibOYkcubduAytvtad1lawmSTCmMI8SZb8K9n1l2RI3
vYEgaSfOo0SHprgZlpULc+LqPF9n9W2RrME8iFIqpfsZ9ovFccr3QgNbHdtVZyoN
t0DhAUk5UKEM4iQ4vf/7+T2WjFA2LMAg1Bznv8X4L69BVkAH/VwRudbwQe429Yqm
psehVa9nc/+upil7
=Hsda
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL+k8ACgkQYKtH/8kJ
UiffeBAAlBRO7Pp8MCFco+63SXZQTGJ0UXmmrkWLiXW6iCGDuUrllCLuygOGZx8O
FVQ9dBQ5AXQbOy++LTYvHIzWt3pCJSIlnbhiv9Na04IgBFnZ3Uy+e+Iikq25o51M
gC2lIvLfwDaTVe8KMvLdNoTUN7jWFv6dZerNo35K6mLxf5nwU6bucljM2Vn0naSK
6G4HMXA+ByvCMgSVOp4/5Qd3+XadH8604W+48n6aRM9YtLhTgV2bRRNY23y8hiAI
IItgCMjzS30mbd6yrnXJOix0IoNhe9IxNKoKh8P0+G0CvAzH8s7KcVAlU+tiTsnR
0vMKYcYPK6PW8T4umHSvTTEG3HR+uvC5vyWAnCKvlx2OElD80JoVp/IWvmy4n9Fv
U3hltgntDkn8raupGgQ9oeM6EoVR6fq5UtzuaZgkElWyuSigVK9jOsG8hrqf1gdo
w7I6APX4c1D8ArEvCbBUmff0hy4LqnScwz+7evFwZORMDYiYxhy2ybRZVYGknozA
miEkVGZr+MHLCszF8kzetHOFhhddqvTWx6IEh/5SMPTkqnGfaOTc667rJ/hfHt8/
8AYw3dfpKrXsf3KxeNVlVpJDNexZU3yHK2glNEpr0yvXAuYYXfmXhhNo2DHNDzyg
VHd6J24UoWMpQisszsfFPBtBsianBTzsPhfCfmprg8um2f0MaKY=
=2vUa
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.11
This introduces 11 new boards, namely:
* ASUS Vivobook S 15
* Lenovo Smart Tab M10 DTS
* Motorola Moto E 2015 LTE (surnia)
* Motorola Moto G 2015 (osprey)
* Motorola Moto G4 Play (harpia)
* Qualcomm AIM300 AIoT development board
* Qualcomm SM8650 Hardware Development Kit (HDK)
* SHIFTphone 8
* Samsung Galaxy Z Fold5
* Schneider HMIBSC board DTS
* TP-Link Archer AX55 v1
Of particular interest here is the Asus Vivobook, the first supported X1
Elite consumer laptop.
For IPQ6018 an SDHCI controller is added and on IPQ9574 an MDIO bus is
described.
The improvements to MSM8916-based devices continues, with sound and
mdoem support added to Acer Iconia Talk S and GPLUS FL8005A, the latter
also gaining BMS support. Samsung Galaxy devices gains PMIC and charger
definitions, NFC support and MUIC. Accelerometer and magnetometer
support is added to the Samsung Galaxy Grand Prime devices.
On MSM8976 definitions for IOMMU, the display subsystem, wifi subsystem,
and Adreno GPU are added.
On MSM8996 UFS core clock frequencies are specified, FastRPC nodes are
added for the audio DSP, glink-edges are described where available, the
display subsystem reset is added.
Venus is introduced on MSM8998 and the "No MSA Ready" quirk is added to
allow ath10k to come up.
GPU support is added to QCM2290 and enabled on the RB1 development
board.
The I2C controller used for communicating with the LT9611UXC HDMI
bridge is temporarily replaced with i2c-gpio while issues with the
builtin controller is diagnosed. The same is done for RB2, on the
QRB4210 platform.
On RB2 TCPM max current draw is corrected and the vreg_l9a regulator is
marked as always on to match expectations.
On the QDU1000 platform, USB is added, secure QFPROM is introduced to
allow LLCC to access OTP data. USB is enabled on the two IDP boards.
SA8775p gains PCIe endpoint definitions, LLCCC support, IMEM and PIL
info regions. Nodes are marked as dma-coherent as needed, a dedicated
carveout for shared memory bridge allocations is introduced.
The SA8775P ride device is split in the two versions r2 and r3.
The SC7180 Trogdor clamshell/detachable fragments are refactored for
convenience, and pwmleds are disabled where unused.
On SC7280 the APR nodes for interfacing with the audio services in audio
DSP firmware are introduced. The Qualcomm SMMU TBUs are described, to
enable improved debug support. QoS clocks are added to interconnects, as
needed in order to operate the QoS settings on some buses.
SuperSpeed in park is disabled for the primary DWC3 instance to address
host controller issues under load.
The PM8008 (camera PMIC) is introduced in Fairphone 5, regulators are
named for better output, and firmware name for IPA is adjusted to the
preferred file format.
The HDMI bridge on Rb3gen2 is described, rtc, gpi-dma and qup nodes are
enabled.
The Type-C port manager found in PM7250b is enabled, for targets not
using pmic-glink firmware for Type-C management.
SC8180X gets a number of smaller corrections, and some cleanups -
related to both functional issues and DeviceTree validation.
The PSHOLD node is marked reserved, after reports that this causes
issues during shutdown. Description of the USB signals are updated to
match the signal path. The PM8008 camera PMIC is added to Lenovo
ThinkPad X13s.
The PM660 PMIC is extended with charger and rradc definitions, and the
SDM670 gains a SMEM region definition.
On SDM845 the Qualcomm SMMU TBU nodes are described, to enable improved
debug output during faults etc. The UFS PHY is associated with its GDSC,
and the DisplayPort controller is wired up to the QMP PHY.
The Lenovo Yoga C630 Embedded Controller is introduced, adding battery
and Type-C port management and altmode support. The C630 also gains WiFI
calibration variant information, to cause selection of the right data.
The missing IPA firmware path is corrected.
For the SDX75 platform, AOSS, IPCC, SDHCI, TCSR, modem SMP2P, I2C and
SPI nodes are introduced. SD-card support is added to the IDP board.
CPUfreq support is introduced for the SM4450 platform.
Missing reset is added to the SDHC controller of SM6115. The UFS PHY
is associated with its GDSC, so is the PHY on SM6350.
On Fairphone 4, the camera pmic (PM8008) is introduced, regulators are
named for more informative debug output, and USB role switching is
enabled.
On the Fairphone 3, vibrator support is added and enabled.
On SM8250, the USB signal paths are properly described in the OF graph,
the UFS PHY gains its required power-domains description.
Thanks to the introduction of PCI power sequence support, the QRB5165
RB5 WiFi chip can now be powered up, so this is added.
Touchscreen interrupt flags are corrected accross a number of Sony
Xperia devices, to remove the unexpected traces from downstream.
On SM8450 an OPP-table is introduced for the PCIe controllers, to
specify the bandwidth and performance state requirements for the
different genrations and link widths. For this the PCIe controllers also
gains interconnect path definitions. The LLCC register layout is
corrected, and the UFS PHY is associated with its GDSC.
On the SM8550 development boards speaker port mapping is added. WiFi
support is finally enabled on the QRD board.
The new AIM300 development platform/board is introduced.
For SM8650 video and camera clock controller are introduced. SCM node
gains details necessary to trigger USB ramdump (download mode) upon a
system crash.
WiFi support and speaker port mapping is added to the QRD and the newly
introduced HDK. On the MTP the USB Type-C connector is describe to be
routed to the PHY.
In addition to the base HDK, a Display Card overlay is also introduced.
For X1 Elite bwmon, fastrpc and GPU support, tsens, and the missing PCIe
6a instance are added. Thermal zones are described. Pmic-glink is
introduced for both CRD and QCP devices, and remaining PMICs are
described. Audio support is also added to the QCP.
An explicit, larger, chunk of CMA memory is added to the various
devices, in order to compensate for the lack of IOMMU for PCIe.
Across a wide range of platforms, the thermal zone polling delays are
removed as supplies are interrupt driven anyways. Also thermal related
is the introduction of GPU thermal throttling, across many SoCs.
The old SMSM implementation is finally transitioned to using the
mailbox-based description and implementation for invoking interrupts on
remote processors. As such interrupt-triggering is converted to use this
mechanism on related platforms.
The usb-role-switch property is removed for all USB instances hard coded
to either host or peripheral across a range of boards.
* tag 'qcom-arm64-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (279 commits)
dt-bindings: arm: qcom: Document samsung,ms013g
arm64: dts: qcom: Add device tree for ASUS Vivobook S 15
dt-bindings: arm: qcom: Add ASUS Vivobook S 15
arm64: dts: qcom: qrb4210-rb2: Correct max current draw for VBUS
arm64: dts: qcom: msm8998: add venus node
arm64: dts: qcom: sa8775p-ride-r3: add new board file
arm64: dts: qcom: move common parts for sa8775p-ride variants into a .dtsi
dt-bindings: arm: qcom: add sa8775p-ride Rev 3
arm64: dts: qcom: sm8550-qrd: add port mapping to speakers
arm64: dts: qcom: sm8550-mtp: add port mapping to speakers
arm64: dts: qcom: sm8550-hdk: add port mapping to speakers
arm64: dts: qcom: sm8650-qrd: add port mapping to speakers
arm64: dts: qcom: sm8650-mtp: add port mapping to speakers
arm64: dts: qcom: sm8650-hdk: add port mapping to speakers
arm64: dts: qcom: sm7225-fairphone-fp4: Name the regulators
arm64: dts: qcom: pm8916: correct thermal zone name
arm64: dts: qcom: x1e80100: Add gpu support
arm64: dts: qcom: x1e80100: Fix USB HS PHY 0.8V supply
arm64: dts: qcom: qcs6490-rb3gen2: enable hdmi bridge
arm64: dts: qcom: sm6115: add resets for sdhc_1
...
Link: https://lore.kernel.org/r/20240706173140.18887-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmaH7ZodHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIUnhg/+PwLoDlTR8+Mo5IXr
81tN6imRXIS9EfV/XTsQAqAWFqpEtdtQOlcogrK1nOkdpRsjYTkrNmz/4dLthhoA
6xFVLwxNBjqwSxM4pfDWr7pC01OLKCG92J+vnPU+ytXJGodwHj4c2cJKQqDPNcPZ
b3C9MhYmY322O/oh6CxgsFZRqZmpELPPVOJTpI7V+E85+CngY55I5ovBMqFpo9P1
rh2ubk7UdgUuawrkqJptrOLcceLgYWdEHTbzfNySROtwTuEZoVvOq11DMdcdFnLt
6ojAvnJ2GTTVMHmCA53mBoOKKjME1kNbhnHuuJneZ6ZHyK3hY4z8xNVstZHE7zV5
3HGCYkSBaLzp6G1JbXMTDUJQ+Nv0fIRoBB9cJLTXdsRyQTqf2f94EMZH2MbRADCi
hoHbKpSyLMu2r8XmwA9e4+37+HmMrLyKqh1tk7kYrGuG+mwRw6iwFvO9UE0jr03D
Ahzuwvle4OWOff85gZ166SacdM5ju0z6aQbj/N8zaasaxBx/aWfpYZfU8EdCR+ym
+AWb9OCzt2Y7j/BAoUXWD4ckMiZn17yMZ7h5YyPLORCvjbR+RWU0ayQ6nT4MMfBq
ttPWepJPDcxaH7dlrAThWAJ7p+H9iZPdHu0wZjhTBfPNrOL87OxNm5dwbznVLjdP
22OIMoRg/t08hBeORECboSOeGxM=
=sjji
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL+KUACgkQYKtH/8kJ
UiehdRAAn8dwWo+MPfd7fRIxQrYm0SOiiFTC4j4LHNzCDQd7JV93p5FjYo3TpHAA
wXtKYqFDZ8rbxWca3say015iOkYvLmRWOXM9Zs19U6gpsoW0OeiJvQs0pnPYQdXL
ZJxL2YOn3nFfZ3IHxlTcyzoayX5uPZ/KJ/HE6ZLfMk8hCOdzPXoixH/WH1YQgXgc
0EXiSxVbthDb8XbSLF8mz4jZpW0neFwetskkjoUUUO4wbyUi53IThxShAMyyFnBf
ypoG1XTl1bD3DZFOrTQeILh+gR2Hg+EMttvqzooP8B/OAzHC6R/v0H92k3muE+FD
bH4PrFc7aYmV7NnZI61FJzAXjSLrZ8pRFkjyKbenGiSLN9De57pH8CVXC8yeoTzy
HKvk6E9VXmOh+KOwAXY+oQTHp4HMamWH8wFvOSf3nDNyW77u4q4g+Mh60uPeCek5
RlwO/qe+3aOZoem3KskZ4/68iUDftcs+4Ga9O3jceQi/EEjAhz6gV54dNYC9OYi2
VwouIqkS0JWJwH/1hfAgmbYhPdxfKds4kbAGFBjb9rsrf2okjeg/MY0NuZgtehqu
iJ2Q2wTfS8mpX+DbBRHZLXe/pxTiw83Ftkq/x0K8gAArfltJxbqzVuGec9aUdvJI
xyZrekj5MmsSsV0FpqBsgiHDG6GP9yPOy2zkMDYK6//qn+tyvFQ=
=EqEk
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.11, round 1
Highlights:
----------
-MCU:
- Add syscfg missing clock on stm32f429.
- MPU:
- STM32MP13:
- Add camera support on stm32mp135f-dk bord using DCMIPP and
GC2145 sensor.
- Document PWM output for stm32mp135f-dk
- Add goodix touchscreen support on stm32mp135f-dk board.
- Add new DH DHCOR / DHSBC board (Som + carrier board) based on
STM32MP135F SoC.
SOM part contains: STM32MP135F SoC, 512MB DDR2L RAM and
eMMC/SDIO wifi module.
The carrier boards embedds 2 RGMII ETH ports, USB-A,USB-C
and an extansion connector.
- Add Ethernet controller support on stm32mp135f-dk.
It uses LAN8742A PHY based on RMII.
- STMP32MP15:
- Rework Octavo OSD32MP1 split for USB phy.
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- STM32MP25:
- Add OP-TEE IRQ for asynchronous notification support.
It allows OP-TEE to trig Linux.
- Enable firewall for RCC.
- Add all U(s)ART nodes for stm32mp25.
- Add 3 power domains for low power modes.
- Add HPDMA support.
- Add Ethernet controller (ETH2) support on stm32mp257f-ev1.
It uses Realtek PHY based on RGMII.
- Add and enable SCMI regulator support.
* tag 'stm32-dt-for-v6.11-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (31 commits)
arm64: dts: st: describe power supplies for stm32mp257f-ev1 board
arm64: dts: st: add scmi regulators on stm32mp25
regulator: Add STM32MP25 regulator bindings
ARM: dts: stm32: omit unused pinctrl groups from stm32mp13 dtb files
arm64: dts: st: enable Ethernet2 on stm32mp257f-ev1 board
arm64: dts: st: add eth2 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25
arm64: dts: st: add HPDMA nodes on stm32mp251
ARM: dts: stm32: Add ethernet support for DH STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: order stm32mp13-pinctrl nodes
ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board
ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13
ARM: dts: stm32: Document output pins for PWMs on stm32mp135f-dk
ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards
ARM: dts: stm32: Missing clocks for stm32f429's syscfg.
ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
dt-bindings: arm: stm32: Add compatible string for DH electronics STM32MP13xx DHCOR DHSBC board
ARM: dts: stm32: osd32: move pwr_regulators to common
...
Link: https://lore.kernel.org/r/8f10bd29-d067-4060-89ff-2e1a605f3141@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This includes a commit shared with the clk tree. This commit adds clock
and reset indices to the device tree binding, and thus is needed for
both the device tree and driver changes.
ARM64 device tree and binding-only changes
- Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC
- Add cache information for A64, H6, and H616 SoCs
- Correct model names and descriptions for Pine64 boards
- Add GPADC (general purpose ADC) for H616 SoC
- Add ADC joysticks based on GPADC for anbernic-rg35xx-h board
- Add additional CPU OPPs for the H700 on top of existing H616 ones
- Enable DVFS for rg35xx boards
- Add IOMMU for H616 SoC
RISC-V device tree changes
- Add system LDOs to D1s/T113 SoC
- Add ClockworkPi and DevTerm device trees
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmaC5BEOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDDszRAAohtAXVlhcOZUyY6jnToNDRhRDe4WR2dKNuth
D/sM93uBxEtHkHsV11xKdmXALYszT3c1IxA84Cj3uwBvutIK4/KQUDbtDvGedz/o
90v3bgAR1ETf7RrQFCxpQUFYNufpnXb5ZHA5jRSdxyg9coLR7sDab0r6UCh/EzyN
rykvB2oSmjxyG0OjBUU3IcR0B5nliGRc9esVhdSW4cGblaJaT/NrlsmUGL39hXP2
BayJ3FFfS2izs5uHMOeQUaveadBGssc/kzJvnwy/jeM+76uY4SlH58/dl0ivWM0/
h5mifWbMIdl5kUEkUz7OaPT9O6K/1O1/heQYrQSHNKtgD6NN9uS4QWuGyfsWcpUo
iRXnYrscWuGQH8ICAG9upNCto2RXn1nS3+FYv/CmNQ+Nl39RpGGWKW9KPesCttdr
OgjWGgspyBT3xh4NhrxLbEOmZaCg6ZGfr8Vp4VrXLMbSOrV6Qu8VsJcRWkfwm3yb
tg9ONSFrSBNwmWQIqjtpWt3j81sOKkz2WYV6+hNgDyQ5HZQZWNHhOUVQ2W912TNh
vJ9d+3jgtn9wj2DyPdkzPRaNaVK+KqRbpUIXLc7TUAJaMcHzX6+ekt1576ZBNUYL
hFOoMvzu6k02Fmr8qUe9PX2p5Ie6ubF+2/aWGkZ0pF2cdht1Q6IDiXsSX3PW+VBU
acB1TT0=
=3vmg
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9/8ACgkQYKtH/8kJ
UifiHRAA0qHvjj5uaQiQnjJgOFF+Rmf3goNje2S9f35ziO2AGKqsfp651mBbZFpJ
yFkIMlELMBLmgB9cEXfvoWlvUjITxduiMjn0aNfu4czRhhk1qiqwy+CVhDHT681g
71s1crZ0gT/B9hNQkfHz6AmrvMl6k9NPHioaci4abRNXsGNrZuuSFNOAC82l8nrb
PLJZtNOEbtkVP5pdBatTlsdJywOLpl1KwYvXbbC8oXvMobywUSsW/gjcHV0hUjlp
4kwDEyi1cUGeNEuPAcp2Pp0H+WtHJsaTN1BhIy3kyCGiCXX3ShkZiaYIPwBGdUrz
NJihJ/WoU2pMzlX5OH2L2d1KybZhOPB+kzSqw2TWyZuKNc+HY3BaXeZ8uVUz59Tv
WSml2dz4+T816jDcBrK9sFC1uiJlbieKNJsH8Ol0FykJcfjD48tP7Y1uMhqN3ict
y/FZ6nvPNEf7YPGGTXDjn0d5ifXAyGXLhIWxRXBP701HAzTkUPeTEdMLwj+6H1eh
HBxFaa4yeAtH9+0c/Tf1Ge244OxbavwjJU4ufyD7X440nHqFVXQvF2FD451tBd5F
HbXZ3cm+E8/zg55L0sAcY++5W+Aa2S+TvK64nrKcGEEDonBj3WwdNL5iwtzugWCv
/AQg1UP3uQIyPvrwcyyoG8lenyHjOhZnACH3qbxpO9JnnwEIXQk=
=Emn4
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner SoC device tree changes for 6.11
This includes a commit shared with the clk tree. This commit adds clock
and reset indices to the device tree binding, and thus is needed for
both the device tree and driver changes.
ARM64 device tree and binding-only changes
- Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC
- Add cache information for A64, H6, and H616 SoCs
- Correct model names and descriptions for Pine64 boards
- Add GPADC (general purpose ADC) for H616 SoC
- Add ADC joysticks based on GPADC for anbernic-rg35xx-h board
- Add additional CPU OPPs for the H700 on top of existing H616 ones
- Enable DVFS for rg35xx boards
- Add IOMMU for H616 SoC
RISC-V device tree changes
- Add system LDOs to D1s/T113 SoC
- Add ClockworkPi and DevTerm device trees
* tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees
riscv: dts: allwinner: d1s-t113: Add system LDOs
arm64: dts: allwinner: h616: add IOMMU node
arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling
arm64: dts: allwinner: h616: add additional CPU OPPs for the H700
arm64: dts: allwinner: anbernic-rg35xx-h: Add ADC joysticks
arm64: dts: allwinner: h616: Add GPADC device node
dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
ARM: dts: sunxi: remove duplicated entries in makefile
arm64: dts: allwinner: Add cache information to the SoC dtsi for H616
arm64: dts: allwinner: Add cache information to the SoC dtsi for A64
arm64: dts: allwinner: Correct the model names for Pine64 boards
dt-bindings: arm: sunxi: Correct the descriptions for Pine64 boards
arm64: dts: allwinner: Add cache information to the SoC dtsi for H6
ARM: dts: sun50i: Add LRADC node
dt-bindings: input: sun4i-lradc-keys: Add H616 compatible
Link: https://lore.kernel.org/r/ZoQa8r1N8yi7FlPV@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: imx8mm-iot-gateway, imx93-9x9-qsb, imx95-19x19-evk,
imx8mp-tqma8mpql-mba8mp-ras314, etc.
- A series from Adam Ford that improves imx8mp-beacon-kit support by
fixing dtschema issues and enabling HDMI bridge HPD
- A set of changes from Alexander Stein that adds partitions subnode
to spi-nor
- A great number of changes from Frank Li that add audio, flexcan, gpmi
related devices for imx8dxl, imx8qm based boards
- A bunch of layerscape dtschema issue fixes from Frank Li
- A series from Krzysztof Kozlowski to use defines for interrupts
- A number of improvements on i.MX8MP DHCOM devices from Marek Vasut
- A couple of changes from Parthiban Nallathambi that add PCIe PHY and
RS232/RS485 overlays for phygate-tauri-l board
- A series from Shengjiu Wang that adds bt-sco and XCVR sound card
support for imx8mp-evk
- A series from Tim Harvey that fixes dt-schema warnings and adds DP83867
configuration for i.MX8M Venice devices
- Other random feature additions and improvments on various boards
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmaEB9sUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM50fQf+LLdjIw/Y2qL1nGtONR2ztD2pykGf
8EDXlEjYBKPgnEqm9Fx04KNlITG4rVZx8vPODTWqbgg/LMyxhoT5oc79Y3cgPU2N
+mLYEWWS4M5tCbBsPyM2eVGCGlL6ljU9oAzpCOjeKCWcoALfAKw0Ra0McSDcmnUW
numO5gynIJtMk8Vn7bxoOwbdNFWPY+egT9VQiWYz3SQzxND5nDfzO4sWNvZ8A5h2
6lScii47uZd4LOiZy9fijX2xxm8Hc4VXvJyiN+pNcWWlxc/tAzwvq28/xoZcUu90
pK9l3ZYyuUumKEaCc9up7BqNV3KuYpcodk7tufSzuqtSYnVenQU81xZUgA==
=JIHm
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL95oACgkQYKtH/8kJ
Uif1aQ/6AyIOvlb9LohxzMkR7DXjiPYp3yjOuAJm9+afLfQ7m5eHhF+F0MUVlhCp
Kcrc+XoYBjxYKjNg09GiWSywZH6dqn0vcBjdTmLXHuiQAovalv6uuIIS3mk3uYVw
x0/FvrWVdBXoOB5c6jmQip4tuyacMzQseDBe7Bejw5YOEZ0havrZ+cGwxCHrmWzT
ngsw5IBRs/ItljyP0w9kkgLaXw6UAgavB892przfdxbZVR1axLbBI+eKe7pj/nHC
A1GUv4j/i3rOTNUfMdNgtid+ke2S0awqKEsol8k4WvIWeoD1Pie2pdcLPR0q8oZu
MR5PPXDNf89wZ5DYDkhDHwmqC01k33EIEF2LJQBjSBy6FhsY8EbcZmN+X2wUGpEu
gPzIxX2AmXkhVIWN0jTxpDhFzSTnhXqHgzAm74xXWuE3/5+hXKX41OgcJrZTpd3n
z9oRecsVejJc1JTSs+vQOOjVBNL6nwFMH8T8W3UTxDbrQOP0iGVTvN1TeIgtJLkI
OyNDSN5t9hRsx2rvR6NDTUWqk3DVVSkhZvb/E7Wk4NKO6dNQwbE4qniK7OUMqrVH
CCze4n3RUJ3R4SM7H+MRDtdB7rtCrxhrD0nXlyoVoM1+dvV9uHO/shAl4Nb+08v1
ch3Vaet5zv3cGVKAmnn8BceaOtxcmz8iz1mhDubPjGOhrb7I+RU=
=Orkt
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree change for 6.11:
- New board support: imx8mm-iot-gateway, imx93-9x9-qsb, imx95-19x19-evk,
imx8mp-tqma8mpql-mba8mp-ras314, etc.
- A series from Adam Ford that improves imx8mp-beacon-kit support by
fixing dtschema issues and enabling HDMI bridge HPD
- A set of changes from Alexander Stein that adds partitions subnode
to spi-nor
- A great number of changes from Frank Li that add audio, flexcan, gpmi
related devices for imx8dxl, imx8qm based boards
- A bunch of layerscape dtschema issue fixes from Frank Li
- A series from Krzysztof Kozlowski to use defines for interrupts
- A number of improvements on i.MX8MP DHCOM devices from Marek Vasut
- A couple of changes from Parthiban Nallathambi that add PCIe PHY and
RS232/RS485 overlays for phygate-tauri-l board
- A series from Shengjiu Wang that adds bt-sco and XCVR sound card
support for imx8mp-evk
- A series from Tim Harvey that fixes dt-schema warnings and adds DP83867
configuration for i.MX8M Venice devices
- Other random feature additions and improvments on various boards
* tag 'imx-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (91 commits)
arm64: dts: imx8mp: Remove 'snps,rx-sched-sp'
arm64: dts: imx8mm-verdin: add TPM device
arm64: dts: imx8mp-evk: Add audio XCVR sound card
arm64: dts: imx8mp: Add audio XCVR device node
arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM rev.200
arm64: dts: imx8mp: Do not reconfigure Audio PLL2 on DH i.MX8M Plus DHCOM SoM
arm64: dts: layerscape: rename b(q)man-portals to b(q)man-portals-bus
arm64: dts: fsl-ls1046a: rename thermal node name
arm64: dts: fsl-ls1043a: remove unused clk-name at watchdog node
arm64: dts: layerscape: rename aux_bus to aux-bus
arm64: dts: layerscape: change pcie interrupt order
arm64: dts: layerscape: rename node name "wdt" to "watchdog"
arm64: dts: layerscape: add #dma-cells for qdma
arm64: dts: layerscape: remove compatible string 'fsl,fman-xmdio' for fman3
arm64: dts: layerscape: replace node name 'nor' with 'flash'
arm64: dts: fsl-ls1012a: remove property 'snps,host-vbus-glitches'
arm64: dts: fsl-lx2160a: fix #address-cells for pinctrl-single
arm64: dts: layerscape: add platform special compatible string for gpio
arm64: dts: layerscape: rename node 'timer' as 'rtc'
arm64: dts: imx8qxp-mek: Pass memory-region to the DSP node
...
Link: https://lore.kernel.org/r/20240702142153.413061-4-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The ROCK 5 ITX as the name suggests is made in the ITX form factor and
actually built in a form to be used in a regular case even providing
connectors for regular front-panel io.
It can be powered either by 12V, ATX power-supply or PoE.
Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot,
2*2.5Gb PCIe-connected Ethernet NICs.
As of yet unsupported display options consist of 2*HDMI, DP via USB-c,
eDP + 2*DSI via PCB connectors.
USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel
connector.
Schematics for the board can be found on
- https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf
- https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240704153815.837392-3-heiko@sntech.de
Similar to bf6f26deb0 ("arm64: dts: rockchip: Add dma-names to uart1
on quartz64-b") also add the dma-names property to the other rk3566
devices from Pine64 with bluetooth functionality.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Tested-by: Riley Trautman <asonix.dev@gmail.com>
Link: https://lore.kernel.org/r/20240705163004.29678-4-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pine64's Rock64 was missing the avdd supply properties on the hdmi node,
causing the following warnings:
dwhdmi-rockchip ff3c0000.hdmi: supply avdd-0v9 not found, using dummy regulator
dwhdmi-rockchip ff3c0000.hdmi: supply avdd-1v8 not found, using dummy regulator
In the Rock64 Schematic document version 2.0 those supplies are marked
as DVIDEO_AVDD_1V0 and DVIDEO_AVDD_1V8 respectively, but in version 3.0
those are named HDMI_AVDD_1V0 and HDMI_AVDD_1V8, which is a bit clearer.
In both versions those are connected to LDO3 and LDO1 respectively.
While the DeviceTree property is named 'avdd-0v9-supply' the
'rockchip,dw-hdmi.yaml' binding document notes the following:
A 0.9V supply that powers up the SoC internal circuitry. The actual
pin name varies between the different SoCs and is usually
HDMI_TX_AVDD_0V9 or sometimes HDMI_AVDD_1V0.
So the 'vdd_10' reference is not an error.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240704191919.38856-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1. Google GS101: Minor cleanup and add fake regulators to USB phy, to
satisfy dtbs_check. The PMIC providing these regulators is not yet
implemented.
2. Exynos850: Add True Random Number Generator.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmaDnzkQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+DCEACQ4QFZWkBZimCpTOacg9GHBCHgcYgQ5OGS
Z7gOsDcSHUYBgSPmo5hEtt0Y3qalCNgQz914ozqkpCwlF2SZCpiTTrk7Eou86jQ/
VOUiG3k49Crw3QAzhAVW/xw4+tsFO5oRDL7Z06pPIfO5QjFF9Ass+mfW+aXIQ+X3
+jG7+ms4hY9n6X8+a4sCQ+E1TFo2L9cJp/AyMnBDGXYeRNs/o+lYLxggW8CzIRAz
jMRELQ/qyMgNupnZpALe4uxbNQ3M5/dgiwx3yV+8c5gx6YcgMBtsktI5b/X6Yu7W
Dfe9EFBmPYBdD0zSlM0tZBPzLkuvv9InV+NTRN5JlstVPeR0YIu1Qf3UfDP3ay1f
U6eXCu91XxGt+zGPCsjzVxKMll2HYb9VZ8NF5VvxWUHlk81cJ6aKJTUF2fBKJjbk
6FNFALncrX7RQagZW1wfq2cKMHsXvh86QQAwt9hihdsmOwwq3E9wKWqLxa6mak70
i1fYa18xBaFUsaxRgqWW7HPx1ma62P294lGsbSp6wS5nM0kaqfZkfFuh5Xw8mYpJ
Z+L86pnfT/f6I3ljqjm4rQ7bI697ZhG2P1snIhb0PjXuY18hGtv+bNVum02SF9aO
IimG55wSBvxHF9ZjvZplQfpbrvpy6uMc18hie/2DrsKQkX6xJL7RI2QH8HZyFlma
UKIc88whoA==
=Oc6g
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9n8ACgkQYKtH/8kJ
UiePdxAA1MDnDBAbOckYjqhSNZd4dJBrzgb9ryufoPoBfA3rfn4cvB72b4jUR6KO
JWJtbbzpFmIyxUn3hNyQF0DfhrW6Vy2icmxZ+z8C3qZR9g0QnSAhhfZ7Pusf55G8
rVPT3Ie8PeBLnmf26r3OSt6J21W1f6aCrK46wpowdTCe54vBsMlBrsLE1M92+ubO
GamrvCehsHDBX9qVeV6e2I70zLtyYdoFddV0ZurgQu9Dox+1IZH1dZ/x5LMudoI1
wPcMYwwPdUcnC8fQ8MDEYz6pd0BJzJ22RW5ZybtshDlWbcbG/WBkYgMqhZQCcHfD
uF0zp2WufUX0zXt/q+FYm9Nqye6cOqJDmwZCP07xQWYU4vovTwmrKRdWlcT2pqQ6
8eA9q+hBAWmSyuutS/4s14YUzRZRdIm4n9t/uOn7A1ducCjtSZftoW32zxEomyIy
MQS75D8aso+vXmcddPSptoJ3Xc4M5I0TJ58n3y9AF0ZO4G6gQcGvM9jw4yGF72Ge
WNqoM/MNwT/UzI42AZsbnBpKiW21vwyhxDjzjX202aN3CLiH5HQNgWBiZfDcrDgf
8aY4t59PHbe8vtVjnLuuiBWNt5jhPi7u+HrRSd0BJkeAy1dooYRWRkHta/+ZxVOR
ccAtKuSsHo1Ok1QCAple9RP3riMQdsLzeGXzMyIJqm7lzTaBZJI=
=SKUS
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10
1. Google GS101: Minor cleanup and add fake regulators to USB phy, to
satisfy dtbs_check. The PMIC providing these regulators is not yet
implemented.
2. Exynos850: Add True Random Number Generator.
* tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos850: Enable TRNG
arm64: dts: exynos: gs101-oriole: add placeholder regulators for USB phy
arm64: dts: exynos: gs101: reorder properties as per guidelines
Link: https://lore.kernel.org/r/20240702063514.6215-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains one patch that reworks the device tree structure for
Jetson Orin NX and Jetson Orin Nano, which are both within the same
family. This restructuring makes it easier to extend both platforms
in a consistent way in the future.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmZ+3YsACgkQ3SOs138+
s6E6qg//eJu9trfH6Tgqvga/YDV98jLHXl6mbjk1zpYOE6K51gM2E9ypaU2Xaefz
uwZwKe4rDs9GPeKzm2lyd9hHvYUSgzQ5JYfkw8a9G3Ne8E+fbZZ//ElGrUAAbKbd
C6uN/uXg5udsiTKuXMf/PSAzyvUbUJOY4DC7CA4ilu0GO3pmtafpcaBPvUAWGqDR
IWVJGFjlYNPWB+ROmyhTYCtpDQX/4Ok5JgjLyOiSzYq/qBZ3AA1OaZW9u10nbcH+
cBeCBjt/0Pd1bqSxgPwdSxztR6EdmA34zAhi77rJ5shjfR/lqEntwZabg7SezTXK
ZiduASpTr95kHWdJ6+v25Dj0JzXG8b/9KV6WDMhBY6SBQDiJoWwsGaRcMjbAolHN
0t58Y/h8mlSREbQc1Yrd9Gk6g/Z9tSfa0TJ3bY4I+squw01Xtl3zB0kw8dBPKMU6
d5YoTci5QCpih9r7fQ+6YCOA2/QcSxpFURa0Hlm7MjGPRpkmaOt8ZhrfdkFs97mG
H9I1KZ4URX7YwVahvO6G+bRSJLvJNqO3IwZIk/vbCOZQCyXz2RX7vHKN9J734ZBA
ThtdTvYCDBo0B70h/SAQYza3o40+WXHaDiEUbDa+3ExGOL0vg6hIzoLB5Gyc56CY
xKlaDeJUX2XcPoZ11feLbvYu0ylCThmsP/DR7t+qgfkqYfMM8Dw=
=+CSv
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9gIACgkQYKtH/8kJ
UicCFBAA5AQQaTZ7ru6bZnGMPMphO26fYTWokqLuRtky3Js6+MD8z6E9CE+KAqMe
uETX2ANP3yjIWRKO0ktRndckdA5IzOcyOP9Dp2VuQyuc6OCk7RU2gOvepazYgIu1
JTP/cjka+UwG6asCSQx8+5Ly00RZOTGoVfjfgu48gB3mE3tWPLN0L5C5MzqT4RgY
AQ4PWogpyj3GDq82eZtd3cXs+oTuz20x240pwZME9fP7Kja0dyp2Jm5ZrkrIcO+B
vV73MZM8eK2nePnpMC+2pUvvB9xH1/MJsaeJT6uz6RN6plex4MabobeZMrjhnPIG
43AaLMM7FMyfjW8hD0b8tQKyda3kXqsYsg/SlVqrA0d92XU//zTWLd7+EeJmEqsf
TxjmEKkgwK5tDnwuptnfnZLfvwXPRPqs5X6E+dXTUpTXFsXTTpXDvu3Tjn+B0prC
nk4PQBdHKPGxc2PY1L1uscPpGVjMSGjHAaXqIeup6BOuXoptorUCSzl6jKOiNlIc
787kqtlIgE/s0cdUjW2ma1oVhMJZcgAoxJi9UJoQ0ZzwBaBRaMhWYP+J19yGPx4D
joLmFFLH3M2sNQC+sFpL+aWtx+1/EShAJ6W3Bqt6yZ3DXyjyi35+Z2vlq31NMIT2
gDwWLFK+fa/t0mPzmtlmtO0nlUaISxZjr9jTs1Szwkro+Ik/SNo=
=CUSX
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.11-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.11-rc1
This contains one patch that reworks the device tree structure for
Jetson Orin NX and Jetson Orin Nano, which are both within the same
family. This restructuring makes it easier to extend both platforms
in a consistent way in the future.
* tag 'tegra-for-6.11-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Restructure Orin NX/Nano device tree
Link: https://lore.kernel.org/r/20240628210818.3627404-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the Elan I2C HID driver, to enable the touchscreen on devices
such as the Lenovo Thinkpad X13s.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaDbHgVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FapsQAIwlMQ6e5qgywmF54bKBVqMDLY+B
M/26B2SDz7oelSNTOR08xrnwumy7q65QSxE4zdIyDSR2D7PjbGhfdwmgXxTPNYdi
FK2k3btL2nRDQ96tnuujq8KMLH8sZHa9q+niSdEUhwRTvi40n7nbSJHLXMAE2ijd
wy94U8Kwvbd1wIiH/rAIsZs5u5PLmLlmJZPOgJQYGJIMXDRDkVPcyrQoShVgkCXU
0J9u2NCnKaZ9I/FVze0+rzXun6hGbszLTn88cdmUR02YiT5EvNaau/X74mz30nfY
Q9MsLdDpikR6LZWIE9bJS+sg+EHEFUVt7QVfUh7wywLYUtSXyXAFEu/2I0LK1Eb8
0ndVtozxUxo8OvdZGvGRk/JSt+ymhyr4sYGpu3dJhtpHHN2hA8pb5xCdhC7ZV/3w
Rwp0nstE5XyjFRm+1DQBmUntBH83wPut8cvghgXaInoLBXr9v/Ju22QqSvapdUcc
7dkXpDj23UqwKVGpOJ9gz4BdcEGJ00GX03fTKhPBcSsfMndkNC5bv9l4vNJNavjj
qF/b5MJTtL7Ohb0yDRL3JbcKDaUlzz6LKz+vVGej3Awz9AKrrkqRjBcw7IgDaiVb
WHi6wrVv2tLe+/mDiBWWhwPl3BKL/q2hBcXlWaGZFLuzL1P5/whxgnCBMvZGk87E
qRX78pGYJ8RAOUas
=Scit
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9NUACgkQYKtH/8kJ
UiduHg/+IWxteg40rG7DAa+IRXxWlKIBvO/8AhIoSPj/oJaSUJ2tDBXMeCzq5Waf
pR4+BQymnQIzubCRuPLdWvigeR0KOQ0wtPMhLVy7WQz4Ca+Hh1sLquszHxH3os6H
Fg8sXOIfaapEzYeU9J4wnQXdAeip1z7ZAXVtE18f5U5tz+t0spAHyv3+1zcitAuq
EcG5Oj28kdQQY+WpK4rnsXkg/NplQfZiQfUF16tZ8Q0SFRyrYk3G0JTHGc12E/8V
r9q7XooJ3t6uHlwsBUdWq6yTo4fUVpudK7FaypPwMtgzyN+H7LPIl3i+MvuUb9cd
/bExn6addfeaMFQiv4upZdZvu5GsAgX9cs9JMW+s2Z4Xchdo4B4iy6ijaQw2oNIW
8IOZYAKdEVAtIvNGB0Z5G7d+boQSbXlDpLobvB6qkLLDL8b8o3dGsmj0ZPn4rqO0
07yIbRi9QBKFBdeG6c3SFBI9dfyM+8Z7gSQ2I3WICQrndCSdTR54bwGYARiTdrDk
XJNNoW8zfHeg8JJnKttd3E0g5NQK4qDWkKtzdtihg7d8u9gr1i7yHMlbS4GamOY8
fAVH4poEJAGaYwzBPtiC1uin+Aa/00Mkthi9RaS0v3zxSRZlzL4SUHE0rFKhr6ab
2GeP19hyIiBY92lyrnSGk7MP/3Tnf2i+YbKdY6aRBz2s0Ndvv0g=
=IFD2
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 defconfig fixes for v6.10
Enable the Elan I2C HID driver, to enable the touchscreen on devices
such as the Lenovo Thinkpad X13s.
* tag 'qcom-arm64-defconfig-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: enable Elan i2c-hid driver
Link: https://lore.kernel.org/r/20240702025740.339563-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This marks the PSHOLD node on SC8280XP as reserved, to resolve a
regression where a reset is triggered instead of a clean shutdown. Also
on SC8280XP the touchscreen properties are adjusted to make it properly
described on CRD and make it work on the Lenovo Thinkpad X13s.
Corrects the LLCC definitions on SC8180X and QDU1000 to allow these
drivers and their dependencies to probe.
X1 Elite CRD is given more CMA space, to avoid running out during boot,
as PCIe SMMU is not accessible. Audio configuration is corrected, on
the same.
SM6115 SDHC is given an IOMMU stream, to avoid access issues.
Lastly the EL2 non-secure physical timer interrupt on SA8775P is
corrected from its previous incorrect value.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaDbysVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FjB4P/i8+CZGdqXeUbfX+QuRKr91W9m7H
NIdya6FZ6bg3RhmrLLlhmyG3iVVQNYvZ1mjAsK43xtnOU2DX/OMrNAUAdmagC5cI
VfjPGlHKbGmK5rfDfxYNRocszo/zh4CFQQmVElsBSaZyi1pPkfOWnUZjTzlAetS4
FMbrDjJyFDPxhzdhPZWyAEAd6eeYMbpEeXOB0NZGdsv3ncfg311cBy2MHEn052J9
lAOexSfhw1hNTMPSfjK/8OKQiAKuA5DWUxZL+/7/5P72zB0GZUCzDJABRRlaWjsM
d8eJenuHpluRZxSTtmw5uSmBjbKUW6Q3lhMNeVIcxDhyaMNq2Asw3LIiJFAXQmB3
goQek5Lc33VRAdnw6Vfphzy2nUBAeT5YBl+aGJb8cVR12BKWN0JiVVm1/Ewxd23j
GcfKTsLSMI1ZPOsjNgtoqa8O6y76vX1c0+Vn5GvG/8iSa5qlzattMD7hWra5erll
MhlOr3OikH1rhTTlJNc6WPJwmYbnf4DAemUyzvF9oIXZf5J05ljDW7KUBJyFH7ip
oIfi6JNsuABcDmT2vMFofw2jJwbo6wb1bxUoTYDITRy45GOs44pZAfuxFz5Z0vST
kGeqqi4xz3JhNTSLDf50ahJBOHapg5C1c+OSZ22muLGl/7Hzpmd2FhdI85e1+arL
TcF+8NCZBkpcraLa
=rkld
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9IAACgkQYKtH/8kJ
UifKORAAmbEROkWShKsTmVk9sl863SUqu3wPOyFUgY0Dw+xsUZum5yk1mxeuJCaE
3o5EzRerPwAyEcMw3jWXIYmKvwP4ocIMo7FVKLqD4icEteufM6uq03AeTMfkWi6v
J97zXSrl7lxr3hRnb5NvKm/gUakuHThRAUkzPxccHrgJz2bMbqD/Jz/lKUw+boip
Yjw/bk0rz+otSEk5uwG39lDP5eJgukH5cAMBo4YnmAd2KKr56TNPjqRCu2XGNHnU
HnJnw8v9iar3imUH7RlM6XBbdd2YDAe9nAcgHZ11ACVaO9eYtsLVHA4Ms6p3zUPE
kVtW8NcObc6MDLABc2x5J4lposaPuuVRquchlaPE7UTSidqkq2jvTcME40Mse+lp
MfoMhHN35FDtogYFVjvD4dmB1Q0bY74YPl9xa+NuymORJcft/Y3dAbInmsRhBdiC
ifK892Z76m7eob+ul7egNeY2uDitoSpY8GKL41EG98G+u/g93J/kv9wjO0o2JH62
RDJge8FY38noqLK3GIk3BIXq9730N+Tau9HGn/Lpqt8JWEAbTcgAH/wjXmKl/GkU
zFSgyRTbiyOx8tLsW9RF3D/YMPyzyhyAnwz03llX+iFXIws4o2LSGQ2u6ESsAXxP
BQ+XOj2WxGpaRMN8XIrgV08+TZwP6MkqaNK0PRSRAr+JEpRNVio=
=R3Mv
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm Arm64 DeviceTree fixes for v6.10
This marks the PSHOLD node on SC8280XP as reserved, to resolve a
regression where a reset is triggered instead of a clean shutdown. Also
on SC8280XP the touchscreen properties are adjusted to make it properly
described on CRD and make it work on the Lenovo Thinkpad X13s.
Corrects the LLCC definitions on SC8180X and QDU1000 to allow these
drivers and their dependencies to probe.
X1 Elite CRD is given more CMA space, to avoid running out during boot,
as PCIe SMMU is not accessible. Audio configuration is corrected, on
the same.
SM6115 SDHC is given an IOMMU stream, to avoid access issues.
Lastly the EL2 non-secure physical timer interrupt on SA8775P is
corrected from its previous incorrect value.
* tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: qdu1000: Fix LLCC reg property
arm64: dts: qcom: sm6115: add iommu for sdhc_1
arm64: dts: qcom: x1e80100-crd: fix DAI used for headset recording
arm64: dts: qcom: x1e80100-crd: fix WCD audio codec TX port mapping
arm64: dts: qcom: sc8280xp-crd: use external pull up for touch reset
arm64: dts: qcom: sc8280xp-x13s: fix touchscreen power on
arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI
arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
arm64: dts: qcom: sc8280xp: Set status = "reserved" on PSHOLD
arm64: dts: qcom: x1e80100-*: Allocate some CMA buffers
arm64: dts: qcom: sc8180x: Fix LLCC reg property again
Link: https://lore.kernel.org/r/20240702030913.340814-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit adds initial support for the LG K10 smartphone.
Support for the following features is included:
- Serial
- Keys
- Battery and charger
- Accelerometer, magnetometer
- Touchscreen
- Sound and modem
- Haptic
Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com>
[Nikita: Minor cleanup]
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240623-msm8916-lg-initial-v1-2-6fbcf714d69b@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
IPQ SoCs dont involve RPM in managing NoC related clocks and
there is no NoC scaling. Linux itself handles these clocks.
However, these should not be exposed as just clocks and align
with other Qualcomm SoCs that handle these clocks from a
interconnect provider.
Hence include icc provider capability to the gcc node so that
peripherals can use the interconnect facility to enable these
clocks.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20240430064214.2030013-7-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add a node for the vibrator module found inside the PM6150.
Signed-off-by: Jens Reidel <adrian@travitia.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240606181027.98537-3-adrian@travitia.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable download mode setting for sc7280 which can help collect
ramdump for this SoC.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240705143443.1491956-1-quic_mojha@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Configure the thermals for the PA_THERM1, MSM_THERM, PA_THERM0,
RFC_CAM_THERM, CAM_FLASH_THERM and QUIET_THERM thermistors connected to
PM6150L.
Due to hardware constraints we can only register 4 zones with
pm6150l_adc_tm, the other 2 we can register via generic-adc-thermal.
The trip points can really only be considered as placeholders, more
configuration with cooling etc. can be added later.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240705-fp4-thermals-v2-2-a4870a8d084f@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Configure the thermals for the XO_THERM thermistor connected to the
PMK8003 (which is called PMK8350 in software).
The ADC configuration for PMK8350_ADC7_AMUX_THM1_100K_PU has already
been added in the past.
The trip points can really only be considered as placeholders, more
configuration with cooling etc. can be added later.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240705-fp4-thermals-v2-1-a4870a8d084f@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SDM845, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SDM845 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: ca4db2b538 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-9-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like MSM8996, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for MSM8996 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 1e39255ed2 ("arm64: dts: msm8996: Add device node for qcom,dwc3")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-8-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SM6350, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SM6350 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 23737b9557 ("arm64: dts: qcom: sm6350: Add USB1 nodes")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-7-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SM6115, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SM6115 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 97e563bf5b ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-6-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like SDM630, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for SDM630 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: c65a4ed2ea ("arm64: dts: qcom: sdm630: Add USB configuration")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-5-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like MSM8998, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for MSM8998 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 026dad8f58 ("arm64: dts: qcom: msm8998: Add USB-related nodes")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-4-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like IPQ8074, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for IPQ8074 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 5e09bc51d0 ("arm64: dts: ipq8074: enable USB support")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For Gen-1 targets like IPQ6018, it is seen that stressing out the
controller in host mode results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command
xhci-hcd.12.auto: xHCI host controller not responding, assume dead
xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable
SuperSpeed instance in park mode for IPQ6018 to mitigate this issue.
Cc: stable@vger.kernel.org
Fixes: 20bb9e3dd2 ("arm64: dts: qcom: ipq6018: add usb3 DT description")
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240704152848.3380602-2-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add an initial devicetree for the Lenovo Yoga slim 7x with support for
Display, usb, keyboard, touchpad, touchscreen, PMICs, speaker audio, gpu,
NVMe and remoteprocs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Rob Clark <robdclark@gmail.com>
Link: https://lore.kernel.org/r/20240703-yoga-slim7x-v2-2-3b297dab8db1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add description for the SolidRun CN9131 SolidWAN, based on CN9130 SoM
with an extra communication processor on the carrier board.
This board differentiates itself from CN9130 Clearfog by providing
additional SoC native network interfaces and pci buses:
2x 10Gbps SFP+
4x 1Gbps RJ45
1x miniPCI-E
1x m.2 b-key with sata, usb-2.0 and usb-3.0
1x m.2 m-key with pcie and usb-2.0
1x m.2 b-key with pcie, usb-2.0, usb-3.0 and 2x sim slots
1x mpcie with pcie only
2x type-a usb-2.0/3.0
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add description for the SolidRun CN9130 SoM, and Clearfog Base / Pro
reference boards.
The SoM has been designed as a pin-compatible replacement for the older
Armada 388 based SoM. Therefore it supports the same boards and a
similar feature set.
Most notable upgrades:
- 4x Cortex-A72
- 10Gbps SFP
- Both eMMC and SD supported at the same time
The developer first supporting this product at SolidRun decided to use
different filenames for the DTBs: Armada 388 uses the full
"clearfog" string while cn9130 uses the abbreviation "cf".
This name is already hard-coded in pre-installed vendor u-boot and can
not be changed easily.
NOTICE IN CASE ANYBODY WANTS TO SELF-UPGRADE:
CN9130 SoM has a different footprint from Armada 388 SoM.
Components on the carrier board below the SoM may collide causing
damage, such as on Clearfog Base.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Bindings expect the LED node names to follow certain pattern, see
dtbs_check warnings:
armada-3720-gl-mv1000.dtb: leds: 'power', 'vpn', 'wan' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Bindings expect the GPIO key node names to follow certain pattern, see
dtbs_check warnings:
armada-3720-gl-mv1000.dtb: keys: 'reset' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)...
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
ETHERNET2 instance is connected to Realtek PHY in RGMII mode
Ethernet is SNSP IP with GMAC5 version.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add pinctrl entry related to ETH2 in stm32mp25-pinctrl.dtsi
ethernet2: RGMII with crystal.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Both instances ethernet based on GMAC SNPS IP on stm32mp25.
GMAC IP version is SNPS 5.3
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The High Performance Direct Memory Access (HPDMA) controller is used to
perform programmable data transfers between memory-mapped peripherals
and memories (or between memories) via linked-lists.
There are 3 instances of HPDMA on stm32mp251, using stm32-dma3 driver, with
16 channels per instance and with one interrupt per channel.
Channels 0 to 7 are implemented with a FIFO of 8 bytes.
Channels 8 to 11 are implemented with a FIFO of 32 bytes.
Channels 12 to 15 are implemented with a FIFO of 128 bytes.
Thanks to stm32-dma3 bindings, the user can ask for a channel with specific
FIFO size.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fixed the PHY address and reset GPIOs (does not match the corresponding
pinctrl) for gmac0 and gmac1.
Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-7-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The R66S and R68S boards do not have HDMI output, so disable
the display subsystem.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240701143028.1203997-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix the following error when booting:
[ 15.851853] platform fd800000.usb: deferred probe pending
[ 15.852384] platform fd840000.usb: deferred probe pending
[ 15.852881] platform fd880000.usb: deferred probe pending
This is due to usb2phy1 is not enabled. There is no USB 2.0
port on the board, just remove it.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-5-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fixes pmu_io_domains supply according to the schematic. Among them,
the vccio3 is responsible for the io voltage of sdcard. There is no
sdcard slot on the R68S, and it's connected to vcc_3v3, so describe
the supply of vccio3 separately.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-4-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Remove the non-existent usb_host regulator and fix the supply according
to the schematic. Also remove the unnecessary always-on and boot-on for
the usb_otg regulator.
Fixes: c79dab407a ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240701143028.1203997-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
There have been several attempts to set the dma-names property on the
SoC level (in rk356x.dtsi), but that appears to cause problems when set
on channels without flow control.
Quoting part of a previous attempt for clarification:
> Nah, enabling it for bluetooth is fine because you have flow control.
> My issues have been on channels without flow control. Without DMA it
> simply drops messages or the channel hangs until you close and reopen
> it. With DMA, when an overflow locks up the channel it is usually
> unavailable until the board is rebooted.
Setting it on the board level for the bluetooth connection was deemed
safe, so do so for the Quartz64 Model B.
This fixes the following error/warning:
of_dma_request_slave_channel: dma-names property of node
'/serial@fe650000' missing or empty
dw-apb-uart fe650000.serial: failed to request DMA
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://libera.irclog.whitequark.org/armlinux/2024-02-29
Link: https://lore.kernel.org/linux-rockchip/18284546.sWSEgdgrri@diego/
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240628120130.24076-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add support for voltage ranges to the GPU OPPs defined in the SoC dtsi for
Rockchip RK356x. This is, for example, useful for RK356x-based boards that
are designed to use the same power supply for the GPU and NPU portions of
the SoC, which is described further in the following documents:
- Rockchip RK3566 Hardware Design Guide, version 1.1.0, page 37
- Rockchip RK3568 Hardware Design Guide, version 1.2, page 78
The values for the exact GPU OPP voltages and the lower limits for the GPU
OPP voltage ranges differ from the values found in the vendor kernel source
(cf. downstream commit f8b9431ee38e ("arm64: dts: rockchip: rk3568: support
adjust opp-table by otp")), [1][2] and present the exact GPU OPP voltage
values that have served us well so far.
[1] f8b9431ee3
[2] https://raw.githubusercontent.com/rockchip-linux/kernel/f8b9431ee38ed561650be7092ab93f564598daa9/arch/arm64/boot/dts/rockchip/rk3568.dtsi
Suggested-by: Diederik de Haas <didi.debian@cknow.org>
Helped-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/7e9ba70fd54a21d6f1f267df11e0acabff8d24e0.1719763100.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rtl82xx DT bindings do not require ethernet-phy-ieee802.3-c22
as the fallback compatible string. There are fewer users of the
Realtek PHY compatible string with fallback compatible string than
there are users without fallback compatible string, so drop the
fallback compatible string from the few remaining users:
$ git grep -ho ethernet-phy-id001c....... | sort | uniq -c
1 ethernet-phy-id001c.c816",
2 ethernet-phy-id001c.c915",
2 ethernet-phy-id001c.c915";
5 ethernet-phy-id001c.c916",
13 ethernet-phy-id001c.c916";
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406290316.YvZdvLxu-lkp@intel.com/
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240630034910.173552-2-marex@denx.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The iommu@fe043e00 on RK356x SoC shares the VOP power domain, but the
power-domains property was not provided when the node has been added.
The consequence is that an attempt to reload the rockchipdrm module will
freeze the entire system. That is because on probe time,
pm_runtime_get_suppliers() gets called for vop@fe040000, which blocks
when pm_runtime_get_sync() is being invoked for iommu@fe043e00.
Fix the issue by adding the missing property.
Fixes: 9d6c6d978f ("arm64: dts: rockchip: rk356x: Add VOP2 nodes")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240702-rk356x-fix-vop-mmu-v1-1-a66d1a0c45ea@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
For varying privacy and security reasons, sometimes we would like to
completely silence the _serial_ console, and only enable it when needed.
But there are many existing systems that depend on this _serial_ console,
so add acpi=nospcr to disable console in ACPI SPCR table as default
_serial_ console.
Signed-off-by: Liu Wei <liuwei09@cestc.cn>
Suggested-by: Prarit Bhargava <prarit@redhat.com>
Suggested-by: Will Deacon <will@kernel.org>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Prarit Bhargava <prarit@redhat.com>
Link: https://lore.kernel.org/r/20240625030504.58025-1-liuwei09@cestc.cn
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>