Commit Graph

857571 Commits

Author SHA1 Message Date
Tamás Szűcs
75eaf49f5d mmc: sdhi: fill in actual_clock
Save set clock in mmc_host actual_clock enabling exporting it via debugfs.
This will indicate the precise SD clock in I/O settings rather than only the
sometimes misleading requested clock.

Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Masahiro Yamada
38eee2e82c mmc: sdhci: use lower/upper_32_bits() macros for DMA addresses
Currently, the DMA addresses are casted to (u64) for the upper 32bits
to avoid "right shift count >= width of type" warning.

<linux/kernel.h> provides macros to address this, and I like the macro
names are self-documenting.

I introduced a new helper, sdhci_set_adma_addr() to avoid the code
duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Masahiro Yamada
12a632e60a mmc: sdhci-cadence: override spec version
The datasheet of the IP (sd4hc) says it is compiatible with SDHCI v4,
but the spec version field in the version register is read as 2
(i.e. SDHCI_SPEC_300) based on the RTL provided by Cadence.

Socionext did not fix it up when it integrated the IP into the SoCs.
So, it is working as SDHCI v3.

It is not a real problem because there is no difference in the program
flow in sdhci.c between SDHCI_SPEC_300/400, but set the real version
just in case.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Masahiro Yamada
8784edc8fa mmc: sdhci: constify references of parameters to __sdhci_read_caps()
__sdhci_read_caps() does not modify *ver, *caps, or *caps1.

Probably, the caller of this function will want to constifythe
parameters passed in.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
yong mao
26c71a13a8 mmc: mediatek: enable SDIO IRQ low level trigger function
SDIO IRQ is not defaultly triggered by low level,
but by falling edge. It needs to set related register
to enable SDIO IRQ low level trigger function.
Otherwise the SDIO IRQ may be lost in some specail condition.

Signed-off-by: Yong Mao <yong.mao@mediatek.com>
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ben Chuang
7353788c6a mmc: sdhci: Export sdhci_abort_tuning function symbol
Export sdhci_abort_tuning() function symbols which are used by other SD Host
controller driver modules.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ben Chuang
4460d68f0b PCI: Add Genesys Logic, Inc. Vendor ID
Add the Genesys Logic, Inc. vendor ID to pci_ids.h.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ben Chuang
1beabbdba7 mmc: sdhci: Add PLL Enable support to internal clock setup
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ben Chuang
4a9e0d1a62 mmc: sdhci: Change timeout of loop for checking internal clock stable
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ramuthevar Vadivel Muruganx
5c1a4f4070 mmc: sdhci-of-arasan: Add Support for Intel LGM eMMC
The current arasan sdhci PHY configuration isn't compatible
with the PHY on Intel's LGM(Lightning Mountain) SoC devices.

Therefore, add a new compatible, to adapt the Intel's LGM
eMMC PHY with arasan-sdhc controller to configure the PHY.

Signed-off-by: Ramuthevar Vadivel Muruganx <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ramuthevar Vadivel Murugan
310da16ea9 dt-bindings: mmc: sdhci-of-arasan: Add new compatible for Intel LGM eMMC
Add a new compatible to use the sdhc-arasan host controller driver
with the eMMC PHY on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Wei Yongjun
f70d9a2440 mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()
In case of error, the function of_platform_device_create() returns
NULL pointer not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Andrew Jeffery
f47fdb855d dt-bindings: mmc: sdhci-of-aspeed: Update example ranges property
The example node in the binding uses the AST2500 compatible string for
the SD controller with a 64kiB ranges property, but the SD controller is
allocated 128kiB of MMIO space according to the AST2500 datasheet. Fix
the example to correctly reflect the hardware in the AST2500, however it
should be noted that the MMIO region is reduced to 64kiB in the AST2600
where a second SD controller block has been introduced into the address
space.

Also add the IBM copyright header that I left out of the initial patch.

Suggested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Stefan Wahren
d4dd9bccf4 mmc: bcm2835: Take SWIOTLB memory size limitation into account
Make sure the sdhost driver doesn't use requests bigger than SWIOTLB
can handle.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Andrew Jeffery
bb7b8ec62d mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller
Add a minimal driver for ASPEED's SD controller, which exposes two
SDHCIs.

The ASPEED design implements a common register set for the SDHCIs, and
moves some of the standard configuration elements out to this common
area (e.g. 8-bit mode, and card detect configuration which is not
currently supported).

The SD controller has a dedicated hardware interrupt that is shared
between the slots. The common register set exposes information on which
slot triggered the interrupt; early revisions of the patch introduced an
irqchip for the register, but reality is it doesn't behave as an
irqchip, and the result fits awkwardly into the irqchip APIs. Instead
I've taken the simple approach of using the IRQ as a shared IRQ with
some minor performance impact for the second slot.

Ryan was the original author of the patch - I've taken his work and
massaged it to drop the irqchip support and rework the devicetree
integration. The driver has been smoke tested under qemu against a
minimal SD controller model and lightly tested on an ast2500-evb.

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Andrew Jeffery
7a7e55f416 dt-bindings: mmc: sdhci-of-aspeed: Document Aspeed SD controller
The ASPEED SD/SDIO/MMC controller exposes two slots implementing the
SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit
data bus if only a single slot is enabled.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Chaotian Jing
6ef042bd00 mmc: mediatek: support 24bits segment size
MSDC IP which support 64G DRAM will support 24bits BDMA buffer length,
so add support it.

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Chaotian Jing
da6e0f7024 mmc: mediatek: fix controller busy when plug out SD
when plug out SD card, may get data CRC error, the MMC core will issue
CMD13 to get card status, then CMD13 timeout(due to card plug out) will
trigger CMD19 tuning, first CMD19 timeout has not call msdc_reset_hw()
and cause the next CMD19 gets controller busy.

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Yoshihiro Shimoda
bb716606ff mmc: renesas_sdhi_sys_dmac: Remove all R-Car Gen3 SoCs
All R-Car Gen3 SoCs with any ES version cannot use this DMAC actually.
So, this patch removes the compatibles of R-Car Gen3 SoCs from
renesas_sdhi_sys_dmac_of_match. Since the previous code has
an empty whitelist to prevent probing of R-Car Gen3 SoCs,
no behavior changes.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Paul Cercueil
6e943c1500 mmc: jz4740: Drop dependency on arch header
We don't need to set the 'slave_id' anymore - that field is never read
by the DMA driver.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Paul Cercueil
65af9866ce mmc: jz4740: Code cleanup
Fix wrong code indentation which made the code hard to read, and fix
return with value in void function.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Gustavo A. R. Silva
159a8b4621 mmc: sdhci-cadence: use struct_size() helper
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct sdhci_cdns_priv {
	...
        struct sdhci_cdns_phy_param phy_params[0];
};

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes.

So, replace the following form:

sizeof(*priv) + sizeof(priv->phy_params[0]) * nr_phy_params

with:

struct_size(priv, phy_params, nr_phy_params)

Also, notice that, in this case, variable priv_size is not necessary,
hence it is removed.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Yinbo Zhu
5f3ad19638 mmc: sdhci-of-esdhc: add erratum A011334 support in ls1028a 1.0 SoC
This patch is to add erratum A011334 support in ls1028a 1.0 SoC

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Stephen Boyd
9a7957d0c9 mmc: Remove dev_err() usage after platform_get_irq()
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.

// <smpl>
@@
expression ret;
struct platform_device *E;
@@

ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);

if ( \( ret < 0 \| ret <= 0 \) )
{
(
-if (ret != -EPROBE_DEFER)
-{ ...
-dev_err(...);
-... }
|
...
-dev_err(...);
)
...
}
// </smpl>

While we're here, remove braces on if statements that only have one
statement (manually).

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-mmc@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Adrian Hunter
8f05eee67c mmc: sdhci-pci: Add another Id for Intel CML
Add another PCI Id for Intel CML.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Gustavo A. R. Silva
b1507b2d34 mmc: sdhci-s3c: Mark expected switch fall-through
Mark switch cases where we are expecting to fall through.

This patch fixes the following warnings:

drivers/mmc/host/sdhci-s3c.c: In function 'sdhci_s3c_probe':
drivers/mmc/host/sdhci-s3c.c:613:19: warning: this statement may fall through [-Wimplicit-fallthrough=]
   host->mmc->caps |= MMC_CAP_8_BIT_DATA;
drivers/mmc/host/sdhci-s3c.c:614:2: note: here
  case 4:
  ^~~~

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Gustavo A. R. Silva
7789a98a99 mmc: atmel-mci: Mark expected switch fall-throughs
Mark switch cases where we are expecting to fall through.

This patch fixes the following warnings:

drivers/mmc/host/atmel-mci.c: In function 'atmci_get_cap':
drivers/mmc/host/atmel-mci.c:2415:30: warning: this statement may fall through [-Wimplicit-fallthrough=]
   host->caps.has_odd_clk_div = 1;
   ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
drivers/mmc/host/atmel-mci.c:2416:2: note: here
  case 0x400:
  ^~~~
drivers/mmc/host/atmel-mci.c:2422:28: warning: this statement may fall through [-Wimplicit-fallthrough=]
   host->caps.has_highspeed = 1;
   ~~~~~~~~~~~~~~~~~~~~~~~~~^~~
drivers/mmc/host/atmel-mci.c:2423:2: note: here
  case 0x200:
  ^~~~
drivers/mmc/host/atmel-mci.c:2426:40: warning: this statement may fall through [-Wimplicit-fallthrough=]
   host->caps.need_notbusy_for_read_ops = 1;
   ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
drivers/mmc/host/atmel-mci.c:2427:2: note: here
  case 0x100:
  ^~~~

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Jisheng Zhang
73e01ab232 mmc: sdhci-pltfm: Use devm_platform_ioremap_resource() to simplify code
devm_platform_ioremap_resource() wraps platform_get_resource() and
devm_ioremap_resource() in a single helper, let's use that helper to
simplify the code.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Ulf Hansson
a9cbd79c7e mmc: mmci: Clarify comments and some code for busy detection
The code dealing with busy detection is somewhat complicated. In a way to
make it a bit clearer, let's try to clarify the comments in the code about
it.

Additionally, move the part for clearing the so called busy start IRQ, to
the place where the IRQ is actually delivered. Ideally, this should make
the code a bit more robust.

Finally, to improve understanding of the code and the sequence of the busy
detection, move the corresponding code around a bit in mmci_cmd_irq().

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Jean Nicolas GRAUX <jean-nicolas.graux@st.com>
Reviewed-by: Jean Nicolas GRAUX <jean-nicolas.graux@st.com>
2019-09-11 15:58:39 +02:00
Chuhong Yuan
deaa539895 memstick: r592: Use dev_get_drvdata
Instead of using to_pci_dev + pci_get_drvdata,
use dev_get_drvdata to make code simpler.

Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Chuhong Yuan
90b51e3c5b mmc: sdhci-pci: Use dev_get_drvdata
Instead of using to_pci_dev + pci_get_drvdata,
use dev_get_drvdata to make code simpler.

Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Stefan Wahren
f84e411c85 mmc: sdhci-iproc: Add support for emmc2 of the BCM2711
The additional emmc2 interface of the BCM2711 is an improved version
of the old emmc controller, which is able to provide DDR50 mode on the
Raspberry Pi 4. Except 32 bit only register access no other quirks are
known yet.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Stefan Wahren
3aacc5bba7 dt-bindings: mmc: sdhci-iproc: Add brcm,bcm2711-emmc2
Add a new compatible for the additional emmc2 controller
on BCM2711 and clearify usage.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Maxime Ripard
f84cf82bae dt-bindings: mmc: sunxi: Add H5 compatibles
The conversion to the YAML binding left out two compatibles. Add them.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Maxime Ripard
d9f43d113e dt-bindings: mmc: sunxi: reorder MMC compatibles
The MMC compatibles in the bindings are not ordered as they should, so
let's make sure it's sorted.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Anson Huang
59532dbb49 mmc: mxs: use devm_platform_ioremap_resource() to simplify code
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Lars Persson
6eb1cc1a4a mmc: usdhi6rol0: Add maintainers
The usdhi6rol0 driver is exclusively used for the ARTPEC family of
SoCs. Other SoCs with the same IP of Panasonic origin use the tmio_mmc
driver. Therefore we assigner maintainer responsibility to us at Axis
until the two drivers become unified.

Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-09-11 15:58:39 +02:00
Linus Torvalds
f74c2bb987 Linux 5.3-rc8 2019-09-08 13:33:15 -07:00
Linus Torvalds
983f700eab Fix Oops in Clang-compiled kernels (Nick Desaulniers)
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPjU5OPd5QIZ9jqqOGXyLc2htIW0FAl11AIYACgkQGXyLc2ht
 IW1uAQ/+LkwyLy5NfQG0FuWJBsciE8a4dNpN51d8l4EnCsYZVyJXvzleQ0fYGYW3
 xfecrc6bArjN1yZzYhQLJyxZbCFfSRVCu+fCx03uRR2kKXmMPNasjMf/tEm3RgGd
 YOeWpE1cQEJ5t7RuR+HJJoS7oEvUWLOb/rKGV2K6hvQZyv4kYW4uJStUKjUHcDwx
 uIISv7FOOoEY1ZPwtTjbhSRULyBZddDPusWV455j5sAiJD6L15kg6t9/FLaKD+hu
 yA1Z9dv53XFEb5n3s2A9IujpD46N4BykXBB82+GAFYbei+6Ca6mpJp0DaYY2gwqP
 K4XmL+YPwIW0xN7Nv/otM6sehHf40UepWaPhvNKlaicQGAbwTpYEwFp7bViaZ2Sv
 Tj0tDAjkuhAGvdtLc367zyCIEP3XHwyfv8SnoNYiNtb7fcv9hhUsxLOFkr+XKt5S
 jdO0xZH0hGF42yr+MsjIdRXoAfZEHFqETy8paorgxqU02NScpmi/+r8pcTo8pqV3
 w7ziJTB6hoWPw2RNA/VphxucwnbCnZD79P35sE8nhBS94OSi4o27wBZ+B1hCg08Z
 /6ZCT2VlDfgIszH+ueQLa4b53lzTI6EDYyMomLJEvM1jLkSmojzTIzWgMfiN3E4T
 gIu/8ogDHCmDM+nT94/7YYhWcEefuzzO1YYilKCZ4IZxU5DyrlQ=
 =+sX1
 -----END PGP SIGNATURE-----

Merge tag 'compiler-attributes-for-linus-v5.3-rc8' of git://github.com/ojeda/linux

Pull section attribute fix from Miguel Ojeda:
 "Fix Oops in Clang-compiled kernels (Nick Desaulniers)"

* tag 'compiler-attributes-for-linus-v5.3-rc8' of git://github.com/ojeda/linux:
  include/linux/compiler.h: fix Oops for Clang-compiled kernels
2019-09-08 09:34:55 -07:00
Linus Torvalds
def8b72f0e GPIO fixes for the v5.3 series:
all related to the PCA953x driver when handling chips with
 more than 8 ports, now that works again.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl10s9IACgkQQRCzN7AZ
 XXOy4w/8C9HdOgg4CPCJM8YmBZUiTxbLBjAxyIQ0bkdFB65GcGXwWurhFwguXg1G
 kS9pGDeibW/2pEgF6skONwLIBELXlLaJiuT2y/Vzyoi1oV4URimUDNVlkbwXikUp
 6HVzAO6Xo7rCXy4mfQ92rNeVFe2YWBowUgPpfKjTA6Dz+953eDaLg53LRNhdwBW1
 RVda9Mufr3cUqH4mTC/pH3xnZAJNUxwq7JJ+bX+jYWgNb+LGgIoXCKLRkU1F4TeF
 qwKGFrg590/QCg2qgqoZmUS5B7NuQoe1N9AuPS6UIURlpzz7bOhg3Z9K3db07bdB
 D2yzZhfY3wi4oefe9MpUzgqhVfrRS4F+OBhSLsCCDkRxE4P8+ybrIGQh0sfwy34i
 4NwZdtZLWi8MPeXhRoZGUdP4j/63FqCEwFJcWWN4YVRpLBKN5IVC0R663tC24YTD
 SReSZrvzd/a5URCKDhTm3DJf6JbiaOmNE7LzdZK1qcgVd9E/vKDlrdZNSLxi6G0p
 nCvlQ4QhxCswvRnNafIuFn2HWmcAYj4VinrprtQnlIYFjXvx1uEaSi12Qv2sZOKv
 CTSYFL7+T4xegXVR+5M9VhCSj6fbGJiUZShQ4wXctOdIkHfIyJm+pRVLLaZVHwBm
 YslXu3mmjFiuYfxgP5c9KNki5gH1sU/caqbwtbMwgQBO4sjC6fg=
 =MYtE
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v5.3-5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO fixes from Linus Walleij:
 "All related to the PCA953x driver when handling chips with more than 8
  ports, now that works again"

* tag 'gpio-v5.3-5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
  gpio: pca953x: use pca953x_read_regs instead of regmap_bulk_read
  gpio: pca953x: correct type of reg_direction
2019-09-08 09:30:31 -07:00
Nick Desaulniers
bfafddd8de include/linux/compiler.h: fix Oops for Clang-compiled kernels
GCC unescapes escaped string section names while Clang does not. Because
__section uses the `#` stringification operator for the section name, it
doesn't need to be escaped.

This fixes an Oops observed in distro's that use systemd and not
net.core.bpf_jit_enable=1, when their kernels are compiled with Clang.

Link: https://github.com/ClangBuiltLinux/linux/issues/619
Link: https://bugs.llvm.org/show_bug.cgi?id=42950
Link: https://marc.info/?l=linux-netdev&m=156412960619946&w=2
Link: https://lore.kernel.org/lkml/20190904181740.GA19688@gmail.com/
Acked-by: Will Deacon <will@kernel.org>
Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
Suggested-by: Josh Poimboeuf <jpoimboe@redhat.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
[Cherry-picked from the __section cleanup series for 5.3]
[Adjusted commit message]
Signed-off-by: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com>
2019-09-08 14:53:58 +02:00
Linus Torvalds
950b07c14e Revert "x86/apic: Include the LDR when clearing out APIC registers"
This reverts commit 558682b529.

Chris Wilson reports that it breaks his CPU hotplug test scripts.  In
particular, it breaks offlining and then re-onlining the boot CPU, which
we treat specially (and the BIOS does too).

The symptoms are that we can offline the CPU, but it then does not come
back online again:

    smpboot: CPU 0 is now offline
    smpboot: Booting Node 0 Processor 0 APIC 0x0
    smpboot: do_boot_cpu failed(-1) to wakeup CPU#0

Thomas says he knows why it's broken (my personal suspicion: our magic
handling of the "cpu0_logical_apicid" thing), but for 5.3 the right fix
is to just revert it, since we've never touched the LDR bits before, and
it's not worth the risk to do anything else at this stage.

[ Hotpluging of the boot CPU is special anyway, and should be off by
  default. See the "BOOTPARAM_HOTPLUG_CPU0" config option and the
  cpu0_hotplug kernel parameter.

  In general you should not do it, and it has various known limitations
  (hibernate and suspend require the boot CPU, for example).

  But it should work, even if the boot CPU is special and needs careful
  treatment       - Linus ]

Link: https://lore.kernel.org/lkml/156785100521.13300.14461504732265570003@skylake-alporthouse-com/
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Bandan Das <bsd@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-09-07 14:25:54 -07:00
Linus Torvalds
b3a9964cfa Documentation update for 5.3-rc8
Here is a few small patches for the documenation file that came in
 through the char-misc tree in -rc7 for your tree.  They fix the mistake
 in the .rst format that kept the table of companies from showing up in
 the html output, and most importantly, add people's names to the list
 showing support for our process.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXXPyjA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylx1ACfTV2bj5y47d2JOL4K9fG5MOwQ4NUAoIDpi/eS
 q+Ere5H4JyL+cPi8mELt
 =FvIF
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.3-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull Documentation updates from Greg KH:
 "A few small patches for the documenation file that came in through the
  char-misc tree in -rc7 for your tree.

  They fix the mistake in the .rst format that kept the table of
  companies from showing up in the html output, and most importantly,
  add people's names to the list showing support for our process"

* tag 'char-misc-5.3-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
  Documentation/process: Add Qualcomm process ambassador for hardware security issues
  Documentation/process/embargoed-hardware-issues: Microsoft ambassador
  Documentation/process: Add Google contact for embargoed hardware issues
  Documentation/process: Volunteer as the ambassador for Xen
2019-09-07 11:48:28 -07:00
Trilok Soni
a8e0abae2f Documentation/process: Add Qualcomm process ambassador for hardware security issues
Add Trilok Soni as process ambassador for hardware security issues
from Qualcomm.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Link: https://lore.kernel.org/r/1567796517-8964-1-git-send-email-tsoni@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-09-07 18:30:54 +01:00
Linus Torvalds
d3464ccd10 dmaengine late fixes for 5.3
Some late fixes for drivers:
  - memory leak in ti crossbar dma driver
  - cleanup of omap dma probe
  - Fix for link list configuration in sprd dma driver
  - Handling fixed for DMACHCLR if iommu is mapped in rcar dma
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJdc2UTAAoJEHwUBw8lI4NHOyMP/R/rB6DdQ1TLbe+NciH/0WZT
 OL0oTSQ3K3pCiA9XqPa1VXaOwPo0w3151Fzd44pfhoQkKGXUpBNHDRSfsV4kvajA
 E9weDEfvatrsh9N5R7ml+sWpsu+dd28NyCIOydDVOx+QjS4f9qZyNcUsnKNKlEij
 N2ZCQpBozQa8kXhDymI5V1ldJSA8OzOqTgdRGKJFwg69hzpUSrkfSbjjhCubA943
 LFLrQ1yp2lRwvd1HAKQutWGzzbXV9PiFCYWTcxHClaYjjhqNY/HBRppAw/Nfi4Qt
 C4JV2fi7IXTqNU5VJD6bfDtL4K2+oA0xkhuqdolrWFu0n1KBDDzC99zPEcjysQrK
 TWaGSNzR0oH9Xgk2IM75Srjorn3ErU5VSW0M8TSVBCoEj8Jt/R2GVFOrtCNMF8KN
 7Lv48FZQsv8SoMeEgH6Kq4GuqRtFbqVzJdkeHpjfNe0hih5PNNW1+VM2RTkoJkPd
 qG7YavUqKbOTbR+QXVY9TLyV14/fp5OnDhrBWZ4vJxU0waHkxNbNLIlEChs8Pa9O
 6UVnpl3bnKzDdFUEf6am5kjOEzTfxlbWcm5AA8rNyGHStDucgq/3c/FLZCuEPLtf
 VPrbR8oMe9iHZjRLwjSgVc1EjfWhmYeAOEBnAhi4duhgq+sXBfomrp8Y1B4voCkA
 m1UxFdLiAl+n1p4MQ9vA
 =rSgu
 -----END PGP SIGNATURE-----

Merge tag 'dmaengine-fix-5.3' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine fixes from Vinod Koul:
 "Some late fixes for drivers:

   - memory leak in ti crossbar dma driver

   - cleanup of omap dma probe

   - Fix for link list configuration in sprd dma driver

   - Handling fixed for DMACHCLR if iommu is mapped in rcar dma"

* tag 'dmaengine-fix-5.3' of git://git.infradead.org/users/vkoul/slave-dma:
  dmaengine: rcar-dmac: Fix DMACHCLR handling if iommu is mapped
  dmaengine: sprd: Fix the DMA link-list configuration
  dmaengine: ti: omap-dma: Add cleanup in omap_dma_probe()
  dmaengine: ti: dma-crossbar: Fix a memory leak bug
2019-09-07 10:00:34 -07:00
Linus Torvalds
1e3778cb22 SCSI fixes on 20190906
Just a single lpfc fix adjusting the number of available queues for
 high CPU count systems.
 
 Signed-off-by: James E.J. Bottomley <jejb@linux.ibm.com>
 -----BEGIN PGP SIGNATURE-----
 
 iJwEABMIAEQWIQTnYEDbdso9F2cI+arnQslM7pishQUCXXK/9iYcamFtZXMuYm90
 dG9tbGV5QGhhbnNlbnBhcnRuZXJzaGlwLmNvbQAKCRDnQslM7pishUTCAP9C9a9W
 sUBdDpe1bedPFJBBqT3540rucXGlSINXpm20RAEA7C9BkrHk7wFpCmieZscdDG2v
 T5o0P6RYDEShcm91HLk=
 =lrs3
 -----END PGP SIGNATURE-----

Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull SCSI fix from James Bottomley:
 "Just a single lpfc fix adjusting the number of available queues for
  high CPU count systems"

* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
  scsi: lpfc: Raise config max for lpfc_fcp_mq_threshold variable
2019-09-06 16:18:43 -07:00
Linus Torvalds
7641033e17 libnvdimm fix v5.3-rc8
- Restore support for 1GB alignment namespaces, truncate the end of
   misaligned namespaces.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJdcrYBAAoJEB7SkWpmfYgCIdoQAISVni+8vLZBWe9em1oCeFRP
 xcb/2uyI3r0Ctmc8MrUKP58z1LBexhxomdAPK2gtnKkQ7zP8W/M2cFhpoA9bdp5A
 +yAlCg1N+WjjJ19AEaxicDhtuOzDnPUVJu4AHmGfhTYyunz/+lcMeyBKrpIXrou4
 NxU1SNm7/fQw9k6/aKBbEOYwrYplhxtcVMmNW1p70unHvaS0tIG7qdVYph8GVdbz
 JnMVBz2hW1KlqGo4PVkglNeK65eolX/8be5VJSVQrSu7phsCbICFQCViz73dnrt7
 0rpcdb8HlW1zh/n/7rxHVTBwWdIylMVm1DXX0BiXcj+vX64Nt5vbfSZAxIm+wzJu
 yr8vJ7LmWWMlza0gqwPkeOMCeUuHUeGgjn0OFohsN0S+XmoyBIyNUxwYvbJdpIf0
 8n31HWMMC76TwE5elO1Z3HjXfCfEV9kKpNLdAhi//xuHVKh9nQOYvidm/kTDEKJR
 +9r4Df4IZtQJIS5o10Q4kffiokxPEIy7QNrwn4/p53v4vSK65yiSTHajbxgcUFcC
 SFB1db3tv4TmWnVrzvqKowJE1TtSHyW9pHr33EVRaiCFnWgnsQsWPqdP5SmO+WZX
 lH4PhUMaVSN2ROZTQFg4EYreh2X/+IlOfhKyLFsoN+wQjMv3VXK8wxpsUtFVllmF
 Ja9QGiNImyW0kId//IKK
 =CEfh
 -----END PGP SIGNATURE-----

Merge tag 'libnvdimm-fix-5.3-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm

Pull libnvdimm fix from Dan Williams:
 "Restore support for 1GB alignment namespaces, truncate the end of
  misaligned namespaces"

* tag 'libnvdimm-fix-5.3-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm:
  libnvdimm/pfn: Fix namespace creation on misaligned addresses
2019-09-06 16:14:32 -07:00
Linus Torvalds
9772152b4b Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input fix from Dmitry Torokhov:
 "A tiny update from Benjamin removing a mistakenly added Elan PNP ID so
  that the device is again handled by hid-multitouch"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: elan_i2c - remove Lenovo Legion Y7000 PnpID
2019-09-06 16:12:30 -07:00
Benjamin Tissoires
0c043d70d0 Input: elan_i2c - remove Lenovo Legion Y7000 PnpID
Looks like the Bios of the Lenovo Legion Y7000 is using ELAN061B
when the actual device is supposed to be used with hid-multitouch.

Remove it from the list of the supported device, hoping that
no one will complain about the loss in functionality.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=203467
Fixes: 738c06d0e4 ("Input: elan_i2c - add hardware ID for multiple Lenovo laptops")
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2019-09-06 15:40:22 -07:00
Linus Torvalds
36daa831b5 ARM: SoC fixes
There are three more fixes for this week:
 
 - The Windows-on-ARM laptops require a workaround to
   prevent crashing at boot from ACPI
 - The Renesas "draak" board needs one bugfix for
   the backlight regulator
 - Also for Renesas, the "hihope" board accidentally
   had its eMMC turned off in the 5.3 merge window.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJdcrXdAAoJEJpsee/mABjZ99QP/0Js6+FE+JXOsiUuREdiU8JC
 CmKPbtPT+IyOP+068bpkU1cWWVJ0fyF126D7mfsQfL/VrQTnqCAqkytBidUmh5kX
 LT0392kaB+zLlbCgxX3xdBOBpMT2j/kFE9YbtBQG59867zH1Y5q6U/Pek0lWze39
 llraW2Nlwr/SW+Ffw0tGLXi8dl9FVYNl3jNKfK2/EM51kEeqwTcJvI0WXgOtsUK3
 oiEamod7mQNGEcqnxWf/W9Pj76Y8dlw5H7Q2aTqsb4bYOB0QdCUZqiLfXhyQn0qZ
 wy3bnC5Y+nIg9N2I4GRp0MLQ54xdN41gZtX25OdmPIvawxnf2dfwinN9EeGxUn3G
 RTgv4eBRRNVlheEdUkoyvLaz9jtOO5NCebti9foYcZv9HDEoIHhCqCjgmU7DrW+2
 eP+6pTwnbokbCDtsQ4okfJrAlMkOz4ynGs3sDwzqyxwXKr8Ez0Gho7nVbrRakH4A
 fOmDAZEqcNNGCUC5S1LLZNVLC0hp7HDb50uqJnVcirSxw2Qr/RPxw7lY4iaG1Gcd
 g8NXmLlkWIGpKe4VofPDqRq7Z5UrpAlefpaO3YVV5k1GH3Z6qmDZpP2ItEdue4yr
 wagaHBuv/eJD8xdEij4uPzx+TshZ7JHcO4IjnTE9rUaPi62tyNigJsuik8LNq5zv
 Lm3ZJwXLhzUDG3XUS+JD
 =f5ge
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "There are three more fixes for this week:

   - The Windows-on-ARM laptops require a workaround to prevent crashing
     at boot from ACPI

   - The Renesas 'draak' board needs one bugfix for the backlight
     regulator

   - Also for Renesas, the 'hihope' board accidentally had its eMMC
     turned off in the 5.3 merge window"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  soc: qcom: geni: Provide parameter error checking
  arm64: dts: renesas: hihope-common: Fix eMMC status
  arm64: dts: renesas: r8a77995: draak: Fix backlight regulator name
2019-09-06 12:53:31 -07:00