Commit Graph

3132 Commits

Author SHA1 Message Date
Geert Uytterhoeven
6f4b74f375 pinctrl: sh-pfc: r8a7795: Use generic bias register description
Move R-Car H3 ES2.0 bias support over to the generic way to describe
bias registers, which will be needed for suspend/resume support.

As the new description is more compact, this decreases kernel size by
ca. 308 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:09 +02:00
Geert Uytterhoeven
e1a16b5b42 pinctrl: sh-pfc: r8a7795-es1: Use generic bias register description
Move R-Car H3 ES1.x bias support over to the generic way to describe
bias registers, which will be needed for suspend/resume support.

As the new description is more compact, this decreases kernel size by
ca. 304 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:37:06 +02:00
Geert Uytterhoeven
acdb124539 pinctrl: sh-pfc: Add sh_pfc_pin_to_bias_reg() helper
Add a helper to look up bias registers and bit number for a specific
pin, using the generic bias register description.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:03 +02:00
Geert Uytterhoeven
beaa34d908 pinctrl: sh-pfc: Add generic bias register description
Add a generic way to describe bias registers (for pull-up/down control),
like is already done for config and drive registers.

This makes the sh-pfc core code aware of these registers, which will
ease introducing suspend/resume support later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:37:00 +02:00
Geert Uytterhoeven
e16a2c7ace pinctrl: sh-pfc: Drop width parameter of sh_pfc_{read,write}_reg()
On modern Renesas SoCs, all PFC registers are 32-bit, and all callers of
sh_pfc_{read,write}_reg() already operate on 32-bit registers only.
Hence make the 32-bit width implicit, and rename the functions to
sh_pfc_{read,write}() to shorten lines.

All accesses to 8-bit or 16-bit registers are still done using
sh_pfc_{read,write}_raw_reg().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:36:56 +02:00
Geert Uytterhoeven
35406b1fd6 pinctrl: sh-pfc: Remove matching on plain sh-pfc platform device
As of commit 8682b3c522 ("sh-pfc: Remove platform device
registration"), plain "sh-pfc" platform devices are no longer created.
Hence remove their match entry, and the now obsolete checks for missing
device IDs and driver data.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:36:50 +02:00
Biju Das
df73da6317 pinctrl: sh-pfc: r8a7745: Implement voltage switching for SDHI
Voltage switching is the same as on the r8a7794.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 16:37:10 +02:00
Geert Uytterhoeven
d8ee17f4f2 pinctrl: sh-pfc: r8a77995: Remove USB0_IDIN and USB0_IDPU pins
R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 8, 2017
removed the USB0_IDIN and USB0_IDPU pins on R-Car D3.

This change has no functional impact, as these definitions were unused.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 16:19:23 +02:00
Kuninori Morimoto
7b9e64a657 pinctrl: sh-pfc: r8a77995: Add Audio SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:03 +02:00
Kuninori Morimoto
6e7b1ee885 pinctrl: sh-pfc: r8a77995: Add Audio clock pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:03 +02:00
Wolfram Sang
94888a4dc3 pinctrl: sh-pfc: r8a7796: Fix trivial typo in comment
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:02 +02:00
Wolfram Sang
bf3278feae pinctrl: sh-pfc: r8a7795-es1: Fix trivial typo in comment
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:02 +02:00
Wolfram Sang
ecd54509a2 pinctrl: sh-pfc: r8a7795: Fix trivial typo in comment
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:01 +02:00
Wolfram Sang
7a362e3488 pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functions
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:01 +02:00
Takeshi Kihara
b014912f6c pinctrl: sh-pfc: r8a7796: Add support for INTC-EX IRQ pins
Most pins on the r8a7796 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).

On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".

[takeshi.kihara.df: Ported from commit bb46f6f3f3 ("pinctrl: sh-pfc:
 r8a7795: Add support for INTC-EX IRQ pins")
 to drivers/pinctrl/sh-pfc/pfc-r8a7796.c]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:00 +02:00
Geert Uytterhoeven
8480e6ca80 pinctrl: sh-pfc: r8a7795: Add INTC-EX pins, groups and function
Add pins, groups, and a function for the INTC-EX interrupt controller on
R-Car H3 ES2.0.

Extracted from a big patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:33:59 +02:00
Chris Brandt
039bc58e73 pinctrl: rza1: Add support for RZ/A1L
Aspects like the number of ports and the location where peripherals are
brought out differ between the RZ/A1H and RZ/A1L.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-09 09:16:21 +02:00
Geert Uytterhoeven
b4062b46da pinctrl: sh-pfc: r8a7795: Restore sort order
Move the SCIF_CLK pins where they belong.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-05 12:14:00 +02:00
Geert Uytterhoeven
abc053c869 pinctrl: sh-pfc: r8a7795-es1: Restore sort order
Move the USB30 pins where they belong.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-05 12:13:25 +02:00
Wolfram Sang
f62d4c9efd pinctrl: sh-pfc: r8a7795: Add I2C pin support
Since pinmuxing for I2C is equal on H3 ES1.0 and later versions, copy
the I2C settings from ES1.0. Fixes this error in upstream for
Salvator-XS:

sh-pfc e6060000.pin-controller: function 'i2c2' not supported
sh-pfc e6060000.pin-controller: invalid function i2c2 in map table
i2c-rcar: probe of e6510000.i2c failed with error -22

Now, the bus works the same as with other Salvator boards.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 17:57:52 +02:00
Takeshi Kihara
47bb129679 pinctrl: sh-pfc: r8a77995: Add PWM pins, groups and functions
This patch adds support for PWM on r8a77995.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 16:04:38 +02:00
Kuninori Morimoto
0526234d67 pinctrl: sh-pfc: r8a7795: Add Audio SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 15:35:59 +02:00
Kuninori Morimoto
55bfea9fdc pinctrl: sh-pfc: r8a7795: Add Audio clock pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 15:22:15 +02:00
Takeshi Kihara
5ec8a41a36 pinctrl: sh-pfc: r8a7795: Add USB3.0 host support
This patch adds USB3.0 ch0 pinmux support to R8A7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-02 13:23:44 +02:00
Takeshi Kihara
3627126ce3 pinctrl: sh-pfc: r8a7795-es1: Add USB3.0 host support
This patch adds USB3{0,1} (USB3.0 host) pinmux support to R8A7795 ES1.x
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-02 13:23:39 +02:00
Takeshi Kihara
f814def530 pinctrl: sh-pfc: r8a77995: Add USB2.0 host support
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 16:14:44 +02:00
Yoshihiro Shimoda
66abd968d0 pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 16:08:40 +02:00
Dirk Behme
641b0ab802 pinctrl: sh-pfc: r8a7795: Re-add DRIF support
DRIF support for r8a7795 was initially added with commit 2d77583198
("pinctrl: sh-pfc: r8a7795: Add DRIF support") and later dropped from
the new pfc-r8a7795.c while re-naming the initial pfc-r8a7795.c to
pfc-r8a7795-es1.c in commit b205914c8f ("pinctrl: sh-pfc: r8a7795:
Add support for R-Car H3 ES2.0"). As the DRIF doesn't differ, re-add
it here.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 11:06:13 +02:00
Takeshi Kihara
9ed1395869 pinctrl: sh-pfc: r8a7795: Add SDHI0-3 support
Add SDHI0-3 support for R-Car H3 ES2.0 based on a patch from the Renesas
BSP. SDHI pin config is identical to H3 ES1.*.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 11:06:13 +02:00
Daniel Drake
79d2c8bede pinctrl/amd: save pin registers over suspend/resume
The touchpad in the Asus laptop models X505BA/BP and X542BA/BP is
unresponsive after suspend/resume. The following error appears during
resume:

  i2c_hid i2c-ELAN1300:00: failed to reset device.

The problem here is that i2c_hid does not notice the interrupt being
generated at this point, because the GPIO is no longer configured
for interrupts.

Fix this by saving pinctrl-amd pin registers during suspend and
restoring them at resume time.

Based on code from pinctrl-intel.

Cc: stable@vger.kernel.org
Signed-off-by: Daniel Drake <drake@endlessm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 15:58:45 +02:00
Gregory CLEMENT
a9a1a48336 pinctrl: armada-37xx: Fix gpio interrupt setup
Since commit dc749a09ea ("gpiolib: allow gpio irqchip to map irqs
dynamically"), the irqs for gpio are not statically allocated during in
gpiochip_irqchip_add.

This driver was based on this assumption for initializing the mask
associated to each interrupt this led to a NULL pointer crash in the
kernel:

Unable to handle kernel NULL pointer dereference at virtual address 00000000
Mem abort info:
  Exception class = DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000068
  CM = 0, WnR = 1
[0000000000000000] user address but active_mm is swapper
Internal error: Oops: 96000044 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.13.0-06657-g3b9f8ed25dbe #576
Hardware name: Marvell Armada 3720 Development Board DB-88F3720-DDR3 (DT)
task: ffff80001d908000 task.stack: ffff000008068000
PC is at armada_37xx_pinctrl_probe+0x5f8/0x670
LR is at armada_37xx_pinctrl_probe+0x5e8/0x670
pc : [<ffff000008e25cdc>] lr : [<ffff000008e25ccc>] pstate: 60000045
sp : ffff00000806bb80
x29: ffff00000806bb80 x28: 0000000000000024
x27: 000000000000000c x26: 0000000000000001
x25: ffff80001efee760 x24: 0000000000000000
x23: ffff80001db6f570 x22: ffff80001db6f438
x21: 0000000000000000 x20: ffff80001d9f4810
x19: ffff80001db6f418 x18: 0000000000000000
x17: 0000000000000001 x16: 0000000000000019
x15: ffffffffffffffff x14: 0140000000000000
x13: 0000000000000000 x12: 0000000000000030
x11: 0101010101010101 x10: 0000000000000040
x9 : ffff000009923580 x8 : ffff80001d400248
x7 : ffff80001d400270 x6 : 0000000000000000
x5 : ffff80001d400248 x4 : ffff80001d400270
x3 : 0000000000000000 x2 : 0000000000000001
x1 : 0000000000000001 x0 : 0000000000000000
Process swapper/0 (pid: 1, stack limit = 0xffff000008068000)
Call trace:
Exception stack(0xffff00000806ba40 to 0xffff00000806bb80)
ba40: 0000000000000000 0000000000000001 0000000000000001 0000000000000000
ba60: ffff80001d400270 ffff80001d400248 0000000000000000 ffff80001d400270
ba80: ffff80001d400248 ffff000009923580 0000000000000040 0101010101010101
baa0: 0000000000000030 0000000000000000 0140000000000000 ffffffffffffffff
bac0: 0000000000000019 0000000000000001 0000000000000000 ffff80001db6f418
bae0: ffff80001d9f4810 0000000000000000 ffff80001db6f438 ffff80001db6f570
bb00: 0000000000000000 ffff80001efee760 0000000000000001 000000000000000c
bb20: 0000000000000024 ffff00000806bb80 ffff000008e25ccc ffff00000806bb80
bb40: ffff000008e25cdc 0000000060000045 ffff00000806bb60 ffff0000081189b8
bb60: ffffffffffffffff ffff00000811cf1c ffff00000806bb80 ffff000008e25cdc
[<ffff000008e25cdc>] armada_37xx_pinctrl_probe+0x5f8/0x670
[<ffff00000859d8c8>] platform_drv_probe+0x58/0xb8
[<ffff00000859bb44>] driver_probe_device+0x22c/0x2d8
[<ffff00000859bcac>] __driver_attach+0xbc/0xc0
[<ffff000008599c84>] bus_for_each_dev+0x4c/0x98
[<ffff00000859b440>] driver_attach+0x20/0x28
[<ffff00000859af90>] bus_add_driver+0x1b8/0x228
[<ffff00000859c648>] driver_register+0x60/0xf8
[<ffff00000859df64>] __platform_driver_probe+0x74/0x130
[<ffff000008e256dc>] armada_37xx_pinctrl_driver_init+0x20/0x28
[<ffff000008083980>] do_one_initcall+0x38/0x128
[<ffff000008e00cf4>] kernel_init_freeable+0x188/0x22c
[<ffff0000089b56e8>] kernel_init+0x10/0x100
[<ffff000008084bb0>] ret_from_fork+0x10/0x18
Code: f9403fa2 12001341 1100075a 9ac12041 (b9000001)
---[ end trace 8b0f4e05e1603208 ]---

This patch moves the initialization of the mask field in the irq_startup
function. However some callbacks such as irq_set_type and irq_set_wake
could be called before irq_startup. For those functions the mask is
computed at each call which is not a issue as these functions are not
located in a hot path but are used sporadically for configuration.

Fixes: dc749a09ea ("gpiolib: allow gpio irqchip to map irqs
dynamically")
Cc: <stable@vger.kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:29:44 +02:00
Dan Carpenter
4ce504c4eb pinctrl: sprd: fix off by one bugs
info->groups[] has info->ngroups elements so these comparisons should be
>= instead of >.

Fixes: 41d32cfce1 ("pinctrl: sprd: Add Spreadtrum pin control driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Baolin Wang <baolin.wang@spreadtrum.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:27:36 +02:00
Dan Carpenter
41470c379b pinctrl: sprd: check for allocation failure
devm_pinctrl_get() could fail with ERR_PTR(-ENOMEM) so I have added a
check for that.  I also reversed the other IS_ERR() test because it was
a little confusing to test one way and then the opposite a couple lines
later.

Fixes: 41d32cfce1 ("pinctrl: sprd: Add Spreadtrum pin control driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:26:40 +02:00
Geert Uytterhoeven
baec7e687a pinctrl: sprd: Restrict PINCTRL_SPRD to ARCH_SPRD or COMPILE_TEST
The Spreadtrum pinctrl drivers are only useful when building for a
Spreadtrum platform.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:21:12 +02:00
Randy Dunlap
aaab90bbca pinctrl: sprd: fix build errors and dependencies
Fix build errors when CONFIG_OF is not enabled.
Also, the pinctrl-sprd-sc9860 driver uses functions from the pinctrl-sprd
driver, so the former should depend on the latter driver.

../drivers/pinctrl/sprd/pinctrl-sprd.c: In function 'sprd_dt_node_to_map':
../drivers/pinctrl/sprd/pinctrl-sprd.c:290:2: error: implicit declaration of function 'pinconf_generic_parse_dt_config' [-Werror=implicit-function-declaration]
  ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
  ^
../drivers/pinctrl/sprd/pinctrl-sprd.c: At top level:
../drivers/pinctrl/sprd/pinctrl-sprd.c:844:44: error: array type has incomplete element type
 static const struct pinconf_generic_params sprd_dt_params[] = {
                                            ^
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Baolin Wang <baolin.wang@spreadtrum.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:18:41 +02:00
Colin Ian King
045b5792dc pinctrl: sprd: make three local functions static
The functions sprd_pmx_get_function_count, sprd_pmx_get_function_name
and sprd_pmx_get_function_groups are local to the source and do not
need to be in global scope, so make them static.

Cleans up sparse warnings:
"symbol 'sprd_pmx_get_function_count' was not declared. Should it be
static?"
"symbol 'sprd_pmx_get_function_name' was not declared. Should it be
static?"
"symbol 'sprd_pmx_get_function_groups' was not declared. Should it be
static?"

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:18:31 +02:00
Masahiro Yamada
6d363bd178 pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>
The #includes <linux/bug.h> is here to use BUILD_BUG_ON_ZERO().

Thanks to commit bc6245e5ef ("bug: split BUILD_BUG stuff out into
<linux/build_bug.h>"), it is now possible to reduce the number of
headers pulled in.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:18:17 +02:00
Linus Torvalds
968c61f7da - New Drivers
- RK805 Power Management IC (PMIC)
    - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
    - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs
 
  - New Device Support
    - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
    - Add support for X-Powers AXP806 to axp20x
    - Add support for X-Powers AXP813 to axp20x
    - Add support for Intel Sunrise Point LPSS to intel-lpss-pci
 
  - New Functionality
    - Amend API to provide register layout; atmel-smc
 
 - Fix-ups
    - DT re-work; omap, nokia
    - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
    - Fix chip ID formatting issue(s); rk808
    - Optionally register touchscreen devices; da9052-core
    - Documentation improvements; twl-core
    - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
    - Drop unnecessary static declaration; max8925-i2c
    - Kconfig changes (missing deps and remove module support)
    - Slim down oversized licence statement; hi6421-pmic-core
    - Use managed resources (devm_*); lp87565
    - Supply proper error checking/handling; t7l66xb
 
  - Bug Fixes
    - Fix counter duplication issue; da9052-core
    - Fix potential NULL deference issue; max8998
    - Leave SPI-NOR write-protection bit alone; lpc_ich
    - Ensure device is put into reset during suspend; intel-lpss
    - Correct register offset variable size; omap-usb-tll
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Merge tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers
   - RK805 Power Management IC (PMIC)
   - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
   - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs

  New Device Support:
   - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
   - Add support for X-Powers AXP806 to axp20x
   - Add support for X-Powers AXP813 to axp20x
   - Add support for Intel Sunrise Point LPSS to intel-lpss-pci

  New Functionality:
   - Amend API to provide register layout; atmel-smc

  Fix-ups:
   - DT re-work; omap, nokia
   - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
   - Fix chip ID formatting issue(s); rk808
   - Optionally register touchscreen devices; da9052-core
   - Documentation improvements; twl-core
   - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
   - Drop unnecessary static declaration; max8925-i2c
   - Kconfig changes (missing deps and remove module support)
   - Slim down oversized licence statement; hi6421-pmic-core
   - Use managed resources (devm_*); lp87565
   - Supply proper error checking/handling; t7l66xb

  Bug Fixes:
   - Fix counter duplication issue; da9052-core
   - Fix potential NULL deference issue; max8998
   - Leave SPI-NOR write-protection bit alone; lpc_ich
   - Ensure device is put into reset during suspend; intel-lpss
   - Correct register offset variable size; omap-usb-tll"

* tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits)
  mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants
  mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
  dt-bindings: mfd: Add bindings for ZII RAVE devices
  mfd: omap-usb-tll: Fix register offsets
  mfd: da9052: Constify spi_device_id
  mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend
  mfd: da9055: Constify i2c_device_id
  mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices
  mfd: t7l66xb: Handle return value of clk_prepare_enable
  mfd: Add ROHM BD9571MWV-M PMIC DT bindings
  mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool
  mfd: lp87565: Convert to use devm_mfd_add_devices()
  mfd: Add support for TPS68470 device
  mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell
  mfd: syscon: atmel-smc: Add helper to retrieve register layout
  mfd: axp20x: Use correct platform device ID for many PEK
  dt-bindings: mfd: axp20x: Introduce bindings for AXP813
  mfd: axp20x: Add support for AXP813 PMIC
  dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips
  mfd: Add ROHM BD9571MWV-M MFD PMIC driver
  ...
2017-09-07 13:51:13 -07:00
Lee Jones
3f979bf8f5 Merge branches 'ib-mfd-arm-i2c-4.14', 'ib-mfd-arm-usb-video-4.14', 'ib-mfd-hwmon-4.14', 'ib-mfd-iio-pwm-4.14', 'ib-mfd-input-rtc-4.14', 'ib-mfd-many-4.14' and 'ib-mfd-pinctrl-regulator-4.14' into ibs-for-mfd-merged 2017-09-05 08:45:36 +01:00
Priit Laes
ac059e2aa0 Revert "pinctrl: sunxi: Don't enforce bias disable (for now)"
This reverts commit 2154d94b40.

The original patch was intented to avoid some issues with the sunxi
gpio rework and was supposed to be reverted after all the required
DT bits had been merged around v4.10.

Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 15:51:49 +02:00
Kunihiko Hayashi
12219fd2bf pinctrl: uniphier: fix members of rmii group for Pro4
The ether_rmii_groups should have "ether_rmii" and "ether_rmiib" as
members. This patch replaces to them.

Fixes: 1e359ab128 ("pinctrl: uniphier: add Ethernet pin-mux settings")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 15:50:06 +02:00
Markus Elfring
9b21e72e8c pinctrl: Delete an error message
Omit an extra message for a memory allocation failure in these functions.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 15:45:29 +02:00
Markus Elfring
f68f848131 pinctrl: core: Delete an error message
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 15:44:16 +02:00
Andy Shevchenko
d68b42e30b pinctrl: intel: Read back TX buffer state
In the same way as it's done in pinctrl-cherryview.c we would provide
a readback TX buffer state.

Fixes: 17fab47369 ("pinctrl: intel: Set pin direction properly")
Reported-by: "Bourque, Francis" <francis.bourque@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: "Bourque, Francis" <francis.bourque@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 15:34:31 +02:00
David Wu
12b8f01818 pinctrl: rockchip: Add rv1108 recalculated iomux support
The pins from GPIO1A0 to GPIO1B1 are special, need to recalculate
iomux. And the register offset is larger than the u8 range, so changed
to u32.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 15:25:42 +02:00
Andy Shevchenko
8546137721 pinctrl: intel: Decrease indentation in intel_gpio_set()
Decrease indentation in intel_gpio_set() to make it looking slightly better
and be in align with intel_gpio_get().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 14:46:36 +02:00
Jacopo Mondi
cb715d0ad0 pinctrl: rza1: Remove suffix from gpiochip label
The OF node name already contains the gpio chip identifier, no need to
append it when creating the label.

The following debug message clearly shows the suffix is not required
"pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip gpio-0-0 with 6
pins"

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 14:45:18 +02:00
Fenglin Wu
4e83ac4cfb pinctrl: qcom: spmi-gpio: Correct power_source range check
Power source selection in DIG_VIN_CTL is indexed from 0, in the range
check it shouldn't be equal to the total number of power sources.

Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 13:59:15 +02:00
Bhumika Goyal
ae9d7f83a5 pinctrl: freescale: make mxs_regs const
Make these const as they are only stored in the const field of a
mxs_pinctrl_soc_data structure.

Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 13:57:01 +02:00
Andrew Jeffery
5241bd16c7 pinctrl: aspeed: Rework strap register write logic for the AST2500
Yong Li found that writes to the AST2500 strapping register were not
properly supported by the Aspeed pinctrl core and provided a patch to
rectify the problem. Several revisions of the patch were posted and
ultimately v4 should have been applied, however some unfortunate
liberal application of tags on my part lead to confusion between v3[1]
and v4[2].

Generate the diff between v3 and v4 to apply as a fixup patch.

[1] http://patchwork.ozlabs.org/patch/801662/
[2] http://patchwork.ozlabs.org/patch/802946/

Cc: Yong Li <sdliyong@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 13:39:38 +02:00