3 Commits

Author	SHA1	Message	Date
Dan Carpenter	6c7ee8905d	clk: ti: apll: not allocating enough data ... There is a cut and paste bug here which will lead to memory corruption because we don't allocate enough data. Fixes: 4d008589e2 ('CLK: TI: APLL: add support for omap2 aplls') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>	2014-06-19 14:52:31 +03:00
Tero Kristo	4d008589e2	CLK: TI: APLL: add support for omap2 aplls ... This patch adds support for omap2 type aplls, which have gating and autoidle functionality. Signed-off-by: Tero Kristo <t-kristo@ti.com>	2014-05-28 12:30:02 +03:00
J Keerthy	3cf467a996	CLK: TI: DRA7: Add APLL support ... The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>	2014-01-17 12:35:31 -08:00