Commit Graph

321 Commits

Author SHA1 Message Date
Archit Taneja
60d05cb4ea drm/msm/dsi: Make TE gpio optional
Platforms containing only DSI video mode devices don't need a TE gpio.
Make TE gpio optional.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:24 -04:00
Archit Taneja
3d6df06249 drm/msm: mdp4 lvds: get panel node via of graph parsing
We currently get the output connected to LVDS by looking for a phandle
called 'qcom,lvds-panel' under the mdp DT node.

Use the more standard of_graph approach to create an lvds output port,
and retrieve the panel node from the port's endpoint data.

v3
- Fix return value checks of of_graph_* calls.

Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:23 -04:00
Archit Taneja
f7009d266d drm/msm: dsi host: Use device graph parsing to parse connected panel
The dsi host looks for the connected panel node by parsing for a child
named 'panel'. This hierarchy isn't very flexible. The connected
panel is forced to be a child to the dsi host, and hence, a mipi dsi
device. This isn't suitable for dsi devices that don't use mipi dsi
as their control bus.

Follow the of_graph approach of creating ports and endpoints to
represent the connections between the dsi host and the panel connected
to it. In our case, the dsi host will only have one output port, linked
to the panel's input port.

Update DT binding documentation with device graph usage info.

v3:
- Fix return value checks of of_graph_* calls.
- Don't make port a mandatory DT property
- Fix defer check when no panel node specified
- Rename parse_dt func to align with other dsi_host funcs

Reviewed-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:23 -04:00
Archit Taneja
14bb28b0f9 drm/msm: dsi host: add missing of_node_put()
Decrement device node refcount if of_get_child_by_name is successfully
called.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:22 -04:00
Hai Li
78b1d470d5 drm/msm: Enable clocks during enable/disable_vblank() callbacks
AHB clock should be enabled before accessing registers during
enable/disable_vblank(). Since these 2 callbacks are called in
atomic context while clk_prepare may cause thread sleep, a work
is scheduled to control vblanks.

v2: fixup spinlock initialization

Signed-off-by: Hai Li <hali@codeaurora.org>
[add comment about cancel_work_sync() before drm_irq_uninstall()]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:22 -04:00
jilai wang
8a94b0aa37 drm/msm/mdp5: Add support for msm8x74v1
msm8x74v1 has different MDP5 version (v1.0) from msm8x74v2 (v1.2).
Add a separate config data to support msm8x74v1.

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:21 -04:00
jilai wang
8155ad4ce6 drm/msm/mdp5: Add DMA pipe planes for MDP5
This change is to add planes which use DMA pipes for MDP5.

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
[slight comment adjust to s/Construct public planes/Construct video
planes/ since DMA planes are public planes too, they just can't scale
or CSC]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:21 -04:00
jilai wang
3498409f03 drm/msm/mdp: Add capabilities to MDP planes (v2)
MDP planes can be implemented using different type of HW pipes,
RGB/VIG/DMA pipes for MDP5 and RGB/VG/DMA pipes for MDP4. Each type
of pipe has different HW capabilities such as scaling, color space
conversion, decimation... Add a variable in plane data structure
to specify the difference of each plane which comes from mdp5_cfg data
and use it to differenciate the plane operation.
V1: Initial change
V2: Fix a typo in mdp4_kms.h

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:20 -04:00
Stephane Viau
bef799fb77 drm/msm/mdp5: add more YUV formats for MDP5
Add packed YUV422 and planar YUV420 formats to MDP supported
formats.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:20 -04:00
Wentao Xu
9cc137a3ff drm/msm/mdp5: use 2 memory clients for YUV formats on newer mdp5
Newer MDP5 uses 2 shared memory pool clients for certain YUV formats.
For example, if VIG0 is used to fetch data in YUYV format, it will use
VIG0_Y for Y component, and VIG0_Cr for UV packed.

Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
[rebase]
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
2015-08-15 18:27:19 -04:00
Wentao Xu
ff78a6b377 drm/msm/mdp: mark if a MDP format is YUV at definition
This makes it easy to determine if a format is YUV. The old
method of using chroma sample type incorrectly marks YUV444 as
RGB format.

Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
[rebase]
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:19 -04:00
Uwe Kleine-König
02b3ee4664 drm/msm/dp: use flags argument of devm_gpiod_get to set direction
Since 39b2bbe3d7 (gpio: add flags argument to gpiod_get*() functions)
which appeared in v3.17-rc1, the gpiod_get* functions take an additional
parameter that allows to specify direction and initial value for output.

Use this to simplify the driver. Furthermore this is one caller less
that stops us making the flags argument to gpiod_get*() mandatory.

Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:18 -04:00
Hai Li
328e1a633c drm/msm/dsi: Save/Restore PLL status across PHY reset
Reset DSI PHY silently changes its PLL registers to reset status,
which will make cached status in clock driver invalid and result
in wrong output rate of link clocks. The current restore mechanism
in DSI PLL does not cover all the cases. This change is to recover
PLL status after PHY reset to match HW status with cached status
in clock driver.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:18 -04:00
Markus Elfring
da882cd1ee drm/msm/dsi: One function call less in dsi_init() after error detection
The dsi_destroy() function was called in two cases by the dsi_init() function
during error handling even if the passed variable contained a null pointer.

* This implementation detail could be improved by adjustments for jump
  targets according to the Linux coding style convention.

* Drop an unnecessary initialisation for the variable "msm_dsi" then.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
[add couple missing ERR_PTR()'s]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:17 -04:00
Markus Elfring
a60bbb2764 drm/msm/dsi: Delete an unnecessary check before the function call "dsi_destroy"
The dsi_destroy() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:17 -04:00
Hai Li
b96b3a06d1 drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH
This change takes advantage of a HW feature that synchronize
flush operation on CTL1 to CTL0, to keep dual DSI pipes in
sync.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:16 -04:00
Hai Li
c71716b17b drm/msm/mdp5: Allocate CTL for each display interface
In MDP5, CTL contains information of the whole pipeline whose
output goes down to a display interface. In various cases, one
interface may require 2 CRTCs, but only one CTL. Some interfaces
also require to use certain CTLs.

Instead of allocating CTL for each active CRTC, this change is to
associate a CTL with each interface.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:16 -04:00
jilai wang
129877819c drm/msm/mdp5: Add plane blending operation support for MDP5 (v2)
This change is to add properties alpha/zpos/blend_mode to mdp5 plane
for alpha blending operation to generate the blended output.
v1: Initial change
v2: Change "premultilied" property to enum (Rob's comment)

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
[Don't actually expose alpha/premultiplied props to userspace yet
pending a chance for discussion and some userspace to exercise it]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:15 -04:00
Rob Clark
4ff696eafa drm/msm: don't install plane properties on crtc
This was a hold-over from the pre-atomic days and legacy userspace that
only understood CRTCs.  Fortunately we don't have any properties, so
this doesn't change anything.  But before we start growing some plane
properties, we should fix this.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:15 -04:00
Archit Taneja
01199361c6 drm/msm/dsi: Report PHY errors only when they really occur
DSI PHY errors are falsely reported whenever a dsi error occurs. This is
because DSI_DLN0_PHY_ERR isn't only used as a status register, but also
used to mask PHY errors. Currently, we end up reading the mask bits too
and therefore always report errors.

Ignore the register mask bits and check for only the status/clear bits.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:14 -04:00
Hai Li
9b7a9fc29a drm/msm: Set different display size limitation on each target
The maximum output width of one pipeline depends on the LayerMixer's
capability. It may be different on each target. Also, MDP5 doesn't
have vertical limitation in one frame, as long as the pixel clock
can be supported.

This change obtains the maximum LM resolution from configuration
table and treat it as the whole pipe's limitation for MDP5. The size
limit on MDP4 is not changed.

Signed-off-by: Hai Li <hali@codeaurora.org>
2015-08-15 18:27:14 -04:00
Rob Clark
5cf3a4553f drm/msm/hdmi: standardize on lead chip for compatible names
For all of these devices, msm89xy was the lead chip, so standardize the
compatible names to align with convention used by rest of the qcom/msm
drivers.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:13 -04:00
Stephane Viau
3a84f8469e drm/msm: Add support for msm8x94
This change adds the MDP and HDMI support for msm8x94.
Note that HDMI PHY registers are not being accessed anymore from
the driver.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
[rename compatible s/8x94/8994/ since preference is to not trust the
marketing folks who invent chip #'s but instead name things after the
lead chip.. we should rename some 80XY to 89XY to standardize on the
lead chip but leave that for another patch.  Also, update dt bindings
doc]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:13 -04:00
Stephane Viau
da32855219 drm/msm/hdmi: remove ->reset() from HDMI PHY
->reset() currently only accesses HDMI core registers, and yet it
is located in hdmi_phy*. Since no PHY registers are being
accessed during ->reset(), it would be better to bring that
function in hdmi core module where HDMI core registers are
usually being accessed.

This will also help for msm8x94 for which no PHY registers
accesses are done (->phy_init == NULL) but the HDMI PHY reset
from HDMI core still needs to be done.

Note:
SW_RESET_PLL bit is not written in hdmi_phy_8x60_reset(); this
write should not affect anything if the corresponding field is
not writable.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
[fixed warning about unused 'phy' in hpd_enable() while merging]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:12 -04:00
Hai Li
dcefc117cc drm/msm/dsi: Add support for msm8x94
DSI controller on msm8x94 is version 1.3, which requires different
power supplies and works with 20nm DSI PHY. This change is to add
the basic support for this version.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:12 -04:00
Hai Li
ab8909b032 drm/msm/dsi: Use pinctrl in DSI driver
Some targets use pinctrl framework to configure some
pins. This change allows DSI driver to set default and
sleep pinctrl status.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:11 -04:00
Hai Li
678565c3cb drm/msm/dsi: Rename *dual panel* to *dual DSI*
The current term of *dual panel* in DSI driver code causes confusion.
It is supposed to indicate the panel using two DSI links. Rename it
to *dual DSI*.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:11 -04:00
Hai Li
13351cd177 drm/msm/dsi: Update source PLL selection in DSI PHY
The source PLL to be used by each DSI PHY should be decided by
DSI manager based on dual DSI information, while the register
programming to select PLL is different from one type of PHY to
another. This change adds the H/W difference to PHY configuration
and updates the interface between DSI manager and PHY.

With this change, PLL selection can be supported on different
targets.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:11 -04:00
jilai wang
c6a57a50ad drm/msm/hdmi: add hdmi hdcp support (V3)
Add HDMI HDCP support including HDCP PartI/II/III authentication.
V1: Initial Change
V2: Address Bjorn&Rob's comments
    Refactor the authentication process to use single work instead
    of multiple work for different authentication stages.
V3: Update to align with qcom SCM api.

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:10 -04:00
Rob Clark
2d3584eb87 drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:10 -04:00
Wentao Xu
657c63f0af drm/msm/mdp5: release SMB (shared memory blocks) in various cases
Release all blocks after the pipe is disabled, even when vsync
didn't happen in some error cases. Allow requesting SMB multiple
times before configuring to hardware, by releasing blocks not
programmed to hardware yet for shrinking case.

This fixes a potential leak of shared memory pool blocks.

Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-14 17:10:14 -04:00
Wentao Xu
a9702ca23e drm/msm: change to uninterruptible wait in atomic commit
The atomic commit cannot easily undo and return an error once the
state is swapped. Change to uninterruptible wait, and ignore the
timeout error.

Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-14 17:10:14 -04:00
Archit Taneja
507d71b1fa drm/msm: mdp4: Fix drm_framebuffer dereference crash
mdp4_get_frame_format() can dereference a drm_framebuffer when it's NULL.
Call it in mdp4_plane_mode_set only when we know fb is non-NULL.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-14 17:10:13 -04:00
Rob Clark
bbcc71872a drm/msm: fix msm_gem_prime_get_sg_table()
We need to return a new sgt, since the caller takes ownership of it.

Reported-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-14 17:10:13 -04:00
Archit Taneja
778014f0c8 drm/msm: Use new drm_fb_helper functions
Use the newly created wrapper drm_fb_helper functions instead of calling
core fbdev functions directly. They also simplify the fb_info creation.

Cc: Rob Clark <robdclark@gmail.com>
Cc: Stephane Viau <sviau@codeaurora.org>
Cc: Hai Li <hali@codeaurora.org>

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-08-06 14:12:58 +02:00
Maarten Lankhorst
613d2b2721 drm/atomic: pass old crtc state to atomic_begin/flush.
In intel it's useful to keep track of some state changes with old
crtc state vs new state, for example to disable initial planes or
when a modeset's prevented during fastboot.

Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
[danvet: squash in fixup for exynos provided by Maarten.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-07-27 16:23:22 +02:00
Rob Clark
1a370be9ac drm/msm: restart queued submits after hang
Track the list of in-flight submits.  If the gpu hangs, retire up to an
including the offending submit, and then re-submit the remainder.  This
way, for concurrently running piglit tests (for example), one failing
test doesn't cause unrelated tests to fail simply because it's submit
was queued up after one that triggered a hang.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:06 -04:00
Rob Clark
56c2da8338 drm/msm: fix timeout calculation
The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but
converting this directly to jiffies doesn't take into account the
initial jiffies count at boot, which may differ from the base time
of CLOCK_MONOTONIC.

TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that
instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as
suggested by Arnd)

v2: switch over from 'struct timespec' to ktime_t throughout, since
'struct timespec' will be deprecated (as suggested by Arnd)
v3: minor cosmetic tweaks

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:06 -04:00
Stephane Viau
865807d0a9 drm/msm/hdmi: Use pinctrl in HDMI driver
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:06 -04:00
Stephane Viau
5e4eb82fc2 drm/msm/hdmi: Point to the right struct device
DRM device's dev (hdmi->dev->dev) points to the mdss_mdp device
handle. Instead, we should get a reference to the mdss_hdmi
handle.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:06 -04:00
Stephane Viau
fbd4ae8a4e drm/msm/mdp: Add support for more 32-bit RGB formats
That will complete the lists of Alpha + RGB formats.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:05 -04:00
Laurent Pinchart
f65c18c050 drm/msm/atomic: Clean up planes in the error paths of .atomic_commit()
When the .atomic_commit() handler fails, clean up planes previoulsy
prepared by drm_atomic_helper_prepare_planes() with a call to
drm_atomic_helper_cleanup_planes().

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:05 -04:00
Hai Li
1efb92a306 drm/msm/mdp5: Always generate active-high sync signals for DSI
DSI video mode engine can only take active-high sync signals. This
change prevents MDP5 sending active-low sync signals to DSI in any
case.

Signed-off-by: Hai Li <hali@codeaurora.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:05 -04:00
Brian Norris
964a0754e4 drm/msm: dsi: fix compile errors when CONFIG_GPIOLIB=n
I'm not sure where, exactly, but somewhere in here we must be relying on
an implicit include.

drivers/gpu/drm/msm/dsi/dsi_host.c: In function ‘dsi_host_init_panel_gpios’:
drivers/gpu/drm/msm/dsi/dsi_host.c:1356:2: error: implicit declaration of function ‘devm_gpiod_get’ [-Werror=implicit-function-declaration]
  msm_host->disp_en_gpio = devm_gpiod_get(panel_device,
  ^
drivers/gpu/drm/msm/dsi/dsi_host.c:1356:25: warning: assignment makes pointer from integer without a cast [enabled by default]
  msm_host->disp_en_gpio = devm_gpiod_get(panel_device,
                         ^
drivers/gpu/drm/msm/dsi/dsi_host.c:1364:3: error: implicit declaration of function ‘gpiod_direction_output’ [-Werror=implicit-function-declaration]
   ret = gpiod_direction_output(msm_host->disp_en_gpio, 0);
   ^
drivers/gpu/drm/msm/dsi/dsi_host.c:1371:20: warning: assignment makes pointer from integer without a cast [enabled by default]
  msm_host->te_gpio = devm_gpiod_get(panel_device, "disp-te");
                    ^
drivers/gpu/drm/msm/dsi/dsi_host.c:1378:3: error: implicit declaration of function ‘gpiod_direction_input’ [-Werror=implicit-function-declaration]
   ret = gpiod_direction_input(msm_host->te_gpio);
   ^
drivers/gpu/drm/msm/dsi/dsi_host.c: In function ‘msm_dsi_host_power_on’:
drivers/gpu/drm/msm/dsi/dsi_host.c:1918:3: error: implicit declaration of function ‘gpiod_set_value’ [-Werror=implicit-function-declaration]
   gpiod_set_value(msm_host->disp_en_gpio, 1);
   ^

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Hai Li <hali@codeaurora.org>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:05 -04:00
Uwe Kleine-König
9590e69db9 drm/msm: use devm_gpiod_get_optional for optional reset gpio
Since 39b2bbe3d7 (gpio: add flags argument to gpiod_get*() functions)
which appeared in v3.17-rc1, the gpiod_get* functions take an additional
parameter that allows to specify direction and initial value for output.

Also there is a variant to find optional gpios that returns NULL if
there is no gpio instead of -ENOENT.

Make use of both features to simplify the driver.

This makes error checking more strict because errors like -ENOSYS ("no
gpio support compiled in") or -EPROBE_DEFER ("gpio not ready yet") are
handled correctly now.

Furthermore this is one caller less that stops us making the flags
argument to gpiod_get*() mandatory.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:05 -04:00
Hai Li
ec31abf668 drm/msm/dsi: Separate PHY to another platform device
There are different types of PHY from one chipset to another, while
the DSI host controller is relatively consistent across platforms.
Also, the PLL inside PHY is providing the source of DSI byte and
pixel clocks, which are used by DSI host controller. Separated devices
for clock provider and clock consumer make DSI driver better fit into
common clock framework.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:05 -04:00
Hai Li
9d32c4989c drm/msm/dsi: Enable PLL driver in MSM DSI
This change activates PLL driver for DSI to work with
common clock framework.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Hai Li
825637b9c0 drm/msm/dsi: Add DSI PLL clock driver support
DSI byte clock and pixel clocks are sourced from DSI PLL.
This change adds the DSI PLL source clock driver under
common clock framework.

This change handles DSI 28nm PLL only.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Fabian Frederick
bdc80de2a6 drm/msm: use IS_ERR() to check regulator_get() return
regulator_get() never returns NULL. There's no need for IS_ERR_OR_NULL()

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Fabian Frederick
73dbf69638 drm/msm: use IS_ERR() to check msm_ioremap() return
msm_ioremap() never returns NULL. There's no need for IS_ERR_OR_NULL()

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00