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Commit Graph

5528 Commits

Author SHA1 Message Date
Linus Torvalds
14726903c8 Merge branch 'akpm' (patches from Andrew)
Merge misc updates from Andrew Morton:
 "173 patches.

  Subsystems affected by this series: ia64, ocfs2, block, and mm (debug,
  pagecache, gup, swap, shmem, memcg, selftests, pagemap, mremap,
  bootmem, sparsemem, vmalloc, kasan, pagealloc, memory-failure,
  hugetlb, userfaultfd, vmscan, compaction, mempolicy, memblock,
  oom-kill, migration, ksm, percpu, vmstat, and madvise)"

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (173 commits)
  mm/madvise: add MADV_WILLNEED to process_madvise()
  mm/vmstat: remove unneeded return value
  mm/vmstat: simplify the array size calculation
  mm/vmstat: correct some wrong comments
  mm/percpu,c: remove obsolete comments of pcpu_chunk_populated()
  selftests: vm: add COW time test for KSM pages
  selftests: vm: add KSM merging time test
  mm: KSM: fix data type
  selftests: vm: add KSM merging across nodes test
  selftests: vm: add KSM zero page merging test
  selftests: vm: add KSM unmerge test
  selftests: vm: add KSM merge test
  mm/migrate: correct kernel-doc notation
  mm: wire up syscall process_mrelease
  mm: introduce process_mrelease system call
  memblock: make memblock_find_in_range method private
  mm/mempolicy.c: use in_task() in mempolicy_slab_node()
  mm/mempolicy: unify the create() func for bind/interleave/prefer-many policies
  mm/mempolicy: advertise new MPOL_PREFERRED_MANY
  mm/hugetlb: add support for mempolicy MPOL_PREFERRED_MANY
  ...
2021-09-03 10:08:28 -07:00
Christoph Hellwig
64a05fe645 mmc: mmc_spi: replace flush_kernel_dcache_page with flush_dcache_page
Pages passed to block drivers can be mapped page cache pages, so we must
use flush_dcache_page here instead of the more limited
flush_kernel_dcache_page that is intended for highmem pages only.

Link: https://lkml.kernel.org/r/20210712060928.4161649-3-hch@lst.de
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Alex Shi <alexs@kernel.org>
Cc: Geoff Levand <geoff@infradead.org>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Guo Ren <guoren@kernel.org>
Cc: Helge Deller <deller@gmx.de>
Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
Cc: Nick Hu <nickhu@andestech.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Rich Felker <dalias@libc.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Vincent Chen <deanbo422@gmail.com>
Cc: Yoshinori Sato <ysato@users.osdn.me>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-09-03 09:58:13 -07:00
Christoph Hellwig
79c62de859 mmc: JZ4740: remove the flush_kernel_dcache_page call in jz4740_mmc_read_data
Patch series "_kernel_dcache_page fixes and removal".

While looking to convert the block layer away from kmap_atomic towards
kmap_local_page and prefeably the helpers that abstract it away I noticed
that a few block drivers directly or implicitly call
flush_kernel_dcache_page before kunmapping a page that has been written
to.

flush_kernel_dcache_page is documented to to be used in such cases, but
flush_dcache_page is actually required when the page could be in the page
cache and mapped to userspace, which is pretty much always the case when
kmapping an arbitrary page.  Unfortunately the documentation doesn't
exactly make that clear, which lead to this misused.  And it turns out
that only the copy_strings / copy_string_kernel in the exec code were
actually correct users of flush_kernel_dcache_page, which is why I think
we should just remove it and eat the very minor overhead in exec rather
than confusing poor driver writers.

This patch (of 6):

MIPS now implements flush_kernel_dcache_page (as an alias to
flush_dcache_page).

Link: https://lkml.kernel.org/r/20210712060928.4161649-1-hch@lst.de
Link: https://lkml.kernel.org/r/20210712060928.4161649-2-hch@lst.de
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Guo Ren <guoren@kernel.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Nick Hu <nickhu@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Vincent Chen <deanbo422@gmail.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Yoshinori Sato <ysato@users.osdn.me>
Cc: Rich Felker <dalias@libc.org>
Cc: Geoff Levand <geoff@infradead.org>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Alex Shi <alexs@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-09-03 09:58:13 -07:00
Linus Torvalds
359f3d743f MMC core:
- Return a proper response in case of an ioctl error
  - Issue HPI to interrupt BKOPS for eMMC if it timed out
  - Avoid hogging the CPU while polling for busy
  - Extend sd8787 pwrseq to support the wilc1000 SDIO
  - Remove a couple of confusing warning messages
  - Clarify comment for ->card_busy() host ops
 
 MMC host:
  - dw_mmc: Add data CRC error injection
  - mmci: De-assert reset during ->probe()
  - rtsx_pci: Fix long reads when clock is pre-scaled
  - sdhci: Correct the tuning command handle for PIO mode
  - sdhci-esdhc-imx: Improve support for auto tuning
  - sdhci-msm: Add support for the sc7280
  - sdhci-of-arasan: Don't auto tune for DDR50 mode for ZynqMP
  - sdhci-of-arasan: Enable support for auto cmd12
  - sdhci-of-arasan: Use 19MHz for SD default speed for ZynqMP for level shifter
  - usdhi6rol0: Implement the ->card_busy() host ops
 
 MEMSTICK:
  - A couple of minor cleanups.
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmEsrPsXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCnjJA/9G+DDHmJ8zRsKLfLxeyyF3Ovm
 b4Iji5HWG5y3mrPPUQ6/murMo1vshXgBqlnoJKt+VFBSSBK1G0Q3huOho9C1ZeTk
 Hh6iu6lDUlErzqcEcjAu3CNblXkL7pL+5FFsxjfZ6WeB2OD+DzFllbu1p7wMwfZS
 78jgn/LJJnTDsCiDVKMK/Z9nsLXCqzuL4y+fyeOVIgqwcr+hobkA9WCACV5cGCKt
 kosPNdeN5llX7qVPl6q5EYsdgXVtftjCjvx9L36sxhnXkKslf7RAdhECvTYR+OPx
 wqovNhBKpNYFG8M9wIcdfwsE7RQy2h6hVSsjKaaZQLghd80xLd02VeTR3qH9xuJX
 MTyClK0QF9io0sT669umPalYs7eb1ulEAMmv98nNjPHKZQ4FmNNury0VQ57ZJcrj
 glVDUkALKLtlT/7gOHTJP6YWD4trdH4s5jIH3pyCStMHrLpNKvDWa0Jnuq25A9YL
 BHixobWf+8S7LkDEJIqgZa2s7pgYJug5vEDBXNipQoUiSvtgCfngyFkmoN9JdL8l
 6YqJweDclYpvh0Sq/UPPSIaRMYml6P4iBDTK55K2ZgahVG5SeaiY6IxDWIxaQHiE
 6dn7yaNy49BRRfLEFlIhKMxQAJfY5wrXH/arIUf52oxItP76mzNNkf9U/U8SQiZu
 A7F+R6YvmXgPJ9EMJVk=
 =RXpg
 -----END PGP SIGNATURE-----

Merge tag 'mmc-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC and MEMSTICK updates from Ulf Hansson:
 "MMC core:
   - Return a proper response in case of an ioctl error
   - Issue HPI to interrupt BKOPS for eMMC if it timed out
   - Avoid hogging the CPU while polling for busy
   - Extend sd8787 pwrseq to support the wilc1000 SDIO
   - Remove a couple of confusing warning messages
   - Clarify comment for ->card_busy() host ops

  MMC host:
   - dw_mmc: Add data CRC error injection
   - mmci: De-assert reset during ->probe()
   - rtsx_pci: Fix long reads when clock is pre-scaled
   - sdhci: Correct the tuning command handle for PIO mode
   - sdhci-esdhc-imx: Improve support for auto tuning
   - sdhci-msm: Add support for the sc7280
   - sdhci-of-arasan: Don't auto tune for DDR50 mode for ZynqMP
   - sdhci-of-arasan: Enable support for auto cmd12
   - sdhci-of-arasan: Use 19MHz for SD default speed for ZynqMP for level shifter
   - usdhi6rol0: Implement the ->card_busy() host ops

  MEMSTICK:
   - A couple of minor cleanups"

* tag 'mmc-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (52 commits)
  mmc: queue: Remove unused parameters(request_queue)
  mmc: pwrseq: sd8787: fix compilation warning
  mmc: core: Return correct emmc response in case of ioctl error
  mmc: sdhci-esdhc-imx: Select the correct mode for auto tuning
  mmc: sdhci-esdhc-imx: Remove redundant code for manual tuning
  mmc: core: Issue HPI in case the BKOPS timed out
  mmc: queue: Match the data type of max_segments
  mmc: switch from 'pci_' to 'dma_' API
  memstick: switch from 'pci_' to 'dma_' API
  memstick: r592: Change the name of the 'pci_driver' structure to be consistent
  mmc: pwrseq: add wilc1000_sdio dependency for pwrseq_sd8787
  mmc: pwrseq: sd8787: add support for wilc1000
  dt-bindings: mmc: Extend pwrseq-sd8787 binding for wilc1000
  dt-bindings: mmc: fsl-imx-esdhc: change the pinctrl-names rule
  dt-bindings: mmc: fsl-imx-esdhc: add a new compatible string
  dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings
  dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning
  mmc: core: Update ->card_busy() callback comment
  mmc: usdhi6rol0: Implement card_busy function
  mmc: sdhci: Correct the tuning command handle for PIO mode
  ...
2021-08-31 14:31:10 -07:00
Linus Torvalds
679369114e for-5.15/block-2021-08-30
-----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCAAuFiEEwPw5LcreJtl1+l5K99NY+ylx4KYFAmEs6H0QHGF4Ym9lQGtl
 cm5lbC5kawAKCRD301j7KXHgpukbD/9Qk9fQte+WJVmpbdvhV40gcKBVnGOVH0ke
 k+36x6AB/gWKnFHwtprsSyVqPxmzqwTv9VIq5l/s3Vydt3L61znvTneBeN03Wlkn
 UTxD0lY8HzyVWnZb82LBBjjy7cs6EzrFG4kBH/ZiTAyTcBsCAvzo5J7mywb4gFjj
 L/HeBq58EJ3WCUlxlVW1ijctvi7wnGoaH5bZY1TE00GGT6TysN2bEPfzjkuYHrDz
 RqhoQdWPLDz6h3x9lAncPw2MWlcmlGvJ96ABseAKFPKvXxE2PzgolSoQfVUUJtko
 bqGyy2ns+pxN11SrcGYjogEKVKhONoms/5UN1RtwRBVsgvecxlHER/SgyZ8luBDo
 lFhVXulkSjpswbWutRy3USge98GwMu2Z4ppP2CDmO7hkQd0DF8sL0kPKyaREkcHi
 NmsD/0zF2uUhUVN+PRC/MuzngAmL4Mmxjk70L+MohlK7e+H3pnEo1ec3OMcXe+wB
 dG6t/BFD9bYmj0UjsHeXEoR/iRuvSba1L8zBz5dhRaHH6DvdycYhpynXWWlU3C8K
 3nzEVVpcDINMsiRl1Vqb6g6HsMwHIH84FRl7Mc51UmhW9C4gLfWMCt1guQuzOj72
 yEbmCLydE/FR2IUPY7eqX8hRG8GTUlMtSvGdgnvBOcWj+K3buT/c5yVTHgTrN8ox
 LCOXHSvV6w==
 =S8fs
 -----END PGP SIGNATURE-----

Merge tag 'for-5.15/block-2021-08-30' of git://git.kernel.dk/linux-block

Pull block updates from Jens Axboe:
 "Nothing major in here - lots of good cleanups and tech debt handling,
  which is also evident in the diffstats. In particular:

   - Add disk sequence numbers (Matteo)

   - Discard merge fix (Ming)

   - Relax disk zoned reporting restrictions (Niklas)

   - Bio error handling zoned leak fix (Pavel)

   - Start of proper add_disk() error handling (Luis, Christoph)

   - blk crypto fix (Eric)

   - Non-standard GPT location support (Dmitry)

   - IO priority improvements and cleanups (Damien)o

   - blk-throtl improvements (Chunguang)

   - diskstats_show() stack reduction (Abd-Alrhman)

   - Loop scheduler selection (Bart)

   - Switch block layer to use kmap_local_page() (Christoph)

   - Remove obsolete disk_name helper (Christoph)

   - block_device refcounting improvements (Christoph)

   - Ensure gendisk always has a request queue reference (Christoph)

   - Misc fixes/cleanups (Shaokun, Oliver, Guoqing)"

* tag 'for-5.15/block-2021-08-30' of git://git.kernel.dk/linux-block: (129 commits)
  sg: pass the device name to blk_trace_setup
  block, bfq: cleanup the repeated declaration
  blk-crypto: fix check for too-large dun_bytes
  blk-zoned: allow BLKREPORTZONE without CAP_SYS_ADMIN
  blk-zoned: allow zone management send operations without CAP_SYS_ADMIN
  block: mark blkdev_fsync static
  block: refine the disk_live check in del_gendisk
  mmc: sdhci-tegra: Enable MMC_CAP2_ALT_GPT_TEGRA
  mmc: block: Support alternative_gpt_sector() operation
  partitions/efi: Support non-standard GPT location
  block: Add alternative_gpt_sector() operation
  bio: fix page leak bio_add_hw_page failure
  block: remove CONFIG_DEBUG_BLOCK_EXT_DEVT
  block: remove a pointless call to MINOR() in device_add_disk
  null_blk: add error handling support for add_disk()
  virtio_blk: add error handling support for add_disk()
  block: add error handling for device_add_disk / add_disk
  block: return errors from disk_alloc_events
  block: return errors from blk_integrity_add
  block: call blk_register_queue earlier in device_add_disk
  ...
2021-08-30 18:52:11 -07:00
Ulf Hansson
a75c956162 Merge branch 'fixes' into next 2021-08-27 16:35:55 +02:00
Ulf Hansson
885814a97f Revert "mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN on BCM2711"
This reverts commit 419dd626e3.

It turned out that the change from the reverted commit breaks the ACPI
based rpi's because it causes the 100Mhz max clock to be overridden to the
return from sdhci_iproc_get_max_clock(), which is 0 because there isn't a
OF/DT based clock device.

Reported-by: Jeremy Linton <jeremy.linton@arm.com>
Fixes: 419dd626e3 ("mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN on BCM2711")
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-27 16:30:36 +02:00
Haibo Chen
45334ee138 mmc: sdhci-esdhc-imx: Select the correct mode for auto tuning
USDHC hardware auto tuning circuit support check 1/4/8 data lines and cmd
line. Out of reset uSDHC, it default select check 4 data lines and do not
check cmd line. This is incorrect if we use 8 data lines. So need to config
the auto tuning mode according to current bus width.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/1629285415-7495-2-git-send-email-haibo.chen@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-25 11:04:42 +02:00
Haibo Chen
a0dbbdc203 mmc: sdhci-esdhc-imx: Remove redundant code for manual tuning
For manual tuning method, already call esdhc_prepare_tuning() config the
necessary registers, so remove the redundant code in esdhc_writew_le() for
SDHCI_HOST_CONTROL2.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/1629285415-7495-1-git-send-email-haibo.chen@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-25 11:04:27 +02:00
Dmitry Osipenko
1743fa54c9 mmc: sdhci-tegra: Enable MMC_CAP2_ALT_GPT_TEGRA
Tegra20/30/114/124 Android devices place GPT at a non-standard location.
Enable GPT entry scanning at that location.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20210820004536.15791-5-digetx@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-08-24 10:09:06 -06:00
Christophe JAILLET
b048457c54 mmc: switch from 'pci_' to 'dma_' API
The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below.

It has been compile tested.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/b617f284e2ab8b6b48fff150eba1638641646edd.1629640046.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 16:59:39 +02:00
Mårten Lindahl
4850c225dd mmc: usdhi6rol0: Implement card_busy function
When switching card voltage to UHS voltage the mmc framework tries to
check the card busy signal, meaning the card pulling DAT0 line low,
before the switch is made. Drivers that does not implement the card_busy
function will manage to do the switch anyway, but the framework will
print a warning about not being able to verify the voltage signal.

Implement card_busy function.

Signed-off-by: Mårten Lindahl <marten.lindahl@axis.com>
Link: https://lore.kernel.org/r/20210816142314.1168-1-marten.lindahl@axis.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 15:16:08 +02:00
Haibo Chen
f4ff24f8a7 mmc: sdhci: Correct the tuning command handle for PIO mode
If sdhci use PIO mode, and use mmc_send_tuning() to send the tuning
command, system will stuck because of the storm irq of sdhci. For PIO mode,
use mmc_send_tuning(), it will trigger buffer_read_ready interrupt and data
transfer complete interrupt.  In current code logic, it will directly
return in sdhci_data_irq, can not call the sdhci_transfer_pio(). So the
buffer_read_ready interrupt storm happen. So for standard tuning method,
need to exclude this case.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1628858041-1911-1-git-send-email-haibo.chen@nxp.com
[Ulf: Dropped redundant parenthesis in an expression]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 15:05:03 +02:00
Yoshihiro Shimoda
71b7597c63 mmc: renesas_sdhi: Refactor renesas_sdhi_probe()
Refactor renesas_sdhi_probe() to avoid increasing numbers of
sdhi_quirks_match[] entry when we add other stable SoCs like
r8a779m*.

Note that the sdhi_quirks_match[] is only needed on
renesas_sdhi_internal_dmac.c so that of_data of
renesas_sdhi_sys_dmac.c keeps as-is.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210729103234.480743-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:35 +02:00
Tony Lindgren
ee5165354d mmc: moxart: Fix issue with uninitialized dma_slave_config
Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures.

For moxart, this is probably not currently an issue but is still good to
fix though.

Fixes: 1b66e94e6b ("mmc: moxart: Add MOXA ART SD/MMC driver")
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210810081644.19353-3-tony@atomide.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:34 +02:00
Tony Lindgren
c3ff0189d3 mmc: dw_mmc: Fix issue with uninitialized dma_slave_config
Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures.

For dw_mmc, this is probably not currently an issue but is still good to
fix though.

Fixes: 3fc7eaef44 ("mmc: dw_mmc: Add external dma interface support")
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210810081644.19353-2-tony@atomide.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:34 +02:00
Tony Lindgren
522654d534 mmc: sdhci: Fix issue with uninitialized dma_slave_config
Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures at least if external TI SDMA is ever configured for sdhci.

For other external DMA cases, this is probably not currently an issue but
is still good to fix though.

Fixes: 18e762e3b7 ("mmc: sdhci: add support for using external DMA devices")
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Chunyan Zhang <zhang.chunyan@linaro.org>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://lore.kernel.org/r/20210810081644.19353-1-tony@atomide.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:34 +02:00
Sahitya Tummala
ed78a03d41 mmc: sdhci-msm: Use maximum possible data timeout value
The Qcom SD controller defines the usage of 0xF in data
timeout counter register (0x2E) which is actually a reserved
bit as per specification. This would result in maximum of 21.26 secs
timeout value.

Some SDcard taking more time than 2.67secs (timeout value corresponding
to 0xE) and with that observed data timeout errors.
So increasing the timeout value to max possible timeout.

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1628232901-30897-3-git-send-email-sartgarg@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:34 +02:00
Sarthak Garg
e30314f255 mmc: sdhci: Introduce max_timeout_count variable in sdhci_host
Introduce max_timeout_count variable in the sdhci_host structure
and use in timeout calculation. By default its set to 0xE
(max timeout register value as per SDHC spec). But at the same time
vendors drivers can update it if they support different max timeout
register value than 0xE.

Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1628232901-30897-2-git-send-email-sartgarg@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:33 +02:00
Thomas Hebb
3ac5e45291 mmc: rtsx_pci: Fix long reads when clock is prescaled
For unexplained reasons, the prescaler register for this device needs to
be cleared (set to 1) while performing a data read or else the command
will hang. This does not appear to affect the real clock rate sent out
on the bus, so I assume it's purely to work around a hardware bug.

During normal operation, the prescaler is already set to 1, so nothing
needs to be done. However, in "initial mode" (which is used for sub-MHz
clock speeds, like the core sets while enumerating cards), it's set to
128 and so we need to reset it during data reads. We currently fail to
do this for long reads.

This has no functional affect on the driver's operation currently
written, as the MMC core always sets a clock above 1MHz before
attempting any long reads. However, the core could conceivably set any
clock speed at any time and the driver should still work, so I think
this fix is worthwhile.

I personally encountered this issue while performing data recovery on an
external chip. My connections had poor signal integrity, so I modified
the core code to reduce the clock speed. Without this change, I saw the
card enumerate but was unable to actually read any data.

Writes don't seem to work in the situation described above even with
this change (and even if the workaround is extended to encompass data
write commands). I was not able to find a way to get them working.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Link: https://lore.kernel.org/r/2fef280d8409ab0100c26c6ac7050227defd098d.1627818365.git.tommyhebb@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:33 +02:00
Eric Biggers
86c639ce08 mmc: core: Store pointer to bio_crypt_ctx in mmc_request
Make 'struct mmc_request' contain a pointer to the request's
'struct bio_crypt_ctx' directly, instead of extracting a 32-bit DUN from
it which is a cqhci-crypto specific detail.

This keeps the cqhci crypto specific details in the cqhci module, and it
makes mmc_core and mmc_block ready for MMC crypto hardware that accepts
the DUN and/or key in a way that is more flexible than that which will
be specified by the eMMC v5.2 standard.  Exynos SoCs are an example of
such hardware, as their inline encryption hardware takes keys directly
(it has no concept of keyslots) and supports 128-bit DUNs.

Note that the 32-bit DUN length specified by the standard is very
restrictive, so it is likely that more hardware will support longer DUNs
despite it not following the standard.  Thus, limiting the scope of the
32-bit DUN assumption to the place that actually needs it is warranted.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210721154738.3966463-1-ebiggers@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:32 +02:00
Fabio Estevam
4a11cc647d mmc: sdhci-esdhc-imx: Remove unneeded mmc-esdhc-imx.h header
After the i.MX conversion to a DT-only platform, the mmc-esdhc-imx.h
header file is no longer used outside the driver, so move its content
to the sdhci-esdhc-imx driver and remove the header.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20210719193413.3792615-1-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:32 +02:00
Vincent Whitchurch
2b8ac062f3 mmc: dw_mmc: Add data CRC error injection
This driver has had problems when handling data errors.  Add fault
injection support so that the abort handling can be easily triggered and
regression-tested.  A hrtimer is used to indicate a data CRC error at
various points during the data transfer.

Note that for the recent problem with hangs in the case of some data CRC
errors, a udelay(10) inserted at the start of send_stop_abort() greatly
helped in triggering the error, but I've not included this as part of
the fault injection support since it seemed too specific.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/20210701080534.23138-1-vincent.whitchurch@axis.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:31 +02:00
Andy Shevchenko
696068470e mmc: mmc_spi: Simplify busy loop in mmc_spi_skip()
Infinite loops are hard to read and understand because of
hidden main loop condition. Simplify such one in mmc_spi_skip().

Using schedule() to schedule (and be friendly to others)
is discouraged and cond_resched() should be used instead.
Hence, replace schedule() with cond_resched() at the same
time.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210623101731.87885-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:31 +02:00
Linus Walleij
575cf10469 mmc: mmci: De-assert reset on probe
If we find a reset handle when probing the MMCI block,
make sure the reset is de-asserted. It could happen that
a hardware has reset asserted at boot.

Cc: Russell King <linux@armlinux.org.uk>
Cc: Yann Gautier <yann.gautier@foss.st.com>
Cc: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Yann Gautier <yann.gautier@foss.st.com>
Link: https://lore.kernel.org/r/20210630102408.3543024-1-linus.walleij@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:30 +02:00
Wolfram Sang
29cef6d47b mmc: usdhi6rol0: use proper DMAENGINE API for termination
dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210623095734.3046-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:30 +02:00
Wolfram Sang
492200f247 mmc: sh_mmcif: use proper DMAENGINE API for termination
dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210623095734.3046-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:30 +02:00
Wolfram Sang
2fc2628a45 mmc: renesas_sdhi_sys_dmac: use proper DMAENGINE API for termination
dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210623095734.3046-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:30 +02:00
Sai Krishna Potthuri
5c7e468ab1 mmc: arasan: Fix the issue in reading tap values from DT
'of_property_read_variable_u32_array' function returns number
of elements read on success. This patch updates the condition
check in the driver to overwrite the tap values from DT if exist.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-8-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:29 +02:00
Manish Narani
4dd7080a78 mmc: sdhci-of-arasan: Modify data type of the clk_phase array
Modify the data type of the clk_phase array to u32 to make it compatible
with the argument requirement of "of_property_read_variable_u32_array".

Addresses-coverity: ("incompatible_param")
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-7-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:29 +02:00
Manish Narani
462f58fdb8 mmc: sdhci-of-arasan: Use appropriate type of division macro
The division macro DIV_ROUND_CLOSEST takes int values as the argument.
However the code here uses unsigned int values for this, which is
causing the values comparison with 0 as always true. We can use
DIV_ROUND_CLOSEST_ULL instead for the same.

Addresses-coverity: ("result_independent_of_operands")
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-6-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:29 +02:00
Manish Narani
66bad6ed22 mmc: sdhci-of-arasan: Check return value of non-void funtions
At a couple of places, the return values of the non-void functions were
not getting checked. This was reported by the coverity tool. Modify the
code to check the return values of the same.

Addresses-Coverity: ("check_return")
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-5-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:29 +02:00
Manish Narani
256e4e4e83 mmc: sdhci-of-arasan: Skip Auto tuning for DDR50 mode in ZynqMP platform
ZynqMP platform does not perform auto tuning in DDR50 mode. Skip the
same while the card is operating in DDR50 mode.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-4-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:28 +02:00
Manish Narani
25a916645e mmc: sdhci-of-arasan: Add "SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12" quirk.
Arasan controller supports AUTO CMD12, this patch adds
"SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12" quirk to enable auto cmd12
feature.
By using auto cmd12 we can also avoid following error message
"Got data interrupt even though no data operation in progress"

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-3-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:28 +02:00
Manish Narani
c0b4e411a9 mmc: sdhci-of-arasan: Modified SD default speed to 19MHz for ZynqMP
SD standard speed timing was met only at 19MHz and not 25 MHz, that's
why changing driver to 19MHz. The reason for this is when a level shifter
is used on the board, timing was met for standard speed only at 19MHz.
Since this level shifter is commonly required for high speed modes,
the driver is modified to use standard speed of 19Mhz.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1623753837-21035-2-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-24 10:15:28 +02:00
Nicolas Saenz Julienne
419dd626e3 mmc: sdhci-iproc: Set SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN on BCM2711
The controller doesn't seem to pick-up on clock changes, so set the
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN flag to query the clock frequency
directly from the clock.

Fixes: f84e411c85 ("mmc: sdhci-iproc: Add support for emmc2 of the BCM2711")
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1628334401-6577-6-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-16 12:12:05 +02:00
Nicolas Saenz Julienne
c9107dd0b8 mmc: sdhci-iproc: Cap min clock frequency on BCM2711
There is a known bug on BCM2711's SDHCI core integration where the
controller will hang when the difference between the core clock and the
bus clock is too great. Specifically this can be reproduced under the
following conditions:

- No SD card plugged in, polling thread is running, probing cards at
  100 kHz.
- BCM2711's core clock configured at 500MHz or more.

So set 200 kHz as the minimum clock frequency available for that board.

For more information on the issue see this:
https://lore.kernel.org/linux-mmc/20210322185816.27582-1-nsaenz@kernel.org/T/#m11f2783a09b581da6b8a15f302625b43a6ecdeca

Fixes: f84e411c85 ("mmc: sdhci-iproc: Add support for emmc2 of the BCM2711")
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1628334401-6577-5-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-16 12:09:11 +02:00
Shaik Sajida Bhanu
67b13f3e22 mmc: sdhci-msm: Update the software timeout value for sdhc
Whenever SDHC run at clock rate 50MHZ or below, the hardware data
timeout value will be 21.47secs, which is approx. 22secs and we have
a current software timeout value as 10secs. We have to set software
timeout value more than the hardware data timeout value to avioid seeing
the below register dumps.

[  332.953670] mmc2: Timeout waiting for hardware interrupt.
[  332.959608] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
[  332.966450] mmc2: sdhci: Sys addr:  0x00000000 | Version:  0x00007202
[  332.973256] mmc2: sdhci: Blk size:  0x00000200 | Blk cnt:  0x00000001
[  332.980054] mmc2: sdhci: Argument:  0x00000000 | Trn mode: 0x00000027
[  332.986864] mmc2: sdhci: Present:   0x01f801f6 | Host ctl: 0x0000001f
[  332.993671] mmc2: sdhci: Power:     0x00000001 | Blk gap:  0x00000000
[  333.000583] mmc2: sdhci: Wake-up:   0x00000000 | Clock:    0x00000007
[  333.007386] mmc2: sdhci: Timeout:   0x0000000e | Int stat: 0x00000000
[  333.014182] mmc2: sdhci: Int enab:  0x03ff100b | Sig enab: 0x03ff100b
[  333.020976] mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[  333.027771] mmc2: sdhci: Caps:      0x322dc8b2 | Caps_1:   0x0000808f
[  333.034561] mmc2: sdhci: Cmd:       0x0000183a | Max curr: 0x00000000
[  333.041359] mmc2: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x00000000
[  333.048157] mmc2: sdhci: Resp[2]:   0x00000000 | Resp[3]:  0x00000000
[  333.054945] mmc2: sdhci: Host ctl2: 0x00000000
[  333.059657] mmc2: sdhci: ADMA Err:  0x00000000 | ADMA Ptr:
0x0000000ffffff218
[  333.067178] mmc2: sdhci_msm: ----------- VENDOR REGISTER DUMP
-----------
[  333.074343] mmc2: sdhci_msm: DLL sts: 0x00000000 | DLL cfg:
0x6000642c | DLL cfg2: 0x0020a000
[  333.083417] mmc2: sdhci_msm: DLL cfg3: 0x00000000 | DLL usr ctl:
0x00000000 | DDR cfg: 0x80040873
[  333.092850] mmc2: sdhci_msm: Vndr func: 0x00008a9c | Vndr func2 :
0xf88218a8 Vndr func3: 0x02626040
[  333.102371] mmc2: sdhci: ============================================

So, set software timeout value more than hardware timeout value.

Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1626435974-14462-1-git-send-email-sbhanu@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-04 13:17:21 +02:00
Christophe Kerello
d8e193f13b mmc: mmci: stm32: Check when the voltage switch procedure should be done
If the card has not been power cycled, it may still be using 1.8V
signaling. This situation is detected in mmc_sd_init_card function and
should be handled in mmci stm32 variant.  The host->pwr_reg variable is
also correctly protected with spin locks.

Fixes: 94b94a93e3 ("mmc: mmci_sdmmc: Implement signal voltage callbacks")
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210701143353.13188-1-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-04 12:46:02 +02:00
Vincent Whitchurch
25f8203b4b mmc: dw_mmc: Fix hang on data CRC error
When a Data CRC interrupt is received, the driver disables the DMA, then
sends the stop/abort command and then waits for Data Transfer Over.

However, sometimes, when a data CRC error is received in the middle of a
multi-block write transfer, the Data Transfer Over interrupt is never
received, and the driver hangs and never completes the request.

The driver sets the BMOD.SWR bit (SDMMC_IDMAC_SWRESET) when stopping the
DMA, but according to the manual CMD.STOP_ABORT_CMD should be programmed
"before assertion of SWR".  Do these operations in the recommended
order.  With this change the Data Transfer Over is always received
correctly in my tests.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210630102232.16011-1-vincent.whitchurch@axis.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-08-04 12:41:20 +02:00
Gustavo A. R. Silva
f95deaeca8 mmc: jz4740: Fix fall-through warning for Clang
Fix the following fallthrough warning (mips-randconfig with Clang):

drivers/mmc/host/jz4740_mmc.c:792:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/lkml/60edca25.k00ut905IFBjPyt5%25lkp@intel.com/
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2021-07-13 13:59:22 -05:00
Linus Torvalds
8f3f2ccf3c MMC core:
- Clear flags before allowing to retune
 
 MMC host:
  - sdhci: Clear unused bounce buffer at DMA mmap error path
  - sdhci: Fix warning message when accessing RPMB in HS400 mode
  - sdhci-of-arasan: Use clock-frequency property to update clk_xin
  - mtk-sd: Fixup compatible string for MT8195
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmDi3jYXHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjClqXg/+KGzL6qRBvoy8UcwVI650a8WM
 QKRyYzHUjp8DQh8zpPu1e49VeILKdZokxrlIa4z/E/HVgYMkGOJ/lE/7TUCDNDS9
 WwxT4M8ToIK7T45wKNpYtLS+AYR3dQk/H7Y0hsXEDulGki37OvTfykhI+0gxBpWj
 Beigw2RAnXsw/vXmLHLwJHYOF3zO1T2bN+O96dA14XXyhVaWmxb9xA06PwjSsLhL
 7Sk2ydFPrZW2H13INw4pjPJetzEI3aiuWmi2udwHAaVxtvh2MDX7253i4JbHmWFS
 mIEusnibTi91TUVrVbPMXbWJe/DApbNLPXjtzzmivQRD/RPZlCLVYR6CusUhxs6B
 bkOVIsUV8zlnuPg3UcZq7kHZ2WkWD3QFsBZoQ1hFAeBGTQcYb00IGHYHQUGVAeCo
 T237CKK0bLVqaZzoGjcsVk22L878hW1mfcimM1XW0P7Rc9xLKHpBBFH7cswYvnVV
 DRR8EU0bneSjefkF8HW3+gUNJNVJJTkpYipe81j1aDLN8vj0fPYgFRqDLOAaBHRC
 pFsYOrm0exkzmn7XSvZsOI4WZ7xHCnCQoUZNNOz3nw6jZUSHvf0BmuROx8ZKQy3d
 jCoG6OaslvjzAZ7ORmzJk0c7FsD/JWyrW8xdzC9ot3P+PRshpSPvZGG+JfmrCeZ/
 DCE5gIRuc37dose92M4=
 =Rucm
 -----END PGP SIGNATURE-----

Merge tag 'mmc-v5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson
 "MMC core:
   - Clear flags before allowing to retune

  MMC host:
   - sdhci: Clear unused bounce buffer at DMA mmap error path
   - sdhci: Fix warning message when accessing RPMB in HS400 mode
   - sdhci-of-arasan: Use clock-frequency property to update clk_xin
   - mtk-sd: Fixup compatible string for MT8195"

* tag 'mmc-v5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: sdhci: Fix warning message when accessing RPMB in HS400 mode
  dt-bindings: mmc: change compatiable string for MT8195 mmc host IP
  mmc: sdhci: Clear unused bounce buffer at DMA mmap error path
  phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP
  mmc: sdhci-of-arasan: Use clock-frequency property to update clk_xin
  mmc: core: clear flags before allowing to retune
2021-07-05 12:01:09 -07:00
Linus Torvalds
a48ad6e7a3 linux-kselftest-kunit-fixes-5.14-rc1
This KUnit update for Linux 5.14-rc1 consists of fixes and features:
 
 -- add support for skipped tests
 -- introduce kunit_kmalloc_array/kunit_kcalloc() helpers
 -- add gnu_printf specifiers
 -- add kunit_shutdown
 -- add unit test for filtering suites by names
 -- convert lib/test_list_sort.c to use KUnit
 -- code organization moving default config to tools/testing/kunit
 -- refactor of internal parser input handling
 -- cleanups and updates to documentation
 -- code cleanup related to casts
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPZKym/RZuOCGeA/kCwJExA0NQxwFAmDfNHgACgkQCwJExA0N
 QxzU5g/+ORbcbE5jhumo82xYUCGTScgIqPllNO000Vk9xydMqwx6tpY5puV0ig2z
 5X7pxKEQTnype58yzY5mS1p336ryIx3q+AwEownxTW3YurXo2naQ59ZPjEvlAV+E
 h+DMYLzEjrxzcyJATw02uC9YLUZ3w6FPJfiXViIv93YYrtcnM0u6JpwG0yfBlI4v
 4KKB2Xu4K7T90C9/ADFYFKX3mjXQl5fQwvIdtA7wS90Cgq52LKp2mvg1XEiZE5d+
 0dkTZ4Zo8TxxHt665o7vfnUjQQNmh45iGlW65wONxfAPb8BPoneGjVKWQTnN0Hor
 W+93ZPbMuFMSSKJuoHY9U7sP5VySKvaiIYaGdi6prnZZu0zUabKnLZ6FOy7kEdfs
 v09ulCBTVLslixVgNcp/kD9T+G/SXwCF5YBMAiMDQ0GNfUqlFtBkEA3gd44KwMI0
 KwCcOgUSiaCkqyzOz/VeQsu/nhA5jdMO0KjiAs7Z3e7r7O/qKFs/ll7hZgDNCWSC
 q8eIrcBkSL0EGgXR1iZ4AtGm8op6KKd4ACBM8NdtTyoGFl1npZOgZnHoIsy35G9K
 9mhc7eXSoaDGqy9dONL1Tc8Neg7qLTXQNp2radqsnAAgNPUrJuC7+8YC+DdIsjBH
 W7OyMjpfbwPws5rP4CS+JdwL+nQprKXZvFIhWGYhkDK44MbOngw=
 =5QAv
 -----END PGP SIGNATURE-----

Merge tag 'linux-kselftest-kunit-fixes-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest

Pull KUnit update from Shuah Khan:
 "Fixes and features:

   - add support for skipped tests

   - introduce kunit_kmalloc_array/kunit_kcalloc() helpers

   - add gnu_printf specifiers

   - add kunit_shutdown

   - add unit test for filtering suites by names

   - convert lib/test_list_sort.c to use KUnit

   - code organization moving default config to tools/testing/kunit

   - refactor of internal parser input handling

   - cleanups and updates to documentation

   - code cleanup related to casts"

* tag 'linux-kselftest-kunit-fixes-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest: (29 commits)
  kunit: add unit test for filtering suites by names
  kasan: test: make use of kunit_skip()
  kunit: test: Add example tests which are always skipped
  kunit: tool: Support skipped tests in kunit_tool
  kunit: Support skipped tests
  thunderbolt: test: Reinstate a few casts of bitfields
  kunit: tool: internal refactor of parser input handling
  lib/test: convert lib/test_list_sort.c to use KUnit
  kunit: introduce kunit_kmalloc_array/kunit_kcalloc() helpers
  kunit: Remove the unused all_tests.config
  kunit: Move default config from arch/um -> tools/testing/kunit
  kunit: arch/um/configs: Enable KUNIT_ALL_TESTS by default
  kunit: Add gnu_printf specifiers
  lib/cmdline_kunit: Remove a cast which are no-longer required
  kernel/sysctl-test: Remove some casts which are no-longer required
  thunderbolt: test: Remove some casts which are no longer required
  mmc: sdhci-of-aspeed: Remove some unnecessary casts from KUnit tests
  iio: Remove a cast in iio-test-format which is no longer required
  device property: Remove some casts in property-entry-test
  Documentation: kunit: Clean up some string casts in examples
  ...
2021-07-02 12:58:26 -07:00
Al Cooper
d0244847f9 mmc: sdhci: Fix warning message when accessing RPMB in HS400 mode
When an eMMC device is being run in HS400 mode, any access to the
RPMB device will cause the error message "mmc1: Invalid UHS-I mode
selected". This happens as a result of tuning being disabled before
RPMB access and then re-enabled after the RPMB access is complete.
When tuning is re-enabled, the system has to switch from HS400
to HS200 to do the tuning and then back to HS400. As part of
sequence to switch from HS400 to HS200 the system is temporarily
put into HS mode. When switching to HS mode, sdhci_get_preset_value()
is called and does not have support for HS mode and prints the warning
message and returns the preset for SDR12. The fix is to add support
for MMC and SD HS modes to sdhci_get_preset_value().

This can be reproduced on any system running eMMC in HS400 mode
(not HS400ES) by using the "mmc" utility to run the following
command: "mmc rpmb read-counter /dev/mmcblk0rpmb".

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: 52983382c7 ("mmc: sdhci: enhance preset value function")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210624163045.33651-1-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-07-02 14:59:51 +02:00
Linus Torvalds
514798d365 This round has a diffstat dominated by Qualcomm clk drivers. Honestly though
that's just a bunch of data so the diffstat reflects that. Looking beyond that
 there's just a bunch of updates all around in various clk drivers. Renesas and
 NXP (for i.MX) are two SoC vendors that have a lot of patches in here. Overall
 the driver changes look to be mostly enabling more clks and non-critical fixes
 that we could hold until the next merge window.
 
 I'm especially excited about the series from Arnd that graduates clkdev to be
 the only implementation of clk_get() and clk_put(). That's a good step in the
 right direction to migreate eveerything over to the common clk framework. Now
 we don't have to worry about clkdev specific details, they're just part of the
 clk API now.
 
 Core:
  - clkdev is now the only option, i.e. clk_get()/clk_put() is implemented in
    only one place in the kernel instead of in drivers/clk/clkdev.c and in
    architectures that want their own implementation
 
 New Drivers:
  - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock
    Jitter Cleaner With Dual Loop PLLs
  - Qualcomm MDM9607 GCC
  - Qualcomm SC8180X display clks
  - Qualcomm SM6125 GCC
  - Qualcomm SM8250 CAMCC (camera)
  - Renesas RZ/G2L SoC
  - Hisilicon hi3559A SoC
 
 Updates:
  - Stop using clock-output-names in ST clk drivers (yay!)
  - Support secure mode of STM32MP1 SoCs
  - Improve clock support for Actions S500 SoC
  - duty cycle setting support on qcom clks
  - Add TI am33xx spread spectrum clock support
  - Use determine_rate() for the Amlogic pll ops instead of round_rate()
  - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
  - Improve Amlogic axg-audio controller error on deferral
  - Add NNA clocks on Amlogic g12a
  - Reduce memory footprint of Rockchip PLL rate tables
  - A fix for the newly added Rockchip rk3568 clk driver
  - Exported clock for the newly added Rockchip video decoder
  - Remove audio ipg clock from i.MX8MP
  - Remove deprecated legacy clock binding for i.MX SCU clock driver
  - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
  - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif, audio,
    parallel interface)
  - Add dedicated clock ops for i.MX paralel interface
  - Different fixes for clocks controlled by ATF on i.MX SoCs
  - Add A53/A72 frequency scaling support i.MX clk-scu driver
  - Add special case for DCSS clock on suspend for i.MX clk-scu driver
  - Add parent save/restore on suspend/resume to i.MX clk-scu driver
  - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
  - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
    bindings
  - Tegra clk driver no longer deasserts resets on clk_enable as it
    gets in the way of certain power-up sequences
  - Fix compile testing for Tegra clk driver
  - One patch to fix a divider on the Allwinner v3s Audio PLL
  - Add support for CPU core clock boost modes on Renesas R-Car Gen3
  - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
  - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate()
    and improve support for multiple parents
  - Switch Renesas RZ/N1 divider clocks to .determine_rate()
  - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
  - Convert ar7 to common clk framework
  - Convert ralink to common clk framework
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmDbu3sRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSV+OA/9EEV3uuauFsxVm8ySX4T8amHAzE98asEX
 XldxMqBuGNnlqJn3A3LeGISKKafaRMkL/7xqBnTi9ZycDy1WRi2SiAKLTDoJCmi7
 ES32EBCO1O9D5uo4mYFsYgHUaxFmE+4tQbtDCttVt59yZEiiNPz0Lm8tWz5yuDzX
 IwCN8HrNShyL4dykTRUDuUkqrTg9sSqSvdG+XcyI24pgLtBWvJU32wIFfLN+/n9C
 JSyYwzHkajoeuv5kpAJ1IV/tzZgy77xQHunsatJWz1qJ1J2eFADWI2p3NVf88N21
 5Mw5xvikMJZ5Xq8pdZKiyEQOFfcxN/+k7hfc6eq3SDpbkaHPti9CX2rv9Uck6rdh
 Bigixsx9IHbQ+1CJAXZxcAJma/GwzoWW1irqzTQoChYgwlJIyPijFqbuJxqS4P0d
 9sEp0WvbdAEgnktiqs7gphki7Q04y2gUD3LKD6hz5sL0vZ+Dy1DY6olkWJefGrHo
 FDnEGf6gsP3vvvlJt5G2zeZQ/NzMKkfaIGLj/1hTtoLMaxpg282cmPXVUxD+ripW
 /GG/z14RdaHQXeMXduo+MeK5qUsO6LspnYown54IWilOOo1m/rfbun3yAFJaphG1
 ZQB+JDfeH8Cv6AYbNwbEpXyXyj2Rz5fGQjA31+97fCCxykZ+suBQkWqK/lUCmTyf
 ofwokRnKiYY=
 =YnCF
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round has a diffstat dominated by Qualcomm clk drivers. Honestly
  though that's just a bunch of data so the diffstat reflects that.
  Looking beyond that there's just a bunch of updates all around in
  various clk drivers. Renesas and NXP (for i.MX) are two SoC vendors
  that have a lot of patches in here.

  Overall the driver changes look to be mostly enabling more clks and
  non-critical fixes that we could hold until the next merge window.

  I'm especially excited about the series from Arnd that graduates
  clkdev to be the only implementation of clk_get() and clk_put().
  That's a good step in the right direction to migreate eveerything over
  to the common clk framework. Now we don't have to worry about clkdev
  specific details, they're just part of the clk API now.

  Core:
   - clkdev is now the only option, i.e. clk_get()/clk_put() is
     implemented in only one place in the kernel instead of in
     drivers/clk/clkdev.c and in architectures that want their own
     implementation

  New Drivers:
   - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant
     Clock Jitter Cleaner With Dual Loop PLLs
   - Qualcomm MDM9607 GCC
   - Qualcomm SC8180X display clks
   - Qualcomm SM6125 GCC
   - Qualcomm SM8250 CAMCC (camera)
   - Renesas RZ/G2L SoC
   - Hisilicon hi3559A SoC

  Updates:
   - Stop using clock-output-names in ST clk drivers (yay!)
   - Support secure mode of STM32MP1 SoCs
   - Improve clock support for Actions S500 SoC
   - duty cycle setting support on qcom clks
   - Add TI am33xx spread spectrum clock support
   - Use determine_rate() for the Amlogic pll ops instead of
     round_rate()
   - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
   - Improve Amlogic axg-audio controller error on deferral
   - Add NNA clocks on Amlogic g12a
   - Reduce memory footprint of Rockchip PLL rate tables
   - A fix for the newly added Rockchip rk3568 clk driver
   - Exported clock for the newly added Rockchip video decoder
   - Remove audio ipg clock from i.MX8MP
   - Remove deprecated legacy clock binding for i.MX SCU clock driver
   - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
   - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif,
     audio, parallel interface)
   - Add dedicated clock ops for i.MX paralel interface
   - Different fixes for clocks controlled by ATF on i.MX SoCs
   - Add A53/A72 frequency scaling support i.MX clk-scu driver
   - Add special case for DCSS clock on suspend for i.MX clk-scu driver
   - Add parent save/restore on suspend/resume to i.MX clk-scu driver
   - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
   - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
     bindings
   - Tegra clk driver no longer deasserts resets on clk_enable as it
     gets in the way of certain power-up sequences
   - Fix compile testing for Tegra clk driver
   - One patch to fix a divider on the Allwinner v3s Audio PLL
   - Add support for CPU core clock boost modes on Renesas R-Car Gen3
   - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
   - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate() and
     improve support for multiple parents
   - Switch Renesas RZ/N1 divider clocks to .determine_rate()
   - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
   - Convert ar7 to common clk framework
   - Convert ralink to common clk framework"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (161 commits)
  clk: zynqmp: Handle divider specific read only flag
  clk: zynqmp: Use firmware specific mux clock flags
  clk: zynqmp: Use firmware specific divider clock flags
  clk: zynqmp: Use firmware specific common clock flags
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  ...
2021-07-01 13:26:16 -07:00
Takashi Iwai
49036ba889 mmc: sdhci: Clear unused bounce buffer at DMA mmap error path
When DMA-mapping of the bounce buffer fails, the driver tries to fall
back, but it leaves the allocated host->bounce_buffer although its
size is zero.  Later on, the driver checks the use of bounce buffer
with host->bounce_buffer pointer, and it tries to use the buffer
incorrectly, resulting in Oops.

This patch clears the release the unused buffer and clears the
bounce_buffer pointer for addressing the problem.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/r/20210611101948.18972-1-tiwai@suse.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-06-29 16:50:00 +02:00
Rashmi A
b2af322792 mmc: sdhci-of-arasan: Use clock-frequency property to update clk_xin
If clock-frequency property is set and it is not the same as the current
clock rate of clk_xin(base clock frequency), set clk_xin to use the
provided clock rate.

Signed-off-by: Rashmi A <rashmi.a@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Tested-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/20210603182242.25733-2-rashmi.a@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-06-29 16:45:16 +02:00
David Gow
97847240c0 mmc: sdhci-of-aspeed: Remove some unnecessary casts from KUnit tests
With KUnit's EXPECT macros no longer typechecking arguments as strictly,
get rid of a number of now unnecessary casts.

Signed-off-by: David Gow <davidgow@google.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2021-06-23 16:39:08 -06:00
Al Cooper
98b5ce4c08 mmc: sdhci-iproc: Add support for the legacy sdhci controller on the BCM7211
Add support for the legacy Arasan sdhci controller on the BCM7211 and
related SoC's. This includes adding a .shutdown callback to increase
the power savings during S5.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Link: https://lore.kernel.org/r/20210602192758.38735-2-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-06-15 17:27:48 +02:00
Ulf Hansson
2c49912f1d Merge branch 'fixes' into next 2021-06-15 17:27:38 +02:00