Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
- MIPI-DSI support for the A33
- NAND support for the A33
- SMP support for the A83t
- GMAC support for the R40
- And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
Classic
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAlsClXwACgkQ0rTAlCFN
r3TuSg/+I7KPeriS3XpLGtEa+mibGDtpCL3wq07HatExCGvkqOMzlySLqlQZLPJC
BkIit55EIhmsn6yHpdH3zWMpb/EN4izpX6Ht260/6G5jM+Bzdc8M2SashwKjGixf
VYMeku+3jJKi68WPCqlQ7xZDY9dJzSiVVahePfmsLqmos4SpinwFG7scm5+bN0x7
6W9AfernSiPwTtMLqe9uHu5PY+bqxNMln/JelaRQPRwbh984/MFtTbjTezD9CUT6
In4qCfghJyBX9XSe+j0IPayg/1E7dEKVPC7yVP1MkOef7H1OEQHOU9tlz4u4lEBI
FDowiFtTPpfQQQLAIIOiqMNMrJg7xSp2cy8jbAe8HlEdR1tP4O7cw0iXVXmLT6Ny
DWua6AAk4Shp+yA9TocRcPNzd9/fn8h9RAO3wt+bmjU+jLHMv++k4oMxSFQmOhMl
wgiNxjnuSPQ0JmeGn4f+SATvCyi7F+DzgZ9yGVqF/HiLu0JDaLQ9wnqb+Xh4i03i
PDPFf9LCAC6JdovENpS2JAzCoowDgAxxsli4HMGgPP4GmrFWc6Ts0itGqsQBa5ro
do0DYAPHoxHqiqgvR6oITKbhyD4M/iXfXvQLnPq6EHixuT/HtsvTYpLLfh8fPjbX
5c2+OaFwhHZlIYJqVcwFEkem7xQU+I51LTEp3NhVcD1dTtKqNJk=
=f5iC
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT additions for 4.18
Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
- MIPI-DSI support for the A33
- NAND support for the A33
- SMP support for the A83t
- GMAC support for the R40
- And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
Classic
* tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC
ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
ARM: dts: sun8i: a83t: Add CCI-400 node
ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi
ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
ARM: dts: sun8i: a23/a33: declare NAND pins
ARM: dts: sunxi: Add sid for a83t
ARM: dts: sun8i: a33: Add the DSI-related nodes
ARM: dts: sunxi: Change sun7i-a20-olimex-som204-evb to not use cd-inverted
ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbAYtyAAoJEFBXWFqHsHzOuJQH/2IdC1KHoeE1BB6LwVzShqLY
lCrg9MVcO87nkxbtBJk/drLIr8H/qfsZpnrHusY0VxfMFOF2C3j1dhWOMSIiakNh
bLlKxBGq7hANkIQ8k4KaLpK7XR3BPFUn/dkEBKKzNvs4i6JtcQ+fiVW/G5ytqcf9
5/p1uRYGPZ6KUSAaV2socchgymzyVNR8kWo6tBOlX91JyN5QsvwrKihMuu3JpBIp
9dsd9ylWHY2ELZeJ1fSBY/T+zePFpQAnHrzjvOhJQvPcvUNRMiDQnCA3Q5Dn2Mmy
c6FcCX5XY10g1F/xourkQzZN3V58l4oCjRQWij4VfEHwb6pRBXl+edth3StLNes=
=GSKa
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig update for 4.18:
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
* tag 'imx-defconfig-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select CONFIG_GPIO_MAX732X by default
ARM: imx_v6_v7_defconfig: enable imx6sll by default
ARM: imx_v6_v7_defconfig: enable Vybrid OCOTP driver
ARM: imx_v6_v7_defconfig: add mwifiex driver
ARM: imx_v6_v7_defconfig: add RN5T618 PMIC family support
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbAYgeAAoJEFBXWFqHsHzO8ZUH/RG21GCtMGozrIoL9f0/6R4T
wBj/vdg31XGk7XYkmxKH5J6hwryco7Z2uMfKhsRbfXUzt+DxwtseJUgaKHygk/oh
ns7LhuSvhYwqa6AENN70DOt4b3TX/sAyYrBIFUXQRsZrafPhn7+8/Y8oiLbY3lOs
cctrHA31jz5ytXVoLT1AkFST020JcRjaTpRFYqDohpcOOMqhpjPxPJ6uF6lE/LHf
XVzBYGbxzmzH5PDpEy7KjzkxDt0cvBfH7LrfvcHzi8hGho3P1ShpRah/TYKpmwkx
MVD1NRFTCwKgIjibcjfLse9NJdixza5j6pvWaCacC9agWG6drOxYvYy4ILe2ros=
=F8Nx
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.18:
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
* tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (72 commits)
ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source
ARM: dts: imx51-zii-rdu1: cleanup eMMC node
ARM: dts: vf610-zii-dev: enable vf610 builtin temp sensor
ARM: dts: imx7d: use operating-points-v2 for cpu
ARM: dts: imx7s-warp: remove unnecessary cpu regulator supply
ARM: dts: imx7d: correct cpu supply name for voltage scaling
ARM: dts: imx51-zii-rdu1: limit usbh1 to full-speed
ARM: dts: imx6/7: Remove unit-address from anatop regulators
ARM: dts: imx: Switch NXP boards to SPDX identifier
ARM: dts: imx6qdl-phytec-pfla02: Use IRQ_TYPE specifier
ARM: dts: imx53-voipac-dmm-668: Use IRQ_TYPE specifier
ARM: dts: imx53-qsb: Use IRQ_TYPE specifier
ARM: dts: vf-colibri-eval-v3: Use IRQ_TYPE specifier
ARM: dts: imx6q-gk802: Do not hardcode input codes
ARM: dts: imx53-smd: Do not hardcode input codes
ARM: dts: imx53-ard: Do not hardcode input codes
ARM: dts: imx7: Fix error in coresight TPIU graph connection
ARM: dts: imx53: Fix LDB OF graph warning
ARM: dts: imx: fix IPU OF graph endpoint node names
ARM: dts: imx: Switch to SPDX identifier
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbAX/SAAoJEFBXWFqHsHzOb7UH/01n5GHGeOHm9OgdKHcPyRbx
lRtkBBGJOrOKJc86lvoQeDfaYnw9xP0QJljiK9FonpBTHAK8QJPpeRbnfNT2drG0
07BwLeoIUU6Fo6Qog6ADGmu53mHzFBi1FpjXBB0rtQFeQGY/jOmYsUBWzAAItWua
rRfiY2ya5QN8ZdRdFbP7EV8ZWjN2C/I3BC/K/YdYmMwYwF1unuKjpq68CHz+/Ed7
lofUbWWyod8es38SwLiRpJi5y3tf+a6qoRNTPsNL9/ipbEM7nMHfc+AELQ0Qm9oZ
uGOtDNJ5UkrpBjjBkB8/11lODOfLZ+wjAVul9oKOfgT9uilO9AEhYs/5bMXp2yA=
=/XTx
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.18:
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
* tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: select imx6sll pinctrl when imx6sll enabled
ARM: imx: pcm037: use device properties for at24 eeprom
ARM: imx: pca100: use device properties for at24 eeprom
ARM: imx: pcm043: use device properties for at24 eeprom
ARM: imx: vpr200: drop at24_platform_data
ARM: imx: Update spi_imx platform data to reflect current state
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the common data for all dk07 based boards.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the common parts for the dk04 boards.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The max opp frequency is 716MHZ. So update that.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Now with the driver updates for some peripherals being there,
add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available
peripheral support.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add a 'chosen' node to select the serial console.
This is needed when bootloaders do not pass the
'console=' bootargs.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The PXA3xx SoCs feature dedicated pins for wakeup functionality. These pins
have no alternate functions, so let's always enable them as wakeup source on
DT enabled boards. The WAKEUP1 pin is only available on PXA320.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
We want to work towards phasing out the at24_platform_data structure.
There are few users and its contents can be represented using generic
device properties. Using device properties only will allow us to
significantly simplify the at24 configuration code.
Remove the at24_platform_data structure and replace it with an array
of property entries. Drop the byte_len/size property, as the model name
already implies the EEPROM's size.
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
- Update 32-bit Marvell EBU NAND DT nodes with new bindings
- Add NAND pinctrl information for the Armada 98DX3236 and variants
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWv8BugAKCRALBhiOFHI7
1SbsAKCA4bLq2Z82OGwmb72UMRjEJRHerQCgrTrBKe4r2Q+NAt27RG1X4LsbqoU=
=boOe
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.18-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.18 (part 1)
- Update 32-bit Marvell EBU NAND DT nodes with new bindings
- Add NAND pinctrl information for the Armada 98DX3236 and variants
* tag 'mvebu-dt-4.18-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-xp-98dx: Add NAND pinctrl information
ARM: dts: armada-39x: update NAND node with new bindings
ARM: dts: armada-38x: update NAND node with new bindings
ARM: dts: armada-375: update NAND node with new bindings
ARM: dts: armada-370-xp: update NAND node with new bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as
well as IOMMU enablement for various devices on Tegra30 and Tegra30.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlr+36YTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoVkqEACd/XRFCO2OLfH+31Ekh8jrEiZHe1B3
nWG3SVq2seeECRAGl10ZxYaTcrIlw/Xu9+VhS+6+G+jcAWX0j4OAkUNtmfaAhK3+
gfq/L9bIdsDGiBW11kYw+XvjAWk3AKOo/53b+bGS/ORkhni/BlXkM9cmXJOuPkCV
06/L3iUTJp2PbcHgRmszzuQCxSXBP6hv1X3ydtHb69ziZhfi1boDhdFeBBPCZpFa
KdSwL4XDrdz6gKus8+Ps5QreKSXdjzEJp/PZGb0UOu304OLB3RnWfBl64DHx72p5
h4wkQD930+ySAV0Mlg7P9CwalwSNDzKX5X9QfoSgJHh9rNA8wi6qDJI0jnRQ6kjH
EbKbgP4tjTuhTeR8DRQXRQNrvBFtWRS4koQQjqeadBtoWv1L2oLd6Sd8jLAO2CY6
aMtACLdysbIRYuOUrRKAXhLPADKupFn2sEUGF8/iHKhlFZJ0fFKv9W7eYZFG6r1O
78yvI+ciDVRYRUmq87m7x+OBkgM9chGCKbDNG8p+d92z9DtgvfaG5OM3913S6S7B
2h8l2juuiuVGRF5WRn/Y4uhFzlkxCBY0w04lpAuMqyIgonQQAbTl5sA/fFvduo70
Gf7wCobNiswny7vmIbDdWPV3n1hhaoTltDHdf5lBCgH7PypAV6aFPa5P1UNmN/Fl
zMWRfEkr+xEyDQ==
=I1bn
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.18-rc1
Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as
well as IOMMU enablement for various devices on Tegra30 and Tegra30.
* tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra114: Add IOMMU nodes to Host1x and its clients
ARM: dts: tegra30: Add IOMMU nodes to Host1x and its clients
ARM: tegra: apalis-tk1: Fix high speed UART compatible
Signed-off-by: Olof Johansson <olof@lixom.net>
Contains a single patch that instantiates a platform device for the CPU
frequency driver.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlr+328THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zod7mD/sEyQNKybb212vaVS2zn0y+wEK0Ubwa
JAIitHOtykjJjFwQ1V6Gxk2McGMEwk9iVuhEkCL3LgswqdTLl7THUCElbSN9dBBW
KM245ejgOaIBIMlxH+2fzLJRZXXpk5zbcE20h7Or4Lq+nyPHkloebKbFGzoOl/aO
Fk8BjzhJmh1OkMgK/zFSHtBSVN8p9jxC7PQIRM29YxLNPmMjU03vMpGiFaXHz3zU
yfdfa/XojdAjqwlUkwt44ZDnDhXv7euNBnSPEjdq4FzAg3sAhnHysHC0XrV3DNmO
xPLDeOL1kFLoqA3oGIAsfggEAhkz59jM1JyOeFE8igggQn1W/offC9T6PHEVxSp3
x8+3xmEAJsQ6mHtdqxi52N38FOmbK+/2V8mfyGuFPSOBgFnQ+1xowBEgFKczDBQM
moqTdurZkiKe8UUSz4BcwycvxjxKvhmCAxDOIbTEuRZlf5RhO7j+z5cXFPlsG+tP
0EnO+lcpe2fu4e4Z8nbqQXeUinjWCy0+4Q+Vk4FN3f6NZz2y/G2ZAVlatWj2jezO
sz1J17HlvfHpK1qSvmYcLKOM8q51RNEV+9kIXBl/wIkpFYxZdVu/7l+Ca3m2ZX47
XBwgdFpdn6gv/T52gLJpI/if5RAVYGc75rr3l/4cLy3EULqPvIue00kYpSYE+K8F
9wRr5yffb+IHew==
=Y7op
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.18-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
ARM: tegra: Core changes for v4.18-rc1
Contains a single patch that instantiates a platform device for the CPU
frequency driver.
* tag 'tegra-for-4.18-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Create platform device for tegra20-cpufreq driver
Signed-off-by: Olof Johansson <olof@lixom.net>
* DA850 EVM gains USB support, SD card write-protect, card detect
and some clean-up
* Support for gpio-ranges makes using gpios from DT much easier
* Lego EV3 clean-up
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJa/WvOAAoJEGFBu2jqvgRNU60P/2sLV+1TyjNMNDyaZ+jQSOcR
Q1oTK4j4126NOe1boX1WVuXsLoyBiUp+h/FQ0vHX5wAGDDcVR0odduRVhmpVN2dW
zf3QHiVb1PrAZIU3yA0WBvoCuxSQiFb4dAhHd6Ojd+c0WaVTlqfzOnT0FaT33DNT
ygtR36du+wSzLJ/PXeZC8jsNa1MWrlwvOGO7zg4kFY7LN7vWHEStsYAX9rAA4Oae
coYybDk6nXC1wrzLUTdff5oNXWxsh9hTe1Bzywdm2wq9oQ5qINJnGQJRptzbIX/S
xEVwFsRr9qwIcMBlQKgsVFg0HP7ipnzLiMTu2zu/FFamWCyEaFRfoCur1tkdD/8D
FRFBCdtXlFRl+olBLY613Rjo96v04dYVzggvMS1FKQI4fkK1AAgMTtljsr2Sipaz
0NqEgbOwg12zrHgQGeyvIkUaEiy22oNTiSJlFBLb9EHktRfQzxYMYayr3yIXODyn
N9drAwBnmQwmi+1CJqwrhVi1PVycS/Z6dHXsKAWxARP37BUrmNi6VVbY2+en4sK7
JyVARnpdHDwZioyMuJjPI/wVpsLVYvYfbJtrrClb9nfLTCjNW0i6nSQ6e++rj57o
Y9EoefpENZz8V0oN58hQxBTvyrLQAI6QVfh94/frkRBqUbuyb64OjUvxKD0cHsW7
/Kl/p0Arzqtc7067jMLm
=XbDP
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.18/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
DaVinci device-tree updates for v4.18
* DA850 EVM gains USB support, SD card write-protect, card detect
and some clean-up
* Support for gpio-ranges makes using gpios from DT much easier
* Lego EV3 clean-up
* tag 'davinci-for-v4.18/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: add WP and CD to MMC
ARM: dts: da850-lego-ev3: remove unnecessary gpio-keys properties
ARM: dts: da850-evm: use phandles to extend nodes
ARM: dts: da850: use gpio-ranges
ARM: dts: da850-evm: Enable usb_phy, usb0 and usb1
Signed-off-by: Olof Johansson <olof@lixom.net>
Mainly contains patches to move NAND chipselect to platform data
(currently platform device id is being used). These patches have
been acked by NAND maintainer and because of the driver dependency
an immutable branch has been provided to Boris.
The other patch is to remove an unnecessary postcore_initcall() on
DM644x which is needed for common clock framework conversion.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJa/DYkAAoJEGFBu2jqvgRN3nQP/1IGbkmkCMtBRJcni7Es+x2p
ntxG+NylyyQPMseZNPk3k1MBP9g9+kecpt22p/SDJVgY93+UU90UcUO+WSkqBEiy
E/r+Mzj0EYmyY48dFo5v6dv5ED7lGSqtT0PywA5JCuVJ7Mzs3uHeBlKvhWgdcuSw
McmjXLuyjHybXbpVuDFZ1vSDfmpMO2NskLtpIjIMR8Hk7pNXv+/6FEM5nJiQzSmO
rIMdbEr4+Oqk+y5dWEY4GptSeCIOWiUrjQY3Hi8sLvUc7NVAsOchXcfnDeAI7otJ
NvI2SOgmqiMHmoeWdxAlttt/guhUInWE2HOjGuCs/QEzx5ZXk1xsPAevvcjwtWdz
C4bEK8nMLnXZ6Qd/vXSlQOlGhCBhxCms4pz7VJMeWdG1VXOIU7I7RYScPklA0UfA
SUaHwrdvHOCMy0k3fbiPsv/vxwGvWZxsBDG5QF2geqQufo4lZMS6WgvB83Z5900Q
rw+51Y44G8YpXlZKQrOZ+QzP4PP14FV/BuWeoBy+xXEZZSRghwJrADJcSI/+2KA9
nCcxJgy66wJV4e96e4EXXRbyeVZjGmIp6gyMQsK67bAQ9/Kak4Dtv2VmI7ugbBcl
HAFWfmXgC23+jYKTLQIZOPub8qaBIAx1zkKs+LWWoHW482QoHHLn7j9Dw26RKwST
4smKyrDuM7NoxLZhnwrl
=iWsm
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.18/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
DaVinci SoC support updates for v4.18
Mainly contains patches to move NAND chipselect to platform data
(currently platform device id is being used). These patches have
been acked by NAND maintainer and because of the driver dependency
an immutable branch has been provided to Boris.
The other patch is to remove an unnecessary postcore_initcall() on
DM644x which is needed for common clock framework conversion.
* tag 'davinci-for-v4.18/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: dm644x: remove unnecessary postcore_initcall()
ARM: davinci: aemif: stop using pdev->id as nand chipselect
mtd: rawnand: davinci: stop using pdev->id as chipselect
ARM: davinci: neuros-osd2: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm646x-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: mityomapl138: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm644x-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm365-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm355-leopard: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm355-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: da850-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: da830-evm: specify the chipselect in davinci_nand_pdata
mtd: rawnand: davinci: store the core chipselect number in platform data
Signed-off-by: Olof Johansson <olof@lixom.net>
- add support for meson8m2 SoC
- new board: Tronsmart MXIII Plus using meson8m2 SoC
- odroid-c1: add IR
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlr7W3AACgkQWTcYmtP7
xmULJQ/+NEVPnD63xPOtn0SEtILequTG0nJxDYQX2XUWXCnevq0+emRKRPvCr153
ZKTIaOiR4u5LO7JjgYX+X/lwvkdkOF64oqjfKQSIOmsHy0d3F7/e4jeySc2pncZ7
Xl19SyKa3tcbjmkoXUikEtnXV20hi8e3ADN1pALa6/4L+eSCLsTcThLN+H6brjCj
Pk6hn1GbgovbGKRthrOFKOwk9JMnrVSXsPsPV/f4AiIJHYqvXIxHV4YyGOvboH9a
WrZpIRtqHuk5zu44QyeaX5lYpWv3nOmFnTLvVgFc5HGxkoTIQM60PuoIKsSXGXkn
1HZRWENt44m8QtnFhNK57+hyvGMf+eSbeXFp5I1n+hWgk1p9R1woWc3eghpWuUkJ
J8maAe5MRBZG4fAHdoTymX048g5vkcA/kDYj9To/sQeOY+18PepuYcNp6i3yQU5Z
BL+uxJx7BX5ztvYwiD07SjeXMDaMb4LxxnnJUEDUUkKvq9W6DsTgdyyBxa2evRBi
ADaxb/t6+DAA14JWo01VF2umFlidjEL2xTFEcI6itnUHtU+tyAHck1KNFRYNG17h
Z2d3iKPYr+16rLiqlLembYK0nZf9ZnQszzAavM2TF7e2pT/b6NneIIgEjENaGV9E
7CuR5ppTAri6DbowCHpM38velxYc4FIGVe8Wei0vSmHeqk5AYu8=
=+PvJ
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT updates for v4.18
- add support for meson8m2 SoC
- new board: Tronsmart MXIII Plus using meson8m2 SoC
- odroid-c1: add IR
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8m2: add support for the Tronsmart MXIII Plus
ARM: dts: meson8: add the uart_A pins
ARM: dts: meson: add support for the Meson8m2 SoC
ARM: meson: add support for the Meson8m2 SoCs
ARM: dts: meson8b: odroid-c1: enable the IR receiver
ARM: dts: meson8b: odroid-c1: sort nodes alphabetically
ARM: dts: meson8b: add the cortex-a5-pmu compatible PMU
ARM: dts: meson8: add the cortex-a9-pmu compatible PMU
Signed-off-by: Olof Johansson <olof@lixom.net>
This new attribute allows the userspace to set the base address
of a reditributor region, relaxing the constraint of having all
consecutive redistibutor frames contiguous.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Now that the host SVE context can be saved on demand from Hyp,
there is no longer any need to save this state in advance before
entering the guest.
This patch removes the relevant call to
kvm_fpsimd_flush_cpu_state().
Since the problem that function was intended to solve now no longer
exists, the function and its dependencies are also deleted.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds SVE context saving to the hyp FPSIMD context switch
path. This means that it is no longer necessary to save the host
SVE state in advance of entering the guest, when in use.
In order to avoid adding pointless complexity to the code, VHE is
assumed if SVE is in use. VHE is an architectural prerequisite for
SVE, so there is no good reason to turn CONFIG_ARM64_VHE off in
kernels that support both SVE and KVM.
Historically, software models exist that can expose the
architecturally invalid configuration of SVE without VHE, so if
this situation is detected at kvm_init() time then KVM will be
disabled.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch refactors KVM to align the host and guest FPSIMD
save/restore logic with each other for arm64. This reduces the
number of redundant save/restore operations that must occur, and
reduces the common-case IRQ blackout time during guest exit storms
by saving the host state lazily and optimising away the need to
restore the host state before returning to the run loop.
Four hooks are defined in order to enable this:
* kvm_arch_vcpu_run_map_fp():
Called on PID change to map necessary bits of current to Hyp.
* kvm_arch_vcpu_load_fp():
Set up FP/SIMD for entering the KVM run loop (parse as
"vcpu_load fp").
* kvm_arch_vcpu_ctxsync_fp():
Get FP/SIMD into a safe state for re-enabling interrupts after a
guest exit back to the run loop.
For arm64 specifically, this involves updating the host kernel's
FPSIMD context tracking metadata so that kernel-mode NEON use
will cause the vcpu's FPSIMD state to be saved back correctly
into the vcpu struct. This must be done before re-enabling
interrupts because kernel-mode NEON may be used by softirqs.
* kvm_arch_vcpu_put_fp():
Save guest FP/SIMD state back to memory and dissociate from the
CPU ("vcpu_put fp").
Also, the arm64 FPSIMD context switch code is updated to enable it
to save back FPSIMD state for a vcpu, not just current. A few
helpers drive this:
* fpsimd_bind_state_to_cpu(struct user_fpsimd_state *fp):
mark this CPU as having context fp (which may belong to a vcpu)
currently loaded in its registers. This is the non-task
equivalent of the static function fpsimd_bind_to_cpu() in
fpsimd.c.
* task_fpsimd_save():
exported to allow KVM to save the guest's FPSIMD state back to
memory on exit from the run loop.
* fpsimd_flush_state():
invalidate any context's FPSIMD state that is currently loaded.
Used to disassociate the vcpu from the CPU regs on run loop exit.
These changes allow the run loop to enable interrupts (and thus
softirqs that may use kernel-mode NEON) without having to save the
guest's FPSIMD state eagerly.
Some new vcpu_arch fields are added to make all this work. Because
host FPSIMD state can now be saved back directly into current's
thread_struct as appropriate, host_cpu_context is no longer used
for preserving the FPSIMD state. However, it is still needed for
preserving other things such as the host's system registers. To
avoid ABI churn, the redundant storage space in host_cpu_context is
not removed for now.
arch/arm is not addressed by this patch and continues to use its
current save/restore logic. It could provide implementations of
the helpers later if desired.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds a DTS file for Sony Xperia Z1 Compact with support for
regulators, serial UART, eMMC/SD-card, USB, charger, backlight,
coincell and buttons.
Work based on arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts.
Signed-off-by: Attila Szöllősi <ata2001@airmail.cc>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This enables both USB ports as host with EHCI and UHCI
attached to them.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the USB controllers to the DT template of the
AST24xx and AST25xx SoCs.
This patch doesn't enable them by default on any board specific
.dts yet. This will be done when we have the necessary clock/reset
and pinmux support. In the meantime though, this will work if
u-boot configures things properly.
For the AST2400 I only added pinmux definition for port 1
which is dual USB1/USB2. There are additional USB1 only ports
that might require more work but I don't have HW to test at
hand so I'm leaving that to whoever cares.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
S2600WF is a Intel platform family with an ASPEED AST2500 BMC.
Signed-off-by: James Feist <james.feist@linux.intel.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The Inventec Lanyang is Power 9 platform with ast2500 BMC.
Signed-off-by: Brian Yang <yang.brianc.w@inventec.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Initial introduction of Portwell Neptune family equipped with
Aspeed 2500 BMC SoC. Neptune is a x86 server development kit with a
ASPEED ast2500 BMC manufactured by Portwell. Specifically, This
adds the neptune platform device tree file including the flash
layout used by the neptune machines.
Signed-off-by: Amithash Prasad <amithash@fb.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Set watchdog 2 to boot from the alternate flash chip when the watchdog
timer expires and the system is reset. This enables "brick protection."
Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable gpio-keys events for the checkstop and water/air cooled
gpios for use by applications on the Witherspoon system.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add GPIO key to check presence of PCIE E2B.
Signed-off-by: Lei YU <mine260309@gmail.com>
Acked-by: Xo Wang <xow@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This reverts the following commits that change CMA design in MM.
3d2054ad8c ("ARM: CMA: avoid double mapping to the CMA area if CONFIG_HIGHMEM=y")
1d47a3ec09 ("mm/cma: remove ALLOC_CMA")
bad8c6c0b1 ("mm/cma: manage the memory of the CMA area by using the ZONE_MOVABLE")
Ville reported a following error on i386.
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
microcode: microcode updated early to revision 0x4, date = 2013-06-28
Initializing CPU#0
Initializing HighMem for node 0 (000377fe:00118000)
Initializing Movable for node 0 (00000001:00118000)
BUG: Bad page state in process swapper pfn:377fe
page:f53effc0 count:0 mapcount:-127 mapping:00000000 index:0x0
flags: 0x80000000()
raw: 80000000 00000000 00000000 ffffff80 00000000 00000100 00000200 00000001
page dumped because: nonzero mapcount
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 4.17.0-rc5-elk+ #145
Hardware name: Dell Inc. Latitude E5410/03VXMC, BIOS A15 07/11/2013
Call Trace:
dump_stack+0x60/0x96
bad_page+0x9a/0x100
free_pages_check_bad+0x3f/0x60
free_pcppages_bulk+0x29d/0x5b0
free_unref_page_commit+0x84/0xb0
free_unref_page+0x3e/0x70
__free_pages+0x1d/0x20
free_highmem_page+0x19/0x40
add_highpages_with_active_regions+0xab/0xeb
set_highmem_pages_init+0x66/0x73
mem_init+0x1b/0x1d7
start_kernel+0x17a/0x363
i386_start_kernel+0x95/0x99
startup_32_smp+0x164/0x168
The reason for this error is that the span of MOVABLE_ZONE is extended
to whole node span for future CMA initialization, and, normal memory is
wrongly freed here. I submitted the fix and it seems to work, but,
another problem happened.
It's so late time to fix the later problem so I decide to reverting the
series.
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laura Abbott <labbott@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds support of external interrupt for
gpio[a..k], gpioz
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds external interrupt (exti) support
on stm32mp157c SoC.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
fix below warning about PPI interrupts configuration:
"GIC: PPI13 is secure or misconfigured"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
fix below warning about PPI interrupts configuration:
"GIC: PPI13 is secure or misconfigured"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Without this property, we get this boot warning:
"L2C: device tree omits to specify unified cache"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Control the Chromecast's two LEDs using PWM instead of GPIO pins. This
allows for variable brightness.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
On the Chromecast, the bootloader provides us with an ATAG_MEM of
start=0x01000000 and size=0x3eff8000. This is clearly incorrect, as the
range given encompasses nearly a GiB but the Chromecast only has 512MiB
of RAM! Additionally, this causes the kernel to be decompressed at
0x00008000, below the claimed beginning of RAM, and so the boot fails.
Since the existing ATAG parsing code runs before the kernel is even
decompressed and irrevocably patches the device tree, don't even try
to bypass it. Instead, use the "linux,usable-memory" property instead
of the "reg" property to define the real range. The ATAG code only
overwrites reg, but linux,usable-memory is checked first in the OF
driver, so the fact that reg gets changed makes no difference.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Valve Steam Link is a consumer device built around the Marvell BG2CD SoC.
This board file enables the UART, USB and Ethernet interfaces as well as
internal I2C and SDIO, and adds SoC voltage regulator and board-specific
GPIO restart method info.
Cc: Sam Lantinga <saml@valvesoftware.com>
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This is useful if the board file needs to reference it.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This adds most of the remaining Designware IP cores under APB trees in
the interest of documenting assignment of interrupts and memory ranges.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This adds DT nodes for the Cortex-A9 MPCore SCU, local watchdog and
most importantly the global timer.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Cortex-A9 PMU has no associated memory ranges and "make dtbs W=1" warns
about missing reg or ranges property. To avoid the warning, move the PMU
node out of soc subtree to the root.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Use the correct trigger type for Cortex-A9. This was fixed for several
other SoCs since the kernel started issuing a boot-time warning.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
I believe the flush_cache_all() after scu_enable() is to "Ensure that
the data accessed by CPU0 before the SCU was initialised is visible
to the other CPUs." as commented in scu_enable(). So here
flush_cache_all() is a duplication, remove it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
BG2CD SoC uses r3p0 Cortex-A9 MPCore single-CPU cluster. Autoselect
pertinent errata, the SCU and the global timer, and allow use of the
local timer on uniprocessor kernels.
PL310 L2 cache controller has revision r3p2; no errata to select.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Add the save and restore for clksrc as part of suspend and resume
so that it saves the counter value and restores. This is needed in
modes like rtc+ddr in self-refresh not doing this stalls the time.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These registers are part of the wkup domain and are lost during RTC only
suspend and also hibernation, so storing/restoring their state is
necessary.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now as the Amstrad Delta board provides GPIO lookup tables, switch from
GPIO numbers to GPIO descriptors and use the table to locate required
GPIO pins.
The card uses two pins, one for jack and the other for voice modem
codec DAI control.
For jack pin, remove hardcoded GPIO number and use GPIO descriptor
based variant of jack GPIO initialization.
For modem_codec pin, declare static variable for storing its GPIO
descriptor, obtain it on card initialization and replace obsolete
ams_delta_latch2_write() with gpiod_set_value(). For that to work,
don't request the modem_codec pin from the board init code anymore.
If the modem_codec GPIO lookup fails, skip initialization of
functionality of the card which depends on its availability.
Pin naming used by the driver should be followed while respective GPIO
lookup table is initialized by a board init code.
Created and tested against linux-4.17-rc3, on top of patch 1/6 "ARM:
OMAP1: ams-delta: add GPIO lookup tables"
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Scope of the change is limited to GPIO pins used by board specific
device drivers which will be updated by follow-up patches of the
series. Those are some OMAP GPIO (gpio-0-15) and most of Amstrad Delta
latch2 GPIO bank pins. Remaining pins of those banks, as well as
Amstrad Delta latch1 pins, will be addressed later.
Assign a label ("latch2") to the bank, enumerate its pins and put that
information, together with OMAP GPIO bank pins, in GPIO lookup tables.
Assign lookup tables to devices as soon as those devices are registered
and their names can be obtained.
A step froward in:
- removal of hard-coded GPIO numbers from drivers,
- removal of board mach includes from drivers,
- switching to dynamically assigned GPIO numbers.
Created and compile tested agains linux-4.17-rc3
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently there are no differences between the MACH_MESON8 and
MACH_MESON8B Kconfig symbols (except the help text). Since both
platforms are very similar (Meson8b being a slightly updated,
cost-reduced version of Meson8 which even shares some peripherals with
Meson8m2) no notable differences are expected in the future either.
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Currently there are two identical Kconfig options where only differences
are the Kconfig help text and the list of .dtbs that are built:
- MACH_MESON8
- MACH_MESON8B
Build the Meson8b .dtbs when MACH_MESON8 is selected to get rid of the
latter Kconfig symbol later.
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S390 bpf_jit.S is removed in net-next and had changes in 'net',
since that code isn't used any more take the removal.
TLS data structures split the TX and RX components in 'net-next',
put the new struct members from the bug fix in 'net' into the RX
part.
The 'net-next' tree had some reworking of how the ERSPAN code works in
the GRE tunneling code, overlapping with a one-line headroom
calculation fix in 'net'.
Overlapping changes in __sock_map_ctx_update_elem(), keep the bits
that read the prog members via READ_ONCE() into local variables
before using them.
Signed-off-by: David S. Miller <davem@davemloft.net>
The arm_pmu::handle_irq() callback has the same prototype as a generic
IRQ handler, taking the IRQ number and a void pointer argument which it
must convert to an arm_pmu pointer.
This means that all arm_pmu::handle_irq() take an IRQ number they never
use, and all must explicitly cast the void pointer to an arm_pmu
pointer.
Instead, let's change arm_pmu::handle_irq to take an arm_pmu pointer,
allowing these casts to be removed. The redundant IRQ number parameter
is also removed.
Suggested-by: Hoeun Ryu <hoeun.ryu@lge.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
With the new rev.E of A20-SOM-EVB, there is option for 16GB eMMC.
Currently used card is KLMAG2GEND, wired to MMC2 slot.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Pull ARM fixes from Russell King:
- Łukasz Stelmach spotted a couple of issues with the decompressor.
- a couple of kdump fixes found while testing kdump
- replace some perl with shell code
- resolve SIGFPE breakage
- kprobes fixes
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: fix kill( ,SIGFPE) breakage
ARM: 8772/1: kprobes: Prohibit kprobes on get_user functions
ARM: 8771/1: kprobes: Prohibit kprobes on do_undefinstr
ARM: 8770/1: kprobes: Prohibit probing on optimized_callback
ARM: 8769/1: kprobes: Fix to use get_kprobe_ctlblk after irq-disabed
ARM: replace unnecessary perl with sed and the shell $(( )) operator
ARM: kexec: record parent context registers for non-crash CPUs
ARM: kexec: fix kdump register saving on panic()
ARM: 8758/1: decompressor: restore r1 and r2 just before jumping to the kernel
ARM: 8753/1: decompressor: add a missing parameter to the addruart macro
The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.
To avoid regressions, this patch changes the DTS files for the only two
users of this driver that didn't have this property yet.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On RDU1, sdhc1 is used for eMMC, and that is 3.3V only.
Thus configure device node not to probe it as SD/SDIO and not try 1.8V.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vybrid has single internal temperature sensor connected to both internal
ADC modules.
vf610-zii-dev already has ADC0 enabled. Now, to get temperature sensor
captured by iio_hwmon driver, need to configure iio_hwmon node to use
that ADC.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch uses "operating-points-v2" instead of
"operating-points" to be more fit with cpufreq-dt
driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7S does NOT support CPU frequency scaling, so no
need to specify the CPU regulator supply.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Correct CPU supply name to meet cpufreq-dt driver's
requirement for voltage scaling.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On RDU1, imx51 usbh1 interface is either not used, or used via external
block that breaks USB2 signalling.
To keep things working if high-speed device gets connected to that
block, use ChipIdea feature to limit port to full speed.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove unit-address and reg property from anatop regulators to fix
the following DTC warnings with W=1:
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A handful of fixes. I've been queuing them up a bit too long so the list
is longer than it otherwise would have been spread out across a few -rcs.
In general, it's a scattering of fixes across several platforms, nothing
truly serious enough to point out.
There's a slightly larger batch of them for the Davinci platforms due
to work to bring them back to life after some time, so there's a handful
of regressions, some of them going back very far, others more recent.
There's also a few patches fixing DT on Renesas platforms since they
changed some bindings without remaining backwards compatible, splitting
up describing LVDS as a proper bridge instead of having it as part of the
display unit. We could push for them to be backwards compatible with old
device trees, but it's likely to regress eventually if nobody's actually
using said compatibility.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlsAzEkPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx34V0P/1EEUPSF6o3lplpAFHAnXGaaRyHDF07TXkEj
zjceoOPLljrynQJ23HdjRlfh2f51rWD2XjGzlScsTJ8HXYe+auMSCRBRYjwl1RVt
zAQs2+png4pPbrxw6AUJ9CTSmCUPna0dGdySEl3FfxSt7+UdonldEJr+ZvNESiW7
+jSF3twZ/hb6iOxq7xFSnh8GU0ckTm11/HUCxQ/8z4xRfGvENs66Z7cyaStkzLop
cD7wUmwe1I0HsRWkDsGUUQwu6i445edVoELWmooZByXuGWjb3Vu9xmc+yrgQTLkW
4Y3R4kx5VfDfvdN3i2z+W7ZpN47dSkAOMIbjQYl0wELdk0UPaMFTse6mDfIBmC02
dSK2FLpZYsBQX95KxQijh4jBPs+lJsekJd1qxL3ZGpSK0VF1etGhSWrkRQ0pXNmT
4VahLoEY8KBvGKZo1QJ4U2pmAIZS3oMrK9AdJANdpyN0cEiYFl1JTM9PkZfytnLU
haagJL3BJESD36vuAhhvXVWy7vuI5jXnATn9V2WH8yZVMCPh3vsPA+d9Knh3ZqXk
Vv1yZriJyX3zV6kbFoXJsOqg0TgGsyICBSpnjfuQPTtWSdSvlrUuIINFPOqE5Z3E
uFywFEkw1L8ZXxbQn8m92+VqiqeFjyhqWmK2OolQfWlDJlJrmF8ltmkeMv9EQaig
+wh8OuSw
=qPpk
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A handful of fixes. I've been queuing them up a bit too long so the
list is longer than it otherwise would have been spread out across a
few -rcs.
In general, it's a scattering of fixes across several platforms,
nothing truly serious enough to point out.
There's a slightly larger batch of them for the Davinci platforms due
to work to bring them back to life after some time, so there's a
handful of regressions, some of them going back very far, others more
recent.
There's also a few patches fixing DT on Renesas platforms since they
changed some bindings without remaining backwards compatible,
splitting up describing LVDS as a proper bridge instead of having it
as part of the display unit.
We could push for them to be backwards compatible with old device
trees, but it's likely to regress eventually if nobody's actually
using said compatibility"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
ARM: davinci: board-dm646x-evm: set VPIF capture card name
ARM: davinci: board-dm646x-evm: pass correct I2C adapter id for VPIF
ARM: davinci: dm646x: fix timer interrupt generation
ARM: keystone: fix platform_domain_notifier array overrun
arm64: dts: exynos: Fix interrupt type for I2S1 device on Exynos5433
ARM: dts: imx51-zii-rdu1: fix touchscreen bindings
firmware: arm_scmi: Use after free in scmi_create_protocol_device()
ARM: dts: cygnus: fix irq type for arm global timer
Revert "ARM: dts: logicpd-som-lv: Fix pinmux controller references"
tee: check shm references are consistent in offset/size
tee: shm: fix use-after-free via temporarily dropped reference
ARM: dts: imx7s: Pass the 'fsl,sec-era' property
ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
ARM: dts: correct missing "compatible" entry for ti81xx SoCs
ARM: OMAP1: ams-delta: fix deferred_fiq handler
arm64: tegra: Make BCM89610 PHY interrupt as active low
ARM: davinci: fix GPIO lookup for I2C
ARM: dts: logicpd-som-lv: Fix pinmux controller references
ARM: dts: logicpd-som-lv: Fix Audio Mute
ARM: dts: logicpd-som-lv: Fix WL127x Startup Issues
...
Commit 7771c66457 ("signal/arm: Document conflicts with SI_USER and
SIGFPE") broke the siginfo structure for userspace triggered signals,
causing the strace testsuite to regress. Fix this by eliminating
the FPE_FIXME definition (which is at the root of the breakage) and
use FPE_FLTINV instead for the case where the hardware appears to be
reporting nonsense.
Fixes: 7771c66457 ("signal/arm: Document conflicts with SI_USER and SIGFPE")
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
VMLINUX_SYMBOL() is no-op unless CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX
is defined. It has ever been selected only by BLACKFIN and METAG.
VMLINUX_SYMBOL() is unneeded for ARM-specific code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Some users of get_user use the macro with an argument p which
is already specified as static. When using clang this leads to
a duplicate specifier:
CC arch/arm/kernel/process.o
In file included from init/do_mounts.c:15:
In file included from ./include/linux/tty.h:7:
In file included from ./include/uapi/linux/termios.h:6:
In file included from ./arch/arm/include/generated/uapi/asm/termios.h:1:
./include/asm-generic/termios.h:25:6: warning: duplicate 'const' declaration
specifier [-Wduplicate-decl-specifier]
if (get_user(tmp, &termio->c_iflag) < 0)
^
./arch/arm/include/asm/uaccess.h:195:3: note: expanded from macro 'get_user'
__get_user_check(x, p);
^
./arch/arm/include/asm/uaccess.h:155:12: note: expanded from macro
'__get_user_check'
register const typeof(*(p)) __user *__p asm("r0") = (p);
Remove the const attribute from the register declaration
to avoid the duplicate const specifier. In a test with ptrace.c
and traps.c (both using get_user with non-const arguments for p)
the generated code was exactly the same.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use cc-options call for compiler options which are not available
in clang. With this patch an ARMv7 multi platform kernel can be
successfully build using clang (tested with version 5.0.1).
Based-on-patches-by: Behan Webster <behanw@converseincode.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
According to GCC documentation -m(no-)thumb-interwork is
meaningless in AAPCS configurations. Also clang does not
support the flag:
clang-5.0: error: unknown argument: '-mno-thumb-interwork'
Just drop -mno-thumb-interwork in AEABI configuration.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Suspending a CPU on a RT kernel results in the following backtrace:
| Disabling non-boot CPUs ...
| BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
| in_atomic(): 1, irqs_disabled(): 128, pid: 18, name: migration/1
| INFO: lockdep is turned off.
| irq event stamp: 122
| hardirqs last enabled at (121): [<c06ac0ac>] _raw_spin_unlock_irqrestore+0x88/0x90
| hardirqs last disabled at (122): [<c06abed0>] _raw_spin_lock_irq+0x28/0x5c
| CPU: 1 PID: 18 Comm: migration/1 Tainted: G W 4.1.4-rt3-01046-g96ac8da #204
| Hardware name: Generic DRA74X (Flattened Device Tree)
| [<c0019134>] (unwind_backtrace) from [<c0014774>] (show_stack+0x20/0x24)
| [<c0014774>] (show_stack) from [<c06a70f4>] (dump_stack+0x88/0xdc)
| [<c06a70f4>] (dump_stack) from [<c006cab8>] (___might_sleep+0x198/0x2a8)
| [<c006cab8>] (___might_sleep) from [<c06ac4dc>] (rt_spin_lock+0x30/0x70)
| [<c06ac4dc>] (rt_spin_lock) from [<c013f790>] (find_lock_task_mm+0x9c/0x174)
| [<c013f790>] (find_lock_task_mm) from [<c00409ac>] (clear_tasks_mm_cpumask+0xb4/0x1ac)
| [<c00409ac>] (clear_tasks_mm_cpumask) from [<c00166a4>] (__cpu_disable+0x98/0xbc)
| [<c00166a4>] (__cpu_disable) from [<c06a2e8c>] (take_cpu_down+0x1c/0x50)
| [<c06a2e8c>] (take_cpu_down) from [<c00f2600>] (multi_cpu_stop+0x11c/0x158)
| [<c00f2600>] (multi_cpu_stop) from [<c00f2a9c>] (cpu_stopper_thread+0xc4/0x184)
| [<c00f2a9c>] (cpu_stopper_thread) from [<c0069058>] (smpboot_thread_fn+0x18c/0x324)
| [<c0069058>] (smpboot_thread_fn) from [<c00649c4>] (kthread+0xe8/0x104)
| [<c00649c4>] (kthread) from [<c0010058>] (ret_from_fork+0x14/0x3c)
| CPU1: shutdown
The root cause of above backtrace is task_lock() which takes a sleeping
lock on -RT.
To fix the issue, move clear_tasks_mm_cpumask() call from __cpu_disable()
to __cpu_die() which is called on the thread which is asking for a target
CPU to be shutdown. In addition, this change restores CPU hotplug
functionality on ARM CPU1 can be unplugged/plugged many times.
Link: http://lkml.kernel.org/r/1441995683-30817-1-git-send-email-grygorii.strashko@ti.com
[bigeasy: slighty edited the commit message]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
NUMREGBYTES (which is used as the size for gdb_regs[]) is incorrectly
based on DBG_MAX_REG_NUM instead of GDB_MAX_REGS. DBG_MAX_REG_NUM
is the number of total registers, while GDB_MAX_REGS is the number
of 'unsigned longs' it takes to serialize those registers. Since
FP registers require 3 'unsigned longs' each, DBG_MAX_REG_NUM is
smaller than GDB_MAX_REGS.
This causes GDB 8.0 give the following error on connect:
"Truncated register 19 in remote 'g' packet"
This also causes the register serialization/deserialization logic
to overflow gdb_regs[], overwriting whatever follows.
Fixes: 834b2964b7 ("kgdb,arm: fix register dump")
Cc: <stable@vger.kernel.org> # 2.6.37+
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Rabin Vincent <rabin@rab.in>
Tested-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use vma_pages() function instead of open coding it.
Generated by scripts/coccinelle/api/vma_pages.cocci.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
ARMv8R/M architecture defines new memory protection scheme - PMSAv8
which is not compatible with PMSAv7.
Key differences to PMSAv7 are:
- Region geometry is defined by base and limit addresses
- Addresses need to be either 32 or 64 byte aligned
- No region priority due to overlapping regions are not allowed
- It is unified, i.e. no distinction between data/instruction regions
- Memory attributes are controlled via MAIR
This patch implements support for PMSAv8 MPU defined by ARMv8R/M
architecture.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This patch postpone MPU activation till __after_proc_init (which is
placed in .text section) rather than doing it in __setup_mpu. It
allows us ignore used-only-once .head.text section while programming
PMSAv8 MPU (for PMSAv7 it stays covered anyway).
Tested-by: Szemz? András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, we have mixed code placement between .head.text and .text
depends on configuration we are building:
_text M R(UP) R(SMP)
======================================================
__setup_mpu __HEAD __HEAD text
__after_proc_init __HEAD __HEAD text
__mmap_switched text text text
We are going to support another variant of MPU which is different to
PMSAv7 in sense overlapping MPU regions are not allowed, so this patch
makes boundaries between these sections precise and consistent:
_text M R(UP) R(SMP)
======================================================
__setup_mpu __HEAD __HEAD __HEAD
__after_proc_init text text text
__mmap_switched text text text
Additionally, it paves a path to postpone MPU activation till
__after_proc_init where we do set SCTLR anyway and can return
directly to __mmap_switched.
Tested-by: Szemz? András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
We are going to support different MPU which programming model is not
compatible to PMSAv7, so move PMSAv7 MPU under it's own namespace.
Tested-by: Szemz? András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
While testing multi_v7_defconfig with config fragments that makes the
kernel size to grow. The kernel fails to load simple modules, as
reported by kselftest:
[ 34.107620] test_printf: section 4 reloc 2 sym 'memset': relocation
28 out of range (0xbf046044 -> 0xc109f720)
selftests: printf.sh [FAIL]
The problem that is seen when enabling too much in the kernel without
enabling ARM_MODULE_PLTS, is that the top of the kernel gets out of
reach from the bottom of the module area.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since do_undefinstr() uses get_user to get the undefined
instruction, it can be called before kprobes processes
recursive check. This can cause an infinit recursive
exception.
Prohibit probing on get_user functions.
Fixes: 24ba613c9d ("ARM kprobes: core code")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Prohibit kprobes on do_undefinstr because kprobes on
arm is implemented by undefined instruction. This means
if we probe do_undefinstr(), it can cause infinit
recursive exception.
Fixes: 24ba613c9d ("ARM kprobes: core code")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Prohibit probing on optimized_callback() because
it is called from kprobes itself. If we put a kprobes
on it, that will cause a recursive call loop.
Mark it NOKPROBE_SYMBOL.
Fixes: 0dc016dbd8 ("ARM: kprobes: enable OPTPROBES for ARM 32")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since get_kprobe_ctlblk() uses smp_processor_id() to access
per-cpu variable, it hits smp_processor_id sanity check as below.
[ 7.006928] BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1
[ 7.007859] caller is debug_smp_processor_id+0x20/0x24
[ 7.008438] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.16.0-rc1-00192-g4eb17253e4b5 #1
[ 7.008890] Hardware name: Generic DT based system
[ 7.009917] [<c0313f0c>] (unwind_backtrace) from [<c030e6d8>] (show_stack+0x20/0x24)
[ 7.010473] [<c030e6d8>] (show_stack) from [<c0c64694>] (dump_stack+0x84/0x98)
[ 7.010990] [<c0c64694>] (dump_stack) from [<c071ca5c>] (check_preemption_disabled+0x138/0x13c)
[ 7.011592] [<c071ca5c>] (check_preemption_disabled) from [<c071ca80>] (debug_smp_processor_id+0x20/0x24)
[ 7.012214] [<c071ca80>] (debug_smp_processor_id) from [<c03335e0>] (optimized_callback+0x2c/0xe4)
[ 7.013077] [<c03335e0>] (optimized_callback) from [<bf0021b0>] (0xbf0021b0)
To fix this issue, call get_kprobe_ctlblk() right after
irq-disabled since that disables preemption.
Fixes: 0dc016dbd8 ("ARM: kprobes: enable OPTPROBES for ARM 32")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
You can build a kernel in a cross compiling environment that doesn't
have perl in the $PATH. Commit 429f7a062e broke that for 32 bit
ARM. Fix it.
As reported by Stephen Rothwell, it appears that the symbols can be
either part of the BSS section or absolute symbols depending on the
binutils version. When they're an absolute symbol, the $(( ))
operator errors out and the build fails. Fix this as well.
Fixes: 429f7a062e ("ARM: decompressor: fix BSS size calculation")
Reported-by: Rob Landley <rob@landley.net>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
How we got to machine_crash_nonpanic_core() (iow, from an IPI, etc) is
not interesting for debugging a crash. The more interesting context
is the parent context prior to the IPI being received.
Record the parent context register state rather than the register state
in machine_crash_nonpanic_core(), which is more relevant to the failing
condition.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
When a panic() occurs, the kexec code uses smp_send_stop() to stop
the other CPUs, but this results in the CPU register state not being
saved, and gdb is unable to inspect the state of other CPUs.
Commit 0ee59413c9 ("x86/panic: replace smp_send_stop() with kdump
friendly version in panic path") addressed the issue on x86, but
ignored other architectures. Address the issue on ARM by splitting
out the crash stop implementation to crash_smp_send_stop() and
adding the necessary protection.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The hypervisor setup before __enter_kernel destroys the value
sotred in r1. The value needs to be restored just before the jump.
Fixes: 6b52f7bdb8 ("ARM: hyp-stub: Use r1 for the soft-restart address")
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
In commit 639da5ee37 ("ARM: add an extra temp register to the low
level debugging addruart macro") an additional temporary register was
added to the addruart macro, but the decompressor code wasn't updated.
Fixes: 639da5ee37 ("ARM: add an extra temp register to the low level debugging addruart macro")
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
There are some LED's attached to the GPIO expander, and
there are is a bank of switches attached to the GPIO expander.
This patch associates the LED and the switches to it.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is a tca6416 GPIO expander on i2c2. This patch enables the
GPIO expander which has several LED's and some connected DIP
switches
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pin control information for the NAND interface on the Armada
98DX3236 and variants.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
We may have LOGICRETSTATE cleared by the bootloader or kexec boot.
Currently this means we will see lost GPIO interrupts at least for
network interfaces such as wlcore and smsc911x if PER hits retention.
Let's fix the issue by making sure LOGICRETSTATE is set. Once we have
GPIOs working with wakeirqs then we should be able to clear it.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Inroduce cpu_pm notifiers for context save/restore. This will be
needed for am43xx family in case of rtc only mode with ddr in
self-refresh.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are two registers on am43x needed for IO daisy chain wake to work
properly, however currently after an RTC+DDR cycle they are lost. We
must take care to save and restore these before and after entering RTC
mode otherwise IO daisy chain wake will stop working from DeepSleep
after resuming.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Inroduce cpu_pm notifiers for context save/restore. This is
needed for am43xx family during rtc only mode with ddr in
self-refresh.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The powerdomain control registers are stored in the WKUP powerdomain on
AM33XX/AM43XX, which is lost on RTC-only suspend and also hibernate. This
adds context save and restore functions for those registers.
Sometimes the powerdomain state does not need to change,
perhaps we only need to change memory retention states, so make
sure the restored state is different from the current state before we wait
for a transition.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Inroduce cpu_pm notifiers for context save/restore. This will be
needed for am43xx family in case of rtc only mode with ddr in
self-refresh.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tegra20-cpufreq driver require a platform device in order to be loaded,
instantiate a simple platform device for the driver during of the machines
late initialization.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This is used to support suspend modes like RTC-only and hibernate where
the state of the registers controlling clockdomains is lost.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* x86 fixes: PCID, UMIP, locking
* Improved support for recent Windows version that have a 2048 Hz
APIC timer.
* Rename KVM_HINTS_DEDICATED CPUID bit to KVM_HINTS_REALTIME
* Better behaved selftests.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQEcBAABAgAGBQJa/bkTAAoJEL/70l94x66Dzf8IAJ1GqtXi0CNbq8MvU4QIqw0L
HLIRoe/QgkTeTUa2fwirEuu5I+/wUyPvy5sAIsn/F5eiZM7nciLm+fYzw6F2uPIm
lSCqKpVwmh8dPl1SBaqPnTcB1HPVwcCgc2SF9Ph7yZCUwFUtoeUuPj8v6Qy6y21g
jfobHFZa3MrFgi7kPxOXSrC1qxuNJL9yLB5mwCvCK/K7jj2nrGJkLLDuzgReCqvz
isOdpof3hz8whXDQG5cTtybBgE9veym4YqJY8R5ANXBKqbFlhaNF1T3xXrdPMISZ
7bsGgkhYEOqeQsPrFwzAIiFxe2DogFwkn1BcvJ1B+duXrayt5CBnDPRB6Yxg00M=
=H0d0
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
- ARM/ARM64 locking fixes
- x86 fixes: PCID, UMIP, locking
- improved support for recent Windows version that have a 2048 Hz APIC
timer
- rename KVM_HINTS_DEDICATED CPUID bit to KVM_HINTS_REALTIME
- better behaved selftests
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
kvm: rename KVM_HINTS_DEDICATED to KVM_HINTS_REALTIME
KVM: arm/arm64: VGIC/ITS save/restore: protect kvm_read_guest() calls
KVM: arm/arm64: VGIC/ITS: protect kvm_read_guest() calls with SRCU lock
KVM: arm/arm64: VGIC/ITS: Promote irq_lock() in update_affinity
KVM: arm/arm64: Properly protect VGIC locks from IRQs
KVM: X86: Lower the default timer frequency limit to 200us
KVM: vmx: update sec exec controls for UMIP iff emulating UMIP
kvm: x86: Suppress CR3_PCID_INVD bit only when PCIDs are enabled
KVM: selftests: exit with 0 status code when tests cannot be run
KVM: hyperv: idr_find needs RCU protection
x86: Delay skip of emulated hypercall instruction
KVM: Extend MAX_IRQ_ROUTES to 4096 for all archs
This header only contains platform_data. Move it to the proper directory.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Tony Lindgren <tony@atomide.com>
This header only contains platform_data. Move it to the proper directory.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: James Hogan <jhogan@kernel.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Instead of passing a global GPIO number for the enable GPIO, pass
a descriptor looked up from the device tree node or the board file
decriptor table for the regulator.
There is a single board file passing the GPIOs for LDO1 and LDO2
through platform data, so augment this to pass descriptors
associated with the i2c device as well.
The special GPIO enable DT property for the enable GPIO is
nonstandard but this was accomodated in
commit 6a537d4846
"gpio: of: Support regulator nonstandard GPIO properties".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Instead of passing a global GPIO number, pass a descriptor looked
up with the standard devm_gpiod_get_optional() call.
We have augmented the GPIO core to look up the regulator special
GPIO "wlf,ldoena" in commit 6a537d4846
"gpio: of: Support regulator nonstandard GPIO properties".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Bananapi M2 Ultra has a Realtek RTL8211E RGMII PHY tied to the GMAC.
The PMIC's DC1SW output provides power for the PHY, while the ALDO2
output provides I/O voltages on both sides.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The R40 SoC has a GMAC (gigabit capable Ethernet controller). Add a
device node for it. The only publicly available board for this SoC
uses an RGMII PHY. Add a pinmux node for it as well.
Since this SoC also has an old 10/100 Mbps EMAC, which also has an
MDIO bus controller, the MDIO bus for the GMAC is labeled "gmac_mdio".
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The device nodes dereference (&foo) usages should be sorted by the label
names, barring any parsing order issues such as the #include statement
for the PMIC's .dtsi file that must come after the PMIC.
Move the mmc and ohci blocks in front of the PMIC's regulator blocks.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Daniel Borkmann says:
====================
pull-request: bpf-next 2018-05-17
The following pull-request contains BPF updates for your *net-next* tree.
The main changes are:
1) Provide a new BPF helper for doing a FIB and neighbor lookup
in the kernel tables from an XDP or tc BPF program. The helper
provides a fast-path for forwarding packets. The API supports
IPv4, IPv6 and MPLS protocols, but currently IPv4 and IPv6 are
implemented in this initial work, from David (Ahern).
2) Just a tiny diff but huge feature enabled for nfp driver by
extending the BPF offload beyond a pure host processing offload.
Offloaded XDP programs are allowed to set the RX queue index and
thus opening the door for defining a fully programmable RSS/n-tuple
filter replacement. Once BPF decided on a queue already, the device
data-path will skip the conventional RSS processing completely,
from Jakub.
3) The original sockmap implementation was array based similar to
devmap. However unlike devmap where an ifindex has a 1:1 mapping
into the map there are use cases with sockets that need to be
referenced using longer keys. Hence, sockhash map is added reusing
as much of the sockmap code as possible, from John.
4) Introduce BTF ID. The ID is allocatd through an IDR similar as
with BPF maps and progs. It also makes BTF accessible to user
space via BPF_BTF_GET_FD_BY_ID and adds exposure of the BTF data
through BPF_OBJ_GET_INFO_BY_FD, from Martin.
5) Enable BPF stackmap with build_id also in NMI context. Due to the
up_read() of current->mm->mmap_sem build_id cannot be parsed.
This work defers the up_read() via a per-cpu irq_work so that
at least limited support can be enabled, from Song.
6) Various BPF JIT follow-up cleanups and fixups after the LD_ABS/LD_IND
JIT conversion as well as implementation of an optimized 32/64 bit
immediate load in the arm64 JIT that allows to reduce the number of
emitted instructions; in case of tested real-world programs they
were shrinking by three percent, from Daniel.
7) Add ifindex parameter to the libbpf loader in order to enable
BPF offload support. Right now only iproute2 can load offloaded
BPF and this will also enable libbpf for direct integration into
other applications, from David (Beckett).
8) Convert the plain text documentation under Documentation/bpf/ into
RST format since this is the appropriate standard the kernel is
moving to for all documentation. Also add an overview README.rst,
from Jesper.
9) Add __printf verification attribute to the bpf_verifier_vlog()
helper. Though it uses va_list we can still allow gcc to check
the format string, from Mathieu.
10) Fix a bash reference in the BPF selftest's Makefile. The '|& ...'
is a bash 4.0+ feature which is not guaranteed to be available
when calling out to shell, therefore use a more portable variant,
from Joe.
11) Fix a 64 bit division in xdp_umem_reg() by using div_u64()
instead of relying on the gcc built-in, from Björn.
12) Fix a sock hashmap kmalloc warning reported by syzbot when an
overly large key size is used in hashmap then causing overflows
in htab->elem_size. Reject bogus attr->key_size early in the
sock_hash_alloc(), from Yonghong.
13) Ensure in BPF selftests when urandom_read is being linked that
--build-id is always enabled so that test_stacktrace_build_id[_nmi]
won't be failing, from Alexei.
14) Add bitsperlong.h as well as errno.h uapi headers into the tools
header infrastructure which point to one of the arch specific
uapi headers. This was needed in order to fix a build error on
some systems for the BPF selftests, from Sirio.
15) Allow for short options to be used in the xdp_monitor BPF sample
code. And also a bpf.h tools uapi header sync in order to fix a
selftest build failure. Both from Prashant.
16) More formally clarify the meaning of ID in the direct packet access
section of the BPF documentation, from Wang.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
The legacy mode uses the write protect and card detect but DT does not.
This patch enables Write-Protect and Card-Detect pins for the MMC card, and
the gpio-ranges property sets the gpio pinmuxing for those respective pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
R-Car Gen2 and RZ/G1 platforms come with a watchdog IP, therefore enable
its driver by default. It is enabled as a module to avoid increasing
the kernel image size.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 and RZ/G1 platforms come with a watchdog IP, therefore enable
its driver by default.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Variants of proc_create{,_data} that directly take a seq_file show
callback and drastically reduces the boilerplate code in the callers.
All trivial callers converted over.
Signed-off-by: Christoph Hellwig <hch@lst.de>
over multiple boards like default serial setting for rk3288-tinker,
output selection for the dp83867 on the phycore-som and the newly
added pwm-backlight delay properties for veyron boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlr5ccMQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgYd7B/4guy/cJFRSzZfhAl3XYeLlt7F4/RPJOUUk
Wj4PNDMP8hKnAj/2xcyypmf4Of/IvH5PwqywA4mgL7fzE2LkrQkRwpiHzRn1BnJA
2NoNVCRGRDYmMJFqelYs3bPfrGd/kYYaOjeNaD3mQa8cCAv+nZt3YS7ExiSrQeup
Yeg+V5wa0fqtcZneArgsBBD06Fatn2EksYsBtyTwTdf0AYJ+vT+DHEOubVXl4RNm
4eFm7fbplXmjBVnmTDINuRLusmqcDAu3tl/Q+hMqjJefdioyH6zdVPn38GqfhUBO
drg7tLbMQCdYNNCSrrJ5mzoVw4Zp8majfFRlbF69cpabhc6deHYS
=oFJx
-----END PGP SIGNATURE-----
Merge tag 'v4.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Fixed pin numbers for uart4 on rk3288, iommu clocks and small changes
over multiple boards like default serial setting for rk3288-tinker,
output selection for the dp83867 on the phycore-som and the newly
added pwm-backlight delay properties for veyron boards.
* tag 'v4.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: default serial for rk3288 Tinker Board
ARM: dts: rockchip: set PWM delay backlight settings for Minnie
ARM: dts: rockchip: set PWM delay backlight settings for Veyron
ARM: dts: rockchip: add clocks in iommu nodes
ARM: dts: rockchip: Add dp83867 CLK_OUT muxing on rk3288-phycore-som
ARM: dts: rockchip: fix uart4 pin-numbers for rk3288
Signed-off-by: Olof Johansson <olof@lixom.net>
They are needed for DM6467 EVM to work. The first patch fixes an
issue with timer interrupt and the second two are needed for video
driver to probe successfully.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJa+qMLAAoJEGFBu2jqvgRNSIoP/jUPtAY8kSmUuOFhGxEwPSpl
ya2KbOV5b8ltRrsmZUGB7+UrRrj7MKAjTgTDTRBMZNhQv9XmPze42bDf5qgAXyYP
ZW6q6Dd55ub43IHArMlEpP9UoLCbivc7hOZvWvA+t2uWXVp67Io8OhfdcrLr+UmU
vFDu49igO/l7mCl5WFpltBBOVeMbzOrRmHX4urnCbpv3jdcBHpukd4gfyJb0xjcb
+caWfd3Zi5xN0SGOzb4WPZhXjBMUfGPuy3rbHp7mSOWalWP9JHcuY51kg4XRm3SJ
boJMY8rjQbncFjTokIC3uxmH17S20VmVYoMiiFVPO04OFczlWiMV9UYZuhfu0vMx
/soL9vswCCi0BgMPZeKuYmknT6TbxGTM3WJyaQO+UJoaojbzMLfFPzVu0fM79qJ8
yu4uVJOReZc7c2nFAe01BLYNaeI/x2nCBgLPYH+ODzrprySzQi6VfUzctG0aB/tD
ClsvWfx3knxJwW19aaSiFx2+uzG7b+aicFBXFSS+f7nTcoPI/pcPcIpLiUZpsp4U
M9jKg8Kag8Etc6BOXklQ0SeIs107LdphXTAibx42eBPUGiGhnNpkn/YPef7ghA1L
DGCHL4lUOn9r1W4psNb1LsoUo6CZovjQvI8AZRbNYFda6h28UUuh5mYoNdi8+Q7z
Uq/079vl/YO5DniW44pz
=Ep7k
-----END PGP SIGNATURE-----
Merge tag 'davinci-fixes-for-v4.17-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes
Second set of fixes for TI DaVinci.
They are needed for DM6467 EVM to work. The first patch fixes an
issue with timer interrupt and the second two are needed for video
driver to probe successfully.
* tag 'davinci-fixes-for-v4.17-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: board-dm646x-evm: set VPIF capture card name
ARM: davinci: board-dm646x-evm: pass correct I2C adapter id for VPIF
ARM: davinci: dm646x: fix timer interrupt generation
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
2. Use of standard GPIO controller bindings for few sysreg components
like LED, MMC Write Protect/Card Detect and Flash Write Protect
to fix some of the new DTC warnings
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJa+apxAAoJEABBurwxfuKYgUIP/j+e5K4bm7GBtXezKyMmdsdK
J4dcfk/9ti2LOVqNveRy5N8Z1aeNd+QtXh/DFhCIdov1sjvjqWMV8Vw0K1PsziSB
aSQoFyscx0OQ0JKtFJVQdjOnHvCNSXQXz/XZC89AARLMHHxPdckfF7okQFzO22Xo
hk+cm+ith3cifnUxIt+JAZLg2xzU5/2+TfquGGDnP5wzJTxyX6B06bTOdZUNMzu3
zhVUIRwh/FVwPpsaDlWCjz2m1jeUq8TR9DUvlCTxzQ0yfPcMQb3dIvdxF7sVjrjc
m6xFkdgJJUCyFQ+Xtwp6cVHUpQJLmM0G3eKuIH6KfFAy1Sbfdyy/2LyH8OFgSe8C
eHgedg8ibcdHwXcjNhCj4uAd3tUZwUSwmwBPAICRHBK4zY35u+WFkmtvyjt+c5Bb
EvRNBDsi9/8zZEpBoAExmHvi7sLCxWdcOYLkWUbosgsHByToIbn0t6T0LtlN5mkF
ygFZUxTbdeiwN0yxkJ0qLAXs1L+dROMtz1YN54981vJmW/7/5mkpRvg/W4Zi0Fdx
EQu3FGUVx+p63olCCaCaXN9AydGNLbWv0w5qh6zcJEeUMIZ61v/k3npwZ8RjfUcH
nVBDBxfLbZqfscGUdcFOk1ul8Z8t40LTSeWmc7hYvv3rjXzrmpRtTibaT2H2DgaN
HtM3dD5I/rEdCv7lTxsb
=X3Vc
-----END PGP SIGNATURE-----
Merge tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
ARMv7 Vexpress updates/cleanups for v4.18
1. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
2. Use of standard GPIO controller bindings for few sysreg components
like LED, MMC Write Protect/Card Detect and Flash Write Protect
to fix some of the new DTC warnings
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
* tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: replace '_' with '-' in node names
ARM: dts: vexpress: use standard gpio bindings for sys_{led,mci,flash}
ARM: dts: vexpress: Restructure motherboard includes
Signed-off-by: Olof Johansson <olof@lixom.net>
The touchscreen patch did not apply to this branch correctly and
inadvertently got placed onto I2C2 when it should be on I2C3. This fixes
the issue.
Fixes: 121685b146 ("ARM: dts: logicpd-som-lv: Enable Touchscreen
controller")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SOM used in the am3517-evm has a s35390a onboard. This
patch allows the s35390a to be used as the RTC.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
enable mmc3 used for wlan and uart1 used for bluetooth
configure the gpios used for wlan and bluetooth controls
add fixed voltage regulator used for wlan power control
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM3517-EVM by Logic PD has a Logic PD type 15 display LCD
attached to the baseboard, and the SOM itself has an integrated
touchscreen controller. This patch enables both the LCD and
the tsc2004 on the SOM.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The am3517-som is powered by vdd_core_reg, so let's add the
'cpu' device-tree node with the 'vdd_core' regulator as the core
supply.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit adds the common voltage regulators used on LogicPD's
AM3517 System-On-Modules.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The am3517-evm consists of an am3517 SOM-M2 and a baseboard.
As items are added that are unique to the baseboard, let's place
them in a file called am3517-som.dtsi. These items will be
common for all variants of the SOM.
Anything unique to the baseboard will be placed into
am3517-evm.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The boardboard supports card detect and write protect, so let's
enable those pins.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK. This way we will
not depend on the bootloader to configure the CFG_BOOT:HFCLK_FREQ
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK.
This way we will not depend on the bootloader to configure the
CFG_BOOT:HFCLK_FREQ
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Replace magic number with the proper IRQ_TYPE specifier to improve DT
readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
