Commit Graph

28241 Commits

Author SHA1 Message Date
Sascha Hauer
4f3b2a41e2 ARM: dts: i.MX53: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:31 +08:00
Sascha Hauer
6510ea25d1 ARM: dts: i.MX51: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:30 +08:00
Sascha Hauer
684f6a2320 ARM: dts: i.MX25: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:29 +08:00
Sascha Hauer
9c5d5909fc ARM: dts: i.MX31: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:28 +08:00
Sascha Hauer
a82848e0bf ARM: dts: i.MX27: Add iim node
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:27 +08:00
Sascha Hauer
97b108f9a4 ARM: dts: i.MX6qdl: Add i.MX31 compatible to gpt node
The i.MX6 gpt is handled by the i.MX31 gpt driver in the kernel,
so add a corresponding compatible entry.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:26 +08:00
Sascha Hauer
0f225212cc ARM: dts: i.MX6qdl: Add compatible and clock to flexcan nodes
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:25 +08:00
Sascha Hauer
f0741ce730 ARM: dts: i.MX6: sync imx6q and imx6dl pinmux entries
The i.MX6Q and i.MX6DL are pin compatible, so the pinmux entries
should be in sync. This patch systematically adds the pinmux entries
missing from the imx6q to the imx6dl file.
Some name inconsistencies and whitespace damage is fixed along the
way.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:24 +08:00
Alexander Shiyan
6c04ad2297 ARM: dts: imx27: Add kpp devicetree node
This patch adds the missing (Keypad Port) KPP devicetree node
for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:22 +08:00
Alexander Shiyan
999f681897 ARM: dts: imx27-phytec-phycore-som: Define minimal memory layout
Define minimal memory layout for i.MX27 PCM-038 module.
This will help to use appended DTB with non-DT capable bootloaders.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:21 +08:00
Alexander Shiyan
ff1450f65d ARM: dts: imx27: Sort entries by address
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:20 +08:00
Alexander Shiyan
a392d044bd ARM: dts: imx27: Rename PWM devicetree node
i.MX27 have only one PWM, so index from PWM devicetree node removed.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:19 +08:00
Alexander Shiyan
6e228e8019 ARM: dts: imx27: Add AUDMUX devicetree node
This patch adds the missing (Digital Audio MUX) AUDMUX devicetree
node for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:18 +08:00
Alexander Shiyan
e4b6a05625 ARM: dts: imx27: Add SAHARA2 devicetree node
This patch adds the missing (Symmetric/Asymmetric Hashing and Random
Accelerator) SAHARA2 devicetree node for i.MX27 CPUs.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:17 +08:00
Philippe Reynes
a47b3bfcac ARM: apf27dev: add rtc ds1374 to the device tree
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:28:16 +08:00
Huang Shijie
9110ede4e0 ARM: dts: imx6qdl-sabresd: enable the SPI NOR
enable the spi nor for imx6q{dl}-sabresd boards.

Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-08-22 23:28:15 +08:00
Huang Shijie
b038a9b886 ARM: dts: imx6q: add a new pinctrl for ecspi1
This new pinctrl is used by the imx6q-sabresd board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-08-22 23:28:14 +08:00
Huang Shijie
4702ca5175 ARM: dts: imx6dl: add a new pinctrl for ecspi1
This new pinctrl is used in the imx6dl-sabresd board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-08-22 23:28:13 +08:00
Dinh Nguyen
dc76a1adfa phy: micrel: Add definitions for common Micrel PHY registers
Add defines for common Micrel PHY setups so that other platforms
can use them. Update imx61 and sama5 hardware to use the micrel_phy.h
PHY defines.

Also add support for the KSZ9021RLRN PHY.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: netdev@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:54 +08:00
Fabio Estevam
7e463b7c1b ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option
Commit 02502da45 (ASoC: imx-mc13783: Depend on ARCH_ARM) caused the selection of
CONFIG_SND_SOC_IMX_MC13783 to be impossible due to a wrong dependency, which
caused CONFIG_SND_SOC_IMX_MC13783 to be removed after the defconfigs cleanups.

The original selection problem has been fixed by 9f19de649f (ASoC: imx-mc13783:
Make SND_SOC_IMX_MC13783 visible again), so it is possible to select
CONFIG_SND_SOC_IMX_MC13783 again as originally done.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:53 +08:00
Peter Chen
ddcb9aa65a ARM: imx: Move anatop related from board file to anatop driver
Move anatop related (For USB) from board file to anatop driver

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:51 +08:00
Fabio Estevam
692c89add5 ARM: imx_v6_v7_defconfig: Enable wireless support
Wandboard has a Broadcom 4329 chipset connected to SDHC, so turn on the wireless
related options.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:50 +08:00
Fabio Estevam
47c484d059 ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig
Generate imx_v4_v5_defconfig by doing:

make imx_v4_v5_defconfig
make savedefconfig
cp defconfig arch/arm/configs/imx_v4_v5_defconfig

No functional change. The goal here is to cleanup imx_v4_v5_defconfig file to
make easier and cleaner the addition of new entries.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:49 +08:00
Fabio Estevam
bc3059e083 ARM: imx_v6_v7_defconfig: Add SATA support
Let SATA support be built by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:47 +08:00
Fabio Estevam
077cfef91b ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig
Generate imx_v6_v7_defconfig by doing:

make savedefconfig

cp defconfig arch/arm/configs/imx_v6_v7_defconfig

No functional change. The goal here is to cleanup imx_v6_v7_defconfig file to
make easier and cleaner the addition of new entries.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:46 +08:00
Fabio Estevam
547dd1e089 ARM: mx53: Allow suspend/resume
Current imx53_pm_init() implementation is incomplete as it lacks calling
suspend_set_ops().

Use a single imx5_pm_init() function to handle both mx51 and mx53.

This allows mx53 to enter in low-power mode.

Tested on a mx53qsb:

root@freescale /$ echo mem > /sys/power/state
PM: Syncing filesystems ... done.
mmc0: card e624 removed
Freezing user space processes ... (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
Suspending console(s) (use no_console_suspend to debug)

... (Press Power button)

PM: suspend of devices complete after 17.067 msecs
PM: suspend devices took 0.020 seconds
PM: late suspend of devices complete after 0.954 msecs
PM: noirq suspend of devices complete after 1.288 msecs
Disabling non-boot CPUs ...
PM: noirq resume of devices complete after 0.680 msecs
PM: early resume of devices complete after 0.914 msecs
PM: resume of devices complete after 44.955 msecs
PM: resume devices took 0.050 seconds
Restarting tasks ... done.
mmc0: host does not support reading read-only switch. assuming write-enable.
mmc0: new SDHC card at address e624
mmcblk0: mmc0:e624 SU04G 3.69 GiB
 mmcblk0: p1 p2 p3
libphy: 63fec000.etherne:00 - Link is Down
libphy: 63fec000.etherne:00 - Link is Up - 100/Full
root@freescale /$

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:45 +08:00
Fabio Estevam
f36b594f37 ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level
Instead of selecting ARM_CPU_SUSPEND only for mx6, we can select it for
all SoCs from the ARCH_MXC family.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:43 +08:00
Fabio Estevam
df33e91c32 ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX
egalax touchscren controller is present on mx6 sabresd/sabrelite, so let's
enable it by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:42 +08:00
Shawn Guo
97245139a0 ARM: imx6q: add vdoa gate clock
Add the missing vdoa gate clock for imx6q.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:41 +08:00
Shawn Guo
6cd622357d ARM: imx6q: add the missing cko output selection
The clock output on imx6q CCM_CLKO1 pad is not always cko1 clock, and
there is a multiplexer to select between cko1 and cko2.  Add this
missing selection as the clock cko.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:39 +08:00
Shawn Guo
6526bb3cc5 ARM: imx6q: add cko2 clocks
It adds the missing cko2 clocks, including multiplexer, divider and
gate.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:38 +08:00
Shawn Guo
1fa5007b3a ARM: imx6q: add spdif gate clock
It adds the missing spdif gate clock into imx6q clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22 23:20:37 +08:00
Peter Chen
0a03638852 ARM: imx: clk-pllv3: improve the timeout waiting method
There are two improvements for this commit:

- Add comparing pll lock condition after while loop. It can
fix potential fake timeout problem caused by the code is just
scheduled out before compare the timeout, and the time of
scheduling out are more than one jiffies.

- Move timeout assignment more close to compare the timeout.
It can reduce the possibility the code is scheduled out, and
the timeout can be more precise.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:25 +08:00
Liu Ying
dfd871442e ARM: imx6: change some clocks to fixup clocks
All the clocks controlled by the register 'CCM Serial Clock
Multiplexer Register 1' should be fixup clocks. This patch
changes those clocks from basic multiplexer or divider clocks
to fixup clocks.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:25 +08:00
Liu Ying
a49e6c4b82 ARM: imx: add common clock support for fixup mux
One register may have several fields to control some clocks. It
is possible that the read/write values of some fields may map to
different real functional values, so writing to the other fields
in the same register may break a working clock tree. A real case
is the aclk_podf field in the register 'CCM Serial Clock Multiplexer
Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook
for multiplexer clock which is called before writing a value to
clock registers to support this kind of multiplexer clocks.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:24 +08:00
Liu Ying
cbe7fc8aae ARM: imx: add common clock support for fixup div
One register may have several fields to control some clocks. It
is possible that the read/write values of some fields may map to
different real functional values, so writing to the other fields
in the same register may break a working clock tree. A real case
is the aclk_podf field in the register 'CCM Serial Clock Multiplexer
Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook
for divider clock which is called before writing a value to clock
registers to support this kind of divider clocks.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:24 +08:00
Fabio Estevam
f025569322 ARM: imx: Select MIGHT_HAVE_CACHE_L2X0
Select MIGHT_HAVE_CACHE_L2X0 for armv6 and armv7 i.MX SoCs.

By selecting MIGHT_HAVE_CACHE_L2X0, the user still has the possibility to
disable CACHE_L2X0 selection via menuconfig.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:24 +08:00
Vincent Stehlé
10eff77074 ARM: imx: fix imx_init_l2cache storage class
This fixes the following compilation error:

  arch/arm/mach-imx/system.c:101:123: error: static declaration of ‘imx_init_l2cache’ follows non-static declaration
  In file included from arch/arm/mach-imx/system.c:32:0:
  arch/arm/mach-imx/common.h:165:13: note: previous declaration of ‘imx_init_l2cache’ was here
  arch/arm/mach-imx/system.c:101:123: warning: ‘imx_init_l2cache’ defined but not used [-Wunused-function]

Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:23 +08:00
Huang Shijie
3da66bfb74 ARM: imx_v6_v7_defconfig: enable WEIM driver
enable the weim driver.
Since the NOR is connected to the WEIM for imx6q{dl}-sabreauto,
we also enable the MTD_PHYSMAP_OF module.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:23 +08:00
Shawn Guo
73dada7fe7 ARM: imx: use imx specific L2 init function on imx6sl
The optimized L2 prefect and power setting done in imx_init_l2cache()
can also benefit imx6sl, so let's call the function on imx6sl as well.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2013-08-16 13:11:23 +08:00
Shawn Guo
e6a0756961 ARM: imx: let L2 initialization be a common function
Move imx6q L2 initialization function imx6q_init_l2cache() into
system.c, and rename it imx_init_l2cache(), so that other platforms
other than imx6q can also use the function.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2013-08-16 13:11:22 +08:00
Fabio Estevam
8bba8303b0 ARM: imx_v4_v5_defconfig: Select CONFIG_MACH_IMX25_DT
Allow booting a mx25 dt kernel by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:22 +08:00
Fabio Estevam
c61665982d ARM: imx_v6_v7_defconfig: Enable VPU driver
Let VPU driver be selected by default.

VPU driver requires a SRAM pool, so select CONFIG_SRAM as well.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:22 +08:00
Philipp Zabel
a6fc9d194d ARM i.MX6DL: parent LDB DI clocks to PLL5 on i.MX6S/DL
i.MX6S/DL have the Video PLL post dividers fixed already in revision 1.0

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:21 +08:00
Fabio Estevam
9fe595be2c ARM: imx_v6_v7_defconfig: Enable LVDS Display Bridge
Let IMX_LDB driver be built by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:21 +08:00
Fabio Estevam
b59aae39cc ARM: imx_v6_v7_defconfig: Enable FSL_LPUART support
Enable the FSL_LPUART driver as it is used by the VF610 family.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:21 +08:00
Philipp Zabel
6d6fc5012a ARM i.MX6Q: Use ENET_CLK_SEL defines in imx6q_1588_init
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:21 +08:00
Fabio Estevam
17c4b89df5 ARM: imx_v6_v7_defconfig: Select CONFIG_NOP_USB_XCEIV by default
In order to get USB functionality on mx5 boards, we need to select
CONFIG_NOP_USB_XCEIV option, so let's enable it by default.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:20 +08:00
Sascha Hauer
dbf6719a4a ARM: i.MX6: add ethernet phy fixup for KSZ9031
The KSZ9031 is used on the i.MX6 based Data Modul eDM-QMX6
board. It needs the same fixup to the rx/tx delays as other
i.MX6 boards.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:20 +08:00
Sascha Hauer
12da484485 ARM: i.MX6: add ethernet phy fixup for AR8031
The AR8031 is used on the i.MX6 based sabreSD, sabreauto and wandboard.
All need the same fixup, so add it for all i.MX6.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-16 13:11:19 +08:00