This adds the stdout-path property to various i.MX boards. Values
of the property have been taken from barebox, so they should be
correct. Also, the older linux,stdout-path property is converted
to stdout-path.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The GW52xx supports LVDS on channel 0. Remove the obsolete crtcs node and
add display timings for the HanStar HSD100PXN1 display.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The GW54xx/GW53xx/GW52xx all support LVDS with a PWM controlled backlight.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This isn't compatible with the new binding and should be
handled via a proper regulator. It shouldn't be needed as
the driver has always ignored this property.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The new bindings drops one clock, renames the others and
drops the old interrupt mapping.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds a GPIO fixed regulator which used on RDK to
enable CSI bus.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes excess "#address-cells" and "#size-cells" entries
for PMIC, since these entries is not used.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
USB PWR and OC pins are used as GPIOs for different purposes,
so add "disable-over-current" property for OTG node to indicate this.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
"compatible", "#address-cells" and "#size-cells" for USB PHY are
already described in the SOM DTS. Remove these duplicate entries.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add support for the PCI express bus available on MX6 SabreSDP.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
It is not a good approach to have the USB PHY nodes inside imx27.dtsi since
the USB PHYs on mx27 are not internal to the SoC.
Place the USB PHY nodes in the board dts files instead.
Also, each board may have a different clock source for the USB PHY, so do not
hardcode it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
USB Host1, Host2 and OTG are gated via 'usb_ipg_gate' clock, so fix it in order
to avoid the following kernel oops:
usbcore: registered new interface driver usb-storage
10024000.usb supply vbus not found, using dummy regulator
Unhandled fault: external abort on non-linefetch (0x808) at 0xf4424184
Internal error: : 808 [#1] PREEMPT ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 3.15.0-rc1-26325-g971f9fd-dirty #64
task: c7829aa0 ti: c7836000 task.ti: c7836000
PC is at ci_hdrc_probe+0x3a4/0x634
LR is at ci_hdrc_probe+0x100/0x634
pc : [<c036cc78>] lr : [<c036c9d4>] psr: 60000013
sp : c7837d48 ip : 00000001 fp : 00000000
r10: 00000000 r9 : 00000000 r8 : c791b6c0
r7 : c7945000 r6 : f4424000 r5 : c7945010 r4 : c794e010
r3 : f4424184 r2 : 00000000 r1 : 8c000004 r0 : 0c000004
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 0005317f Table: a0004000 DAC: 00000017
Process swapper (pid: 1, stack limit = 0xc78361c0)
Stack: (0xc7837d48 to 0xc7838000)
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The hardware is better described if we place the PMIC IRQ GPIO into its own
pingroup.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
imx27-pdk has a MC13783 PMIC connected to CSPI2 port.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree node and pinctrl group for I2C1.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch sorts nodes by name and moves "iomux" configuration at
the bottom of file.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds a regulator node and pinctrl group for USB OTG.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Move "hog" pins into corresponded pin groups for eSDHC1, eSDHC2,
eCSPI1, gpio-keys, regulator-fixed and codec clock.
Additionally, this patch fixes GPIO active level definition for
USB regulator.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch allow to define partitions onto NFC in user defined
devicetrees.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch enables UART1 on the phyFLEX connector (i.MX6 uart3).
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The pins labeled UART1 on the module connector are wired to i.MX6 uart3.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds the TLV320, STMPE811, RTC8564, and MX1037 ICs to the I2C2 bus.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Note that the fec driver code currently hard-codes an active-low
reset, regardless of the flags in the device tree.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch enables the red and green GPIO LEDs on Phytec phyFLEX i.MX6 modules.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The PBA-B-01 carrier board can be equipped with either Quad or DualLite/Solo
phyFLEX i.MX6 modules (PFL-A-02).
This moves all common devices into imx6qdl-phytec-pbab01.dtsi. The SoC specific
device trees then just include the pfla01 and pbab01 dtsi files corresponding
to the SoC variant.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Provide an entry for the UART1 pin muxing.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds support for Digi ConnectCore® i.MX51/Wi-i.MX51 SOM
and basic support for the ConnectCore for i.MX51 JumpStart Kit.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch converts all i.MX WEIM users to use single naming style
for devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
