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45e606f272
2416 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Joerg Roedel
|
45e606f272 | Merge branches 'arm/renesas', 'arm/smmu', 'x86/amd', 'x86/vt-d' and 'core' into next | ||
Yong Wu
|
fc3734698a |
dt-bindings: mediatek: Add binding for mt8192 IOMMU
This patch adds decriptions for mt8192 IOMMU and SMI.
mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
table format. The M4U-SMI HW diagram is as below:
EMI
|
M4U
|
------------
SMI Common
------------
|
+-------+------+------+----------------------+-------+
| | | | ...... | |
| | | | | |
larb0 larb1 larb2 larb4 ...... larb19 larb20
disp0 disp1 mdp vdec IPE IPE
All the connections are HW fixed, SW can NOT adjust it.
mt8192 M4U support 0~16GB iova range. we preassign different engines
into different iova ranges:
domain-id module iova-range larbs
0 disp 0 ~ 4G larb0/1
1 vcodec 4G ~ 8G larb4/5/7
2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
The iova range for CCU0/1(camera control unit) is HW requirement.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Link: https://lore.kernel.org/r/20210111111914.22211-6-yong.wu@mediatek.com
Signed-off-by: Will Deacon <will@kernel.org>
|
||
|
Yong Wu
|
ddd3e349b8 |
dt-bindings: memory: mediatek: Rename header guard for SMI header file
Only rename the header guard for all the SoC larb port header file. No funtional change. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Link: https://lore.kernel.org/r/20210111111914.22211-5-yong.wu@mediatek.com Signed-off-by: Will Deacon <will@kernel.org> |
||
|
Yong Wu
|
ca49a4b4c9 |
dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32
Extend the max larb number definition as mt8192 has larb_nr over 16. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Link: https://lore.kernel.org/r/20210111111914.22211-4-yong.wu@mediatek.com Signed-off-by: Will Deacon <will@kernel.org> |
||
|
Yong Wu
|
5cf482f2f7 |
dt-bindings: memory: mediatek: Add a common memory header file
Put all the macros about smi larb/port togethers. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Link: https://lore.kernel.org/r/20210111111914.22211-3-yong.wu@mediatek.com Signed-off-by: Will Deacon <will@kernel.org> |
||
Srinivas Kandagatla
|
09a4f6f5d2
|
ASoC: dt-bindings: lpass: Fix and common up lpass dai ids
Existing header file design of having separate SoC specific header files
for the common lpass driver has mutiple issues.
This design is prone to break as an when new SoC header is added
as the common DAI ids of other SoCs will be overwritten by the
new ones.
One of them surfaced by recent patch that adds support to sc7180, this
one totally broke LPASS drivers on other Qualcomm SoCs.
Before this gets worst, fix this by having a common header qcom,lpass.h.
This should fix the issue and any new DAI ids should be added to the
common header. This will be more sustainable then the existing design!
Fixes:
|
||
Linus Torvalds
|
8653b778e4 |
The core framework got some nice improvements this time around. We gained the
ability to get struct clk pointers from a struct clk_hw so that clk providers can consume the clks they provide, if they need to do something like that. This has been a long missing part of the clk provider API that will help us move away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are added for the clk_set_rate() "range" functions, similar to the tracepoints we already have for clk_set_rate() and we added a column to debugfs to help developers understand the hardware enable state of clks in case firmware or bootloader state is different than what is expected. Overall the core changes are mostly improving the clk driver writing experience. At the driver level, we have the usual collection of driver updates and new drivers for new SoCs. This time around the Qualcomm folks introduced a good handful of clk drivers for various parts of three or four SoCs. The SiFive folks added a new clk driver for their FU740 SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that for various new features. One last thing to note in the driver area is that the i.MX driver has gained a new binding to support SCU clks after being on the list for many months. It uses a two cell binding which is sort of rare in clk DT bindings. Beyond that we have the usual set of driver fixes and tweaks that come from more testing and finding out that some configuration was wrong or that a driver could support being built as a module. Core: - Add some trace points for clk_set_rate() "range" functions - Add hardware enable information to clk_summary debugfs - Replace clk-provider.h with of_clk.h when possible - Add devm variant of clk_notifier_register() - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw New Drivers: - Bindings for Canaan K210 SoC clks - Support for SiFive FU740 PRCI - Camera clks on Qualcomm SC7180 SoCs - GCC and RPMh clks on Qualcomm SDX55 SoCs - RPMh clks on Qualcomm SM8350 SoCs - LPASS clks on Qualcomm SM8250 SoCs Updates: - DVFS support for AT91 clk driver - Update git repo branch for Renesas clock drivers - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E - Stop using __raw_*() I/O accessors in Renesas clk drivers - One more conversion of DT bindings to json-schema - Make i.MX clk-gate2 driver more flexible - New two cell binding for i.MX SCU clks - Drop of_match_ptr() in i.MX8 clk drivers - Add arch dependencies for Rockchip clk drivers - Fix i2s on Rockchip rk3066 - Add MIPI DSI clks on Amlogic axg and g12 SoCs - Support modular builds of Amlogic clk drivers - Fix an Amlogic Video PLL clock dependency - Samsung Kconfig dependencies updates for better compile test coverage - Refactoring of the Samsung PLL clocks driver - Small Tegra driver cleanups - Minor fixes to Ingenic and VC5 clk drivers - Cleanup patches to remove unused variables and plug memory leaks -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl/f/ycRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXjxg/7BJMFphpZmQb3iy/lZMYfgPh2yxZvrrBj zJ2i1mMru/C3BkXTx29HCJvj6/VC2HgGLL6fzfwe7oY3XVRT1Vxlsvka9vNZSNc2 UYNa8GUwR0mSXDzp5KnzoAQfLwvSqWUIeT8WB+Z+CJ7WIAGWnXgBlqsf/d/mr9hg JoAh+ROpbksL6hs61WJSm+7/Yu6efS0Yj0zzLZOINFWvDIOJ+Rp4g1u+qGH9tZyO I2Bik75Sc8hqvLUP5SVzI/1H4yLB0On+ADgVRwjvrKPVX56alYquOUMsU+sy4SeY ONQBki3vV5gtJHG1qvkwTC5/Yw20eUsrmrc7PNECvb1zo5Tp4QuOAR5nHCb4fg8u n7RRd1MktTAUAQxTzBaNYtix3Q19fjSR44C/1B6lKk6xkN+w4uYLi2GHrADy9rXa SwQVTKTGc8LjGywDaAOXdAyx2FMAtt1OvkTxZ238+aoHw5nQDHWKxu5TwYK6b5jG aEFzTCIEYlzRLqcZyGONSD0WXmQWyoNiPwJ3B7RDRfpg7dPESyKIB4MzGWiX9eDy lri/SoVH08c1sRf8AzIoi+CUNi8geTNAHHlJfiGznrv81ttVf3FioWyWLjr+SmBV rNxn35WxeDWoCZqtrLJlg5skVgmD8BRXLZTI9udPG8u6D7OdWdJBuMZ6EelO+OZg /n4w8tdo3cE= =Wt9O -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The core framework got some nice improvements this time around. We gained the ability to get struct clk pointers from a struct clk_hw so that clk providers can consume the clks they provide, if they need to do something like that. This has been a long missing part of the clk provider API that will help us move away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are added for the clk_set_rate() "range" functions, similar to the tracepoints we already have for clk_set_rate() and we added a column to debugfs to help developers understand the hardware enable state of clks in case firmware or bootloader state is different than what is expected. Overall the core changes are mostly improving the clk driver writing experience. At the driver level, we have the usual collection of driver updates and new drivers for new SoCs. This time around the Qualcomm folks introduced a good handful of clk drivers for various parts of three or four SoCs. The SiFive folks added a new clk driver for their FU740 SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that for various new features. One last thing to note in the driver area is that the i.MX driver has gained a new binding to support SCU clks after being on the list for many months. It uses a two cell binding which is sort of rare in clk DT bindings. Beyond that we have the usual set of driver fixes and tweaks that come from more testing and finding out that some configuration was wrong or that a driver could support being built as a module. Summary: Core: - Add some trace points for clk_set_rate() "range" functions - Add hardware enable information to clk_summary debugfs - Replace clk-provider.h with of_clk.h when possible - Add devm variant of clk_notifier_register() - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw New Drivers: - Bindings for Canaan K210 SoC clks - Support for SiFive FU740 PRCI - Camera clks on Qualcomm SC7180 SoCs - GCC and RPMh clks on Qualcomm SDX55 SoCs - RPMh clks on Qualcomm SM8350 SoCs - LPASS clks on Qualcomm SM8250 SoCs Updates: - DVFS support for AT91 clk driver - Update git repo branch for Renesas clock drivers - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E - Stop using __raw_*() I/O accessors in Renesas clk drivers - One more conversion of DT bindings to json-schema - Make i.MX clk-gate2 driver more flexible - New two cell binding for i.MX SCU clks - Drop of_match_ptr() in i.MX8 clk drivers - Add arch dependencies for Rockchip clk drivers - Fix i2s on Rockchip rk3066 - Add MIPI DSI clks on Amlogic axg and g12 SoCs - Support modular builds of Amlogic clk drivers - Fix an Amlogic Video PLL clock dependency - Samsung Kconfig dependencies updates for better compile test coverage - Refactoring of the Samsung PLL clocks driver - Small Tegra driver cleanups - Minor fixes to Ingenic and VC5 clk drivers - Cleanup patches to remove unused variables and plug memory leaks" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits) dt-binding: clock: Document canaan,k210-clk bindings dt-bindings: Add Canaan vendor prefix clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" clk: ingenic: Fix divider calculation with div tables clk: sunxi-ng: Make sure divider tables have sentinel clk: s2mps11: Fix a resource leak in error handling paths in the probe function clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 clk: si5351: Wait for bit clear after PLL reset clk: at91: sam9x60: remove atmel,osc-bypass support clk: at91: sama7g5: register cpu clock clk: at91: clk-master: re-factor master clock clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz clk: at91: sama7g5: decrease lower limit for MCK0 rate clk: at91: sama7g5: remove mck0 from parent list of other clocks clk: at91: clk-sam9x60-pll: allow runtime changes for pll clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics clk: at91: clk-master: add 5th divisor for mck master clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT dt-bindings: clock: at91: add sama7g5 pll defines clk: at91: sama7g5: fix compilation error ... |
||
Stephen Boyd
|
abe7e32f1d |
Merge branches 'clk-ingenic', 'clk-vc5', 'clk-cleanup', 'clk-canaan' and 'clk-marvell' into clk-next
- Bindings for Canaan K210 SoC clks * clk-ingenic: clk: ingenic: Fix divider calculation with div tables * clk-vc5: clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" * clk-cleanup: clk: sunxi-ng: Make sure divider tables have sentinel clk: s2mps11: Fix a resource leak in error handling paths in the probe function clk: bcm: dvp: Add MODULE_DEVICE_TABLE() clk: bcm: dvp: drop a variable that is assigned to only * clk-canaan: dt-binding: clock: Document canaan,k210-clk bindings dt-bindings: Add Canaan vendor prefix * clk-marvell: clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 |
||
|
Stephen Boyd
|
b53a1603b4 |
Merge branches 'clk-ti', 'clk-analog', 'clk-trace', 'clk-at91' and 'clk-silabs' into clk-next
- Add some trace points for clk_set_rate() "range" functions - DVFS support for AT91 clk driver * clk-ti: clk: ti: omap5: Fix reboot DPLL lock failure when using ABE TIMERs clk: ti: Fix memleak in ti_fapll_synth_setup * clk-analog: clk: axi-clkgen: move the OF table at the bottom of the file clk: axi-clkgen: wrap limits in a struct and keep copy on the state object dt-bindings: clock: adi,axi-clkgen: convert old binding to yaml format * clk-trace: clk: Trace clk_set_rate() "range" functions * clk-at91: clk: at91: sam9x60: remove atmel,osc-bypass support clk: at91: sama7g5: register cpu clock clk: at91: clk-master: re-factor master clock clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz clk: at91: sama7g5: decrease lower limit for MCK0 rate clk: at91: sama7g5: remove mck0 from parent list of other clocks clk: at91: clk-sam9x60-pll: allow runtime changes for pll clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics clk: at91: clk-master: add 5th divisor for mck master clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT dt-bindings: clock: at91: add sama7g5 pll defines clk: at91: sama7g5: fix compilation error * clk-silabs: clk: si5351: Wait for bit clear after PLL reset |
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|
Stephen Boyd
|
699eda2814 |
Merge branches 'clk-tegra', 'clk-imx', 'clk-sifive', 'clk-mediatek' and 'clk-summary' into clk-next
- Support for SiFive FU740 PRCI - Add hardware enable information to clk_summary debugfs * clk-tegra: clk: tegra: Fix duplicated SE clock entry clk: tegra: bpmp: Clamp clock rates on requests clk: tegra: Do not return 0 on failure * clk-imx: (24 commits) clk: imx: scu: remove the calling of device_is_bound clk: imx: scu: Make pd_np with static keyword clk: imx8mq: drop of_match_ptr from of_device_id table clk: imx8mp: drop of_match_ptr from of_device_id table clk: imx8mn: drop of_match_ptr from of_device_id table clk: imx8mm: drop of_match_ptr from of_device_id table clk: imx: gate2: Remove unused variable ret clk: imx: gate2: Add locking in is_enabled op clk: imx: gate2: Add cgr_mask for more flexible number of control bits clk: imx: gate2: Check if clock is enabled against cgr_val clk: imx: gate2: Keep the register writing in on place clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case clk: imx: scu: fix build break when compiled as modules clk: imx: remove redundant assignment to pointer np clk: imx: remove unneeded semicolon clk: imx: lpcg: add suspend/resume support clk: imx: clk-imx8qxp-lpcg: add runtime pm support clk: imx: lpcg: allow lpcg clk to take device pointer clk: imx: imx8qxp-lpcg: add parsing clocks from device tree clk: imx: scu: add suspend/resume support ... * clk-sifive: clk: sifive: Add clock enable and disable ops clk: sifive: Fix the wrong bit field shift clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Use common name for prci configuration clk: sifive: Extract prci core to common base dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI * clk-mediatek: clk: mediatek: Make mtk_clk_register_mux() a static function * clk-summary: clk: Add hardware-enable column to clk summary |
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|
Stephen Boyd
|
d240d4c205 |
Merge branches 'clk-amlogic', 'clk-rockchip', 'clk-of', 'clk-freescale' and 'clk-unused' into clk-next
- Replace clk-provider.h with of_clk.h when possible * clk-amlogic: clk: meson: g12a: add MIPI DSI Host Pixel Clock dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings clk: meson: enable building as modules clk: meson: Kconfig: fix dependency for G12A clk: meson: axg: add MIPI DSI Host clock clk: meson: axg: add Video Clocks dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding dt-bindings: clk: axg-clkc: add Video Clocks * clk-rockchip: clk: rockchip: fix i2s gate bits on rk3066 and rk3188 clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks clk: rockchip: Remove redundant null check before clk_prepare_enable clk: rockchip: Add appropriate arch dependencies * clk-of: xtensa: Replace <linux/clk-provider.h> by <linux/of_clk.h> sh: boards: Replace <linux/clk-provider.h> by <linux/of_clk.h> * clk-freescale: clk: fsl-flexspi: new driver dt-bindings: clock: document the fsl-flexspi-clk device clk: divider: add devm_clk_hw_register_divider_table() clk: qoriq: provide constants for the type clk: fsl-sai: use devm_clk_hw_register_composite_pdata() clk: composite: add devm_clk_hw_register_composite_pdata() clk: fsl-sai: fix memory leak clk: qoriq: Add platform dependencies * clk-unused: clk: scpi: mark scpi_clk_match as maybe unused clk: pwm: drop of_match_ptr from of_device_id table |
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Damien Le Moal
|
0c797d2c7e |
dt-binding: clock: Document canaan,k210-clk bindings
Document the device tree bindings of the Canaan Kendryte K210 SoC clock driver in Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml. The header file include/dt-bindings/clock/k210-clk.h is modified to include the complete list of IDs for all clocks of the SoC. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201220085725.19545-3-damien.lemoal@wdc.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Claudiu Beznea
|
91f3bf0d53 |
clk: at91: sama7g5: register cpu clock
Register CPU clock as being the master clock prescaler. This would be used by DVFS. The block schema of SAMA7G5's PMC contains also a divider between master clock prescaler and CPU (PMC_CPU_RATIO.RATIO) but the frequencies supported by SAMA7G5 could be directly received from CPUPLL + master clock prescaler and the extra divider would do no work in case it would be enabled. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1605800597-16720-12-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Eugen Hristev
|
3d86ee17d4 |
dt-bindings: clock: at91: add sama7g5 pll defines
Add SAMA7G5 specific PLL defines to be referenced in a phandle as a PMC_TYPE_CORE clock. Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> [claudiu.beznea@microchip.com: adapt comit message, adapt sama7g5.c] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1605800597-16720-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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|
Linus Torvalds
|
a409ed156a |
This is the bulk of the GPIO changes for the v5.11 kernel cycle:
Core changes:
- Retired the old set-up function for GPIO IRQ chips. All chips
now use the template struct gpio_irq_chip and pass that to the core
to be set up alongside the gpio_chip. We can finally get rid of
the old cruft.
- Some refactoring and clean up of the core code.
- Support edge event timestamps to be stamped using REALTIME
(wall clock) timestamps. We have found solid use cases for
this, so we support it.
New drivers:
- MStar MSC313 GPIO driver.
- HiSilicon GPIO driver.
Driver improvements:
- The PCA953x driver now also supports the NXP PCAL9554B/C chips.
- The mockup driver can now be probed from the device tree which
is pretty useful for virtual prototyping of devices.
- The Rcar driver now supports .get_multiple()
- The MXC driver dropped some legacy and became a pure device
tree client.
- The Exar driver was moved over to the IDA interface for
enumerating, and also switched over to using regmap for
register access.
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Merge tag 'gpio-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of the GPIO changes for the v5.11 kernel cycle:
Core changes:
- Retired the old set-up function for GPIO IRQ chips. All chips now
use the template struct gpio_irq_chip and pass that to the core to
be set up alongside the gpio_chip. We can finally get rid of the
old cruft.
- Some refactoring and clean up of the core code.
- Support edge event timestamps to be stamped using REALTIME (wall
clock) timestamps. We have found solid use cases for this, so we
support it.
New drivers:
- MStar MSC313 GPIO driver.
- HiSilicon GPIO driver.
Driver improvements:
- The PCA953x driver now also supports the NXP PCAL9554B/C chips.
- The mockup driver can now be probed from the device tree which is
pretty useful for virtual prototyping of devices.
- The Rcar driver now supports .get_multiple()
- The MXC driver dropped some legacy and became a pure device tree
client.
- The Exar driver was moved over to the IDA interface for
enumerating, and also switched over to using regmap for register
access"
* tag 'gpio-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (87 commits)
MAINTAINERS: Remove reference to non-existing file
gpio: hisi: Do not require ACPI for COMPILE_TEST
MAINTAINERS: Add maintainer for HiSilicon GPIO driver
gpio: gpio-hisi: Add HiSilicon GPIO support
gpio: cs5535: Simplify the return expression of cs5535_gpio_probe()
gpiolib: irq hooks: fix recursion in gpiochip_irq_unmask
dt-bindings: mt7621-gpio: convert bindings to YAML format
gpiolib: cdev: Flag invalid GPIOs as used
gpio: put virtual gpio device into their own submenu
drivers: gpio: amd8111: use SPDX-License-Identifier
drivers: gpio: amd8111: prefer dev_err()/dev_info() over raw printk
drivers: gpio: bt8xx: prefer dev_err()/dev_warn() over of raw printk
gpio: Add TODO item for debugfs interface
gpio: just plain warning when nonexisting gpio requested
tools: gpio: add option to report wall-clock time to gpio-event-mon
tools: gpio: add support for reporting realtime event clock to lsgpio
gpiolib: cdev: allow edge event timestamps to be configured as REALTIME
gpio: msc313: MStar MSC313 GPIO driver
dt-bindings: gpio: Binding for MStar MSC313 GPIO controller
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
...
|
||
|
Linus Torvalds
|
6daa90439e |
dmaengine updates for v5.11-rc1
New drivers/devices - Qualcomm ADM driver - Qualcomm GPI driver - Allwinner A100 DMA support - Microchip Sama7g5 support - Mediatek MT8516 apdma - Updates: - more updates to idxd driver and support for IAX config - runtime PM support for dw driver - TI keystone drivers for 5.11 included here due to dependency for TI drivers -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl/bkxEACgkQfBQHDyUj g0dxNA//WzpVy9QJnj6OgXIjM+9sBjqls0iPVfy1JeeMmVW8cgCwLyBNZcssKRye mJ9+VnTx4JQBj4KD2cFBdpr46GvBFbSbcWNSCdm179NtHI4G6tjtynOcWaI9Clu2 0KHoa/EHIj8/jD3Hsbm+WZ1zCoY4VKBXsEq6x1Sj2tpp0/ocDhH4XLAsWTHE9OAD sc+0OtHr1wU4EdV6TKNTT0jXsdtzxOPPsvRsoaKncnR+Mkrgv0FvMBfBLhOb3a+m wUHEkwrEP1pT4Xcew6ZkYs4RYwJI3pllu2gUTs5qtidc723ol/C4kJ27q55N4azb j5buA8AhEwqIDH8qNuV07qaIu2VTdTdbYid3xgAeFygwM1npecZvOf8k6rTjxR/6 XN8jaDuhc2uISY7Gt5c6tOe8rG3ffNhYrmEuGD5HI0hcglpALiE4NcgalaaQS9J1 suQ6AUtCslReD+6M/lfarn9Zd3UAKGbxU8vCNPq0EcSAGUz9u9VK2VwKiGnAZ8bb ED3QDUzZYjTDWpiVodsuJlONgaMLsRCQecZWMDRNpzmf1rCXnkY0eDGiSMz+IiXZ 87IdD66u3d/Mkm6jVdwp6+tKZ/ohj+dtIWKhMd8cKXv5zTzS+4IokxpkxdjBsHPx z+G73IMHjQo8xl/P0IhhwZw+7cBrkntLq8lRSbYxjSTP09QerNE= =uNBn -----END PGP SIGNATURE----- Merge tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "The last dmaengine updates for this year :) This contains couple of new drivers, new device support and updates to bunch of drivers. New drivers/devices: - Qualcomm ADM driver - Qualcomm GPI driver - Allwinner A100 DMA support - Microchip Sama7g5 support - Mediatek MT8516 apdma Updates: - more updates to idxd driver and support for IAX config - runtime PM support for dw driver - TI drivers" * tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (75 commits) soc: ti: k3-ringacc: Use correct error casting in k3_ringacc_dmarings_init dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA dmaengine: ti: k3-udma: Initial support for K3 PKTDMA dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling dmaengine: ti: k3-udma: Initial support for K3 BCDMA soc: ti: k3-ringacc: add AM64 DMA rings support. dmaengine: ti: Add support for k3 event routers dmaengine: ti: k3-psil: Add initial map for AM64 dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA dt-bindings: dma: ti: Add document for K3 PKTDMA dt-bindings: dma: ti: Add document for K3 BCDMA dmaengine: dmatest: Use dmaengine_get_dma_device dmaengine: doc: client: Update for dmaengine_get_dma_device() usage dmaengine: Add support for per channel coherency handling dmaengine: of-dma: Add support for optional router configuration callback dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API dmaengine: ti: k3-udma: Add support for second resource range from sysfw dmaengine: ti: k3-udma: Wait for peer teardown completion if supported ... |
||
|
Linus Torvalds
|
accefff5b5 |
ARM: SoC updates for OMAP GenPD
These are additional updates for the power domain support on OMAP, moving to an implementation based on device tree information instead of SoC specific code. This is the latest step in the ongoing process for moving code out of arch/arm/mach-omap2. I kept this separate from the other driver changes since it touches code in multiple areas. There is one conflict in the dra7.dts file, which adds another node in a different branch. Watch out for adding the trailing '};' both times. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/akk0ACgkQmmx57+YA GNlrvBAAsCH24zvoXDbKVHg+QMbjt2WAWdRCKrJ0kidAI+JACDAGpfOQcoS5wbdF SnU3o5GtjGKfQL3UmiMA2ADIFZFWTLCTimAks/pqQRBgF4Mrh32W2YqAWP206f1U CxsnC6pl7+C/OEoKnVgbYMusvEBp7xaA1mmeNsCudtWg4g6VjKEf232P3AqGguKb ZGmf7g0GHvzd7Euc/71EnO9n35C9lG2d6sJx3GmJejSndEA7LhOruX94+SxUD3mz tVcCPH2HgWOPkmZdDcu7/6lxBnzRLigB+3NXTXktynw0urZOKN5XCy5dd7MiyKEV +R3R0YPa6cIp/K8Wt3v2azPgfXzjbHpGPTX+Ud8rHBE0wvEUYgfvU/2xLSs3rV6N qAmOxDH3W0vdIkQaED1F1JT3YtxYM3D40z2ORp0XqR+AXvA3Yw7NOnfYu+YSMeWA 2FgAGary0QGGyCDC62M7gZiz1mDDU214PK3hxeFGTTNy3DSP6b31MlwQwyeIxL/i rgZBwcM2BKcdmyGk3zXDud9ib4n8/S9gVaaJPbwNPPcCa2m2zUZnSyree3ATLxev 3fqNRnOthtNL7T9aUim+ae/qlbeYmU1v0iSmL+ND7GxpdL54zXRGwzllNQj5h++U 1oRiPeMpt9T47olU5sB1CQZxegq/0qJX5pn4ea9pBtnmN7wqpsM= =0mXx -----END PGP SIGNATURE----- Merge tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC OMAP GenPD updates from Arnd Bergmann: "These are additional updates for the power domain support on OMAP, moving to an implementation based on device tree information instead of SoC specific code. This is the latest step in the ongoing process for moving code out of arch/arm/mach-omap2. I kept this separate from the other driver changes since it touches code in multiple areas" * tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits) ARM: OMAP2+: Fix am4 only build after genpd changes ARM: dts: Configure power domain for omap5 dss ARM: dts: omap5: add remaining PRM instances soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances ARM: OMAP2+: Drop legacy platform data for dra7 gpmc ARM: dts: Configure interconnect target module for dra7 iva ARM: dts: dra7: add remaining PRM instances soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks ARM: OMAP2+: Drop legacy platform data for omap4 gpmc ARM: OMAP2+: Drop legacy platform data for omap4 iva ARM: dts: Configure power domain for omap4 dsp ARM: dts: Configure power domain for omap4 dss ARM: dts: omap4: add remaining PRM instances soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks ARM: OMAP2+: Drop legacy remaining legacy platform data for am4 ARM: dts: Use simple-pm-bus for genpd for am4 l3 ARM: dts: Move am4 l3 noc to a separate node ARM: dts: Use simple-pm-bus for genpd for am4 l4_per ... |
||
|
Linus Torvalds
|
48c1c40ab4 |
ARM: SoC drivers for v5.11
There are a couple of subsystems maintained by other people that
merge their drivers through the SoC tree, those changes include:
- The SCMI firmware framework gains support for sensor notifications
and for controlling voltage domains.
- A large update for the Tegra memory controller driver, integrating
it better with the interconnect framework
- The memory controller subsystem gains support for Mediatek MT8192
- The reset controller framework gains support for sharing pulsed
resets
For Soc specific drivers in drivers/soc, the main changes are
- The Allwinner/sunxi MBUS gets a rework for the way it handles
dma_map_ops and offsets between physical and dma address spaces.
- An errata fix plus some cleanups for Freescale Layerscape SoCs
- A cleanup for renesas drivers regarding MMIO accesses.
- New SoC specific drivers for Mediatek MT8192 and MT8183 power domains
- New SoC specific drivers for Aspeed AST2600 LPC bus control
and SoC identification.
- Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660
and SDX55.
- A rework of the TI AM33xx 'genpd' power domain support to use
information from DT instead of platform data
- Support for TI AM64x SoCs
- Allow building some Amlogic drivers as modules instead of built-in
Finally, there are numerous cleanups and smaller bug fixes for
Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
Renesas, and Xilinx SoCs.
There is a trivial conflict in the cedrus driver, with two branches
adding the same CEDRUS_CAPABILITY_H265_DEC flag, and another trivial
remove/remove conflict in linux/dma-mapping.h.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"There are a couple of subsystems maintained by other people that merge
their drivers through the SoC tree, those changes include:
- The SCMI firmware framework gains support for sensor notifications
and for controlling voltage domains.
- A large update for the Tegra memory controller driver, integrating
it better with the interconnect framework
- The memory controller subsystem gains support for Mediatek MT8192
- The reset controller framework gains support for sharing pulsed
resets
For Soc specific drivers in drivers/soc, the main changes are
- The Allwinner/sunxi MBUS gets a rework for the way it handles
dma_map_ops and offsets between physical and dma address spaces.
- An errata fix plus some cleanups for Freescale Layerscape SoCs
- A cleanup for renesas drivers regarding MMIO accesses.
- New SoC specific drivers for Mediatek MT8192 and MT8183 power
domains
- New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
identification.
- Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
SDX55.
- A rework of the TI AM33xx 'genpd' power domain support to use
information from DT instead of platform data
- Support for TI AM64x SoCs
- Allow building some Amlogic drivers as modules instead of built-in
Finally, there are numerous cleanups and smaller bug fixes for
Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
Renesas, and Xilinx SoCs"
* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
firmware: xilinx: Properly align function parameter
firmware: xilinx: Add a blank line after function declaration
firmware: xilinx: Remove additional newline
firmware: xilinx: Fix kernel-doc warnings
firmware: xlnx-zynqmp: fix compilation warning
soc: xilinx: vcu: add missing register NUM_CORE
soc: xilinx: vcu: use vcu-settings syscon registers
dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
soc: xilinx: vcu: drop useless success message
clk: samsung: mark PM functions as __maybe_unused
soc: samsung: exynos-chipid: initialize later - with arch_initcall
soc: samsung: exynos-chipid: order list of SoCs by name
memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
memory: ti-emif-sram: only build for ARMv7
memory: tegra30: Support interconnect framework
memory: tegra20: Support hardware versioning and clean up OPP table initialization
dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
reset-controller: ti: force the write operation when assert or deassert
...
|
||
|
Linus Torvalds
|
9805529ec5 |
ARM: device tree updates for 5.11
Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already support.
This is also known as the SigmaStar SSD202D, and we add support for
the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the Ampere
Altra based "Fii Kudo" server and the Quanta GSJ, both of which are
added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's
generation, also added along with its reference board. This one is
still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into low-end
tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM,
and one machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board
for the aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape
LX2162A, which is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based board,
- IEI Puzzle-M801, a rackmount network appliance based on
Marvell Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm
sm8250 and sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook
(sc7180)
- New board variants of the Renesas based "Kingfisher" and
"HiHope" reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with
a few carrier boards.
There is one conflict in mt6577_auxadc.txt, which got replaced in
another tree and modified here, the modification is already part of
the new file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM device tree updates from Arnd Bergmann:
"Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already
support. This is also known as the SigmaStar SSD202D, and we add
support for the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the
Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
which are added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last
year's generation, also added along with its reference board. This
one is still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into
low-end tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM, and one
machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based
board,
- IEI Puzzle-M801, a rackmount network appliance based on Marvell
Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook (sc7180)
- New board variants of the Renesas based "Kingfisher" and "HiHope"
reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
carrier boards"
* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
arm64: dts: sparx5: Add SGPIO devices
arm64: dts: sparx5: Add reset support
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
ARM: mstar: SMP support
ARM: mstar: Wire up smpctrl for SSD201/SSD202D
ARM: mstar: Add smp ctrl registers to infinity2m dtsi
ARM: mstar: Add dts for Honestar ssd201htv2
ARM: mstar: Add chip level dtsi for SSD202D
ARM: mstar: Add common dtsi for SSD201/SSD202D
ARM: mstar: Add infinity2m support
dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
dt-bindings: vendor-prefixes: Add honestar vendor prefix
dt-bindings: mstar: Add binding details for mstar,smpctrl
ARM: mstar: Fill in GPIO controller properties for infinity
ARM: mstar: Add gpio controller to MStar base dtsi
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Rename bus to be align with simple-bus yaml
...
|
||
Zong Li
|
efc91ae43c |
clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
Add driver code for the SiFive FU740 PRCI IP block. This IP block handles reset and clock control for the SiFive FU740 device and implements SoC-level clock tree controls and dividers. The link of unmatched as follow, and the U740-C000 manual would be present in the same page as soon. https://www.sifive.com/boards/hifive-unmatched This driver contains bug fixes and contributions from Henry Styles <hes@sifive.com> Erik Danie <erik.danie@sifive.com> Pragnesh Patel <pragnesh.patel@sifive.com> Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Cc: Henry Styles <hes@sifive.com> Cc: Erik Danie <erik.danie@sifive.com> Cc: Pragnesh Patel <pragnesh.patel@sifive.com> Link: https://lore.kernel.org/r/20201209094916.17383-4-zong.li@sifive.com [sboyd@kernel.org: Include header to silence sparse] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Linus Torvalds
|
8312f41f08 |
MIPS updates for v5.11:
- enabled GCOV - reworked setup of protection map - added support for more MSCC platforms - added sysfs boardinfo for Loongson64 - enabled KASLR for Loogson64 - added reset controller for BCM63xx - cleanups and fixes -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAl/Z6RIaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHBYtw//bKd5RI/wRgkejish0zX7 Qt6tcnPAZRPFopq/VyepNekgleM5uR8wKJ2YzBYDvyjGL2l217WTvqZG6lTLhLI6 3YJ2xDEi7g5FmecZNF4648iGJBVLu78om2SF5HtXeJaNR1L2ofnCvP+La2y5194M 4J1dxR+V8TZ61ufTEqn3KT+cUet+EAwLsPKqdk6ThlqkDfItjbVUkWG/Hc0hMu2C pyvnto0cvNDYZE1PNeOjhitWnSeuGX2KOSF3hYaPPEGh8V6tqtR1JTGKIJlN92iH LCFC7fLTt/ju12/OAnLbGqM1gpoMP7lsflbQAeNZzaBhtDZ7seq+6iXajimosQMj Vxd3+ur+3+zd/I03uKk2Tcp9Z/m6wv9tux7Rr6J8rQ/6/VCQK1btXbv30ayyYn04 pOqK0XJigyRjlp8SwDgD2uCg7iYQI10toliIipo4TvErKOVSNl/VsyedryCq64Il 6Rj6vntAp/m5s2I3hKEmCZikWC5YalsfkLFRnzKma3vc8Q8+lwWQoEoFb19V/F3E KGkjdoZhsfcGH3kHiqBc342G+9va54c8dgOKcfx0CA6NJwhogI+i4tza2ZdRMPxn Yo7VvuXYISppFYUujW5oT1m5JyPFmVRBCBAyf9kUdPQ5H8QJ0V3gXdtQuUd/NV5J OuVQljUNXTQRxqRFDIdHfXI= =0Sht -----END PGP SIGNATURE----- Merge tag 'mips_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - enable GCOV - rework setup of protection map - add support for more MSCC platforms - add sysfs boardinfo for Loongson64 - enable KASLR for Loogson64 - add reset controller for BCM63xx - cleanups and fixes * tag 'mips_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (70 commits) mips: fix Section mismatch in reference MAINTAINERS: Add linux-mips mailing list to JZ47xx entries MAINTAINERS: Remove JZ4780 DMA driver entry MAINTAINERS: chenhc@lemote.com -> chenhuacai@kernel.org MIPS: Octeon: irq: Alloc desc before configuring IRQ MIPS: mm: Add back define for PAGE_SHARED MIPS: Select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL to enable sysfs memblock debug mips: lib: uncached: fix non-standard usage of variable 'sp' MIPS: DTS: img: Fix schema warnings for pwm-leds MIPS: KASLR: Avoid endless loop in sync_icache if synci_step is zero MIPS: Move memblock_dump_all() to the end of setup_arch() MIPS: SMP-CPS: Add support for irq migration when CPU offline MIPS: OCTEON: Don't add kernel sections into memblock allocator MIPS: Don't round up kernel sections size for memblock_add() MIPS: Enable GCOV MIPS: configs: drop unused BACKLIGHT_GENERIC option MIPS: Loongson64: Fix up reserving kernel memory range MIPS: mm: Remove unused is_aligned_hugepage_range MIPS: No need to check CPU 0 in {loongson3,bmips,octeon}_cpu_disable() mips: cdmm: fix use-after-free in mips_cdmm_bus_discover ... |
||
|
Linus Torvalds
|
2dda5700ef |
regulator: Updates for v5.11
This has been a quiet release for the regulator API, a few new drivers
and the usual fixes and cleanup traffic but not much else going on:
- Optimisations for the handling of voltage enumeration, especially
with sparse selector sets, from Claudiu Beznea.
- Support for several ARM SCMI regulators, Dialog DA9121, NXP PF8x00,
Qualcomm PMX55, PM8350 and PM8350c
The addition of the SCMI regulator driver (which controls regulators via
system firmware) means that we've pulled in the support for the underlying
firmware operations from the firmware tree.
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Merge tag 'regulator-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"This has been a quiet release for the regulator API, a few new drivers
and the usual fixes and cleanup traffic but not much else going on:
- Optimisations for the handling of voltage enumeration, especially
with sparse selector sets, from Claudiu Beznea.
- Support for several ARM SCMI regulators, Dialog DA9121, NXP PF8x00,
Qualcomm PMX55, PM8350 and PM8350c
The addition of the SCMI regulator driver (which controls regulators
via system firmware) means that we've pulled in the support for the
underlying firmware operations from the firmware tree"
* tag 'regulator-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (53 commits)
regulator: mc13892-regulator: convert comma to semicolon
regulator: pfuze100: Convert the driver to DT-only
regulator: max14577: Add proper module aliases strings
regulator: da9121: Potential Oops in da9121_assign_chip_model()
regulator: da9121: Fix index used for DT property
regulator: da9121: Remove uninitialised string variable
regulator: axp20x: Fix DLDO2 voltage control register mask for AXP22x
regulator: qcom-rpmh: Add support for PM8350/PM8350c
regulator: dt-bindings: Add PM8350x compatibles
regulator: da9121: include linux/gpio/consumer.h
regulator: da9121: Mark some symbols with static keyword
regulator: da9121: Request IRQ directly and free in release function to avoid masking race
regulator: da9121: add interrupt support
regulator: da9121: add mode support
regulator: da9121: add current support
regulator: da9121: Update registration to support multiple buck variants
regulator: da9121: Add support for device variants via devicetree
regulator: da9121: Add device variant descriptors
regulator: da9121: Add device variant regmaps
regulator: da9121: Add device variants
...
|
||
|
Linus Torvalds
|
0cee54c890 |
USB / Thunderbolt patches for 5.11-rc1
Here is the big USB and thunderbolt pull request for 5.11-rc1. Nothing major in here, just the grind of constant development to support new hardware and fix old issues: - thunderbolt updates for new USB4 hardware - cdns3 major driver updates - lots of typec updates and additions as more hardware is available - usb serial driver updates and fixes - other tiny USB driver updates All have been in linux-next with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCX9iKFQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yme2gCfacEYztlnc0fh7PyyatYXgdkspbYAn2ri6mfF 4VY86HYXKqQRDW8w/lSg =f8KJ -----END PGP SIGNATURE----- Merge tag 'usb-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the big USB and thunderbolt pull request for 5.11-rc1. Nothing major in here, just the grind of constant development to support new hardware and fix old issues: - thunderbolt updates for new USB4 hardware - cdns3 major driver updates - lots of typec updates and additions as more hardware is available - usb serial driver updates and fixes - other tiny USB driver updates All have been in linux-next with no reported issues" * tag 'usb-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (172 commits) usb: phy: convert comma to semicolon usb: ucsi: convert comma to semicolon usb: typec: tcpm: convert comma to semicolon usb: typec: tcpm: Update vbus_vsafe0v on init usb: typec: tcpci: Enable bleed discharge when auto discharge is enabled usb: typec: Add class for plug alt mode device USB: typec: tcpci: Add Bleed discharge to POWER_CONTROL definition USB: typec: tcpm: Add a 30ms room for tPSSourceOn in PR_SWAP USB: typec: tcpm: Fix PR_SWAP error handling USB: typec: tcpm: Hard Reset after not receiving a Request USB: gadget: f_fs: remove likely/unlikely usb: gadget: f_fs: Re-use SS descriptors for SuperSpeedPlus USB: gadget: f_midi: setup SuperSpeed Plus descriptors USB: gadget: f_acm: add support for SuperSpeed Plus USB: gadget: f_rndis: fix bitrate for SuperSpeed and above usb: typec: intel_pmc_mux: Configure cable generation value for USB4 MAINTAINERS: Add myself as a reviewer for CADENCE USB3 DRD IP DRIVER usb: chipidea: ci_hdrc_imx: Use of_device_get_match_data() usb: chipidea: usbmisc_imx: Use of_device_get_match_data() usb: cdns3: fix NULL pointer dereference on no platform data ... |
||
|
Linus Torvalds
|
c367caf1a3 |
sound updates for 5.11-rc1
Lots of changes (slightly more code increase than usual) at this
time, while most of code changes are ASoC driver-specific.
Here goes some highlight:
Core:
* The new auxiliary bus implementation for Intel DSP, which will
be used by other drivers as well
* Lots of ASoC core cleanups and refactoring
* UBSAN and KCSAN fixes in rawmidi, sequencer and a few others
* Compress-offload API enhancement for the pause during draining
HD- and USB-audio:
* Enhancements of the USB-audio implicit feedback support,
including better full-duplex operations
* Continued CA0132 improvements and fixes
* A few new quirk entries, HDMI audio fixes
ASoC:
* Support for boot time selection of Intel DSP firmware, which
should help distros/users testing new stuff more easily;
the kconfig was moved to boot time option, too
* Some basic DPCM support in audio graph card
* Removal of old pre-DT Freescale drivers
* Support for Allwinner H6 I2S, Analog Devices ADAU1372, Intel
Alderlake-S, GMediatek MT8192, NXP i.MX HDMI and XCVR, Realtek
RT715, Qualcomm SM8250 and simple GPIO based muxes
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Merge tag 'sound-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"Lots of changes (slightly more code increase than usual) at this time,
while most of code changes are ASoC driver-specific.
Here are some highlights:
Core:
- The new auxiliary bus implementation for Intel DSP, which will be
used by other drivers as well
- Lots of ASoC core cleanups and refactoring
- UBSAN and KCSAN fixes in rawmidi, sequencer and a few others
- Compress-offload API enhancement for the pause during draining
HD- and USB-audio:
- Enhancements of the USB-audio implicit feedback support, including
better full-duplex operations
- Continued CA0132 improvements and fixes
- A few new quirk entries, HDMI audio fixes
ASoC:
- Support for boot time selection of Intel DSP firmware, which should
help distros/users testing new stuff more easily; the kconfig was
moved to boot time option, too
- Some basic DPCM support in audio graph card
- Removal of old pre-DT Freescale drivers
- Support for Allwinner H6 I2S, Analog Devices ADAU1372, Intel
Alderlake-S, GMediatek MT8192, NXP i.MX HDMI and XCVR, Realtek
RT715, Qualcomm SM8250 and simple GPIO based muxes"
* tag 'sound-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (445 commits)
ALSA: pcm: oss: Fix potential out-of-bounds shift
ALSA: usb-audio: Fix potential out-of-bounds shift
ALSA: hda/ca0132 - Add ZxR surround DAC setup.
ALSA: hda/ca0132 - Add 8051 PLL write helper functions.
ALSA: hda/hdmi: packet buffer index must be set before reading value
ASoC: SOF: imx: update kernel-doc description
ASoC: mediatek: mt8183: delete some unreachable code
ASoC: mediatek: mt8183: add PM ops to machine drivers
ASoC: topology: Fix wrong size check
ASoC: topology: Add missing size check
ASoC: SOF: Intel: hda: fix the condition passed to sof_dev_dbg_or_err
ASoC: SOF: modify the SOF_DBG flags
ASoC: SOF: Intel: hda: remove duplicated status dump
ASoC: rt1015p: delay 300ms after SDB pulling high for calibration
ASoC: rt1015p: move SDB control from trigger to DAPM
ASoC: wm_adsp: remove "ctl" from list on error in wm_adsp_create_control()
ALSA: usb-audio: Fix control 'access overflow' errors from chmap
ALSA: hda/hdmi: always print pin NIDs as hexadecimal
ALSA: hda/realtek - Add supported for more Lenovo ALC285 Headset Button
ALSA: hda/ca0132 - Remove now unnecessary DSP setup functions.
...
|
||
|
Linus Torvalds
|
d635a69dd4 |
Networking updates for 5.11
Core:
- support "prefer busy polling" NAPI operation mode, where we defer softirq
for some time expecting applications to periodically busy poll
- AF_XDP: improve efficiency by more batching and hindering
the adjacency cache prefetcher
- af_packet: make packet_fanout.arr size configurable up to 64K
- tcp: optimize TCP zero copy receive in presence of partial or unaligned
reads making zero copy a performance win for much smaller messages
- XDP: add bulk APIs for returning / freeing frames
- sched: support fragmenting IP packets as they come out of conntrack
- net: allow virtual netdevs to forward UDP L4 and fraglist GSO skbs
BPF:
- BPF switch from crude rlimit-based to memcg-based memory accounting
- BPF type format information for kernel modules and related tracing
enhancements
- BPF implement task local storage for BPF LSM
- allow the FENTRY/FEXIT/RAW_TP tracing programs to use bpf_sk_storage
Protocols:
- mptcp: improve multiple xmit streams support, memory accounting and
many smaller improvements
- TLS: support CHACHA20-POLY1305 cipher
- seg6: add support for SRv6 End.DT4/DT6 behavior
- sctp: Implement RFC 6951: UDP Encapsulation of SCTP
- ppp_generic: add ability to bridge channels directly
- bridge: Connectivity Fault Management (CFM) support as is defined in
IEEE 802.1Q section 12.14.
Drivers:
- mlx5: make use of the new auxiliary bus to organize the driver internals
- mlx5: more accurate port TX timestamping support
- mlxsw:
- improve the efficiency of offloaded next hop updates by using
the new nexthop object API
- support blackhole nexthops
- support IEEE 802.1ad (Q-in-Q) bridging
- rtw88: major bluetooth co-existance improvements
- iwlwifi: support new 6 GHz frequency band
- ath11k: Fast Initial Link Setup (FILS)
- mt7915: dual band concurrent (DBDC) support
- net: ipa: add basic support for IPA v4.5
Refactor:
- a few pieces of in_interrupt() cleanup work from Sebastian Andrzej Siewior
- phy: add support for shared interrupts; get rid of multiple driver
APIs and have the drivers write a full IRQ handler, slight growth
of driver code should be compensated by the simpler API which
also allows shared IRQs
- add common code for handling netdev per-cpu counters
- move TX packet re-allocation from Ethernet switch tag drivers to
a central place
- improve efficiency and rename nla_strlcpy
- number of W=1 warning cleanups as we now catch those in a patchwork
build bot
Old code removal:
- wan: delete the DLCI / SDLA drivers
- wimax: move to staging
- wifi: remove old WDS wifi bridging support
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Merge tag 'net-next-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from Jakub Kicinski:
"Core:
- support "prefer busy polling" NAPI operation mode, where we defer
softirq for some time expecting applications to periodically busy
poll
- AF_XDP: improve efficiency by more batching and hindering the
adjacency cache prefetcher
- af_packet: make packet_fanout.arr size configurable up to 64K
- tcp: optimize TCP zero copy receive in presence of partial or
unaligned reads making zero copy a performance win for much smaller
messages
- XDP: add bulk APIs for returning / freeing frames
- sched: support fragmenting IP packets as they come out of conntrack
- net: allow virtual netdevs to forward UDP L4 and fraglist GSO skbs
BPF:
- BPF switch from crude rlimit-based to memcg-based memory accounting
- BPF type format information for kernel modules and related tracing
enhancements
- BPF implement task local storage for BPF LSM
- allow the FENTRY/FEXIT/RAW_TP tracing programs to use
bpf_sk_storage
Protocols:
- mptcp: improve multiple xmit streams support, memory accounting and
many smaller improvements
- TLS: support CHACHA20-POLY1305 cipher
- seg6: add support for SRv6 End.DT4/DT6 behavior
- sctp: Implement RFC 6951: UDP Encapsulation of SCTP
- ppp_generic: add ability to bridge channels directly
- bridge: Connectivity Fault Management (CFM) support as is defined
in IEEE 802.1Q section 12.14.
Drivers:
- mlx5: make use of the new auxiliary bus to organize the driver
internals
- mlx5: more accurate port TX timestamping support
- mlxsw:
- improve the efficiency of offloaded next hop updates by using
the new nexthop object API
- support blackhole nexthops
- support IEEE 802.1ad (Q-in-Q) bridging
- rtw88: major bluetooth co-existance improvements
- iwlwifi: support new 6 GHz frequency band
- ath11k: Fast Initial Link Setup (FILS)
- mt7915: dual band concurrent (DBDC) support
- net: ipa: add basic support for IPA v4.5
Refactor:
- a few pieces of in_interrupt() cleanup work from Sebastian Andrzej
Siewior
- phy: add support for shared interrupts; get rid of multiple driver
APIs and have the drivers write a full IRQ handler, slight growth
of driver code should be compensated by the simpler API which also
allows shared IRQs
- add common code for handling netdev per-cpu counters
- move TX packet re-allocation from Ethernet switch tag drivers to a
central place
- improve efficiency and rename nla_strlcpy
- number of W=1 warning cleanups as we now catch those in a patchwork
build bot
Old code removal:
- wan: delete the DLCI / SDLA drivers
- wimax: move to staging
- wifi: remove old WDS wifi bridging support"
* tag 'net-next-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1922 commits)
net: hns3: fix expression that is currently always true
net: fix proc_fs init handling in af_packet and tls
nfc: pn533: convert comma to semicolon
af_vsock: Assign the vsock transport considering the vsock address flags
af_vsock: Set VMADDR_FLAG_TO_HOST flag on the receive path
vsock_addr: Check for supported flag values
vm_sockets: Add VMADDR_FLAG_TO_HOST vsock flag
vm_sockets: Add flags field in the vsock address data structure
net: Disable NETIF_F_HW_TLS_TX when HW_CSUM is disabled
tcp: Add logic to check for SYN w/ data in tcp_simple_retransmit
net: mscc: ocelot: install MAC addresses in .ndo_set_rx_mode from process context
nfc: s3fwrn5: Release the nfc firmware
net: vxget: clean up sparse warnings
mlxsw: spectrum_router: Use eXtended mezzanine to offload IPv4 router
mlxsw: spectrum: Set KVH XLT cache mode for Spectrum2/3
mlxsw: spectrum_router_xm: Introduce basic XM cache flushing
mlxsw: reg: Add Router LPM Cache Enable Register
mlxsw: reg: Add Router LPM Cache ML Delete Register
mlxsw: spectrum_router_xm: Implement L-value tracking for M-index
mlxsw: reg: Add XM Router M Table Register
...
|
||
Vinod Koul
|
f7b36cc19e |
clk: qcom: rpmh: add support for SM8350 rpmh clocks
This adds the RPMH clocks present in SM8350 SoC Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201208064702.3654324-3-vkoul@kernel.org [sboyd@kernel.org: Move sdx55 to the right place] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Daniel Palmer
|
2bf39ddd77 |
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
Header adds defines for the gpio number of each pad from the driver view. The gpio block seems to have enough registers for 128 lines but what line is mapped to a physical pin depends on the chip. The gpio block also seems to contain some registers that are not related to gpio but needed somewhere to go. Because of the above the driver itself uses the index of a pin's offset in an array of the possible offsets for a chip as the gpio number. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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a97d8ffac8 |
Merge tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.11 This adds support for the core power domains on MSM8916, MSM8939, SDM660 and SDX55. It adds SM8150 support to the last-level cache controller driver and it makes it possible to build the Command DB and RPMh drivers as modules. It also contains a slew of smaller cleanups, style and bug fixes throughout the various drivers. * tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits) soc: qcom: rpmhpd: Add SDX55 power domains dt-bindings: power: Add rpm power domain bindings for sdx55 soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write() samples: qmi: Constify static qmi ops soc: qcom: pdr: Constify static qmi structs soc: qcom: initialize local variable soc: qcom: socinfo: add soc ids for msm8953 variants soc: qcom: geni: Remove "iova" check soc: qcom: llcc: Add configuration data for SM8150 dt-bindings: msm: Add LLCC for SM8150 soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header soc: qcom: kryo-l2-accessors: Fix misnaming of 'val' soc: qcom: rpmhpd: Provide some missing struct member descriptions soc: qcom: llcc-qcom: Fix expected kernel-doc formatting soc: qcom: smp2p: Remove unused struct attribute provide another soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers soc: qcom: smsm: Fix some kernel-doc formatting and naming problems soc: qcom: smem: Fix formatting and missing documentation issues soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr' soc: qcom: qcom_aoss: Add missing description for 'cooling_devs' ... Link: https://lore.kernel.org/r/20201130190142.345246-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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3eaac3aed2 |
i.MX DT bindings update for 5.11:
- Quite some patches that update vendor-prefixes.yaml and fsl.yaml to document missing board compatibles and add new board compatibles. - A couple of patches from Dong Aisheng to update imx-scu firmware and imx-lpcg clock bindings for new SCU two cells clock support. - A couple of net bindings update from Ioana Ciornei to complete the MAC/PCS/PHY representation on DPAA2 devices. - Document watchdog compatibles for all i.MX and Layerscape devices. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl/HlOYUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM4yegf/eP6henuph6c+Ay/y7Ia4V51UY4ot Sb9pJatgaX4GmFowfztltd//gJMtpHnYbqAsXhk2hkRZ7h0hFIIji2Dp7knq3naD rQykAmT4eWy1CuQFq86XvFaqHc5AVuygBpMmP6nSFDBzBeqDRQ+q813aUpQdUlUH iAeN2Ov62U+4kEc0AxF2mNNcGW1/ikKcFT5nJmJGmgUKuwSUSJ0l09MvXHhQeEjr //gswg/5XU4tweEjAHeEJKM60XLtRFdmoLnz/0nDlLY0BXfBYRpicvNXzxDWEPOd qdf20NOWyz2UUcmMgy1vpVJKHQumSDNxB9M0FwtkcB8+x0YjE4gB8AxUNA== =YiM1 -----END PGP SIGNATURE----- Merge tag 'imx-bindings-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings update for 5.11: - Quite some patches that update vendor-prefixes.yaml and fsl.yaml to document missing board compatibles and add new board compatibles. - A couple of patches from Dong Aisheng to update imx-scu firmware and imx-lpcg clock bindings for new SCU two cells clock support. - A couple of net bindings update from Ioana Ciornei to complete the MAC/PCS/PHY representation on DPAA2 devices. - Document watchdog compatibles for all i.MX and Layerscape devices. * tag 'imx-bindings-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits) dt-bindings: arm: fsl: add Protonic WD3 board dt-bindings: vendor-prefixes: add "virtual" prefix dt-bindings: fsl: add kamstrup flex concentrator to schema dt-bindings: arm: fsl: document i.MX7S boards dt-bindings: arm: fsl: document SolidRun LX2160A boards dt-bindings: arm: fsl: document LS1012A FRWY board dt-bindings: arm: fsl: add Van der Laan LANMCU board dt-bindings: arm: fsl: add Altesco I6P board dt-bindings: vendor-prefixes: Add an entry for Altus-Escon-Company dt-bindings: net: add the 10gbase-r connection type dt-bindings: net: add the DPAA2 MAC DTS definition dt-bindings: fsl: add compatible for LX2162A QDS Board dt-bindings: vendor-prefixes: Add an entry for Van der Laan b.v. dt-bindings: arm: fsl: document i.MX7D boards dt-bindings: arm: fsl: document i.MX6ULL boards dt-bindings: arm: fsl: document i.MX6UL boards dt-bindings: arm: fsl: document i.MX6SX boards dt-bindings: arm: fsl: document i.MX6SL boards dt-bindings: arm: fsl: document i.MX6QP boards dt-bindings: arm: fsl: document i.MX6Q boards ... Link: https://lore.kernel.org/r/20201202142717.9262-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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1e3e7ca547 |
arm64: dts: amlogic updates for v5.11
- AXG SoCs: add/enable PCIe & USB OTG support - AXG SoCs: add MIPI DSI support - Khadas VIM: add RTC - several cleanups & fixups -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl/GxC4ACgkQWTcYmtP7 xmUbdA/+IA2JJZg9q2u0xJmePsft6QTwLqIiDRp970jfooVSLqSPz7xYhdlWiXR5 Gxzyv6Kyd0Nw/G16Ffl6sPs30/lMI8OYsR/imOqc8SYTRvUE/4gy0xXEd8aLWSU4 2g4B8k985WIEeRNz/788SoGvtpA+zXMmS7EHNczoyQaihfywE56fYaM/TjT+pi+a prrCxdiRCX8DGOjB6ynR8efQyguUxRhOKx5sJZnaymY5NhaYl0ZUjRNR8iqhkFj0 SLSGghTal5PcweVSDWMuZbtxaCtf6v3dnZ9ohzS0w25U7xnNoVVQX/OMjA19ZLDt SX2QcS5fCr1BcTfSxsw8zXrbPAqGlrb1PlWdf9uneHf02ze38P7FZSQFhyjzM+1v L9aZgSbvg4jJ/H/p8HFyxuf3ynQMzadRkhcfGo5sUfGWDgwG6189tNjpTPD3BSub CguzUOSuIfml/8KnS0S5aI0NCXyESprHfNwZQyvz6FdgXxdtF38twwKgpmUHUoxA uw5bzpJgrpF7PM9OpmP/yCfETj4EQ++hQyosJNeAweIrt+VIkQ/OW4SZ5dBrwB3k R0rCU80E5gpNBrmmY7AvbjCv91DH2xzxz7/w2FZmt5vs5KBxRCPnCkeRwor0n+sT asQ0YMUoMnJqCbay8ditaARhCvNQCfNe8w+KDrr2MqnCi/PLYLw= =XtmV -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: amlogic updates for v5.11 - AXG SoCs: add/enable PCIe & USB OTG support - AXG SoCs: add MIPI DSI support - Khadas VIM: add RTC - several cleanups & fixups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-sm1: fix typo in opp table arm64: dts: meson: add KHAMSIN IR remote node to SML5442TW arm64: dts: meson: update the Khadas VIM3/3L LED bindings arm64: dts: meson: fix spi-max-frequency on Khadas VIM2 arm64: dts: meson: add rtc aliases to meson-khadas-vim3.dtsi arm64: dts: meson: Add capacity-dmips-mhz attributes to GXM arm64: dts: meson-axg-s400: enable PCIe M.2 Key E slots arm64: dts: meson-axg: add PCIe nodes arm64: dts: meson-axg: add MIPI DSI PHY nodes arm64: dts: meson-axg: add PWRC node arm64: dts: meson: enable rtc node on Khadas VIM1/VIM2 boards dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding dt-bindings: clk: axg-clkc: add Video Clocks arm64: dts: meson: add watchdog to g12-common dtsi arm64: dts: meson: remove empty lines from aml-s905x-cc v2 dts Link: https://lore.kernel.org/r/7heek9jgox.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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a39d2ef78d |
Qualcomm ARM64 DT updates for 5.11
For SM8250 the recently introduced support for handling boot-loader stream mappings in the ARM SMMU allow us to enable this, and thereby USB controller and PHY, SDHCI controller and FastRPC, as well as support for the SM8250 HDK board has been added. Additionally PRNG and RTC is enabled. Similarly for SM8150, the ARM SMMU could be added which allows the secondary USB controller and PHYs, as well as WiFi to be added and support for the SM8150 HDK board to be introduced. Additionally Coresight and support for the last-level cache controller was added. MSM8916 finally has VDDCX and VDDMX removed as regulators and are now handled by the rpmpd driver for the devices controlling them. The Longsheer L8150 gains touchscreen, sensors, vibrator and LED support. MSM8992 gains USB and SDHCI support as well as an I2C controller and the associated RMI4 based touchscreen for the Lumia 950. MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm support. Then support for the Lumia 950 XL is added. SDM845 gains interconnect properties for a number of devices and the GENI wrappers gains iommu stream configuration, which means DMA operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the SMMU enabled, a few fixes and the description of the eDP bridge and panel means that the laptop can now boot mainline with working display, GPU, WiFi and audio. SC7180 gains a slew of smaller improvements and fixes. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl/FP0cbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FINAP/11hbDNRXJ+3oqLk53aD /8G0Xbyzy9gekpYURZwJJrjaGY7l1psM39Kbo+flUPusFfxRBNmbWrw57PPbzjyS d3RnPXuc/XDkOvCHtQstowtdKBl5EIXU6ec9xg4RY5bZUiD5Fpk8OLBAitvruEqy 6YCgMhy5yRspb8iBXA5N4ERU0EsQBOMIIoP6DRuGkeMkUhk/QllO+xwAr6ugI3Ot s3gua4tjWfi5kxT0bXklU4fk7Xeiuy6VL+giddd4dWVUm2GdO7jRlU6ae6CLoi2k PStZJcca8uOpTMpF4ZqMLNX51UAk+VZsCvjMm5pYIQAWCp15sWyMA20wi8vM+cjx HHhsXU7WAqQfLzMntgUd36CJaTuGw8J+QzQyNpQeHjbL6tAA15BfnIIQ+RUZWgsx XoPWdSvmUBhyo9g2cR7yXRXQGxvMRy/w7uHgv6Szb9KkDxeBnpYMjBMrbaZAsyMA YoYvhdIO9HkL2IbUxQgiszQsD58aDvauEY+KpOZclVW5ODPhJmsSTZK2aH/L6kj9 6hn0rOBrXy8rZE5Vs08C5D2WvqZ0Ib45vXNpb9uucvyXXNZMywGw+94B3YMNbkCz /C9C1DJcRX1NZjJnQco3Cn0Ni7AmRzD5aAHi3n2BhxbsxOxZ6v0SjEDbce+lXwYJ 5l4AcPSLDjGXFJsbUPQrHvJF =lkn4 -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DT updates for 5.11 For SM8250 the recently introduced support for handling boot-loader stream mappings in the ARM SMMU allow us to enable this, and thereby USB controller and PHY, SDHCI controller and FastRPC, as well as support for the SM8250 HDK board has been added. Additionally PRNG and RTC is enabled. Similarly for SM8150, the ARM SMMU could be added which allows the secondary USB controller and PHYs, as well as WiFi to be added and support for the SM8150 HDK board to be introduced. Additionally Coresight and support for the last-level cache controller was added. MSM8916 finally has VDDCX and VDDMX removed as regulators and are now handled by the rpmpd driver for the devices controlling them. The Longsheer L8150 gains touchscreen, sensors, vibrator and LED support. MSM8992 gains USB and SDHCI support as well as an I2C controller and the associated RMI4 based touchscreen for the Lumia 950. MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm support. Then support for the Lumia 950 XL is added. SDM845 gains interconnect properties for a number of devices and the GENI wrappers gains iommu stream configuration, which means DMA operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the SMMU enabled, a few fixes and the description of the eDP bridge and panel means that the laptop can now boot mainline with working display, GPU, WiFi and audio. SC7180 gains a slew of smaller improvements and fixes. * tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (93 commits) arm64: dts: qcom: c630: Define eDP bridge and panel arm64: dts: qcom: c630: Fix pinctrl pins properties arm64: dts: qcom: c630: Polish i2c-hid devices arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver arm64: dts: sdm845: Add interconnect properties for QUP interconnect: qcom: sdm845: Add the missing nodes for QUP dt-bindings: interconnect: sdm845: Add IDs for the QUP ports arm64: dts: qcom: c630: Expose LID events arm64: dts: qcom: c630: Re-enable apps_smmu dts: qcom: sdm845: Add dt entries to support crypto engine. arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FD arm64: dts: qcom: sdm845: use GIC_SPI for IPA interrupts arm64: dts: qcom: sc7180: use GIC_SPI for IPA interrupts arm64: dts: qcom: sc7180: limit IPA iommu streams arm64: dts: qcom: sm8150: Add Coresight support arm64: dts: qcom: sc7180-trogdor: Make pp3300_a the default supply for pp3300_hub arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite arm64: dts: qcom: sc7180-trogdor: add "pen-insert" label for trogdor arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger thermistor ... Link: https://lore.kernel.org/r/20201130190131.345187-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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5161540797 |
mt8173:
- add new power domain controller node mt8183: - add new power domain controller - add display, iommu and dsi nodes mt8192: - add basic support, pinctrl, uart, spi, i2c and timer mt8516: - add auxadc, efuse and usb nodes mt8167: - add basic support for the SoC - add support for the pumkin board mt6779: - add initial support, interrupt controller, clocks, uart mt7622: - PWM node for all available PWM channels -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl/EC2oXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6e9BAAkG3psWVaYuiHUnlEbIvIWFPx pCS7KV0J5kXe3F/oEAlQWDHiipAEVMyr9ABXnALfwjoqy7hAV6g775COLfZMR/ia oxBtYWKbKE3/6LSLr6F9l4bJKvox/qpd7hWCkDW3/2xZ2zzZLZo7BPU0o6kHXQAr ZdgtFx9Fxy1q2BIo/GP7wXmSt6dl+O9XTGAt/Hx3U2jQ5PMrQDblICbiEYFLSotR I58Nw7vKDrQ6bFQfXSOza5FjNoGswzB8wEzi3etEcSsYvinwhuTkqhVAs7kYgxqJ mp93ydrM2hsTy71p4kEA7uNaGKIrBPkzLVmwt3tWZ7nh/BE6IXt6hIWIUgHX4igL e31BG7u3IkYAwFMV9XJ5KZL37oQwF5UytrrwLIxN+dmozcfF1nd/r0VxJQkmfQ00 DUQvqhPUKAGJDgFNK5f+Kh3A+8JIkZpxN6GxqUdKitlgA1hUTbafaVXKG0fcADsu 8wRO6+JA0/pL36QU+3zPrLC6FinZGoPa9lWCdP0YmXOLTw3BGoa9nwkvwIMvcw2X 3aKIOBWglxds3XYVMP+bWrWV3sat1vFIh03lK/gbhci2h2WFdpDfZ+wFu7Y2WNAf DQP45UkGI/sN+1MpDWfpK/oxVWMwxCNoEtOhHCDXBMh/6ysjmrRTbm1vqLLaNYQP WYzIYR/BaYpJQUz+xUM= =DU+G -----END PGP SIGNATURE----- Merge tag 'v5.10-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8173: - add new power domain controller node mt8183: - add new power domain controller - add display, iommu and dsi nodes mt8192: - add basic support, pinctrl, uart, spi, i2c and timer mt8516: - add auxadc, efuse and usb nodes mt8167: - add basic support for the SoC - add support for the pumkin board mt6779: - add initial support, interrupt controller, clocks, uart mt7622: - PWM node for all available PWM channels * tag 'v5.10-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (25 commits) dts64: mt7622: disable spi1 and uart2 because pins are used by pwm dts64: mt7622: enable all pwm for bananapi r64 arm64: dts: mt8183: Add display nodes for MT8183 arm64: dts: mt8183: Add iommu and larb nodes arm64: dts: mt8183: Add dsi node arm64: dts: mt8183: Add pwm and backlight node arm64: dts: mediatek: Add mt8183 power domains controller arm64: dts: mediatek: Add smi_common node for MT8183 arm64: dts: mediatek: Add mt8173 power domain controller dt-bindings: power: Add MT8192 power domains dt-bindings: power: Add MT8183 power domains dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile arm64: dts: mediatek: add MT8167 pumpkin board dts arm64: dts: mediatek: add dtsi for MT8167 dt-bindings: arm64: dts: mediatek: Add mt8167-pumpkin board arm64: dts: mediatek: mt8516: add efuse node arm64: dts: mediatek: align GPIO hog names with dtschema arm64: dts: mediatek: mt8516: add usb1 node arm64: dts: mediatek: mt8516: rename usb phy ... Link: https://lore.kernel.org/r/72fe1c4f-f27c-c455-dfd9-66bde90bb295@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Manivannan Sadhasivam
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bdf7805b8c |
dt-bindings: clock: Add GDSC in SDX55 GCC
Add GDSC instances in SDX55 GCC block. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201126072844.35370-6-manivannan.sadhasivam@linaro.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Vinod Koul
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2e2639b7ef |
dt-bindings: clock: Introduce RPMHCC bindings for SDX55
Add compatible for SDX55 RPMHCC and DT include. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201126072844.35370-4-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Vinod Koul
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a13ae5a379 |
dt-bindings: clock: Add SDX55 GCC clock bindings
Add device tree bindings for global clock controller on SDX55 SoCs. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201126072844.35370-2-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Michael Walle
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4cb15934ba |
clk: qoriq: provide constants for the type
To avoid future mistakes in the device tree for the clockgen module, add constants for the clockgen subtype as well as a macro for the PLL divider. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201108185113.31377-4-michael@walle.cc Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Daniel Palmer
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588cc1a026 |
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
Header adds defines for the gpio number of each pad from the driver view. The gpio block seems to have enough registers for 128 lines but what line is mapped to a physical pin depends on the chip. The gpio block also seems to contain some registers that are not related to gpio but needed somewhere to go. Because of the above the driver itself uses the index of a pin's offset in an array of the possible offsets for a chip as the gpio number. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201129110803.2461700-2-daniel@0x0f.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Thierry Reding
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64a38367b4 |
dt-bindings: gpio: Use Tegra186-specific include guard
Use a unique include guard for the Tegra186 GPIO DT bindings header to avoid clashes with the DT bindings header for earlier chips. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20201127140852.123192-2-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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周琰杰 (Zhou Yanjie)
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0fce2e02a2 |
dt-bindings: timer: Add new OST support for the upcoming new driver.
The new OST has one global timer and two or four percpu timers, so there will be three combinations in the upcoming new OST driver: the original GLOBAL_TIMER + PERCPU_TIMER, the new GLOBAL_TIMER + PERCPU_TIMER0/1 and GLOBAL_TIMER + PERCPU_TIMER0/1/2/3, For this, add the macro definition about OST_CLK_PERCPU_TIMER0/1/2/3. And in order to ensure that all the combinations work normally, the original ABI values of OST_CLK_PERCPU_TIMER and OST_CLK_GLOBAL_TIMER need to be exchanged to ensure that in any combinations, the clock can be registered (by calling clk_hw_register()) from index 0. Before this patch, OST_CLK_PERCPU_TIMER and OST_CLK_GLOBAL_TIMER are only used in two places, one is when using "assigned-clocks" to configure the clocks in the DTS file; the other is when registering the clocks in the sysost driver. When the values of these two ABIs are exchanged, the ABI value used by sysost driver when registering the clock, and the ABI value used by DTS when configuring the clock using "assigned-clocks" will also change accordingly. Therefore, there is no situation that causes the wrong clock to the configured. Therefore, exchanging ABI values will not cause errors in the existing codes when registering and configuring the clocks. Currently, in the mainline, only X1000 and X1830 are using sysost driver, and the upcoming X2000 will also use sysost driver. This patch has been tested on all three SoCs and all works fine. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20201026155842.10196-2-zhouyanjie@wanyeetech.com |
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Adam Ward
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744ef9b091
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regulator: Update DA9121 dt-bindings
Update bindings for the Dialog Semiconductor DA9121 voltage regulator to add device variants. Because several variants have multiple regulators, and to regard potential to add GPIO support in future, the 'regulators' sub-node is added, following the precedent set by other multi-regulator devices, including the DA9211 family. This breaks compatibility with the original submission by Vincent Whitchurch - but as this is still in for-next, the alignment could be made before upstreaming occurs. Signed-off-by: Adam Ward <Adam.Ward.opensource@diasemi.com> Link: https://lore.kernel.org/r/0606d3ded5fef4c38760246146f197db4ce3a374.1606755367.git.Adam.Ward.opensource@diasemi.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Georgi Djakov
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8742bb4bf2 |
dt-bindings: interconnect: sdm845: Add IDs for the QUP ports
The QUP ports exist in the topology, but are not exposed as an endpoints in DT. Fix this by creating IDs and attach them to their NoCs, so that the various QUP drivers (i2c/spi/uart etc.) are able to request their interconnect paths and scale their bandwidth. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Link: https://lore.kernel.org/r/20201105135211.7160-1-georgi.djakov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Arnd Bergmann
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bbecede458 |
power-domains:
- add support for new power domain driver. - add support for mt8183 and mt8192 devapc: - add support for the devapc device found on mt6779 to identify of malicious bus accesses from a controller to a device mmsys: - move DDP routing IDs into the driver cmdq: - drop timeout handler support as not usefull scpsys: - print warning on theoretical error -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl/EDZoXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7zEw/8DW7/eqjvP71tJG7qvlhASy1R S6YYrnmx8R/A41um3tAYcfgPCm+xPGeqIsBRFWOxmLmw71ebu/EQyuuvGFx6qY2c p4pZdafkM7IrNYD0JLpLIpFZAqikPtz2WefzPqHD8WTaGKqQ+neoNWS2twVIpiTz N0wpkl3BuFTcjirDaeME8BY31UxhP2E9LK+IMSZmfnhfIJjgw4/A5/pbAVM+EUhC LqqSRn1uGmvibAQXVFDyhk/tLZJCe4X3OLkgXwlTKCIcd0qpVCWT+2xoxIV7r30G Ldddt8LwVVuebSaY5NTtQQy4t0ZBx79a+17eTDt/+cIc6k3F5Bucnl/dKssWS9dO /lXs5jpJvcmeWNgvYhbGhXj42CrekY3I3aZpZnJDCl6dG74NWbWSe+xAxxH417s0 9t5cNDLW9L21NhkMGXFX+a8LbMiT1s+UeM4UXHnCGHX2Mx2cQoP/ATr7d5ED+Jr6 3xdKO6r7YnJANZ4UAvIVhbbak2pMT5BUhU/jM1LAMZ/JkEscfjyvdOyorAMFR5Ka hUFcfaJJ0hcVkfSEbF0LPsoNI8XHIY1i0bar4ZIKYr6asTgtVyHHh/BHfO25LW+4 T4Vpr3ugj7znuomFuPCYXfy/3NN1TlFWfTtI8GwGCAdX6gihdoJ/We8KRqoCWrdp bEefKIDJxFWMNMA48j0= =mQNT -----END PGP SIGNATURE----- Merge tag 'v5.10-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers power-domains: - add support for new power domain driver. - add support for mt8183 and mt8192 devapc: - add support for the devapc device found on mt6779 to identify of malicious bus accesses from a controller to a device mmsys: - move DDP routing IDs into the driver cmdq: - drop timeout handler support as not usefull scpsys: - print warning on theoretical error * tag 'v5.10-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits) soc: mediatek: mmsys: Use devm_platform_ioremap_resource() soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h soc: mediatek: add mt6779 devapc driver dt-bindings: devapc: add bindings for mtk-devapc soc / drm: mediatek: cmdq: Remove timeout handler in helper function soc: mediatek: pm-domains: Add support for mt8192 soc: mediatek: pm-domains: Add default power off flag soc: mediatek: pm-domains: Add support for mt8183 soc: mediatek: pm-domains: Allow bus protection to ignore clear ack soc: mediatek: pm-domains: Add subsystem clocks soc: mediatek: pm-domains: Add extra sram control soc: mediatek: pm-domains: Add SMI block as bus protection block soc: mediatek: pm_domains: Make bus protection generic soc: mediatek: pm-domains: Add bus protection protocol soc: mediatek: Add MediaTek SCPSYS power domains dt-bindings: power: Add MT8192 power domains dt-bindings: power: Add MT8183 power domains dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller mfd: syscon: Add syscon_regmap_lookup_by_phandle_optional() function. MAINTAINERS: change mediatek wiki page ... Link: https://lore.kernel.org/r/b03fe343-e183-c6f3-f2dc-4c58aae3146b@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Weiyi Lu
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343106d9e6 |
dt-bindings: power: Add MT8192 power domains
Add power domains dt-bindings for MT8192. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201030113622.201188-15-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Enric Balletbo i Serra
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86a378bb1e |
dt-bindings: power: Add MT8183 power domains
Add power domains dt-bindings for MT8183. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201030113622.201188-11-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Dmitry Osipenko
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24a7eaea0a |
dt-bindings: memory: tegra124: Add memory client IDs
Each memory client has unique hardware ID, add these IDs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Dmitry Osipenko
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f25696bce9 |
dt-bindings: memory: tegra30: Add memory client IDs
Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Dmitry Osipenko
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825c7f4aa2 |
dt-bindings: memory: tegra20: Add memory client IDs
Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Vinod Koul
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f365bd3355 |
dt-bindings: power: Add rpm power domain bindings for sdx55
Add RPM power domain bindings for the SDX55 SoC Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201126092711.1084518-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Neil Armstrong
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312489790c |
dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
This adds the MIPI DSI Host Pixel Clock bindings. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20201126141600.2084586-2-narmstrong@baylibre.com |
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Thara Gopinath
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8d5d3c7a5b |
dt-bindings: clock: Add entry for crypto engine RPMH clock resource
Add clock id forc CE clock resource which is required to bring up the crypto engine on sdm845. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Link: https://lore.kernel.org/r/20201119155233.3974286-2-thara.gopinath@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |