Commit Graph

10649 Commits

Author SHA1 Message Date
Olof Johansson
37937ee73b i.MX arm64 device tree changes for 5.3:
- Add i.MX8MQ based Librem5 devkit support.
  - Add SNVS power key support for i.MX8MQ and i.MX8MM.
  - Add GPIO alias for imx8mq and i.MX8QXP.
  - A series from Daniel Baluta to add SAI devices and enable audio
    support for imx8mm-evk board.
  - Add DDR performance monitor unit support for i.MX8QXP.
  - Add irqsteer interrupt controller device for i.MX8MQ SoC.
  - Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
  - Add OCOTP device node for i.MX8QXP.
  - Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
    temperature sensor.
  - Random minor coding style improvements.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdEcFcAAoJEFBXWFqHsHzOcNYIAICVsBiJX/gU0t+jT7i1KL83
 jDe/DDNg8j9PgR0ElLPejskJgnNYLS0DTWYCY/yPgzK8bwLuqxseVyjXBhyptZ1o
 Oecgp9c/79RGsJi9+tFlPKCB/jL4gvagbNn0kPAAoCv3dV5n5FikuSXfsN1v0DJi
 JpBXO0IHpkqRTJKk7Ran5MzxxaHbWkjMn0u80ewsAioZv/XhPg5xVSsONleQdh2V
 YtZkjcAuA7M9ZOLTKcEFmGyZW/ZTLcW7+xaj9ETJGtMJEi60igPyeFcmd1YIKfIh
 g1RwqgDilwEbh2rNulyZbRkRJKQDjTeHUNRqyGEM54lxAB52VQo5hHYa56K2m9Q=
 =SIR/
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree changes for 5.3:
 - Add i.MX8MQ based Librem5 devkit support.
 - Add SNVS power key support for i.MX8MQ and i.MX8MM.
 - Add GPIO alias for imx8mq and i.MX8QXP.
 - A series from Daniel Baluta to add SAI devices and enable audio
   support for imx8mm-evk board.
 - Add DDR performance monitor unit support for i.MX8QXP.
 - Add irqsteer interrupt controller device for i.MX8MQ SoC.
 - Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
 - Add OCOTP device node for i.MX8QXP.
 - Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
   temperature sensor.
 - Random minor coding style improvements.

* tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits)
  arm64: dts: librem5: enable the SNVS power key
  arm64: dts: librem5: Limit the USB to 5V
  arm64: dts: imx8qxp: added ddr performance monitor nodes
  arm64: dts: imx8qxp: sort LSIO subsystem devices
  arm64: dts: imx8qxp: sort alias alphabetically
  arm64: dts: imx8qxp: Add lsio_mu13 node
  arm64: dts: imx8mm-evk: Enable audio codec wm8524
  arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit
  arm64: dts: fsl: ls1028a: Add qDMA node
  arm64: dts: imx8mm: Enable SNVS power key according to board design
  arm64: dts: imx8mq-evk: Enable SNVS power key
  arm64: dts: ls1028a: add crypto node
  arm64: dts: ls1028a: Add temperature sensor node
  arm64: dts: imx8mm: Move gic node into soc node
  arm64: dts: imx8mm: Move usbphy out of soc node
  arm64: dts: imx8mm: Pass the 'ranges' property
  arm64: dts: imx8mm: Pass a unit name for the 'soc' node
  arm64: dts: fsl: imx8mq: add the snvs power key node
  arm64: dts: ls1028a: fix watchdog device node
  arm64: dts: ls1028a: Enable sata.
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:52:55 -07:00
Olof Johansson
9bb03d2644 i.MX DT changes with new clock for 5.3:
- This is a set of device tree changes with new clocks - adding
    clock info for i.MX8 GPIO and SNVS RTC device.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdEY9IAAoJEFBXWFqHsHzONzkH/iQWmmauxY3ONsDhCOiq2xkz
 agKfN77pgM0005NJl8bP/+wyl6JXozpq31PJrbWPvdZCwElEzBykmWZzyG2cl6Bx
 ajwsldhBzMoYKvjVH0MD3ldPXoANsvfIQiAyVzPHY/tCBHI6hnaJKWCaQ0fsqg5M
 vZ0lf5Adqh9MN7lBKWBz1tbOgqCNAVdhRrvLdrTuoQ/asjivqzl3oXXMWzzrc4lK
 pUGPg1+iqf/MSBVoX8F3ETO9W+GjdjHE0qoGttXf90w2epQZqO5Ta2mfhzyF4fkE
 pcPGKQTASi+zOcUuzgM97TGfWbeOYhd0kRmInZVZt+Wce2Ju4MO5M0Iyxp6xvJI=
 =GaZH
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-clkdep-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT changes with new clock for 5.3:
 - This is a set of device tree changes with new clocks - adding
   clock info for i.MX8 GPIO and SNVS RTC device.

* tag 'imx-dt-clkdep-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8mq: add clock for SNVS RTC node
  arm64: dts: imx8mm: add clock for SNVS RTC node
  arm64: dts: imx8mm: add clock for GPIO node
  clk: imx8m: Add GIC clock
  dt-bindings: clock: imx8m: Add GIC clock
  clk: imx8mm: add SNVS clock to clock tree
  dt-bindings: clock: imx8mm: Add SNVS clock
  clk: imx8mq: add SNVS clock to clock tree
  dt-bindings: clock: imx8mq: Add SNVS clock
  clk: imx8mm: add GPIO clocks to clock tree
  dt-bindings: clock: imx8mm: Add GPIO clocks

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:51:42 -07:00
Olof Johansson
9c644f83ea arm64: tegra: Device tree changes for v5.3-rc1
This contains the bulk of the Tegra changes this cycle. It has a bunch
 of improvements across almost all boards. These are mostly small and not
 too exciting additions.
 
 Most notably perhaps is the continuation of Jetson Nano support, which
 is now mostly on feature parity with Jetson TX1.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl0M7HYTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoeIUD/9udVMjomFq6udm5zzCazIsg7Aab3/4
 ctSLRppFCsiC01BInPTTwSPh0Lv0LJ5EALvIXIDyyel9xApJ66kOCQAVqVCyPUmv
 exqGTsKX44EzAYA2DVJR+qFDqPG4RD37PiBPkys7q7+H+sA8mz+dBNDckv76VYP5
 04xbv3rWC3NAs31i6NuiPitoSxpKBwfvguSdGS0BII8soI0yhilvqNnZp08XRdx7
 0W2AlOZvqFvti7288xeQPk57LJaR6pE7rnb1B5bPJwEzl7zRnu7A20u99xVZclTx
 XtHVXj5c52hVO1DKQ1mUL01xiA6Q0Ru+cfhLiEjaBot4MVoDkL0djeZYWG+Z1TWq
 NdKOaoi1Qiwpd6YbzyCWMvurFt8ZW2QDbu8hGf/jzI6TIogcajVC9gzm82kFnfu3
 1OefivyVx0WiXsTn+yIBI0NAiza5joZgh9fdX7R38l89oOx3VrQwyClJKFNSbkwV
 veI7UTLTZ2iKIwTwEoBaP2kO4SZKZ3/uvXdz89Pck8UooIeC9yU3aqcMZCyInXmn
 +MQlGiI2n5IIRbmNMKNHeece1gDzuvo9RSqzonwxNG3Zvt4J2bbfv7Q91itAJMjr
 mq8vNmVutfS36zgzcfbhfkPVO8hHX4OxOHWISZOtXbyCSzfY3j/HTuPRSLZBU2XZ
 xMFsMfefTEtcWA==
 =Ea0t
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.3-rc1

This contains the bulk of the Tegra changes this cycle. It has a bunch
of improvements across almost all boards. These are mostly small and not
too exciting additions.

Most notably perhaps is the continuation of Jetson Nano support, which
is now mostly on feature parity with Jetson TX1.

* tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
  arm64: tegra: Enable PCIe slots in P2972-0000 board
  arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
  arm64: tegra: Add PEX DPD states as pinctrl properties
  arm64: tegra: Enable ACONNECT, ADMA and AGIC
  arm64: tegra: Add ACONNECT, ADMA and AGIC nodes
  arm64: tegra: Sort device tree nodes alphabetically
  arm64: tegra: Fix Jetson Nano GPU regulator
  arm64: tegra: Update Jetson TX1 GPU regulator timings
  arm64: tegra: Fix AGIC register range
  arm64: tegra: Add INA3221 channel info for Jetson TX2
  arm64: tegra: Enable PWM on Jetson Nano
  arm64: tegra: Enable CPU sleep on Jetson Nano
  arm64: tegra: Add ID EEPROMs on Jetson Nano
  arm64: tegra: Add ID EEPROM for Jetson TX2 Developer Kit
  arm64: tegra: Add ID EEPROM for Jetson TX2 module
  arm64: tegra: Add ID EEPROM for Jetson TX1 Developer Kit
  arm64: tegra: Add ID EEPROM for Jetson TX1 module
  arm64: tegra: Don't use architected timer for suspend on Tegra210
  arm64: tegra: Mark architected timer as always on
  arm64: tegra: Add pin control states for I2C on Tegra186
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:48:32 -07:00
Olof Johansson
4cb0f05d37 mvebu dt64 for 5.3 (part 1)
For Armada 7K/8K:
  - enable AP806 thermal throttling with CPUfreq
  - add missing #interrupt-cells property allowing configuring
    interrupt for GPIO
 
 On Armada 8040 based board:
 - Fix PCI memory window on Mcbin board
 - Set SFP power limit on clearfog GT board
 - Disable AP I2C on Armada-8040-DB
 
 On Armada 3720 based board espressobin correct the SPI node used for
 NOR flash
 
 On Armada 7040 DB board add USB current regulators
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXQy4uwAKCRALBhiOFHI7
 1dW6AJ9EYqnK7TQxYcxXl/gy8E5zaTH8igCeKGKpjV0P2sUv66nC3pmdipvMP68=
 =KCf7
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.3 (part 1)

For Armada 7K/8K:
 - enable AP806 thermal throttling with CPUfreq
 - add missing #interrupt-cells property allowing configuring
   interrupt for GPIO

On Armada 8040 based board:
- Fix PCI memory window on Mcbin board
- Set SFP power limit on clearfog GT board
- Disable AP I2C on Armada-8040-DB

On Armada 3720 based board espressobin correct the SPI node used for
NOR flash

On Armada 7040 DB board add USB current regulators

* tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: add missing #interrupt-cells property
  arm64: dts: marvell: armada-7040-db: Add USB current regulators
  arm64: dts: armada-3720-espressobin: correct spi node
  arm64: dts: marvell: Disable AP I2C on Armada-8040-DB
  arm64: dts: marvell: Enable AP806 thermal throttling with CPUfreq
  arm64: dts: marvell: Change core numbering in AP806 thermal-node
  arm64: dts: marvell: clearfog-gt-8k: set SFP power limit
  arm64: dts: marvell: mcbin: enlarge PCI memory window

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:47:08 -07:00
Olof Johansson
d71036005f Renesas ARM64 Based SoC DT Updates for v5.3
* Renesas SoCs
   - Revise usb2_phy nodes and phys properties according to updated bindings
   - Use ip=on for bootargs
 
 * R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs
   - Add dynamic power coefficient
   - Create thermal zone to support IPA
 
 * R-Car E3 (r8a77990) and D3 (r8a77995) SoCs
   - Point LVDS0 to its companion LVDS1
 
 * R-Car E3 (r8a77990) SoC
   - Corresct register range of DU
 
 * R-Car E3 (r8a77990) based Ebisu board
   - Remove renesas, no-ether-link property
 
 * R-Car D3 (r8a77995) based Draak board:
   - Remove unnecessary index from vin4 port
 
 * RZ/G2M (r8a774a1) based HiHope main and sub-boards:
   - Initial support
   - Describe CPU capacity and topoligy
   - Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0
 
 * RZ/G2E (r8a774c0) SoC based EK874 board:
   - Clean up CPU compatible strings
   - Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAl0MmxcACgkQ189kaWo3
 T75kSg//b3cCgBVkwq8CnUeoWG8qOXXSFU0YyigRv0sAsZEKpBik4cmPyB4KW/Kn
 BDfM3PCm9Xnq6e6O9xr4r+KHqw4Q27QYTcIIBVgkKqzx1iZi4lytO6H2R12Qjuap
 rFIEBRUlyXfKM/9iNcwiRRMLmYHgY/sYNOcWvn2Vb6X6B4uRA/2QkTL/mGo4XYMv
 FeOVlb1sIZravrru1RVE9wc1nLGk3t0Q9W5okZLMwVrfCIg8o8GwSxK7YOYKfB+p
 q7sA7rQOik61+2VDz2XdYRcS6BwlGJQXOTA/BgD457vsqLKI5wlmO66JcMMnEQo9
 efl0dJS+T/8AiEO11jG1lmT5gsU+nCAI8wK2r7Pa59EnDBZGIrwX67sd/wi9YE8K
 CZ/mP9yd/S/g4Ai/pEiVLlsWJOs0/hmXT3MxZhThvk3vdQ7oq3ada6JUUn17lhPS
 davs6l5wtKfcKSxAXja0Wc5g1TXGQ0UMsSMNJmqX6T3zfgwIb7y3Wvrx8P1B3/q4
 GYpnwBS2d7HISWhYQvaCbA3a5wnsbssjg2BmvOr0Nv0RgX0+qfmxADc2/vx9lcD7
 VlEbjTtWWTV2FtbvsOZSFfMYDXP/LXdI+VWXSu5NHKcybooC/cuUYzNVOBsYda/k
 pSOW/EIou8kC4XlRGh3Vf/JNU4PagujDRVojhUwkztcjm+dteeY=
 =Qsip
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM64 Based SoC DT Updates for v5.3

* Renesas SoCs
  - Revise usb2_phy nodes and phys properties according to updated bindings
  - Use ip=on for bootargs

* R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs
  - Add dynamic power coefficient
  - Create thermal zone to support IPA

* R-Car E3 (r8a77990) and D3 (r8a77995) SoCs
  - Point LVDS0 to its companion LVDS1

* R-Car E3 (r8a77990) SoC
  - Corresct register range of DU

* R-Car E3 (r8a77990) based Ebisu board
  - Remove renesas, no-ether-link property

* R-Car D3 (r8a77995) based Draak board:
  - Remove unnecessary index from vin4 port

* RZ/G2M (r8a774a1) based HiHope main and sub-boards:
  - Initial support
  - Describe CPU capacity and topoligy
  - Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0

* RZ/G2E (r8a774c0) SoC based EK874 board:
  - Clean up CPU compatible strings
  - Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN

* tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (53 commits)
  arm64: dts: renesas: hihope-common: Remove "label" from LEDs
  arm64: dts: renesas: hihope-common: Add HDMI support
  arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
  arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
  arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
  arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
  arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
  arm64: dts: renesas: hihope-common: Add LEDs support
  arm64: dts: renesas: hihope-common: Enable USB3.0
  arm64: dts: renesas: hihope-common: Add USB 2.0 support
  arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks
  arm64: dts: renesas: r8a774a1: Add TMU device nodes
  arm64: dts: renesas: r8a774a1: Add CMT device nodes
  arm64: dts: renesas: hihope-common: Add uSD and eMMC
  arm64: dts: renesas: r8a77990: Fix register range of display node
  arm64: dts: renesas: cat874: Enable usb role switch support
  arm64: dts: renesas: cat874: Enable USB3.0 host/peripheral device node
  arm64: dts: renesas: r8a7799[05]: Point LVDS0 to its companion LVDS1
  arm64: dts: renesas: hihope-common: Add RWDT support
  arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:45:45 -07:00
Olof Johansson
8fbf1bb715 This time we only have a single patch for our command branch between
arm and arm64, a fix for the array syntax raised by our DT schemas.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXQyRegAKCRDj7w1vZxhR
 xQ7SAP9gWeCGiyq+N2lvgFUOMVUezlDcJx2IVjoJvSQcyjeD2QD/W0m+fldHe7BB
 PEv3s5BbYAYFHe+krqTPejcLK+c5hwg=
 =4UQl
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

This time we only have a single patch for our command branch between
arm and arm64, a fix for the array syntax raised by our DT schemas.

* tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sunxi: h3/h5: Fix GPIO regulator state array

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:42:05 -07:00
Olof Johansson
3264c72dcc Our usual bunch of arm64 DT changes, this time with:
- Some fixes for the DT schemas that were added during this release
   - Wifi support for the H6
   - LRADC suppport for the A64
   - Some background work on A64 boards, to enable various devices such
     as touchscreens, PMIC, audio, wifi, etc.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXQyQcQAKCRDj7w1vZxhR
 xbybAP9uAJcwix86BmYLIA3I7n1fT1oLooS+WfPL4btmqYBykAD/fK7Nn1g3alWg
 7c61AEJKDHZwObU1dNpxjvsjT+/u+Qc=
 =B/U5
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Our usual bunch of arm64 DT changes, this time with:
  - Some fixes for the DT schemas that were added during this release
  - Wifi support for the H6
  - LRADC suppport for the A64
  - Some background work on A64 boards, to enable various devices such
    as touchscreens, PMIC, audio, wifi, etc.

* tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h6: Add DMA node
  arm64: dts: allwinner: a64: Add lradc node
  dt-bindings: input: sun4i-lradc-keys: Add A64 compatible
  arm64: dts: allwinner: h6: add r_watchog node
  arm64: dts: allwinner: h6: add watchdog node
  dt-bindings: watchdog: add Allwinner H6 watchdog
  arm64: dts: allwinner: a64: Enable audio on Teres-I
  arm64: dts: allwinner: a64: bananapi-m64: Enable PMIC USB power supply
  arm64: dts: allwinner: axp803: add USB power supply node
  arm64: dts: allwinner: a64: Add pinmux for RGB666 LCD
  arm64: dts: allwinner: a64: orangepi-win: Add wifi and bluetooth nodes
  arm64: dts: allwinner: h6: add PIO VCC bank supplies for Pine H64
  arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable GT911 CTP
  arm64: dts: allwinner: a64-amarula-relic: Add GT5663 CTP node
  arm64: dts: allwinner: a64: move I2C pinctrl to dtsi

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:41:39 -07:00
Olof Johansson
750ee7858f Qualcomm ARM64 Updates for v5.3
* Switch to use second gen PON on PM8998
 * Add PSCI cupidle states for MSM8996, MSM8998,and SDM845
 * Add MSM8996 UFS phy reset controller
 * Add propre cpu capacity scaling on MSM8996
 * Fixups for APR domain, legacy clocks, and PSCI entry latency on MSM8996
 * Enable SMMUs on MSM8996
 * Add Dragonboard 845C
 * Add Q6V5, GPU, GMU, and AOSS QMP node on SDM845
 * Fixup CPU topology on SDM845
 * Change USB1 to be peripheral on SDM845 MTP
 * Add PCIe Phy, RC nodes, ANOC1 SMMU, and RPMPD node on MSM8998
 * Update coresight bindings for MSM8916
 * Update idle state names and entry-method on MSM8916
 * Add PCIe, RPMPD, LPASS, Q6, TCSR, TuringCC, PSCI cpuidle states,
   and CDSP on QCS404
 * Add reset-cells property to QCS404 GCC node
 * Fixup s3 max voltage, l3 min voltage, drive strength typo, and
   s3 supply definition on QCS404-evb
 * Fixup ADC outputs and VADC calibration on PMS405
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJdCxE1AAoJEFKiBbHx2RXV4C0P/iL1rMy36S+SNYPCQgBGwtNn
 NcgZ+3SFQpXjTKAQ7U0bnRHaEm3vQeMicD5A5sBg39XCVBvSu3/ilx0RoYnYc294
 daP41C0ux0zXq/xPAoISCdK7ifJfGMpM0w4VPTKF1jis0hVsS74wUDHvMZc0cuzU
 CA2Dsj1QMx0h6OhOgeM+J7n1kkhQnI6V1Pn7d3cFPf4jU4owsBP4HqN3X1yBvR0J
 SeGKvdfEL+hpOVANmUZWDpXKOGWpJc/njChbl/9ylIhKbgenEpuz5rAegYVg2qgZ
 E1EBJgZrLBMDPu9mE4OqngkEeP1LMQs5E3f7SGTyyLWivDGTimfKYJIb5OJVuv3x
 tvvi0jgfVGs2LEHyONFugZgRaz3MpzAO5QjYyhyfJOe33BGDew762swCA4xwIyB0
 xYkCqJCTDz/aTaa2sjH9hYMX5vTKMcvXJyL2YUfPTOL6zOfWn4kdQFmLF3cGjEp2
 qrjWe2odrc51KKFPB5v0AhAeoA6WSvh1oCGa1DypkzKw0yg0N5g9QG2iAhNwvEoA
 fH49DStRYUaXu1YohmtDBj02DlzruYB3CUMQ5KMFT/Tjpk+v1TfnVQQJjwttA4gr
 GsDkgy/njWsexwykdH3oGDBKInId2umgN5bAKBf2p70sd0Zq+JIAer4yWvhwqoSe
 0Ves83rt9vN1s5kS18KB
 =1nUY
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 Updates for v5.3

* Switch to use second gen PON on PM8998
* Add PSCI cupidle states for MSM8996, MSM8998,and SDM845
* Add MSM8996 UFS phy reset controller
* Add propre cpu capacity scaling on MSM8996
* Fixups for APR domain, legacy clocks, and PSCI entry latency on MSM8996
* Enable SMMUs on MSM8996
* Add Dragonboard 845C
* Add Q6V5, GPU, GMU, and AOSS QMP node on SDM845
* Fixup CPU topology on SDM845
* Change USB1 to be peripheral on SDM845 MTP
* Add PCIe Phy, RC nodes, ANOC1 SMMU, and RPMPD node on MSM8998
* Update coresight bindings for MSM8916
* Update idle state names and entry-method on MSM8916
* Add PCIe, RPMPD, LPASS, Q6, TCSR, TuringCC, PSCI cpuidle states,
  and CDSP on QCS404
* Add reset-cells property to QCS404 GCC node
* Fixup s3 max voltage, l3 min voltage, drive strength typo, and
  s3 supply definition on QCS404-evb
* Fixup ADC outputs and VADC calibration on PMS405

* tag 'qcom-arm64-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits)
  arm64: dts: qcom: qcs404-evb: fix vdd_apc supply
  arm64: dts: qcom: pm8998: Use qcom,pm8998-pon binding for second gen pon
  arm64: dts: qcom: msm8996: Enable SMMUs
  arm64: dts: qcom: msm8996: Correct apr-domain property
  arm64: dts: qcom: Add Dragonboard 845c
  arm64: dts: qcom: qcs404-evb: Enable PCIe
  arm64: dts: qcom: qcs404: Add PCIe related nodes
  arm64: dts: qcom: msm8998: Add PCIe PHY and RC nodes
  arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
  arm64: dts: qcom: msm8996: Stop using legacy clock names
  arm64: dts: msm8996: fix PSCI entry-latency-us
  arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states
  arm64: dts: qcom: sdm845: Add Q6V5 MSS node
  arm64: dts: qcom: Add AOSS QMP node
  arm64: dts: qcom-qcs404: Add reset-cells to GCC node
  arm64: dts: qcom-msm8916: Update coresight DT bindings
  arm64: dts: qcom: msm8998: Add rpmpd node
  arm64: dts: qcom: qcs404: Add rpmpd node
  arm64: dts: qcom: qcs404: Move lpass and q6 into soc
  arm64: dts: qcom: qcs404: Fully describe the CDSP
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:31:37 -07:00
Olof Johansson
80f7f92c16 ARM64: DT: Hisilicon SoCs DT updates for v5.3
* Hi3660 SoC and related boards:
   - Added CoreSight trace components
 
 * Hi6220 SoC and related boards:
   - Updated CoreSight funnel and replicator using new bindings to fix warning
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJdClO7AAoJEAvIV27ZiWZcHyUP/AiRfT+Z6HofsnA1G+hq+6tJ
 AMHp6cYxuyZW0Bfx/sfRUNVZL6l4go4wX3XO4KW6D7UQjXwmyenHRlfei1SEeXtl
 pTbq2WCprmElESj33ByruIPRxT8Rk3VTgjhE8rooociA+1t8+ATAwoj/zJLSXnPP
 V9MZDWKAmSBAE9uhVWo2EGORZmUJOnIl5yRjGpCdadl5ZA6epQginIPfI1HMZCtL
 LzMbt08bxTiLD9mbSeSJdTxvwMEUhCcXaC9zOyYcoLqsSwYatfK8XVFJxQjmetbt
 HDDbKY78Ya0ZXmgCsUpn/I0gzxGPhAIHyA7wi1ogf6rkP4kHy1cUtjgugMp4ZqLP
 9Jnc671o2x4OSc/2R7tZzFsCQE7ebJ9zaeQ6ZKwfyy6Tr1xaYXqmAa8m5g0AEu7+
 iwiRv6Sl6/lSvN285RFS6uuMR+gH/oQjOATlgJqOVarRkbG/wEkM+We+QZiwK5fu
 M60qsCeZfmFY7VxO9KvSxI53j6etGiAlITOF6/TV+QG8VdrlUyyfoLVcxSjTESlE
 u82+GM6iGNLRYUcqllDQ70roUSy1N5LA4nOu4LsJxc96su/tm+jdqD7BqpiKOMIX
 pfq+n3+ZYafrV2zKIS0Qf6j+4eW2NszdtSZty5LktaGNHl9zlq1+De+qjajCiMN5
 f4rrCYsEdYp8PV5VTLTg
 =GTKf
 -----END PGP SIGNATURE-----

Merge tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon SoCs DT updates for v5.3

* Hi3660 SoC and related boards:
  - Added CoreSight trace components

* Hi6220 SoC and related boards:
  - Updated CoreSight funnel and replicator using new bindings to fix warning

* tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hi3660: Add CoreSight support
  arm64: dts: hi6220: Update coresight DT bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 04:30:13 -07:00
Angus Ainslie (Purism)
01407158e4 arm64: dts: librem5: enable the SNVS power key
Enable the snvs power key.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24 10:07:00 +08:00
Angus Ainslie (Purism)
8155b786b6 arm64: dts: librem5: Limit the USB to 5V
The charge controller can handle 14V but the PTC on the devkit can only
handle 6V so limit the negotiated voltage to 5V.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24 10:06:56 +08:00
Frank Li
6ab6e92370 arm64: dts: imx8qxp: added ddr performance monitor nodes
Add ddr performance monitor

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24 09:59:30 +08:00
Shawn Guo
107529cf2e arm64: dts: imx8qxp: sort LSIO subsystem devices
We prefer to sort device nodes under simple bus in order of unit
address.  Let's sort the devices under lsio_subsys properly.

Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24 09:03:00 +08:00
Shawn Guo
74d82a3020 arm64: dts: imx8qxp: sort alias alphabetically
We prefer to sort alias entries alphabetically, so let's move serial0
to the right place.

Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24 09:00:49 +08:00
Daniel Baluta
93b2106baf arm64: dts: imx8qxp: Add lsio_mu13 node
lsio_mu13 node is used to communicate with DSP.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24 08:56:32 +08:00
Daniel Baluta
13f3b9fdef arm64: dts: imx8mm-evk: Enable audio codec wm8524
i.MX8MM has one wm8524 audio codec connected with
SAI3 digital audio interface.

This patch uses simple-card machine driver in order
to enable wm8524 codec.

We need to set:
	* SAI3 pinctrl configuration
	* codec reset gpio pinctrl configuration
	* clock hierarchy
	* codec node
	* simple-card configuration

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-23 15:35:48 +08:00
Vidya Sagar
a586c88eab arm64: tegra: Enable PCIe slots in P2972-0000 board
Enable PCIe controller nodes to enable respective PCIe slots on
P2972-0000 board. Following is the ownership of slots by different
PCIe controllers.
Controller-0 : M.2 Key-M slot
Controller-1 : On-board Marvell eSATA controller
Controller-3 : M.2 Key-E slot

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21 16:06:00 +02:00
Vidya Sagar
2602c32f15 arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
The Tegra194 SoC contains six PCIe controllers and twenty P2U instances
grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us)
and NVIDIA High Speed (NVHS-8 P2Us) respectively.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21 16:04:53 +02:00
Manikanta Maddireddy
871be845df arm64: tegra: Add PEX DPD states as pinctrl properties
Add PEX deep power down states as pinctrl properties to set in PCIe driver.
In Tegra210, BIAS pads are not in power down mode when clamps are applied.
To set the pads in DPD, pass the PEX DPD states as pinctrl properties to
PCIe driver.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21 16:04:52 +02:00
Sameer Pujar
9a182db457 arm64: tegra: Enable ACONNECT, ADMA and AGIC
Enable ACONNECT, ADMA and AGIC devices on Jetson TX2 and Jetson AGX
Xavier.

Verified driver probe path and devices get registered fine.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21 16:04:52 +02:00
Sameer Pujar
5d2249dda0 arm64: tegra: Add ACONNECT, ADMA and AGIC nodes
Add device tree nodes for the ACONNECT, ADMA and AGIC devices on
Tegra186 and Tegra194.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21 16:04:36 +02:00
Thierry Reding
541d7c4406 arm64: tegra: Sort device tree nodes alphabetically
Device tree nodes without unit-address are to be sorted alphabetically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:33:05 +02:00
Jon Hunter
434e8aedea arm64: tegra: Fix Jetson Nano GPU regulator
There are a few issues with the GPU regulator defined for Jetson Nano
which are:

1. The GPU regulator is a PWM based regulator and not a fixed voltage
   regulator.
2. The output voltages for the GPU regulator are not correct.
3. The regulator enable ramp delay is too short for the regulator and
   needs to be increased. 2ms should be sufficient.
4. This is the same regulator used on Jetson TX1 and so make the ramp
   delay and settling time the same as Jetson TX1.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: 6772cd0eac ("arm64: tegra: Add NVIDIA Jetson Nano Developer Kit support")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:18:30 +02:00
Jon Hunter
ece6031ece arm64: tegra: Update Jetson TX1 GPU regulator timings
The GPU regulator enable ramp delay for Jetson TX1 is set to 1ms which
not sufficient because the enable ramp delay has been measured to be
greater than 1ms. Furthermore, the downstream kernels released by NVIDIA
for Jetson TX1 are using a enable ramp delay 2ms and a settling delay of
160us. Update the GPU regulator enable ramp delay for Jetson TX1 to be
2ms and add a settling delay of 160us.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: 5e6b9a89af ("arm64: tegra: Add VDD_GPU regulator to Jetson TX1")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:17:03 +02:00
Jon Hunter
ba24eee668 arm64: tegra: Fix AGIC register range
The Tegra AGIC interrupt controller is an ARM GIC400 interrupt
controller. Per the ARM GIC device-tree binding, the first address
region is for the GIC distributor registers and the second address
region is for the GIC CPU interface registers. The address space for
the distributor registers is 4kB, but currently this is incorrectly
defined as 8kB for the Tegra AGIC and overlaps with the CPU interface
registers. Correct the address space for the distributor to be 4kB.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: bcdbde4335 ("arm64: tegra: Add AGIC node for Tegra210")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:17:03 +02:00
Nicolin Chen
08c7c74b09 arm64: tegra: Add INA3221 channel info for Jetson TX2
There are four INA3221 chips on the Jetson TX2 (p3310 + p2771).
And each INA3221 chip has three input channels to monitor power.

So this patch adds these 12 channels to the DT of Jetson TX2, by
following the DT binding of INA3221 and official documents from
https://developer.nvidia.com/embedded/downloads

tegra186-p3310:
https://developer.nvidia.com/embedded/dlc/jetson-tx2-series-modules-oem-product-design-guide

tegra186-p2771-0000:
http://developer.nvidia.com/embedded/dlc/jetson-tx1-tx2-developer-kit-carrier-board-spec-20180618

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:17:02 +02:00
Thierry Reding
d87764daed arm64: tegra: Enable PWM on Jetson Nano
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:17:02 +02:00
Jorge Ramirez-Ortiz
2410fd450c arm64: dts: qcom: qcs404-evb: fix vdd_apc supply
The invalid definition in the supply causes the Qualcomm's EVB-1000
and EVB-4000 not to boot.

Fix the boot issue by correctly defining the supply: vdd_s3 (namely
"vdd_apc") is actually connected to vph_pwr.

Reported-by: Niklas Cassel <niklas.cassel@linaro.org>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-19 23:50:52 -05:00
Olof Johansson
4ed7e4e578 Texas Instruments K3 SoC family changes for 5.3
- Add support for the new J721e SoC, includes basic peripherals needed for
   booting up the device
 - New peripheral support added for AM654x:
   * TI SCI irqchip
   * GPIO
   * MCU SRAM
   * R5Fs
   * MSMC RAM
   * SERDES and PCIe
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCAAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAl0KJB8QHHQta3Jpc3Rv
 QHRpLmNvbQAKCRDK+r0xeVAaEQf+D/9DkNeB2x9ktkLEdlmVv3hI3kqVTDvxz/8Q
 S8tLvhzqUmWcGbuEHteAp8Gsu/Zk9niy6bma1F+9NByewWfZUgwrvQEGp4eRgHbl
 2d+M0jwPDXzeHpWXXtThP9mXpWiSns8jIvwUovOe+sSwpCfhYQydqhIipQpMVeya
 b5qKkLgnokVHG0AtK/U6WVAdv+QqHrFkifSwwRK1B8nuU+guzuBMxwkZlFd83axG
 Y01EknIlKkDlinjL/Hv5FKxNfNeD9a19r+76KCm8CrVvymkwERxxxLdf149yv3hK
 6Nmh75tcZJpVE819SY9CQQW5huwRAfpu6Xg/h9qLleUWVG4WsguPqGP68LOGY8Cu
 AumZIQENo+5iu13L7V3R8k94JJSVbfQIyyH40LnWk89gohBA65WGGBBsXQ6wIPZ0
 1j0AxT069oG12Y1WVoiVSxBK6PnF9NzSvgk/oRLObf7HgOzSh6T3Y43ZmzD3IppA
 omLDOqkgqh2t79u4atIU7ZWCQcp7hEQynLRy3tdp8+sUJx1aGr8LgEDj8p64Q1/Q
 d+q19jOenpcMHcwSY27r1uO1ddKDxzhGhV+px/3Wdt2OyR33BTvkP67CmeoO2TpZ
 8fHXxEq+nroq2u4ciC3sbAAhYdvg1IQKkbmRFtYohbN1ezrGMwc+sGEJrkTrIBBa
 urtRfY2Hwg==
 =r10Q
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt

Texas Instruments K3 SoC family changes for 5.3

- Add support for the new J721e SoC, includes basic peripherals needed for
  booting up the device
- New peripheral support added for AM654x:
  * TI SCI irqchip
  * GPIO
  * MCU SRAM
  * R5Fs
  * MSMC RAM
  * SERDES and PCIe

* tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: (26 commits)
  arm64: dts: ti: k3-j721e: Add the MCU SRAM node
  arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain
  arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
  arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node
  arm64: defconfig: Enable TI's J721E SoC platform
  arm64: dts: ti: Add support for J721E Common Processor Board
  soc: ti: Add Support for J721E SoC config option
  arm64: dts: ti: Add Support for J721E SoC
  dt-bindings: serial: 8250_omap: Add compatible for J721E UART controller
  dt-bindings: arm: ti: Add bindings for J721E SoC
  arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
  arm64: dts: k3-am6: Add PCIe Endpoint DT node
  arm64: dts: k3-am6: Add PCIe Root Complex DT node
  arm64: dts: k3-am6: Add SERDES DT node
  arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES
  arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its
  arm64: dts: ti: k3-am65: Add MSMC RAM ranges in interconnect node
  arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes
  arm64: dts: ti: k3-am65-mcu: Add the MCU RAM node
  arm64: dts: ti: k3-am65: Add MCU SRAM ranges in interconnect nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 09:03:38 -07:00
Olof Johansson
50f5ef466d SoCFPGA DTS updates for v5.3
- Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on
   Arria10/Stratix10
 - Add the ltc2497 i2c entry on the Arria10 devkit
 - Add the EMAC OCP reset property on the Arria10
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAlz+d5oUHGRpbmd1eWVu
 QGtlcm5lbC5vcmcACgkQGZQEC4GjKPSl9g/8DvMqBsyvtoNJwqkEiZXjjBecjMBW
 rN1O226DtbhHbaDA595vZE5U/va9fx+QVVEfxIT22r31BQ9b8c7RKWtly5DD3Il/
 VIZ5JvUXmXvc/uDHDntRGbWmRbDmU8VEEjzzaGuGI5j4+dKhvy27jdRcqJLBKtdI
 9cfdDv2Tqh047FuUDs2Q7PwrhBktPEJrvnAUmpBv+BBc/eRkzOz7QaAjTVgfO85E
 WBBocEc1Zi/VjJzHGY4bGrmmf3CFriC+eO4lnuoBO+o1heNdBM97QB4cUHdfZ6/t
 UCrNzrkvksMmFOyEuJbZahQ/rRhunBSK6LyfPtLWhEMxxkJXO7DxuUuMnsBsZuR8
 64QrRKuXzrHqk18p805LQiqQupJn4WfkK3/r4qlNSD7mdFTshHOGynQ7HAJunbT9
 pplYHF7bhMjskeeOW6FipWGPFUFn1MbYOgM8weZ7I+9+TKj5H3BxYKhpt90ae5Lu
 cS1uk2bkDemSt9o6xzzb/xdBSRgzxGE5agYuUzuLwTK2SK6SlQZ/IZwwMu9GXEwh
 rA4Wjg4LliEk/LEGEcwcosB6OalCuLCIa0ywnn9WOZMOHJCBPwoWtgJyeWEvPYiD
 e1Oh/yBNOiOfnKi3bw3EvnwstTNzIaWqI12qO1BIJ1JEwSgC/rDy6P7eQQ8WMfBM
 Im7ivw8tfEj/6Ik=
 =22jl
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.3
- Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on
  Arria10/Stratix10
- Add the ltc2497 i2c entry on the Arria10 devkit
- Add the EMAC OCP reset property on the Arria10

* tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: arria10: Add EMAC OCP reset property
  ARM: dts: socfpga: add ltc2497 on arria10 devkit
  arm64: dts: stratix10: use the "altr,socfpga-stmmac-a10-s10" binding
  ARM: dts: socfpga: use the "altr,socfpga-stmmac-a10-s10" binding

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 09:00:58 -07:00
Thierry Reding
e57cf057c5 arm64: tegra: Enable CPU sleep on Jetson Nano
Jetson Nano implements CPU sleep via PSCI, much like any of the other
Tegra X1 platforms. Enable the sleep states to allow the CPU to go into
lower power states when idle.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:51:43 +02:00
Thierry Reding
8300a70e65 arm64: tegra: Add ID EEPROMs on Jetson Nano
The Jetson Nano has two ID EEPROMs, one for the module and another for
the carrier board. Add both to the device tree so that they can be read
from at runtime.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:51:42 +02:00
Thierry Reding
5205abd283 arm64: tegra: Add ID EEPROM for Jetson TX2 Developer Kit
There is an ID EEPROM on the Jetson TX2 carrier board, part of the
Jetson TX2 Developer Kit, that exposes information that can be used to
identify the carrier board. Add the device tree node so that operating
systems can access this EEPROM.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:51:40 +02:00
Thierry Reding
a4ff413b71 arm64: tegra: Add ID EEPROM for Jetson TX2 module
There is an ID EEPROM in the Jetson TX2 module that stores various bits
of information to indentify the module. Add the device tree node so that
operating systems can access this EEPROM.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:51:37 +02:00
Thierry Reding
3492d0a155 arm64: tegra: Add ID EEPROM for Jetson TX1 Developer Kit
There is an ID EEPROM on the Jetson TX1 carrier board, part of the
Jetson TX1 Developer Kit, that exposes information that can be used to
identify the carrier board. Add the device tree node so that operating
systems can access this EEPROM.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:51:34 +02:00
Thierry Reding
a5b6b67364 arm64: tegra: Add ID EEPROM for Jetson TX1 module
There is an ID EEPROM in the Jetson TX1 module that stores various bits
of information to indentify the module. Add the device tree node so that
operating systems can access this EEPROM.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:50:57 +02:00
Wanglai Shi
9500ff14c4 arm64: dts: hi3660: Add CoreSight support
This patch adds DT bindings for the CoreSight trace components
on hi3660, which is used by 96boards Hikey960.

Signed-off-by: Wanglai Shi <shiwanglai@hisilicon.com>
Reviewed-and-tested-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-06-19 15:43:31 +01:00
Leo Yan
b6f7cd7fae arm64: dts: hi6220: Update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.

Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-06-19 15:32:25 +01:00
Fabrizio Castro
f6130381e2 arm64: dts: renesas: hihope-common: Remove "label" from LEDs
Remove "label" properties from the LEDs device tree nodes, since
we don't have nice labels on the PCB.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-19 16:32:13 +02:00
Fabrizio Castro
89d6adc63f arm64: dts: renesas: hihope-common: Add HDMI support
Add HDMI support to the HiHope RZ/G2[MN] mother board common
dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-19 16:04:03 +02:00
Fabrizio Castro
8c96564235 arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
Add the HDMI encoder to the R8A774A1 DT in disabled state.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-19 15:52:02 +02:00
Olof Johansson
65004867c9 Merge tag 'juno-updates-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno updates for v5.3

Couple of updates switching to use new/updated bindings for CoreSight
dynamic funnel components and NOR flash partition type

* tag 'juno-updates-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: set the right partition type for NOR flash
  arm64: dts: juno: update coresight DT bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:36:31 -07:00
Olof Johansson
3aa45174e1 Merge tag 'arm-soc/for-5.3/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.3, please pull the following:

- Pramod adds the Device Tree nodes for thermal support on Stingray

- Srinath adds the Device Tree nodes for both XHCI (host) and BDC
  (device) modes

- Rayagonda adds the Device Tree node for slave I2C operation when
  Stingray operates as a SmartNIC

* tag 'arm-soc/for-5.3/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: Stingray: Add NIC i2c device node
  arm64: dts: Add USB DT nodes for Stingray SoC
  arm64: dts: stingray: Add Stingray Thermal DT support.

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:36:22 -07:00
Olof Johansson
3990c9918a PCIe for rockpro64, wifi+bt for Rock-PI4, spi for Rock960 family
and a fix for the yet unused isp-iommus.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlz/ZpUQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgTV7B/0XnPl7iXuZlASPd4isXVofOtVzRlASNupn
 QsFg0KUb49p6s5rmc3QZNjJ+1CLk441UW009AkE/3pd+j10lv7AHdr/NGSI6Z7P0
 4iNFFmI4SmZIkEvnmJD9HmX8Pg/cflWPEC26Mm5GlISy8kFQKqEJb6bXxjOSgAC/
 GI+SnVBM4g2MK3RcGVPGIN2mPOQt6BseFXe4BEeIq7XpT+2kBkkBuphCmv4UECLB
 az0fmRuW+fQHLqRdsvOByxQQQLYB6wiEEMQqsqUegfywACLOGgB+qE1qAt2SvQJz
 Ek8uX4s1IKFx1DQ+GgGJ7rgBKv61AODoS6SDUmUYkorDwpQmni+k
 =Nria
 -----END PGP SIGNATURE-----

Merge tag 'v5.3-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

PCIe for rockpro64, wifi+bt for Rock-PI4, spi for Rock960 family
and a fix for the yet unused isp-iommus.

* tag 'v5.3-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add WiFi+BT support on ROCK Pi4 board
  arm64: dts: rockchip: fix isp iommu clocks and power domain
  arm64: dts: rockchip: Enable SPI1 on Ficus
  arm64: dts: rockchip: Enable SPI0 and SPI4 on Rock960
  arm64: dts: rockchip: add PCIe nodes on rk3399-rockpro64

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:22:43 -07:00
Andy Gross
0763d0c227 arm64: qcom: qcs404: Add reset-cells to GCC node
This patch adds a reset-cells property to the gcc controller on the QCS404.
Without this in place, we get warnings like the following if nodes reference
a gcc reset:

arch/arm64/boot/dts/qcom/qcs404.dtsi:261.38-310.5: Warning (resets_property):
/soc@0/remoteproc@b00000: Missing property '#reset-cells' in node
/soc@0/clock-controller@1800000 or bad phandle (referred from resets[0])
  also defined at arch/arm64/boot/dts/qcom/qcs404-evb.dtsi:82.18-84.3
  DTC     arch/arm64/boot/dts/qcom/qcs404-evb-4000.dtb
arch/arm64/boot/dts/qcom/qcs404.dtsi:261.38-310.5: Warning (resets_property):
/soc@0/remoteproc@b00000: Missing property '#reset-cells' in node
/soc@0/clock-controller@1800000 or bad phandle (referred from resets[0])
  also defined at arch/arm64/boot/dts/qcom/qcs404-evb.dtsi:82.18-84.3

Signed-off-by: Andy Gross <agross@kernel.org>
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:17:54 -07:00
Baolin Wang
c311f4ff2b arm64: dts: sprd: Add Spreadtrum SD host controller support
Add one Spreadtrum SD host controller to support eMMC card for Spreadtrum
SC9860 platform.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 06:16:40 -07:00
Suman Anna
78eccc2ac9 arm64: dts: ti: k3-j721e: Add the MCU SRAM node
Add the on-chip SRAM present within the MCU domain as a mmio-sram node.
The K3 J721E SoCs have 1 MB of such memory. Any specific memory range
within this RAM needed by a driver/software module ought to be reserved
using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-06-19 11:59:49 +03:00
Lokesh Vutla
ae7d8505b1 arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain
Wakeup domain in J721E SoC has an interrupt router connected to gpio
in wakeup domain. Add DT node for this interrupt router.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-06-19 11:59:49 +03:00
Lokesh Vutla
073086fc68 arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
Main domain in J721E has the following interrupt controller instances:
- Main Domain GPIO Interrupt router connected to gpio in main domain.
- Under the Main Domain Navigator Subsystem(NAVSS)
	- Main Navss Interrupt Router connected to main navss inta and mailboxes.
	- Main Navss Interrupt Aggregator connected to main domain UDMASS

Add DT nodes for the interrupt controllers available in main domain.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-06-19 11:59:49 +03:00
Suman Anna
1463a70dfc arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node
Add the Interrupt controller node for the Interrupt Router present within
the Main NavSS module. This Interrupt Router can route 192 interrupts to
the GIC_SPI in 3 sets of 64 interrupts each. Note that the last set is
reserved for the host ID A72_3 for hypervisor usecases, so the node is
added only with 2 sets for the Linux kernel context (host id A72_2). This
is specified through the ti,sci-rm-range-girq property.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-06-19 11:59:49 +03:00