Introduction of new Atmel Cortex-A5: SAMA5D3 family.
- Modify AT91 Kconfig to plit ARMv4/5 and ARMv7 arch
- Modify PMC driver (clocks)
- Core SAMA5 support
- Board file, DT files and defconfig
* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
ARM: at91: add defconfig for SAMA5
ARM: at91: dt: add device tree files for SAMA5D3 family
ARM: at91: introduce SAMA5 support
ARM: at91: introduce the core type choice to split ARMv4/5 and ARMv7 arch
ARM: at91: add AT91_SAM9_TIME entry to select at91sam926x_time.c compilation
ARM: at91: change name template in AT91_SOC_START macro
ARM: at91: renamme rm9200 dt file
ARM: at91: rename board-dt to more specific name board-dt-sam9
ARM: at91: move non DT Kconfig to Kconfig.non_dt
Signed-off-by: Olof Johansson <olof@lixom.net>
Add defconfig for ape6evm. This is based loosely
on the kzm9g defconfig with fewer devices enabled.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables the code added to the marzen board in
"ARM: shmobile: marzen: Add GPIO LEDs".
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables the driver added in "gpio: Renesas R-Car GPIO driver V3"
Cc: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Defconfig file for SAMA5 devices. It covers the SAMA5D3 family.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add device tree files for the SAMA5D3 family (SAMA5D31, SAMA5D33, SAMA5D34 and
SAMA5D35).
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch introduces the SAMA5 support and a generic board file for SAMA5
devices. It also updates the PMC driver to manage clock division which is a
requirement since some peripherals can't work at the bus frequency on SAMA5.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As we will introduce SAMA5, we need to distinguish the core architecture. It is
useless to show ARMv4/5 entries if we are configuring a kernel for SAMA5
devices.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
No more associate at91sam926x_time.c compilation with SOC_AT91SAM9 entry since
SAMA5D3 devices will use this driver too.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
New devices are no more prefixed with at91 so remove the at91 and _name
concatenation.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Merge tag 'renesas-soc-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman <horms+renesas@verge.net.au>:
Renesas ARM-based SoC updates for v3.10
* tag 'renesas-soc-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
r8a7779: Add Display Unit clock support
ARM: shmobile: R8A7779: use gic_iid() in SATA IRQ resource
ARM: mach-shmobile: r8a7779: add SATA support
ARM: mach-shmobile: r8a7779: SATA DT configuration
ARM: shmobile: r8a7779: add Thermal support on DT
ARM: shmobile: tidyup chip series definition order for r8a7740/r8a7779
ARM: shmobile: r8a7779: use gic_iid macro
ARM: shmobile: r8a7779: fixup DT machine name
ARM: shmobile: r8a7779: fixup dtsi typo
ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID
ARM: mach-shmobile: r8a7740: Add DT names to clock list
ARM: shmobile: Remove unused hotplug.c
ARM: shmobile: Rearrange r8a7779 cpu hotplug code
ARM: shmobile: Use sh73a0-specific cpu disable code
ARM: shmobile: Update r8a7779 to use scu_power_mode()
ARM: shmobile: Update r8a7779 to check SCU for hotplug
ARM: shmobile: Use R8A7779_SCU_BASE with TWD
ARM: shmobile: Rework SH73A0_SCU_BASE IOMEM() usage
ARM: shmobile: Fix base address readout in headsmp-scu.S
ARM: shmobile: r8a7779: Remove lan from dtsi
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Enable the 128KB cache on DB8540
- Bump the number of IRQs to the correct value
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Merge tag 'ux500-core-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
From Linus Walleij <linus.walleij@linaro.org>:
Two fixes to the ux500 core machine:
- Enable the 128KB cache on DB8540
- Bump the number of IRQs to the correct value
* tag 'ux500-core-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: mach-ux500: enable 128KB way L2 cache on DB8540
ARM: ux500: bump arch nr of GPIOs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Turn on the "heartbeat" LED trigger used by Snowball
- Enable the EXT4_FS and LBDAF by default
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Merge tag 'ux500-defconfig-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
From Linus Walleij <linus.walleij@linaro.org>:
Defconfig updates for ux500:
- Turn on the "heartbeat" LED trigger used by Snowball
- Enable the EXT4_FS and LBDAF by default
* tag 'ux500-defconfig-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: enable ux500 EXT4_FS and LBDAF support by default
ARM: ux500: Turn on the 'heartbeat' LED trigger
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
atlas6.dtsi is basically a copy of prima2.dtsi as most components are
compatible with prima2 except that:
1. node of l2 cache is deleted
2. node multimedia engine is deleted
3. node of sata is deleted
4. node of sdmmc4 is deleted
5. powervr is moved to "powervr,sgx510"
6. pinctrl is moved to atlas6 as pinmux layout has big changes in
atlas6
7. clock is moved to atlas6 as clock layout has changes in atlas6
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Jiansong Chen <Jiansong.Chen@csr.com>
SiRFatlas6's machine definition is almost seem with SiRFprimaII
except that prima2 has a 256MB DMA zone.
This patch adds SiRFatlas6 machine in common board files, and
also adds atlas6 arch node in Kconfig.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
EXT4 file system and LBDAF are used commonly, should be enabled by default.
Signed-off-by: Hongbo Zhang <hongbo.zhang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The heartbeat LED trigger provides an excellent debugging tool
when hacking on development boards. Here we enable it on all
u8500 based platforms. This will pulse the User LED on the
Snowball low-cost development board only.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
DB8540 L2 was configured with 64KB way size, but it has 128KB as AP9540.
Fix this by modifying ux500_l2x0_init() to use 128KB way size for all
cpus in the x540 family.
Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Set the number of GPIOs for Ux500 to 392. Reasoning:
- Internal pinctrl "Nomadik" SoC: 288 GPIOs
- Then each Ux500 system has one or two GPIO expanders at
maximum 24 GPIOs each:
TC35892 expander: 24 GPIOs
STMPE1601 or 1801 Expander: 24 GPIOs
- Then AB8500/AB8505/AB8540: 56 GPIOs
Sum: maximum 392 GPIOs - no more no less.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
[Rename device from to rcarfb to rcar-du]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[Manual conflict resolution]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SATA support to marzen_defconfig.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Some errata for cache had not enabled on current
Armadillo800eva defconfig.
This patch enables these.
Special thanks to Ishiyama-san
Reported-by: Kiyoshi Ishiyama <kiyoshi.ishiyama.wg@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Don't enable REGULATOR_DUMMY, it is only intended for development / testing.
There doesn't seem to be any value in setting it here and doing
so was an error on my part.
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The application / library will be stopped by illegal instruction
on current Armaddilo800eva board,
since defconfig doesn't have CONFIG_NEON.
This patch enabled it.
Special thanks to Ishiyama-san
Reported-by: Kiyoshi Ishiyama <kiyoshi.ishiyama.wg@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Kiyoshi Ishiyama <kiyoshi.ishiyama.wg@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Because defconfig disabled ARM branch prediction
by CONFIG_CPU_BPREDICT_DISABLE,
Armadillo800eva's Bogomips and Loop were not good performance.
This patch enabled Arm branch prediction.
Special thanks to Ishiyama-san
Reported-by: Kiyoshi Ishiyama <kiyoshi.ishiyama.wg@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Kiyoshi Ishiyama <kiyoshi.ishiyama.wg@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The motivation for this change is:
* It is consistent with all other shmobile boards and;
* Allows the kzm9g-reference code to work with CONFIG_SMP
and thus the new defconfig
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As well as being a generally sane thing to do this
is required for MMCIF to function in conjunction with
"ARM: shmobile: switch SDHI0 to GPIO regulator on armadillo800eva".
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As well as being a generally sane thing to do this
is required for MMCIF to function in conjunction with
" ARM: shmobile: streamline mackerel SD and MMC devices".
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rename the board-rm9200-dt.c file so that we follow the pattern for
Device Tree board files: board-dt-<name of SoC sharing same core>.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: modify commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
We will produce a board-dt file per SoC core type. That will ease code
readability and will prevent from including superfluous code for supporting
machines that will never be compiled together (particularly the ARM9 and C-A5
upcoming SoCs).
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: modify commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This is the legacy platform support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Commit "ARM: shmobile: r8a7779: use gic_iid macro" switched R8A7779 platform
devices to using gic_iid() macro instead of gic_spi() but commit "ARM: mach-
shmobile: r8a7779: add SATA support" added another use of gic_spi(). Convert
the SATA IRQ resource to using gic_iid().
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SATA clock for r8a7779 SoC (for both device tree and usual cases).
Register SATA controller as a "late" platform device on r8a7779 SoC.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Allow configuration of the r8a7779 SoC SATA controller using a flattened device
tree.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
76cc188749
(thermal: rcar: add Device Tree support)
supported rcar_thermal DT probing.
rcar thermal driver doesn't support IRQ on r8a7779 chip
since it is using old design IRQ.
R-Car/R-Mobile next generation chips are using new design IRQ,
and rcar thermal driver is supporting these.
This patch adds rcar_thermal DT support for r8a7779 without IRQ.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
move r8a7740_meram_workaround() to r8a7740 area
from r8a7779 area
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID"
enabled to use gic_iid macro.
This patch exchange current GIC interrupt setting
from gic_spi() to gic_iid()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[ horms+renesas@verge.net.au: Updated git commit id in changelog ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7779 is not r8a7740 chip
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car H1 datasheet GIC number is indicating
GIC ICCIAR / interrupt ID number, not SPI number,
but current marzen board code is using gic_spi() with
un-understandable calculation.
This patch adds new gic_iid() macro which means
ICCIAR / interrupt ID, and used the number
currently written on datasheet.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[ horms+renesas@verge.net.au: Split board-marzen.c portion into a separate patch ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds temporarily the alternative device names to the clock list
that are used when booting via Device Tree setup.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Each CPU Hotplug implementation for mach-shmobile
is now self-contained, so this change removes unused
helper code in hotplug.c. The two CPU Hotplug capable
SoCs sh73a0 and r8a7779 remain unchanged.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the r8a7779 SMP code and CPU Hotplug in particular
to follow the same style as sh73a0. This means dropping
__maybe_unused for #ifdef CONFIG_HOTPLUG_CPU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Convert the sh73a0 CPU Hotplug code to use a local
implementation of ->cpu_disable(). With this change
in place the sh73a0 SMP code does no longer depend
on hotplug.c.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the SMP code for R8A7779 to make use of the
shared SCU function scu_power_mode() together with
the early setup code in shmobile_secondary_vector_scu.
With this patch in place the secondary CPUs modify the
SCU setting during early boot instead of letting other
CPUs deal with the coherency setting before boot. In
other words, we used to setup coherency before boot
in r8a7779_boot_secondary() but that bit is now instead
handled by the code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the r8a7779 CPU Hotplug code to use SCU PSR
to wait for the target CPU core. Previously the
shared code in hotplug.c was used to let cpu_kill()
wait for cpu_die(). With this change in place the
r8a7779 SMP code does not depend on hotplug.c anymore.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rework the IOMEM() usage for the SCU base address in the
case of r8a7779. Adjusts the TWD to use R8A7779_SCU_BASE.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
