Add support for CPU frequency scalling to the S3C24XX NAND driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
With CONFIG_MTD_OF_PARTS=y I'm getting this new section mismatch in reference
from the function fsl_elbc_chip_probe() to the function
.devinit.text:of_mtd_parse_partitions()
This patch fixes the mismatch by providing __devinit annotation to the
fsl_elbc_chip_probe() function.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-By: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Such a hardcoded address can cause a checkstop or machine check if
the driver is in the kernel but the address is not acknowledged.
Both drivers allow an address to be specified as either a module
parameter or config option. Any future powerpc board should either
use one of these methods or find the address in the device tree.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.
Also remove mtd->ecclayout and mtd->oobavail assignments, mtd core
handles this all by itself.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.
Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.
But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.
This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:
OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.
To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
There's no reason to prevent the Atmel NAND driver from
building as a module.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The ALE signal isn't correctly wired up to the ECC controller on the
AP7000, so it starts calculating ECC during the address cycles.
Work around this by resetting the ECC controller between the address and
data cycles.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This uses __raw_{read,write}s{b,w}() primitives to access data on NAND
chips for more efficient I/O.
On an arm926 with memory clocked at 100 MHz, this reduced the elapsed time
for a 64 MiB read by 16%. ("dd" /dev/mtd0 to /dev/null, with an 8-bit
NAND using hardware ECC and 128KiB blocksize.)
Also some minor section tweaks:
- Use platform_driver_probe() so no pointer to probe() lingers
after that code has been removed at run-time.
- Use __exit and __exit_p so the remove() code will normally be
removed by the linker.
Since these buffer read/write calls are new, this increases the runtime
code footprint (by 88 bytes on my build, after the section tweaks).
[haavard.skinnemoen@atmel.com: rebase onto atmel_nand rename]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Make the atmel_nand driver selectable on AVR32, and update the Kconfig
help text to reflect this.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This fixes several bugs in the atmel_nand_probe() error path, including
at least one memory leak.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is basically s/at91_nand/atmel_nand/g with some manual inspection.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The AT91 NAND driver needs just a few tiny modifications to work on
AVR32 as well. Rename it atmel_nand to reflect this.
Also move the ECC register definitions into drivers/mtd/nand since they
are only useful to the atmel_nand driver, and get rid of the useless
filename at the top of each file.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
No point in using an AT91-specific GPIO API when the generic API works
just as well.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
WARNING: drivers/mtd/nand/built-in.o(.devinit.text+0x114): Section mismatch
in reference from the function fsl_elbc_ctrl_probe() to the function
.devexit.text:fsl_elbc_ctrl_remove()
__devinit functions should not call functions with __devexit. Since probe
function calls remove in case of errors, we want to remove __devexit
attribute from it.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Fix nandsim build error, missing #include:
linux-next-20080605/drivers/mtd/nand/nandsim.c: In function 'divide':
linux-next-20080605/drivers/mtd/nand/nandsim.c:462: error: implicit declaration of function 'do_div'
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The changelog on the driver is superflous given this
is being kept under revision control. Remove the other
cruft in the header and update the copyright and the
supported device list.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Fix a minor problem with what should have been
debug output by changing printk() to dev_dbg()
inside s3c2410_nand_update_chip().
Thanks to David Woodhouse for pointing this out.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Once upon a time, the MTD repository was using CVS.
This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.
This also includes code that printed them to the user.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Amend nandsim so that it does not assume 32-bit flash size.
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Use at91_nand_enable(), at91_nand_disable() to manipulate enable_pin.
No functional changes.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This driver did not control NCE signal during normal operations (only
enable NCE on probing and disable NCE on removing). This patch make
NCE signal inactive on idle state.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The sam926x docs allegedly don't list an "ECC_PARITY" field, and the
header files in the upstream kernel don't have it either.
Masking with it was useless anyway, so just remove it.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is a patch to use the hardware ECC controller of
the AT91SAM9260 and AT91SAM9263 for the AT91 nand.
On AT91 NAND, there's now a choice between ECC soft,
ECC hard or no ECC (for debug).
It has been tested on AT91SAM9263 with 8 bits large
and small page NAND.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
With modern systems using bus-hold instead of bus pull-up, it can
often lead to erroneous reporting of NAND devices where there are
none. Do a double probe to ensure that the result we got the first
time is repeatable, and if it is not then return that there is no
chip there.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Add support to disable ECC checking for a given chip
when passed by the board via the platform data.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Add support for the ECC layout to be passed via the
platform data specified by the board.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
If a block's ecc field is all 0xff, then ignore the ECC
correction. This is for systems where some of the blocks,
such as the initial cramfs are written without ECC and
need to be loaded on start.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This adds support for using large page NAND devices
with the S3C24XX NAND controller. This also adds the
file Documentation/arm/Samsung-S3C24XX/NAND.txt to
describe the differences.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Commit 03680b1e00 incorrectly
was assuming S3C2410_NFCONF was being used to select the
NAND chip. Fix this error by ising the sel_reg.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Using current driver elbc sometimes hangs during nand write. Reading back
last byte helps though (thanks to Scott Wood for the idea).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch sets mtd->name to the platform bus ID in the plat_nand
driver, so that you can specify partitions readily with mtdparts=.
Currently it relies on nand_base filling in the name from the device,
which results in names like "NAND 256MiB 3,3V 8-bit", that you can't
use with cmdlineparts.
Signed-off-by: Hamish Moffatt <hamish@cloud.net.au>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Fix a race condition in fsl_elbc_run_command
Fix incorrect usage of clearbits32 that bashed option register
Remove work around for bashed register
Signed-off-by: Mike Hench <mhench@elutions.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Currently fsl_elbc_nand doesn't initialize mtd->name, and this causes
nand_get_flash_type() to assign name that is equal to chip type, like
this:
root@b1:~# cat /proc/mtd
dev: size erasesize name
mtd0: 00800000 00010000 "fe000000.flash"
mtd1: 02000000 00004000 "NAND 32MiB 3,3V 8-bit"
mtd0 is physmap_of flash (normal name), and mtd1 is fsl_elbc_nand.
Despite inconsistency, with mtd name like this specifying paritions
from the kernel command line becomes a torture (though, I didn't tried
and not sure if mtdparts= can handle spaces at all). Plus, this causes
real bugs when multiple fsl_elbc_nand chips registered.
With this patch applied fsl_elbc_nand chip will have proper name:
root@b1:~# cat /proc/mtd
dev: size erasesize name
mtd0: 00800000 00010000 "fe000000.flash"
mtd1: 02000000 00004000 "e0600000.flash"
p.s. We can't use priv->dev->bus_id as in physmap_of, because
fsl_elbc_nand pretends to be a localbus controller, so its bus_id is
"address.localbus", which is incorrect and thus will also not work
for multiple chips.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is very simple driver, NAND is connected through localbus,
and User-Programmable Machine is doing various adjustments to
speak NAND. No special efforts needed to do read and write cycles,
though to control ALE and CLE phases, we ask UPM to generate exact
pre-programmed signals on the localbus lines.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is preliminary since:
1. It supports only _one_ chip select at the moment. As there is no
existing platforms available using two chip selects of the NAND
controller, it shall really not include code for supporting the
2nd chip select for now, as such code cannot be verified.
2. It resorts to the default and simpliest memory based badblock
table
3. Only limited types of nand flash are currently supported. Most
PXA3xx processors come with on-chip NAND flash dies, so there
isn't much flexibility for other types of NAND.
4. The NAND controller should be configured to detect the device's
ID, thus making it difficult to use nand_scan_ident() to assist
the detection process (though it's not impossible)
TODO: fix all the above limitations of cuz :-)
Signed-off-by: eric miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Previously, a READ command was erroneously issued rather than SEQIN.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The part_probes[] should be static.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: Jörn Engel <joern@logfs.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Since 43cc71eed1, the platform modalias is
prefixed with "platform:". Add MODULE_ALIAS() to the hotpluggable MTD NAND
platform drivers, to re-enable auto loading.
NOTE: at91_nand for some reason disallows modular builds. I'm assuming that's
just an oversight that will be fixed.
[dbrownell@users.sourceforge.net: minor fix]
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
I found this while I was looking how the rs_lib is working. The rs_decoder is
initialized _after_ the nand core code read the BBT table and _after_ the
partition table has been added. The driver has a private BBT description
which is in located in flash data so we Ooops if there is a bit flip _or_ if a
bit flips while reading the partition table.
This patch moves the initialization of the rs_lib before the first possible
access by nand core.
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jörn Engel <joern@wh.fh-wedel.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
