SCIF and SCIFA can be plexed onto the same wires on Lager board. The
datasheet also describes the wires as SCIFA. So, to make use of the
bigger FIFOs switch to SCIFA instead.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable USB PHY device for the Lager board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a stdout-path property so that automatic console selection works
in the absence of a "console=" parameter on the kernel command line.
Note that we have to keep the "console=" parameter in chosen/bootargs,
as this DTS is shared between legacy and multi-platform.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As usual, this is the largest branch, though this time a little under
half of the total changes with 307 individual non-merge changesets.
The largest changes are the addition of new machines, in particular
the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
for the old i.MX1 platform.
Other changes include
- at91: various sam9 and sama5 updates
- exynos: much extended Peach Pi/Pit (Chromebook 2) support
- keystone: new peripherals
- meson: added DT for meson6 SoC
- mvebu: new device support for Armada 370/375
- qcom: improved support for IPQ8064 and MSM8x60
- rockchip: much improved support for rk3288
- shmobile: lots of updates all over the place
- sunxi: dts license change
- sunxi: more a23 device support
- vexpress: CLCD DT description
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, this is the largest branch, though this time a little under
half of the total changes with 307 individual non-merge changesets.
The largest changes are the addition of new machines, in particular
the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
for the old i.MX1 platform.
Other changes include
- at91: various sam9 and sama5 updates
- exynos: much extended Peach Pi/Pit (Chromebook 2) support
- keystone: new peripherals
- meson: added DT for meson6 SoC
- mvebu: new device support for Armada 370/375
- qcom: improved support for IPQ8064 and MSM8x60
- rockchip: much improved support for rk3288
- shmobile: lots of updates all over the place
- sunxi: dts license change
- sunxi: more a23 device support
- vexpress: CLCD DT description"
* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits)
ARM: DTS: meson: update DTSI to add watchdog node
ARM: dts: keystone-k2l: fix mdio io start address
ARM: dts: keystone-k2e: fix mdio io start address
ARM: dts: keystone-k2e: update usb1 node for dma properties
ARM: dts: keystone: fix io range for usb_phy0
Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt"
Revert "ARM: dts: hix5hd2: add wdg node"
ARM: dts: add rk3288 i2s controller
ARM: vexpress: Add CLCD Device Tree properties
ARM: bcm2835: add I2S pinctrl to device tree
ARM: meson: documentation: add bindings documentation
ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
ARM: dts: mt6589: Change compatible string for GIC
ARM: dts: mediatek: Add compatible property for aquaris5
ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk
ARM: dts: mt6589: Fix typo in GIC unit address
ARM: dts: Build dtb for Mediatek board
ARM: dts: keystone: fix bindings for pcie and usb clock nodes
ARM: dts: keystone: k2l: Fix chip selects for SPI devices
ARM: dts: keystone: add dsp gpio controllers nodes
...
- Device tree support for i.MX ADS and Armadeus APF9328 boards
- Enable thermal sensor support for i.MX6SL
- Add LCD support for i.MX6SL EVK board
- Fix display duplicate name for a bunch of board dts files
- Configure imx6qdl-sabresd board pins locally to remove the dependency
on bootloader
- A set of imx28-tx28 board dts updates from Lothar
- Add pci config space as platform resource
- Enable devices RTC, I2C and HDMI for nitrogen6x board
- Split HummingBoard DT to support s/dl and d/q
- mSATA and IR input support for HummingBoard
- Add SSI baud clock for i.MX6 device trees
- Add USB support for vf610-colibri and vf610-twr boards
- A set of cleanup and updates on Gateworks boards
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Merge tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "ARM: imx: device tree changes for 3.18" from Shawn Guo:
The i.MX device tree changes for 3.18:
- Device tree support for i.MX ADS and Armadeus APF9328 boards
- Enable thermal sensor support for i.MX6SL
- Add LCD support for i.MX6SL EVK board
- Fix display duplicate name for a bunch of board dts files
- Configure imx6qdl-sabresd board pins locally to remove the dependency
on bootloader
- A set of imx28-tx28 board dts updates from Lothar
- Add pci config space as platform resource
- Enable devices RTC, I2C and HDMI for nitrogen6x board
- Split HummingBoard DT to support s/dl and d/q
- mSATA and IR input support for HummingBoard
- Add SSI baud clock for i.MX6 device trees
- Add USB support for vf610-colibri and vf610-twr boards
- A set of cleanup and updates on Gateworks boards
* tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (86 commits)
ARM: dts: imx6: make gpt per clock can be from OSC
ARM: dts: imx: ventana: add canbus support for GW52xx
ARM: dts: imx: ventana: cleanup pinctrl groups
ARM: dts: imx: ventana: configure padconf for all pins
ARM: dts: imx: ventana: use gpio constants
ARM: dts: imx: ventana: remove unused aliases
ARM: dts: imx: ventana: remove unsupported dt nodes
ARM: dts: imx28-tx28: add alias for CAN XCVR regulator
ARM: dts: imx28-tx28: add spi-gpio as alternative for spi-mxs
ARM: dts: imx28-tx28: use GPIO flags
ARM: dts: imx28-tx28: remove spidev labels and add third instance of spidev
ARM: dts: imx6sl: add baud clock and clock-names for ssi
ARM: dts: imx6qdl: add baud clock and clock-names for ssi
ARM: dts: imx6qdl-sabresd: Configure the pins locally
ARM: dts: imx28-m28evk: Fix display duplicate name warning
ARM: dts: imx28-tx28: Fix display duplicate name warning
ARM: dts: imx28-m28cu: Fix display duplicate name warning
ARM: dts: imx28-cfa100: Fix display duplicate name warning
ARM: dts: imx28-apf28dev: Fix display duplicate name warning
ARM: dts: imx28-apx4devkit: Fix display duplicate name warning
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The base address of the second memory region on the lager
board is 0x140000000. Update the tag used in the dts file accordingly.
This is a documentation fix and should have no run-time affect.
This problem was introduced when the second memory region
was added to the lager dts file by 62bc32a257
("ARM: shmobile: Include all 4 GiB of memory on Lager)"
in v3.14.
Reported-by: NAOYA SHIIBA <naoya.shiiba.nx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch series updates the device tree vendor prefix for
Dialog Semiconductor.
Various methods are currently used throughout the kernel: 'diasemi',
'dialog' and 'dlg'. Others have also been suggested.
This patch set aims to consolidate the usage of the vendor prefix to
use a common standard. The prefix 'dlg' is used.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add the Lager board specific device node part for VIN1 (composite video in);
add the device node for Analog Devices ADV7180 video decoder to IIC2 bus.
Add the necessary subnodes to interconnect VIN1 and ADV7180 devices.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[Sergei: rebased, edited changelog and summary]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
No more device needs to be added from platform code when booting the
reference platform, remove the now empty r8a7790_add_dt_devices()
function completely.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On Lager board, i2c and iic cores can be interchanged since they can be
muxed to the same wires. Commit e489c2a9bc
("ARM: shmobile: lager: enable i2c devices") activated the i2c cores,
yet the iic cores should be default since they have the more interesting
features for generic use cases, i.e. SMBUS_QUICK and DMA (yet to be
supported).
Reported-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
I2C bus for VDD MPU regulator is IIC3, not I2C3.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to
them.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
[Sergei: enabled PCI0]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Due to an error when merging df40f256b18300e1 ("ARM: shmobile:
lager: add i2c1, i2c2 pins") a duplicate i2c3 node.
This patch moves the duplicate and moves to old node to
be closer to the other new i2c nodes.
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the Lager DTS to make use of the new unified legacy
memory map where the legacy window on Lager and Koelsch
have the same size.
With this change in place the code gets aligned with the
documentation.
After update the Lager board has the following map:
Bank0: 1GiB RAM (Legacy 32-bit: 0x40000000->0x7fffffff)
Bank1: 3GiB RAM (LPAE area: 0x140000000->0x1ffffffff)
Before the update the old map looked like this:
Bank0: 2GiB RAM (Legacy 32-bit: 0x40000000->0xbfffffff)
Bank1: 2GiB RAM (LPAE area: 0x180000000->0x1ffffffff)
Tested with and without LPAE on r8a7790 Lager.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Due to an error when resolving conflicts df40f256b18300e1 ("ARM: shmobile:
lager: add i2c1, i2c2 pins") added the i2c[12]_pins nodes to the wrong
node.
This patch moves them to their correct location in the pfc node.
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add pinctrl definitions for i2c1 and i2c2 busses on the Lager board
to ensure these are setup correctly at initialisation time. The i2c0
and i2c3 busses are connected to single function pins.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[horms+renesas@verge.net.au: Added shmobile to patch title]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add i2c0, i2c1, i2c2 and i2c3 nodes to the Lager reference device tree as
these busses all have devices on them that can be probed even if they
are no drivers yet.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[horms+renesas@verge.net.au: Added shmobile to title]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add needed information inside CPU0 for the generic cpufreq-cpu0 driver.
- voltage-tolerance = 1%
It reflects the tolerance for the CPU voltage defined inside the OPP
table. Due to the lack of proper OPP definition, use an arbitrary safe
value.
- clock-latency = 300 us
Approximate worst-case latency to do a full DVFS transition for every
OPPs. Due to the lack of HW information, use an arbitrary safe value.
Note: The term transition-latency will be more accurate to define this
value since the clock transition latency is not the only parameter that
will define the overall DVFS transition.
- operating-points = < kHz - uV >
List of 6 operating points. All of them are using the same voltage
since the valid Vmin voltage is not documented in the HW spec.
- clocks
phandle to the CPU clock source. This clock source is used for all the
4 CortexA15 located inside the same cluster.
Signed-off-by: Benoit Cousson <bcousson+renesas@baylibre.com>
[gaku.inami.xw@bp.renesas.com: Change the setting of OPPs for ES2.0]
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The CA15 cluster is capable of voltage scaling. Add the regulator
in the i2c3 node, to allow the generic CPUFreq driver to use it.
Enable the i2c3 pin mux and the device node as well since the
da9210 is connected to that bus.
Note: In R-CAR Gen2, each frequency is using the same voltage,
and DVS control is not used. Therefore, this patch set the
voltage(Vmin/Vmax) to 1000mv.
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
[gaku.inami.xw@bp.renesas.com: Changes Vmin for disabling DVS]
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As with previous release, this continues to be among the largest branches
we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q
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Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC devicetree updates from Olof Johansson:
"As with previous release, this continues to be among the largest
branches we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q"
* tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits)
ARM: dts: add secure firmware support for exynos5420-arndale-octa
ARM: dts: add pmu sysreg node to exynos3250
ARM: dts: correct the usb phy node in exynos5800-peach-pi
ARM: dts: correct the usb phy node in exynos5420-peach-pit
ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
ARM: dts: add dts files for exynos3250 SoC
ARM: dts: add mfc node for exynos5800
ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
ARM: dts: enable fimd for exynos5800-peach-pi
ARM: dts: enable display controller for exynos5800-peach-pi
ARM: dts: enable hdmi for exynos5800-peach-pi
ARM: dts: add dts file for exynos5800-peach-pi board
ARM: dts: add dts file for exynos5800 SoC
ARM: dts: add dts file for exynos5260-xyref5260 board
ARM: dts: add dts files for exynos5260 SoC
ARM: dts: update watchdog node name in exynos5440
ARM: dts: use key code macros on Origen and Arndale boards
ARM: dts: enable RTC and WDT nodes on Origen boards
ARM: dts: qcom: Add APQ8084-MTP board support
ARM: dts: qcom: Add APQ8084 SoC support
...
r8a7791 (R-Car M2) based Koelsch board and
r8a7790 (R-Car H1) based Lager board
* Enable SCIF0 and SCIF1 serial ports in DT
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Merge tag 'renesas-dt-scif-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
Merge "Renesas ARM Based SoC dt-scif Updates for v3.16" from Simon Horman:
r8a7791 (R-Car M2) based Koelsch board and
r8a7790 (R-Car H1) based Lager board
* Enable SCIF0 and SCIF1 serial ports in DT
* tag 'renesas-dt-scif-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: koelsch: Enable SCIF0 and SCIF1 serial ports in DT
ARM: shmobile: lager: Enable SCIF0 and SCIF1 serial ports in DT
Signed-off-by: Olof Johansson <olof@lixom.net>
SCIF0 and SCIF1 are used as debug serial ports. Enable them and
configure pinmuxing appropriately. We can now remove the clkdev
registration hack for SCIF devices from the Lager reference board file.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: updated changelog to remove references to
device renaming]
[horms+renesas@verge.net.au: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The correct binding is "micrel,led-mode", not "led-mode".
This corrects an error which was introduced when setting of ethernet PHY
LED mode was added by 82e62182d59bd1d0 ("ARM: shmobile: lager: Set ethernet
PHY LED mode").
This makes the lager code consistent with the koelsch code which was added
by ae00d12a032490b3 ("ARM: shmobile: koelsch: Set ethernet PHY LED mode").
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Lager board uses the ethernet PHY LED0 as a link signal connected to
the ethernet controller. Specify the corresponding LED mode for the PHY.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DTS gpio-keys support for SW2 on the Lager board.
This makes the DT code match the legacy board code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fix probable typo of renesas,groups in the lager dt. The kernel has no
renesas,gpios but this should match renesas,groups.
Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk>
[ben.dooks@codethink.co.uk: fixup description]
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Lager board dependent part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The DU device has no DT bindings yet, instantiate it as a platform
device for now.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: broken out of larger patch that
included board changes]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add pinctrl and SPI devices for QSPI on Lager.
Add Spansion s25fl512s SPI FLASH and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables SATA1 in Lager device tree.
SATA0 is not available on Lager since its
pinmux is fixed to USB3.0.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The external crystal frequency is 20MHz on the Lager board. Specify it
in the device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Copy the device nodes from Lager reference into the Lager device tree
file. This will allow us to use a single DTS file regarless of kernel
configuration. In case of legacy C board code the device nodes may or
may not be used, but in the multiplatform case all the DT device nodes
are used.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
of Lager system memory.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In order to allow usage of the preprocessor in the SoC device tree
sources, switch from /include/ to #include.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that Ether support has been added to the lager board
it is possible to use nfsroot. This configuration is
in line with that of other shmobile boards.
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The shmobile DT files available in the kernel are reference
implementations intended to be used as sample code, as well as for
development. As such, it makes sense to mount the root file system in
read/write mode by default.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Lager base board support making use of 2 GiB of memory,
the r8a7790 SoC with the SCIF0 serial port and CA15 with
ARM architected timer.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
