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241 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Linus Torvalds
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dd65b96492 |
ARM: new SoC support for 6.0
This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+24ACgkQmmx57+YA GNkPVw//XAC/uK7WR4oz1D1YaPPNhEvFa6hV1gjGB7Iif72SzyDJmC+36MATU/AY neQjCOLJMhxI0hpDGY9nLYe+aP1C6vD32zsjffjt/+s9em+YZZCUkRJuQ5xO3fID Uk8ZAnCIcOqX9sjXr9ChW8irlcWFbKzhgWXnPqwQmycIaE7QVz1wx32dbc64YuAK S+290U8wbj8bukr33TyZPMdYlfqNU3c1W+dCaeVsQlX1juoHEV3stmIjslRefd6X Jre22YJE41VlPufZej76nHXuVnjKf54Oi347TcbPOWNDtEAIESt3mzKy+zICBT2p v01rNBf0SogyOtSbWDPTFCAH9W9hujSOJIUOWpbOLaPdfElXxcoTBwj2e2LMoW0k ke7YR1m6FKDam5GFU9Oe98CWIiVm/GnTA5mnhhETU1QTXQ3KeZ+Z8X779YuSWPv9 kJuOPRSk9NdcfRtxZz1vpCvhv/2hBbeBuz+GZi3bisMWdvVqS3lFqVbr6kziQbJZ kE6KJH48FdL0VLVvuy+aNSF2umLT42b+5+cmQFuP2zePQgo1DEMKEtFXpZjQJbha 3iu3sHnieOFMLcbNzbqSz2im3yYNBjl1M5qoGEXaw3Rkzqiht0kMNvAa4LmAejbh E+5BIczwWNbaUKgToV1ij65O4a78Bw98m2SIS7awEZC5MW/nXYA= =7Id+ -----END PGP SIGNATURE----- Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM new SoC support from Arnd Bergmann: "This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same" * tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver ... |
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Tomer Maimon
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3670d2ec13 |
arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
This adds support for the Nuvoton NPCM8XX Board Management controller (BMC) SoC family. The NPCM8XX based quad-core Cortex-A35 ARMv8 architecture. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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26c350fe7a |
mvebu dt64 for 5.20 (part 1)
Add support for Marvell 98DX2530 (and variants) -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYtavZAAKCRALBhiOFHI7 1cppAKCTWos36VwvV+vKWV0+DfOUcikV2QCdHLcmQ0ygjT6AsW2/yPJfoNuM4b0= =7i0h -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLWsuIACgkQmmx57+YA GNlY0xAAqm4ruRmNyoCpkGOjg72+SLJlEZbhELMarHLopKMYrM4fIxyruuGmD1Cp r1uv21oZiDJhmr1sXqbtjOghNdsce3s1tKrYoWeMFgFTfDQGu4Bw7NWZZgY5xeqI aGxCdFgD9pCYaZgIXYlEqC2qLQP1eGypSTCFjgw+7JWnq57hZxsBYuQnAJhlu79g +xpRUVoTEc7duPKE2m2Vb2FhoJVaLSMC5T0ZiqekGX3wAO4JEHwSa8YFLPJ04HGg DESXMiWVUPYWrZ86vce6rtn0JWCBRRGeI3rZxsRYQ3xWYMhq27CL3E5PkQcrNwIH 29gr/Uzu2d5JlJgMSyT8bk+79eHbvhQoX/Daossk3DvHCOfRjv3/POdYqfaoWGAd nq3W5oxW4X+8eXP/zY7p4o7i/y03j0/VtbgtCUEOk3OkL5idqQxXeJTnr1XSPdm4 NnAAhB1xTZ8o3v8ohMAIuNvdFbJ3Mq0o+xuYPRVSJwLPgnXfpQfWMdI9Ag4eK7MI 1wkV9g8SFwqvd/vZyI+6jYYo8FPkc0JYvs88cAMXy1Tjw6ywRKprUlBrM2My9tre Ta3b2W1JUHYrniQoet+Z0GKg5xOtjkS9K9n4P3/ilq8zNYCURSaJCGmdOLwQw4Zs ZB7/PFQcLRVMBEJ913RefxcJG5ShnOiwrLtYIsB1wI0SRn3VAMw= =FqlL -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt64 for 5.20 (part 1) Add support for Marvell 98DX2530 (and variants) * tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: marvell: enable the 98DX2530 pinctrl driver arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board dt-bindings: marvell: Document the AC5/AC5X compatibles Link: https://lore.kernel.org/r/87cze1qlg3.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Chris Packham
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8225663e0c |
arm64: marvell: enable the 98DX2530 pinctrl driver
This commit makes sure the drivers for the 98DX2530 pin controller is enabled. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> |
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Arnd Bergmann
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2c071ce53d |
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.20, second part, please pull the following: - Rafal adds basic support for the BCM4912-based router Asus GT-AX6000, he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle we can remove ARCH_BCM4908 and continue to have make oldconfig work. Finally he spells out what BCA means to make it clearer -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLR5GMACgkQh9CWnEQH BwTQCxAAxaALuW5N/uso6vj64Zc/sLkrWupmjcz0ta57lnRus2K7CjpEGbiYEvU9 BXj4o9jNWpugCp5MwMzRSnQCC6AcrrS7vV3aLblxVwP4Dqlvb3h1i1N8qGzVJKVC vurbroIcCjqSx9J0i/bhD+X5Jyc0WYgwJajxSTU3so9YpD0asUHN/sOrz8t/LgW+ NmUwr3toe7WpvylV5eRPyqKGUWDZYhg0qePaKZJ6jgM9cQqlwIWzguWdCn6YEHZe 9EqQZjqstyq57EwNXfPOf8Ytb2/lp2j9/1NCBaJ6TFEUEruGWgHFh2m8mV0juEKG 3y0lnsh5GXhshvT6+kUKzXY1MwzHagAPv1ax0To1Zc5rsgKMIuo11We3XDVlu326 NHUXqQSoubBf5PE4jmmrpN3ay0ouXMSo0PjNZzSvS3TAWz76+q6WU4bgqvEf+vNE 5XOhAATbWY+Zpt/m9Xv0l1pP2UzdENF+lpi5T9XAnygA3N0cMB3uhxAUmGHVekIJ 4OPS2w2M0N2C43icb188o0GiswnzVZTw46SSY0gTEU6FQD3YplMtztbrK3Lr6F8q 13C/aoXY/+xgeMnsFD4Te1JfdHEknzhNT7mkOsYYKDZJGhlrShHnrRXze3QDkn18 OAkg7v+z4lkt2h7Xckoo9vVqJKrYE1582H5QmPOKQKzk0pIecFM= =fDSG -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLTFe0ACgkQmmx57+YA GNk0pBAAge+TlunaSMIGcYrh3q0If3krLoWyecACCA1TDP5K8PkEKrPok+u1rusl OeL6s/nL0uIdGEIU+6scGav/ZSFYr20vtstnyP2WmwQQUt3oEeqMfE1Ch/kCNL/K WhgwvNQA9GcvQphHSrwfZY2kHLkPUGgFA9cleaEghjuqs0kP46OABaRNIUZVRHMZ dp7SzzY/55TmxQQiYD6raAI8U0kxAaPxzqo+4sBcvNyccKfrAZP9WGyTsTmyn6uV IN+sAwsMS1WGAgXL0zQWAxEVxNdvbnt8q9+/tBzIIeZZYdeA0B/m5ZJ3DUaa8/kY zfH5UM8kNKUQx2cwdTNYiUT7YGdbZ+9iUCbiSUt9ELK0LMl1Rhu7i4wPA+K7/8Kn 10o+6kjj75kYjA3fm3wntFgtmTZLPRqpz5AQf4+XwdQ8QkiXNNCglYCUnEf9cvaQ ThFyIFfadOB2uCEJ+59kg7v8cQNLZffrNGqks0mD9/MDbRD3kMEZYrwMaGrxeeSz 3HVANUWXLoM0wyI7lC+vLwYgbGwtcglOEprtfPA9MvSUTfJPyZ7bYOnX0zBCwdLX tN1g/gIbYkQ80t/ce+HQc4sfxPgkk8W5D8eTy+t50BReEguJ39AVKByxVZLLnW/h ZwmwRrqSKD9d2Ps69K7z4nMJAEO/5mqbDw8++U18eqhDUJK+8Kw= =7JrY -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.20, second part, please pull the following: - Rafal adds basic support for the BCM4912-based router Asus GT-AX6000, he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle we can remove ARCH_BCM4908 and continue to have make oldconfig work. Finally he spells out what BCA means to make it clearer * tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Include full family name in Kconfig arm64: make ARCH_BCM4908 select ARCH_BCMBCA arm64: dts: Add base DTS file for bcmbca device Asus GT-AX6000 Link: https://lore.kernel.org/r/20220715221642.297536-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Rafał Miłecki
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746ef3ac89 |
arm64: bcmbca: Include full family name in Kconfig
Spell out the BCA acronym to explain where these chips are coming from. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220713145340.10599-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Rafał Miłecki
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32d3da7d2f |
arm64: make ARCH_BCM4908 select ARCH_BCMBCA
BCA is a big set / family of devices sharing multiple hardware blocks. It covers BCM4908, BCM63xx, BCM68xx devices and more. Most of drivers that depend on ARCH_BCM4908 should actually depend on ARCH_BCMBCA. To make such transition easier, cleaner and breakage-free add a proper "select". Later on - if we decide to keep ARCH_BCM4908 - it may be moved under ARCH_BCMBCA menu. Keeping it may be helpful for limited compiling of DTS files and "default" Kconfig entires. Or we may just decide to drop it. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: William Zhang <william.zhang@broadcom.com> Acked-by: Kursad Oney <kursad.oney@broadcom.com> Link: https://lore.kernel.org/r/20220714045858.7786-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Arnd Bergmann
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92c336e7ae |
This pull request contains Broadcom ARM64-based SocS Device Tree
updates for 5.20, please pull the following: - William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit counter part and adds basic support for these DSL/PON SoCs: 63158, 4912, 63146, 6856, 6813 - Anand adds basic support for the 6858 SoC - Krzysztof fixes a missing space between a property name and its value in a number of DTS files -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLMT6AACgkQh9CWnEQH BwSmXhAAstUebP+FxQFCnCmrcpBktlXcPpAMDmTxgwKGQrHmITdAhvfK+eHpWsPo 9uBs1BdlHjyN/gC2p/o7S01WjI7j/Qodw106vgfhzIYuPbJUl/LVzYcubn1nhJvS fUvEh57Dw1jrqECy0nhUFltNf+C2Tw2R1Ug1BR2+K4ekLwU7Lmy6/4ugxbS1jSIH pWTqXNyTwzboYM4js5gPhPKTIrQHgYUd1YxFeExlG3LiLTI3WdnFwvsnHqFbmdHV 85UDR9Jic/tmWS7Egs7fqcxkHadWqSrgOE/79WKiWs/e+V8IxB4JfanEa6ltnZ6a JXiKPNryeZuhW0+LtqBgzU5I7DczH9zHVuBjaLvaLSGENf/bz9dhks9A1gQF/nkB ZgbtrMJJVHRXyGFovX7cjqtvVKSX4WUa/In2OKw8RJ51NKo5IWVnbn+R/4hA/6Tg kAYMeGLKggqeI4i77H6CXwgJTBJkidSEzw6zKJqALEPHT3nI+AqWUGN0DlFbQkko yd8Wte0cFXZ6/U3as7Ie159SoHj1k9R9XORhIOUKmoN11M7n+072h2VOQNsbVeni KiT7CVqy2FVL8HeCnAkJVNRbl+pBowtksJAUMl0zIzYpN9eGIelQJDIUXQxfXl29 Fvua4XALaIiNDWa9C+mX3DzB/UFGpYiQIutv2xVuHUH/VX8fshc= =WeA3 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQOQMACgkQmmx57+YA GNmi0w/+N7ZE7JF2Qmlf9EDmy/rq4vfZz7ZJ4pCT30pUtC16GGbbynsKWnYB7bb0 jeXxrytfr+yFZY7P8R83GkIpkBBpbhUlSWCi5W1VTQVaZLC5KZWZtPZymt4YD8KV zrIBVBX1ZxFNCOSMh5rP6ByrbJiuiQQ2DQiPgHDZMxFH8xUPKDvAOVR8JPhtlo6Q YtQgKA4zHXDkPQied4Je/NYfrh9xyLuskDmlBZ0OYvqp3XLLCBAlNKghH0bHSvt/ KW1AvQtacfI2STD2gGWlGktUJr9ff0Qhxe2DsDauhANShNSVGlFrtqJXxFDf79ly amlqhXtZI2I2osyukm4PK3Ys1smDnBmNY7nbctCAXUTtcsKI/VUqAud79++U5xcD +BrGrZ58KcLLJTcktxszdHvvP7P92B02jhPx2Oeqe0I59hbeXO1ozglBWw0VjJj1 Iar5p+SDo6k6F7t2pjLWg4hjtljIYn8RX6yKX6xisNBKioxAxv5HAYjN0IrENCrY ZXnOMpnDhnnomY4WsEEw9KOutZ1aXDphCfJs22wPyhH0cpsM4dtD+BnR2NmWnko8 h20M3b0xQui9P1N7iDNheAjuXJbOapu/D7R80NhCo9fWKILFaRI/YBkNSkc2juUT e5fMRqLpSzoRswa12PBnbZgZcPQop7DKq3rv8cGL9jR0OTqL2nU= =9IyI -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SocS Device Tree updates for 5.20, please pull the following: - William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit counter part and adds basic support for these DSL/PON SoCs: 63158, 4912, 63146, 6856, 6813 - Anand adds basic support for the 6858 SoC - Krzysztof fixes a missing space between a property name and its value in a number of DTS files * tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: Add DTS files for bcmbca SoC BCM6813 arm64: dts: Add DTS files for bcmbca SoC BCM6856 arm64: dts: Add DTS files for bcmbca SoC BCM63146 arm64: dts: broadcom: adjust whitespace around '=' ARM64: dts: Add DTS files for bcmbca SoC BCM6858 arm64: dts: Add DTS files for bcmbca SoC BCM4912 arm64: dts: Add DTS files for bcmbca SoC BCM63158 arm64: bcmbca: add arch bcmbca machine entry Link: https://lore.kernel.org/r/20220711164451.3542127-5-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Teh Wen Ping
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2b59af8cd4 |
arm64: dts: Add support for Stratix 10 Software Virtual Platform
Add Stratix 10 Software Virtual Platform device tree Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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William Zhang
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fdcd652ce2 |
arm64: bcmbca: add arch bcmbca machine entry
Add ARCH_BCMBCA config for Broadcom Broadband SoC chipsets Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Linus Torvalds
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143a6252e1 |
arm64 updates for 5.19:
- Initial support for the ARMv9 Scalable Matrix Extension (SME). SME takes the approach used for vectors in SVE and extends this to provide architectural support for matrix operations. No KVM support yet, SME is disabled in guests. - Support for crashkernel reservations above ZONE_DMA via the 'crashkernel=X,high' command line option. - btrfs search_ioctl() fix for live-lock with sub-page faults. - arm64 perf updates: support for the Hisilicon "CPA" PMU for monitoring coherent I/O traffic, support for Arm's CMN-650 and CMN-700 interconnect PMUs, minor driver fixes, kerneldoc cleanup. - Kselftest updates for SME, BTI, MTE. - Automatic generation of the system register macros from a 'sysreg' file describing the register bitfields. - Update the type of the function argument holding the ESR_ELx register value to unsigned long to match the architecture register size (originally 32-bit but extended since ARMv8.0). - stacktrace cleanups. - ftrace cleanups. - Miscellaneous updates, most notably: arm64-specific huge_ptep_get(), avoid executable mappings in kexec/hibernate code, drop TLB flushing from get_clear_flush() (and rename it to get_clear_contig()), ARCH_NR_GPIO bumped to 2048 for ARCH_APPLE. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmKH19IACgkQa9axLQDI XvEFWg//bf0p6zjeNaOJmBbyVFsXsVyYiEaLUpFPUs3oB+81s2YZ+9i1rgMrNCft EIDQ9+/HgScKxJxnzWf68heMdcBDbk76VJtLALExbge6owFsjByQDyfb/b3v/bLd ezAcGzc6G5/FlI1IP7ct4Z9MnQry4v5AG8lMNAHjnf6GlBS/tYNAqpmj8HpQfgRQ ZbhfZ8Ayu3TRSLWL39NHVevpmxQm/bGcpP3Q9TtjUqg0r1FQ5sK/LCqOksueIAzT UOgUVYWSFwTpLEqbYitVqgERQp9LiLoK5RmNYCIEydfGM7+qmgoxofSq5e2hQtH2 SZM1XilzsZctRbBbhMit1qDBqMlr/XAy/R5FO0GauETVKTaBhgtj6mZGyeC9nU/+ RGDljaArbrOzRwMtSuXF+Fp6uVo5spyRn1m8UT/k19lUTdrV9z6EX5Fzuc4Mnhed oz4iokbl/n8pDObXKauQspPA46QpxUYhrAs10B/ELc3yyp/Qj3jOfzYHKDNFCUOq HC9mU+YiO9g2TbYgCrrFM6Dah2E8fU6/cR0ZPMeMgWK4tKa+6JMEINYEwak9e7M+ 8lZnvu3ntxiJLN+PrPkiPyG+XBh2sux1UfvNQ+nw4Oi9xaydeX7PCbQVWmzTFmHD q7UPQ8220e2JNCha9pULS8cxDLxiSksce06DQrGXwnHc1Ir7T04= =0DjE -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - Initial support for the ARMv9 Scalable Matrix Extension (SME). SME takes the approach used for vectors in SVE and extends this to provide architectural support for matrix operations. No KVM support yet, SME is disabled in guests. - Support for crashkernel reservations above ZONE_DMA via the 'crashkernel=X,high' command line option. - btrfs search_ioctl() fix for live-lock with sub-page faults. - arm64 perf updates: support for the Hisilicon "CPA" PMU for monitoring coherent I/O traffic, support for Arm's CMN-650 and CMN-700 interconnect PMUs, minor driver fixes, kerneldoc cleanup. - Kselftest updates for SME, BTI, MTE. - Automatic generation of the system register macros from a 'sysreg' file describing the register bitfields. - Update the type of the function argument holding the ESR_ELx register value to unsigned long to match the architecture register size (originally 32-bit but extended since ARMv8.0). - stacktrace cleanups. - ftrace cleanups. - Miscellaneous updates, most notably: arm64-specific huge_ptep_get(), avoid executable mappings in kexec/hibernate code, drop TLB flushing from get_clear_flush() (and rename it to get_clear_contig()), ARCH_NR_GPIO bumped to 2048 for ARCH_APPLE. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (145 commits) arm64/sysreg: Generate definitions for FAR_ELx arm64/sysreg: Generate definitions for DACR32_EL2 arm64/sysreg: Generate definitions for CSSELR_EL1 arm64/sysreg: Generate definitions for CPACR_ELx arm64/sysreg: Generate definitions for CONTEXTIDR_ELx arm64/sysreg: Generate definitions for CLIDR_EL1 arm64/sve: Move sve_free() into SVE code section arm64: Kconfig.platforms: Add comments arm64: Kconfig: Fix indentation and add comments arm64: mm: avoid writable executable mappings in kexec/hibernate code arm64: lds: move special code sections out of kernel exec segment arm64/hugetlb: Implement arm64 specific huge_ptep_get() arm64/hugetlb: Use ptep_get() to get the pte value of a huge page arm64: kdump: Do not allocate crash low memory if not needed arm64/sve: Generate ZCR definitions arm64/sme: Generate defintions for SVCR arm64/sme: Generate SMPRI_EL1 definitions arm64/sme: Automatically generate SMPRIMAP_EL2 definitions arm64/sme: Automatically generate SMIDR_EL1 defines arm64/sme: Automatically generate defines for SMCR ... |
||
Juerg Haefliger
|
aea3cb356c |
arm64: Kconfig.platforms: Add comments
Add trailing comments to endmenu statements for better readability. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Link: https://lore.kernel.org/r/20220517141648.331976-3-juergh@canonical.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
||
Samuel Holland
|
d421fd6d1f |
irqchip: Add Kconfig symbols for sunxi drivers
Not all of these drivers are needed on every ARCH_SUNXI platform. In particular, the ARCH_SUNXI symbol will be reused for the Allwinner D1, a RISC-V SoC which contains none of these irqchips. Introduce Kconfig symbols so we can select only the drivers actually used by a particular set of platforms. This also lets us move the irqchip driver dependencies to a more appropriate location. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220509034941.30704-1-samuel@sholland.org |
||
Daniel Thompson
|
4efc851c36 |
irqchip/exiu: Fix acknowledgment of edge triggered interrupts
Currently the EXIU uses the fasteoi interrupt flow that is configured by
it's parent (irq-gic-v3.c). With this flow the only chance to clear the
interrupt request happens during .irq_eoi() and (obviously) this happens
after the interrupt handler has run. EXIU requires edge triggered
interrupts to be acked prior to interrupt handling. Without this we
risk incorrect interrupt dismissal when a new interrupt is delivered
after the handler reads and acknowledges the peripheral but before the
irq_eoi() takes place.
Fix this by clearing the interrupt request from .irq_ack() if we are
configured for edge triggered interrupts. This requires adopting the
fasteoi-ack flow instead of the fasteoi to ensure the ack gets called.
These changes have been tested using the power button on a
Developerbox/SC2A11 combined with some hackery in gpio-keys so I can
play with the different trigger mode [and an mdelay(500) so I can
can check what happens on a double click in both modes].
Fixes:
|
||
|
Linus Torvalds
|
ed4643521e |
ARM: DT updates for 5.18
After a somewhat quiet 5.17 release, the size of the DT changes
is a bit larger again. There are nine new SoC that get added,
all of them related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
LG Nexus 5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
along with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added all
over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)
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Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"After a somewhat quiet 5.17 release, the size of the DT changes is a
bit larger again. There are nine new SoC that get added, all of them
related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added
all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic:
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno:
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar:
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)"
* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
arm64: dts: n5x: drop invalid property and fix edac node name
arm64: dts: fsd: Add the MCT support
arm64: dts: stingray: Fix spi clock name
arm64: dts: ns2: Fix spi clock name
ARM: dts: rockchip: Update regulator name for PX3
ARM: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
ARM: dts: at91: sama7g5: Add NAND support
ARM: dts: at91: sama7g5: add eic node
ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
arm64: dts: lg: align pl330 node name with dtschema
arm64: dts: lg: add dma-cells to pl330 node
arm64: dts: juno: align pl330 node name with dtschema
arm64: dts: broadcom: Fix sata nodename
arm64: dts: n5x: add sdr edac support
arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
dt-bindings: usb: dwc2: add disable-over-current
...
|
||
Geert Uytterhoeven
|
1830947ee4
|
arm64: Remove ARCH_VULCAN
Commit |
||
Alim Akhtar
|
18b1db6a16 |
arm64: dts: fsd: Add initial device tree support
Add initial device tree support for "Full Self-Driving" (FSD) SoC This SoC contain three clusters of four cortex-a72 CPUs and various peripheral IPs. Cc: linux-fsd@tesla.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Arjun K V <arjun.kv@samsung.com> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Sriranjani P <sriranjani.p@samsung.com> Signed-off-by: Chandrasekar R <rcsekar@samsung.com> Signed-off-by: Shashank Prashar <s.prashar@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220124141644.71052-15-alim.akhtar@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
||
|
Linus Torvalds
|
1135ec008e |
ARM: SoC updates for v5.17
These are all minor bug fixes and cleanups to code in arch/arm and
arch/arm64 that is specific to one SoC, updating Kconfig symbols,
the MAINTAINERS file, and removing some dead code.
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Merge tag 'soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"These are all minor bug fixes and cleanups to code in arch/arm and
arch/arm64 that is specific to one SoC, updating Kconfig symbols, the
MAINTAINERS file, and removing some dead code"
* tag 'soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: exynos: Enable Exynos Multi-Core Timer driver
ARM: ixp4xx: remove unused header file pata_ixp4xx_cf.h
ARM: ixp4xx: remove dead configs CPU_IXP43X and CPU_IXP46X
MAINTAINERS: Add Florian as BCM5301X and BCM53573 maintainer
ARM: samsung: Remove HAVE_S3C2410_I2C and use direct dependencies
ARM: imx: rename DEBUG_IMX21_IMX27_UART to DEBUG_IMX27_UART
ARM: imx: remove dead left-over from i.MX{27,31,35} removal
ARM: s3c: add one more "fallthrough" statement in Jive
ARM: s3c: include header for prototype of s3c2410_modify_misccr
ARM: shmobile: rcar-gen2: Add missing of_node_put()
|
||
Marek Szyprowski
|
ce96a96468 |
arm64: exynos: Enable Exynos Multi-Core Timer driver
Some ARM64 Exynos SoCs have MCT timer block, e.g. Exynos850 and
Exynos5433. CLKSRC_EXYNOS_MCT option is not visible unless COMPILE_TEST
is enabled. Select CLKSRC_EXYNOS_MCT option for ARM64 ARCH_EXYNOS like
it's done in arch/arm/mach-exynos/Kconfig, to enable MCT timer support
for ARM64 Exynos SoCs.
Even though ARM architected timer is available on all ARM64 SoCs, and
used for managing timer hardware and clock source events, MCT timer
still can be used as a wakeup source, as stated in commitae460fd9164b
("clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64").
It's also nice to be able to test available MCT IP-core.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211101193531.15078-3-semen.protsenko@linaro.org
Link: https://lore.kernel.org/r/20211220165004.17005-2-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
Jerome Brunet
|
5ad77b1272 |
arm64: meson: remove COMMON_CLK
This reverts commit aea7a80ad5effd48f44a7a08c3903168be038a43. Selecting COMMON_CLK is not necessary, it is already selected by CONFIG_ARM64 Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210609202009.1424879-1-jbrunet@baylibre.com |
||
|
Linus Torvalds
|
d461e96cd2 |
ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There
are a couple of subsystems with individual maintainers picking up
their patches here:
- The reset controller subsystem add support for a few new SoC
variants to existing drivers, along with other minor improvements
- The OP-TEE subsystem gets a driver for the ARM FF-A transport
- The memory controller subsystem has improvements for Tegra,
Mediatek, Renesas, Freescale and Broadcom specific drivers.
- The tegra cpuidle driver changes get merged through this
tree this time. There are only minor changes, but they depend
on other tegra driver updates here.
- The ep93xx platform finally moves to using the drivers/clk/
subsystem, moving the code out of arch/arm in the process.
This depends on a small sound driver change that is included
here as well.
- There are some minor updates for Qualcomm and Tegra specific
firmware drivers.
The other driver updates are mainly for drivers/soc, which contains
a mixture of vendor specific drivers that don't really fit elsewhere:
- Mediatek drivers gain more support for MT8192, with new support for
hw-mutex and mmsys routing, plus support for reset lines in the
mmsys driver.
- Qualcomm gains a new "sleep stats" driver, and support for
the "Generic Packet Router" in the APR driver.
- There is a new user interface for routing the UARTS on ASpeed
BMCs, something that apparently nobody else has needed so far.
- More drivers can now be built as loadable modules, in particular
for Broadcom and Samsung platforms.
- Lots of improvements to the TI sysc driver for better suspend/resume
support
Finally, there are lots of minor cleanups and new device IDs for
amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape,
allwinner, broadcom, and omap.
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Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are all the driver updates for SoC specific drivers. There are a
couple of subsystems with individual maintainers picking up their
patches here:
- The reset controller subsystem add support for a few new SoC
variants to existing drivers, along with other minor improvements
- The OP-TEE subsystem gets a driver for the ARM FF-A transport
- The memory controller subsystem has improvements for Tegra,
Mediatek, Renesas, Freescale and Broadcom specific drivers.
- The tegra cpuidle driver changes get merged through this tree this
time. There are only minor changes, but they depend on other tegra
driver updates here.
- The ep93xx platform finally moves to using the drivers/clk/
subsystem, moving the code out of arch/arm in the process. This
depends on a small sound driver change that is included here as
well.
- There are some minor updates for Qualcomm and Tegra specific
firmware drivers.
The other driver updates are mainly for drivers/soc, which contains a
mixture of vendor specific drivers that don't really fit elsewhere:
- Mediatek drivers gain more support for MT8192, with new support for
hw-mutex and mmsys routing, plus support for reset lines in the
mmsys driver.
- Qualcomm gains a new "sleep stats" driver, and support for the
"Generic Packet Router" in the APR driver.
- There is a new user interface for routing the UARTS on ASpeed BMCs,
something that apparently nobody else has needed so far.
- More drivers can now be built as loadable modules, in particular
for Broadcom and Samsung platforms.
- Lots of improvements to the TI sysc driver for better
suspend/resume support"
Finally, there are lots of minor cleanups and new device IDs for
amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
layerscape, allwinner, broadcom, and omap"
* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
optee: Fix spelling mistake "reclain" -> "reclaim"
Revert "firmware: qcom: scm: Add support for MC boot address API"
qcom: spm: allow compile-testing
firmware: arm_ffa: Remove unused 'compat_version' variable
soc: samsung: exynos-chipid: add exynosautov9 SoC support
firmware: qcom: scm: Don't break compile test on non-ARM platforms
soc: qcom: smp2p: Add of_node_put() before goto
soc: qcom: apr: Add of_node_put() before return
soc: qcom: qcom_stats: Fix client votes offset
soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
firmware: qcom: scm: Add support for MC boot address API
soc: qcom: spm: Add 8916 SPM register data
dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
soc: qcom: socinfo: Add PM8150C and SMB2351 models
firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
soc: aspeed: Add UART routing support
soc: fsl: dpio: rename the enqueue descriptor variable
soc: fsl: dpio: use an explicit NULL instead of 0
...
|
||
Florian Fainelli
|
9db71e8966 |
arm64: broadcom: Removed forced select of interrupt controllers
Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211020184859.2705451-12-f.fainelli@gmail.com |
||
Neil Armstrong
|
dfd8c90eb2 |
arm64: meson: remove MESON_IRQ_GPIO selection
Selecting MESON_IRQ_GPIO forces it as built-in, but we may need to build it as a module, thus remove it here and let the "default ARCH_MESON" build as built-in by default with the option to switch it to module. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210902134914.176986-3-narmstrong@baylibre.com |
||
Will McVicker
|
d96890fca9 |
rtc: s3c: remove HAVE_S3C_RTC in favor of direct dependencies
The config HAVE_S3C_RTC is not really needed since we can simply just add the dependencies directly to RTC_DRV_S3C. Also, one less config to keep track of! Signed-off-by: Will McVicker <willmcvicker@google.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20211013212256.3425889-1-willmcvicker@google.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
||
|
Will McVicker
|
6ad4185220 |
arm64: exynos: don't have ARCH_EXYNOS select EXYNOS_CHIPID
Now that EXYNOS_CHIPID can be a module and is enabled by default via ARCH_EXYNOS, we don't need to have ARCH_EXYNOS directly select it. So remove that. Signed-off-by: Will McVicker <willmcvicker@google.com> Link: https://lore.kernel.org/r/20210928235635.1348330-2-willmcvicker@google.com [krzysztof: the driver is not essential to boot and on ARMv7 it is also allowed to disable it] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
||
Olof Johansson
|
42accadb32
|
Merge branch 'arm/fixes' into arm/soc
Merging in the last batch of fixes that didn't go in before previous release, just a few smaller DT fixups and a MAINTAINERS update * arm/fixes: (29 commits) MAINTAINERS: Add myself as TEE subsystem reviewer ARM: dts: ux500: Fix LED probing arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory arm64: dts: allwinner: a64-sopine-baseboard: change RGMII mode to TXID arm64: meson: select COMMON_CLK soc: amlogic: meson-clk-measure: remove redundant dev_err call in meson_msr_probe() ARM: dts: qcom: sdx55-telit: Represent secure-regions as 64-bit elements ARM: dts: qcom: sdx55-t55: Represent secure-regions as 64-bit elements ARM: dts: sun8i: h3: orangepi-plus: Fix ethernet phy-mode ARM: dts: imx: emcon-avari: Fix nxp,pca8574 #gpio-cells ARM: dts: imx7d-pico: Fix the 'tuning-step' property ARM: dts: imx7d-meerkat96: Fix the 'tuning-step' property arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage arm64: dts: freescale: sl28: var4: fix RGMII clock and voltage ARM: imx: pm-imx27: Include "common.h" arm64: dts: zii-ultra: fix 12V_MAIN voltage arm64: dts: zii-ultra: remove second GEN_3V3 regulator instance arm64: dts: ls1028a: fix memory node optee: use export_uuid() to copy client UUID arm64: dts: ti: k3*: Introduce reg definition for interrupt routers ... |
||
|
Jerome Brunet
|
4cce442ffe |
arm64: meson: select COMMON_CLK
This fix the recent removal of clock drivers selection.
While it is not necessary to select the clock drivers themselves, we need
to select a proper implementation of the clock API, which for the meson, is
CCF
Fixes:
|
||
|
Samuel Holland
|
cbccad6649
|
arm64: sunxi: Build the sun4i timer driver
While the ARM architectural timer is generatlly the best timer to use, a non-c3stop timer is needed for cpuidle. Build the "sun4i" timer driver so it can be used for this purpose. It is present on all 64-bit sunxi SoCs. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210322044707.19479-6-samuel@sholland.org |
||
|
Linus Torvalds
|
65ec0a7d24 |
This is the bulk of the pin control changes for the v5.13 kernel cycle
Core changes:
- A semantic change to handle pinmux and pinconf in explicit order
while up until now we depended on the semantic order in the
device tree. The device tree is a functional programming
language and does not imply any order, so the right thing is
for the pin control core to provide these semantics.
- Add a new pinmux-select debugfs file which makes it possible to
go in and select functions for a pin manually (iteratively, at
the prompt) for debugging purposes.
- Fixes to gpio regmap handling for a new pin control driver
making use of regmap-gpio.
- Use octal permissions on debugfs files.
New drivers:
- A massive rewrite of the former custom pin control driver for
MIPS Broadcom devices to instead use the pin control subsystem.
New pin control drivers for BCM6345, BCM6328, BCM6358, BCM6362,
BCM6368, BCM63268 and BCM6318 SoC variants are implemented.
- Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B in the Qualcomm PMIC GPIO driver. Also the two GPIOs
on PM8008 are supported.
- Support for the Rockchip RK3568/RK3566 pin controller.
- Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and
X2000.
- Support for Mediatek MTK8195.
- Add a new Xilinx ZynqMP pin control driver.
Driver improvements and non-urgent fixes:
- Modularization and improvements of the Rockchip drivers.
- Some new pins added to the description of new Renesas SoCs.
- Clarifications of the GPIO base calculation in the Intel driver.
- Fix the function names for the MPP54 and MPP55 pins in the Armada
CP110 pin controller.
- GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
- Support for ACPI probing of the Qualcomm SC8180x.
- Fix interrupt clear status on rockchip
- Fix some missing pins on the Ingenic JZ4770, some semantic
fixes for the behaviour of the Ingenic pin controller.
Add DMIC pins for JZ4780, X1000, X1500 and X1830.
- A slew of janitorial like of_node_put() calls.
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Merge tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"There is a lot going on!
Core changes:
- A semantic change to handle pinmux and pinconf in explicit order
while up until now we depended on the semantic order in the device
tree. The device tree is a functional programming language and does
not imply any order, so the right thing is for the pin control core
to provide these semantics.
- Add a new pinmux-select debugfs file which makes it possible to go
in and select functions for a pin manually (iteratively, at the
prompt) for debugging purposes.
- Fixes to gpio regmap handling for a new pin control driver making
use of regmap-gpio.
- Use octal permissions on debugfs files.
New drivers:
- A massive rewrite of the former custom pin control driver for MIPS
Broadcom devices to instead use the pin control subsystem. New pin
control drivers for BCM6345, BCM6328, BCM6358, BCM6362, BCM6368,
BCM63268 and BCM6318 SoC variants are implemented.
- Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B
in the Qualcomm PMIC GPIO driver. Also the two GPIOs on PM8008 are
supported.
- Support for the Rockchip RK3568/RK3566 pin controller.
- Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and X2000.
- Support for Mediatek MTK8195.
- Add a new Xilinx ZynqMP pin control driver.
Driver improvements and non-urgent fixes:
- Modularization and improvements of the Rockchip drivers.
- Some new pins added to the description of new Renesas SoCs.
- Clarifications of the GPIO base calculation in the Intel driver.
- Fix the function names for the MPP54 and MPP55 pins in the Armada
CP110 pin controller.
- GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
- Support for ACPI probing of the Qualcomm SC8180x.
- Fix interrupt clear status on rockchip
- Fix some missing pins on the Ingenic JZ4770, some semantic fixes
for the behaviour of the Ingenic pin controller. Add DMIC pins for
JZ4780, X1000, X1500 and X1830.
- A slew of janitorial like of_node_put() calls"
* tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: Add Xilinx ZynqMP pinctrl driver support
firmware: xilinx: Add pinctrl support
pinctrl: rockchip: do coding style for mux route struct
pinctrl: Add PIN_CONFIG_MODE_PWM to enum pin_config_param
pinctrl: Introduce MODE group in enum pin_config_param
pinctrl: Keep enum pin_config_param ordered by name
dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver
pinctrl: core: Fix kernel doc string for pin_get_name()
pinctrl: mediatek: use spin lock in mtk_rmw
pinctrl: add drive for I2C related pins on MT8195
pinctrl: add pinctrl driver on mt8195
dt-bindings: pinctrl: mt8195: add pinctrl file and binding document
pinctrl: Ingenic: Add pinctrl driver for X2000.
pinctrl: Ingenic: Add pinctrl driver for JZ4775.
pinctrl: Ingenic: Add pinctrl driver for JZ4755.
pinctrl: Ingenic: Add pinctrl driver for JZ4750.
pinctrl: Ingenic: Add pinctrl driver for JZ4730.
dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
pinctrl: Ingenic: Reformat the code.
pinctrl: Ingenic: Add DMIC pins support for Ingenic SoCs.
...
|
||
|
Linus Torvalds
|
0c85556318 |
ARM: platform support for Apple M1
The Apple M1 is the processor used it all current generation Apple
Macintosh computers. Support for this platform so far is rudimentary,
but it boots and can use framebuffer and serial console over a special
USB cable.
Support for several essential on-chip devices (USB, PCIe, IOMMU, NVMe)
is work in progress but was not ready in time.
A very detailed description of what works is in the merge commit
and on the AsahiLinux wiki.
Link: https://lore.kernel.org/linux-arm-kernel/bdb18e9f-fcd7-1e31-2224-19c0e5090706@marcan.st/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-apple-m1-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM Apple M1 platform support from Arnd Bergmann:
"The Apple M1 is the processor used it all current generation Apple
Macintosh computers. Support for this platform so far is rudimentary,
but it boots and can use framebuffer and serial console over a special
USB cable.
Support for several essential on-chip devices (USB, PCIe, IOMMU, NVMe)
is work in progress but was not ready in time.
A very detailed description of what works is in the commit message of
commit
|
||
Hector Martin
|
aea5f69f2e |
arm64: Kconfig: Introduce CONFIG_ARCH_APPLE
This adds a Kconfig option to toggle support for Apple ARM SoCs. At this time this targets the M1 and later "Apple Silicon" Mac SoCs. Signed-off-by: Hector Martin <marcan@marcan.st> |
||
Krzysztof Kozlowski
|
4a9a1a5602 |
arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA
Agilex, N5X and Stratix 10 share all quite similar arm64 hard cores and SoC-part. Up to a point that N5X uses the same DTSI as Agilex. From the Linux kernel point of view these are flavors of the same architecture so there is no need for three top-level arm64 architectures. Simplify this by merging all three architectures into ARCH_INTEL_SOCFPGA and dropping the other ARCH* arm64 Kconfig entries. The side effect is that the INTEL_STRATIX10_SERVICE will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 64-bit. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
||
|
Krzysztof Kozlowski
|
910499e133 |
ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
||
Jianqun Xu
|
25fda51ca3 |
arm64: remove select PINCTRL_ROCKCHIP from ARCH_ROCKCHIP
Prepare to make pinctrl driver of rockchip to be module able, this patch remove the select of PINCTRL_ROCKCHIP from ARCH_ROCKCHIP. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Link: https://lore.kernel.org/r/20210305003907.1692515-2-jay.xu@rock-chips.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
Linus Torvalds
|
b5183bc94b |
Updates for the irq subsystem:
- The usual new irq chip driver (Realtek RTL83xx) - Removal of sirfsoc and tango irq chip drivers - Conversion of the sun6i chip support to hierarchical irq domains - The usual fixes, improvements and cleanups all over the place -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmAqjRITHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYob0ND/9ghLC0XF7gSrIFBxNXczQcckd0Ev8y gt7EJMxy9+UG/krEmLk4p5FkkKaUQy4v8PMqhDpI0pR7Fdm2oaOCgPRHsNdVYr5J g7FawE99qPiRXaR29rpfX6qIBRP3rJ4/MS90YlcXGvKbgPtqCXStEWrIyu1/1Q8A 3BdfKL3K15/TeWeu9075yHX8V4Ovss6Birc0/XNtQWiHNk84GAZVIQPjfdHEu83j Kv4QxlrfSDjCvB016YKL04kjrwzUXxksvGnyjFXNXFZwg0bVtLTujSdkXajUBQjv 1ZpcEM+gBPdeOU99ELYeaQ9B0Di2mNjya5TBttmKdKW/nQ01BkWUouoqyBRqjpvd +2uXaad/D7iKUYXqXtSim8OpwBLb5THQdG4qn1vgYZOUxWu9DKdtZEO3hw8edgjN zJEQFI8yBeDtcAjKTqm0C2fomlWPhDM0A97EHmV8LiQpz0PyY9q8Oogg51t1RggH 7w9+YjjrGkaPifZXX+YogJT/CbFanK6lOUIFg/qro1QcicCsEbWrTaHUOwdpWpHr B4FKZIfrlnrY7yMC7aClPQSJr3iUXBUjfWhRKvYiwOLTabfUWz+HRFA++R8vytbL RvEZnhuvi3eyRn91yiapQM/f69yC1yslTZHy4/Ww9kvtOoawQpmegnZ3dLMhwBN1 aFgQi4U9Z7G2eA== =rM8s -----END PGP SIGNATURE----- Merge tag 'irq-core-2021-02-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "Updates for the irq subsystem: - The usual new irq chip driver (Realtek RTL83xx) - Removal of sirfsoc and tango irq chip drivers - Conversion of the sun6i chip support to hierarchical irq domains - The usual fixes, improvements and cleanups all over the place" * tag 'irq-core-2021-02-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/imx: IMX_INTMUX should not default to y, unconditionally irqchip/loongson-pch-msi: Use bitmap_zalloc() to allocate bitmap irqchip/csky-mpintc: Prevent selection on unsupported platforms irqchip: Add support for Realtek RTL838x/RTL839x interrupt controller dt-bindings: interrupt-controller: Add Realtek RTL838x/RTL839x support irqchip/ls-extirq: add IRQCHIP_SKIP_SET_WAKE to the irqchip flags genirq: Use new tasklet API for resend_tasklet dt-bindings: qcom,pdc: Add compatible for SM8350 dt-bindings: qcom,pdc: Add compatible for SM8250 irqchip/sun6i-r: Add wakeup support irqchip/sun6i-r: Use a stacked irqchip driver dt-bindings: irq: sun6i-r: Add a compatible for the H3 dt-bindings: irq: sun6i-r: Split the binding from sun7i-nmi irqchip/gic-v3: Fix typos in PMR/RPR SCR_EL3.FIQ handling explanation irqchip: Remove sirfsoc driver irqchip: Remove sigma tango driver |
||
|
Linus Torvalds
|
82851fce61 |
ARM: SoC devicetree updates for v5.12
After the last release contained a surprising amount of new 32-bit
machines, this time two thirds of the code changes are for 64-bit.
The usual updates to existing files include:
- Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA,
nomadik, stm32, Allwinner, TI Keystone
- Support for additional devices on existing machines on Renesas, SoCFPGA,
at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom, ux500,
Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic, Qualcomm,
i.MX, Layerscape, Actions, ASpeed, Toshiba
- Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung,
stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm,
i.MX, Rockchip, ASpeed, Zynq
Only three new SoCs this time, but a number of boards across:
Renesas:
- Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based)
Intel SoCFPGA:
- eASIC N5X board (N5X)
ST-Ericsson Ux500:
- Samsung GT-I9070 (Janice) phone (u8500)
TI OMAP:
- MYIR Tech Limited development board (AM335X)
Allwinner/sunxi:
- SL631 Action Camera (V3)
- PineTab Early Adopter tablet (A64)
Broadcom:
- BCM4906/BCM4908 networking chip
- Netgear R8000P router (BCM5906)
AMLogic:
- Hardkernel ODROID-HC4 development board (SM1)
- Beelink GS-King-X TV Box (S922X)
Qualcomm:
- Snapdragon 888 / SM8350 high-end phone SoC
- Qualcomm SDX55 5G modem as standalone SoC
- Snapdragon MTP reference board (SM8350)
- Snapdragon MTP reference board (SDX55)
- Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094)
- Alcatel Idol 3 phone (MSM8916)
- ASUS Zenfone 2 Laser phone (MSM8916)
- BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916)
- OnePlus6 phone (SDM845)
- OnePlus6T phone (SDM845)
- Alfa Network AP120C-AC access point (IPQ4018)
NXP i.MX6 (32-bit):
- Plymovent BAS base system controller for filter systems (imx6dl)
- Protonic MVT industrial touchscreen terminals (imx6dl)
- Protonic PRTI6G reference board (imx6ul)
- Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp)
NXP i.MX8 (64-bit)
- Beacon i.MX8M Nano development kit (imx8mn)
- Boundary Devices i.MX8MM Nitrogen SBC (imx8mm)
- Gateworks Venice i.MX 8M Mini Development Kits (imx8mm)
- phyBOARD-Pollux-i.MX8MP (imx8mp)
- Purism Librem5 Evergreen phone (imx8mp)
- Kontron SMARC-sAL28 system-on-module(imx8mp)
Rockchip:
- NanoPi M4B Single-board computer (RK3399)
- Radxa Rock Pi E router SBC (RK3328)
ASpeed:
- Ampere Mt. Jade, a BMC for an x86 server (AST2500)
- IBM Everest, a BMC for a Power10 server (AST2600)
- Supermicro x11spi, a BMC for an ARM server (AST2500)
Zynq:
- Ebang EBAZ4205, FPGA board (Zynq-7000)
- ZynqMP zcu104 revC reference platform (ZynqMP)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
"After the last release contained a surprising amount of new 32-bit
machines, this time two thirds of the code changes are for 64-bit.
The usual updates to existing files include:
- Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA,
nomadik, stm32, Allwinner, TI Keystone
- Support for additional devices on existing machines on Renesas,
SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom,
ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic,
Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba
- Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung,
stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm,
i.MX, Rockchip, ASpeed, Zynq
Only three new SoCs this time, but a number of boards across:
Renesas:
- Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based)
Intel SoCFPGA:
- eASIC N5X board (N5X)
ST-Ericsson Ux500:
- Samsung GT-I9070 (Janice) phone (u8500)
TI OMAP:
- MYIR Tech Limited development board (AM335X)
Allwinner/sunxi:
- SL631 Action Camera (V3)
- PineTab Early Adopter tablet (A64)
Broadcom:
- BCM4906 networking chip
- Netgear R8000P router (BCM4906)
AMLogic:
- Hardkernel ODROID-HC4 development board (SM1)
- Beelink GS-King-X TV Box (S922X)
Qualcomm:
- Snapdragon 888 / SM8350 high-end phone SoC
- Qualcomm SDX55 5G modem as standalone SoC
- Snapdragon MTP reference board (SM8350)
- Snapdragon MTP reference board (SDX55)
- Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094)
- Alcatel Idol 3 phone (MSM8916)
- ASUS Zenfone 2 Laser phone (MSM8916)
- BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916)
- OnePlus6 phone (SDM845)
- OnePlus6T phone (SDM845)
- Alfa Network AP120C-AC access point (IPQ4018)
NXP i.MX6 (32-bit):
- Plymovent BAS base system controller for filter systems (imx6dl)
- Protonic MVT industrial touchscreen terminals (imx6dl)
- Protonic PRTI6G reference board (imx6ul)
- Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp)
NXP i.MX8 (64-bit)
- Beacon i.MX8M Nano development kit (imx8mn)
- Boundary Devices i.MX8MM Nitrogen SBC (imx8mm)
- Gateworks Venice i.MX 8M Mini Development Kits (imx8mm)
- phyBOARD-Pollux-i.MX8MP (imx8mp)
- Purism Librem5 Evergreen phone (imx8mp)
- Kontron SMARC-sAL28 system-on-module(imx8mp)
Rockchip:
- NanoPi M4B Single-board computer (RK3399)
- Radxa Rock Pi E router SBC (RK3328)
ASpeed:
- Ampere Mt. Jade, a BMC for an x86 server (AST2500)
- IBM Everest, a BMC for a Power10 server (AST2600)
- Supermicro x11spi, a BMC for an ARM server (AST2500)
Zynq:
- Ebang EBAZ4205, FPGA board (Zynq-7000)
- ZynqMP zcu104 revC reference platform (ZynqMP)"
* tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (584 commits)
ARM: dts: aspeed: align GPIO hog names with dtschema
ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell
dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml
arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci
ARM: dts: aspeed: mowgli: Add i2c rtc device
ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
dt-bindings: arm: xilinx: Add missing Zturn boards
ARM: dts: ebaz4205: add pinctrl entries for switches
ARM: dts: add Ebang EBAZ4205 device tree
dt-bindings: arm: add Ebang EBAZ4205 board
dt-bindings: add ebang vendor prefix
ARM: dts: aspeed: Add Everest BMC machine
ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver
ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names
ARM: dts: aspeed: Add Supermicro x11spi BMC machine
ARM: dts: aspeed: g220a: Fix some gpio
ARM: dts: aspeed: g220a: Enable ipmb
ARM: dts: aspeed: rainier: Add eMMC clock phase compensation
ARM: dts: aspeed: Add LCLK to lpc-snoop
...
|
||
|
Linus Torvalds
|
5011bb9fbb |
ARM: SoC changes for v5.12
This is mostly 32-bit code for SoC platforms, and looks smaller
than any such branch I remember from previous kernels, as most
of this is now handled in other subsystems for modern platforms:
- Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
Renesas, and Samsung
- Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
- Samsung SoC driver updates to make them loadable modules
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"This is mostly 32-bit code for SoC platforms, and looks smaller than
any such branch I remember from previous kernels, as most of this is
now handled in other subsystems for modern platforms:
- Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
Renesas, and Samsung
- Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
- Samsung SoC driver updates to make them loadable modules"
* tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: arm: samsung: include S3C headers in platform entry
MAINTAINERS: Add linux-actions ML for Actions Semi Arch
ARM: s3c: irq-s3c24xx: staticize local functions
ARM: s3c: irq-s3c24xx: include headers for missing declarations
ARM: s3c: fix fiq for clang IAS
ARM: imx: Remove unused IMX_GPIO_NR() macro
soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
ARM: OMAP2+: fix spellint typo
MAINTAINERS: Update address for OMAP GPMC driver
soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()
ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
ARM: brcmstb: Add debug UART entry for 72116
ARM: tegra: Don't enable unused PLLs on resume from suspend
soc: samsung: pm_domains: Convert to regular platform driver
soc: samsung: exynos-chipid: correct helpers __init annotation
ARM: mach-imx: imx6ul: Print SOC revision on boot
ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup
soc: samsung: exynos-chipid: convert to driver and merge exynos-asv
soc: samsung: exynos-asv: handle reading revision register error
soc: samsung: exynos-asv: don't defer early on not-supported SoCs
|
||
Maxime Ripard
|
5674e314e6 |
ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
The BCM2711 has a number of instances of interrupt controllers handled by the driver behind the BRCMSTB_L2_IRQ Kconfig option (irq-brcmstb-l2). Let's select that driver as part of the ARCH_BCM2835 Kconfig option. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20210111142309.193441-1-maxime@cerno.tech |
||
|
Samuel Holland
|
4e34614636 |
irqchip/sun6i-r: Use a stacked irqchip driver
The R_INTC in the A31 and newer sun8i/sun50i SoCs is more similar to the
original sun4i interrupt controller than the sun7i/sun9i NMI controller.
It is used for two distinct purposes:
- To control the trigger, latch, and mask for the NMI input pin
- To provide the interrupt input for the ARISC coprocessor
As this interrupt controller is not documented, information about it
comes from vendor-provided firmware blobs and from experimentation.
Differences from the sun4i interrupt controller appear to be:
- It only has one or two registers of each kind (max 32 or 64 IRQs)
- Multiplexing logic is added to support additional inputs
- There is no FIQ-related logic
- There is no interrupt priority logic
In order to fulfill its two purposes, this hardware block combines four
types of IRQs. First, the NMI pin is routed to the "IRQ 0" input on this
chip, with a trigger type controlled by the NMI_CTRL_REG. The "IRQ 0
pending" output from this chip, if enabled, is then routed to a SPI IRQ
input on the GIC. In other words, bit 0 of IRQ_ENABLE_REG *does* affect
the NMI IRQ seen at the GIC.
The NMI is followed by a contiguous block of 15 "direct" (my name for
them) IRQ inputs that are connected in parallel to both R_INTC and the
GIC. Or in other words, these bits of IRQ_ENABLE_REG *do not* affect the
IRQs seen at the GIC.
Following the direct IRQs are the ARISC's copy of banked IRQs for shared
peripherals. These are not relevant to Linux. The remaining IRQs are
connected to a multiplexer and provide access to the first (up to) 128
SPIs from the ARISC. This range of SPIs overlaps with the direct IRQs.
Because of the 1:1 correspondence between R_INTC and GIC inputs, this is
a perfect scenario for using a stacked irqchip driver. We want to hook
into setting the NMI trigger type, but not actually handle any IRQ here.
To allow access to all multiplexed IRQs, this driver requires a new
binding where the interrupt number matches the GIC interrupt number.
(This moves the NMI from number 0 to 32 or 96, depending on the SoC.)
For simplicity, copy the three-cell GIC binding; this disambiguates
interrupt 0 in the old binding (the NMI) from interrupt 0 in the new
binding (SPI 0) by the number of cells.
Since R_INTC is in the always-on power domain, and its output is visible
to the power management coprocessor, a stacked irqchip driver provides a
simple way to add wakeup support to any of its IRQs. That is the next
patch; for now, just the NMI is moved over.
This commit mostly reverts commit
|
||
|
Arnd Bergmann
|
89d4f98ae9 |
ARM: remove zte zx platform
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with Baoyou Xie and Shawn Guo subsequently becoming maintainers after the addition of the 64-bit variant. However, the only machines that were ever supported upstream are the reference designs, not actual set-top-box devices that would benefit from this support. All ZTE set-top-boxes from the past few years seem to be based on third-party SoCs. While there is very little information about zx296702 and zx296718 on the web, I found some references to other chips from the same family, such as zx296716 and zx296719, which were never submitted for upstream support. Finally, there is no support for the GPU on either of them, with the lima and panfrost device drivers having been added after work on the zx platform had stopped. Shawn confirmed that he has not seen any interest in this platform for the past four years, and that it can be removed. Thanks to Jun and Shawn for maintaining this platform over the past five years. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Dinh Nguyen
|
a427485a00 |
arm64: dts: n5x: Add support for Intel's eASIC N5X platform
The Intel eASIC N5X platform shares the same register map as the Agilex platform, thus, we can re-use the socfpga_agilex.dtsi as the base DTSI. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
||
|
Linus Torvalds
|
9805529ec5 |
ARM: device tree updates for 5.11
Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already support.
This is also known as the SigmaStar SSD202D, and we add support for
the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the Ampere
Altra based "Fii Kudo" server and the Quanta GSJ, both of which are
added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's
generation, also added along with its reference board. This one is
still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into low-end
tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM,
and one machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board
for the aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape
LX2162A, which is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based board,
- IEI Puzzle-M801, a rackmount network appliance based on
Marvell Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm
sm8250 and sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook
(sc7180)
- New board variants of the Renesas based "Kingfisher" and
"HiHope" reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with
a few carrier boards.
There is one conflict in mt6577_auxadc.txt, which got replaced in
another tree and modified here, the modification is already part of
the new file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM device tree updates from Arnd Bergmann:
"Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already
support. This is also known as the SigmaStar SSD202D, and we add
support for the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the
Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
which are added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last
year's generation, also added along with its reference board. This
one is still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into
low-end tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM, and one
machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based
board,
- IEI Puzzle-M801, a rackmount network appliance based on Marvell
Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook (sc7180)
- New board variants of the Renesas based "Kingfisher" and "HiHope"
reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
carrier boards"
* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
arm64: dts: sparx5: Add SGPIO devices
arm64: dts: sparx5: Add reset support
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
ARM: mstar: SMP support
ARM: mstar: Wire up smpctrl for SSD201/SSD202D
ARM: mstar: Add smp ctrl registers to infinity2m dtsi
ARM: mstar: Add dts for Honestar ssd201htv2
ARM: mstar: Add chip level dtsi for SSD202D
ARM: mstar: Add common dtsi for SSD201/SSD202D
ARM: mstar: Add infinity2m support
dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
dt-bindings: vendor-prefixes: Add honestar vendor prefix
dt-bindings: mstar: Add binding details for mstar,smpctrl
ARM: mstar: Fill in GPIO controller properties for infinity
ARM: mstar: Add gpio controller to MStar base dtsi
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Rename bus to be align with simple-bus yaml
...
|
||
|
Linus Torvalds
|
b06db0b393 |
ARM: SoC updates for 5.11
These are update for SoC specific code, mostly in the
32-bit architecture:
- A rework for handling MMIO accesses in Renesas SoCs
in a more portable way
- Updates to SoC version detection in NXP i.MX SoCs.
- Smaller bug fixes for OMAP, Samsung, Marvell, Amlogic,
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"These are updates for SoC specific code, mostly in the 32-bit
architecture:
- A rework for handling MMIO accesses in Renesas SoCs in a more
portable way
- Updates to SoC version detection in NXP i.MX SoCs.
- Smaller bug fixes for OMAP, Samsung, Marvell, Amlogic"
* tag 'arm-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits)
arm64: Kconfig: meson: drop pinctrl
ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs
MAINTAINERS: switch mvebu tree to kernel.org
MAINTAINERS: Add an entry for MikroTik CRS3xx 98DX3236 boards
ARM: shmobile: Stop using __raw_*() I/O accessors
ARM: shmobile: sh73a0: Remove obsolete static mapping
ARM: shmobile: sh73a0: Use ioremap() to map SMP registers
ARM: shmobile: sh73a0: Use ioremap() to map L2C registers
ARM: shmobile: r8a7779: Remove obsolete static mappings
ARM: shmobile: r8a7779: Use ioremap() to map SMP registers
ARM: shmobile: r8a7779: Use ioremap() to map INTC2 registers
ARM: shmobile: r8a7778: Introduce HPBREG_BASE
ARM: OMAP1: clock: Use IS_ERR_OR_NULL() to clean code
ARM: OMAP2+: Remove redundant null check before clk_prepare_enable/clk_disable_unprepare
ARM: OMAP2+: Remove redundant assignment to variable ret
ARM: OMAP2+: Fix kfree NULL pointer in omap2xxx_clkt_vps_init
ARM: OMAP2+: Fix memleak in omap2xxx_clkt_vps_init
ARM: exynos: extend cpuidle support to P4 Note boards
ARM: imx: mach-imx6q: correctly identify i.MX6QP SoCs
ARM: imx: imx7ulp: Add a comment explaining the B2 silicon version
...
|
||
|
Linus Torvalds
|
7a932e5702 |
asm-generic: cross-architecture timer cleanup
This cleans up two ancient timer features that were never completed in the past, CONFIG_GENERIC_CLOCKEVENTS and CONFIG_ARCH_USES_GETTIMEOFFSET. There was only one user left for the ARCH_USES_GETTIMEOFFSET variant of clocksource implementations, the ARM EBSA110 platform. Rather than changing to use modern timekeeping, we remove the platform entirely as Russell no longer uses his machine and nobody else seems to have one any more. The conditional code for using arch_gettimeoffset() is removed as a result. For CONFIG_GENERIC_CLOCKEVENTS, there are still a couple of platforms not using clockevent drivers: parisc, ia64, most of m68k, and one Arm platform. These all do timer ticks slighly differently, and this gets cleaned up to the point they at least all call the same helper function. Instead of most platforms using 'select GENERIC_CLOCKEVENTS' in Kconfig, the polarity is now reversed, with the few remaining ones selecting LEGACY_TIMER_TICK instead. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/Y1v8ACgkQmmx57+YA GNmCvQ/9EDlgCt92r8SB+LGafDtgB8TUQZeIrs9S2mByzdxwnw0lxObIXFCnhQgh RpG3dR+ONRDnC5eI149B377JOEFMZWe2+BtYHUHkFARtUEWatslQcz7yAGvVRK/l TS/qReb6piKltlzuanF1bMZbjy2OhlaDRcm+OlC3y5mALR33M4emb+rJ6cSdfk3K v1iZhrxtfQT77ztesh/oPkPiyQ6kNcz7SfpyYOb6f5VLlml2BZ7YwBSVyGY7urHk RL3XqOUP4KKlMEAI8w0E2nvft6Fk+luziBhrMYWK0GvbmI1OESENuX/c6tgT2OQ1 DRaVHvcPG/EAY8adOKxxVyHhEJDSoz5GJV/EtjlOegsJk6RomczR1uuiT3Kvm7Ah PktMKv4xQht1E15KPSKbOvNIEP18w2s5z6gw+jVDv8pw42pVEQManm1D+BICqrhl fcpw6T1drf9UxAjwX4+zXtmNs+a+mqiFG8puU4VVgT4GpQ8umHvunXz2WUjZO0jc 3m8ErJHBvtJwW5TOHGyXnjl9SkwPzHOfF6IcXTYWEDU4/gQIK9TwUvCjLc0lE27t FMCV2ds7/K1CXwRgpa5IrefSkb8yOXSbRZ56NqqF7Ekxw4J5bYRSaY7jb+qD/e+3 5O1y+iPxFrpH+16hSahvzrtcdFNbLQvBBuRtEQOYuHLt2UJrNoU= =QpNs -----END PGP SIGNATURE----- Merge tag 'asm-generic-timers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic cross-architecture timer cleanup from Arnd Bergmann: "This cleans up two ancient timer features that were never completed in the past, CONFIG_GENERIC_CLOCKEVENTS and CONFIG_ARCH_USES_GETTIMEOFFSET. There was only one user left for the ARCH_USES_GETTIMEOFFSET variant of clocksource implementations, the ARM EBSA110 platform. Rather than changing to use modern timekeeping, we remove the platform entirely as Russell no longer uses his machine and nobody else seems to have one any more. The conditional code for using arch_gettimeoffset() is removed as a result. For CONFIG_GENERIC_CLOCKEVENTS, there are still a couple of platforms not using clockevent drivers: parisc, ia64, most of m68k, and one Arm platform. These all do timer ticks slighly differently, and this gets cleaned up to the point they at least all call the same helper function. Instead of most platforms using 'select GENERIC_CLOCKEVENTS' in Kconfig, the polarity is now reversed, with the few remaining ones selecting LEGACY_TIMER_TICK instead" * tag 'asm-generic-timers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: timekeeping: default GENERIC_CLOCKEVENTS to enabled timekeeping: remove xtime_update m68k: remove timer_interrupt() function m68k: change remaining timers to legacy_timer_tick m68k: m68328: use legacy_timer_tick() m68k: sun3/sun3c: use legacy_timer_tick m68k: split heartbeat out of timer function m68k: coldfire: use legacy_timer_tick() parisc: use legacy_timer_tick ARM: rpc: use legacy_timer_tick ia64: convert to legacy_timer_tick timekeeping: add CONFIG_LEGACY_TIMER_TICK timekeeping: remove arch_gettimeoffset net: remove am79c961a driver ARM: remove ebsa110 platform |
||
Kevin Hilman
|
dcb11100cd |
arm64: Kconfig: meson: drop pinctrl
Don't automatically select pinctrl drivers, leave it up to defaults in
drivers/pinctrl/meson, which default to built-in, but are also now
optionally configurable as modules as of
commit
|
||
|
Arnd Bergmann
|
b760bfbcbf |
arm64: Kconfig.platform: amlogic updates for v5.11
- ship only the necessary clock controllers -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl/GwtUACgkQWTcYmtP7 xmV0Iw//f53+9bGT9suyUIaE7vTkUD3N7BpOZ2hhc+wjoDcWz3cg+R4R6LF7pdZ6 AEbJYQUTepBZvtgS35TEMOL+w+kpL++IG2Jj3bgTUCrWfUNEK52ZnaJobMehdhdL dRny5BYLDWwj+G1VIIQu3lCyxr7qonA4AEsVr+5jFhpJdxvkLyYkRGEDWG1lybUa p0xRE21OfH4BKx4nrXZU64MFUv501iHLtUdhtkddeFaG7UvcwaNdQz3llh7SvxX6 gC2pR6aaU7bjsCZOBk/Gig12PxlSMzt8/PkAAAOiyzFsWoC4qzXShUeJkIPTUZ8i pecuV8dY1XDj35EMROiIHoNMfEDYmwjr+yww3PP8NAyhMBrff/GX4cPeV5pPRWsK UiL3WBqFMQNhAm+guDXW4aUlHEw0EzhhkA4ZhEnRTGkwrPWeqyP6lvi2vk14itpG NXLHosoJaiZLb/i8/6UJYj4vhPaRMo44Sja+8NtzUm1R/nVza69pNvCmH+bNg4ct 1v7NKUoExaGT69bWrxcW1T6ZQNDhXNude1+ZUpsTRjcFH410ouy3pF0oPr57K2M5 S7HsHiRlkomewWEsfq/O7qzAY1lk5jTNan1SA1MgYpPaQ+sIYJpQTvdSxtJ8m63A XR7bhxxYuq+J+6gJecxyP5EBp2sMrj/uqJ2TIPrDshwG2/Y5X1o= =vf5y -----END PGP SIGNATURE----- Merge tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/soc arm64: Kconfig.platform: amlogic updates for v5.11 - ship only the necessary clock controllers * tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: meson: ship only the necessary clock controllers Link: https://lore.kernel.org/r/7hlfehjgv8.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
1c202d0c5a |
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.11, please pull the following: - Rafal adds initial support for the Broadcom 4908 which are SoCs used in home routers and are based on the DSL architecture and using Broadcom Brahma-B53 CPUs. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl/Ce8YACgkQh9CWnEQH BwQnhw/9GQHgXy+ZSI5a8mak8eUzK/dwrtdMvtCuERLK6sMvTBJSmuejYoWwzF27 e+t0rm40Ly2JhxfBdrx6Y/uWxAvXUgFE5Wd//ukY8+G9rHDDvY2KtYxb9V0wjM7L 4ye0ghYtK1snZRWa5DBNyn4b8UPOCETGqysOQ3hUlSzIL4zzY2OjAXarKAfv4lHJ Qj5zRYj0I+KMHBNLa0nryz2fLy3HGVevAMapJ6Sm/sL4feLTX7FkhT9GLpTQXGk6 9ou3g5ywOZ2P8ic1wldxuPCMGsTYu53MVpRmnuDec68PzGYTfYrd3zyDcTQEh8am UtGV/Wo7HwTdGR1KDUEgIbEbf5bSm+vaohEwc/XLziQMf9cCJ+cIushaWb2r/IY4 EDWD9nYN9z+kJe+05wtWZ4JeXQjL0lajVSpTTSn4oAVcoEl7ixLepqY2uDRl7jFl iJhyzvuJOinxJ8Ggs6S0eYgAVrIEZNUrsT6J9MrumXrcAJQPoBMppEPdWeIPkWMn hlfWDn7MyWil1+PeCnB9VCgtTq1XlAHzcXXHzdZqJhdHQwi200NmJioEC/M2dJ2Q EG/jAmytRJ5N9KFwqTnuVwn581FUdgxDxmTyXw2pr6hafqOou4APqDwmJw8QcBcf QLsIJ+3iPyPT52P4zymTKEN22YD768JrRWa1pItAGObzGitlUBE= =oz5b -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.11/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.11, please pull the following: - Rafal adds initial support for the Broadcom 4908 which are SoCs used in home routers and are based on the DSL architecture and using Broadcom Brahma-B53 CPUs. * tag 'arm-soc/for-5.11/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: add config for Broadcom BCM4908 SoCs arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files dt-bindings: arm: bcm: document BCM4908 bindings Link: https://lore.kernel.org/r/20201128163410.1691529-4-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Rafał Miłecki
|
dccb22d078 |
arm64: add config for Broadcom BCM4908 SoCs
Add ARCH_BCM4908 config that can be used for compiling DTS files. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
||
|
Jerome Brunet
|
ba66a25536 |
arm64: meson: ship only the necessary clock controllers
There now the menu entries for the amlogic clock controllers. Do not select these when ARM64 is enabled so it possible to ship only the required. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201020075034.172825-1-jbrunet@baylibre.com |
||
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Arnd Bergmann
|
0774a6ed29 |
timekeeping: default GENERIC_CLOCKEVENTS to enabled
Almost all machines use GENERIC_CLOCKEVENTS, so it feels wrong to require each one to select that symbol manually. Instead, enable it whenever CONFIG_LEGACY_TIMER_TICK is disabled as a simplification. It should be possible to select both GENERIC_CLOCKEVENTS and LEGACY_TIMER_TICK from an architecture now and decide at runtime between the two. For the clockevents arch-support.txt file, this means that additional architectures are marked as TODO when they have at least one machine that still uses LEGACY_TIMER_TICK, rather than being marked 'ok' when at least one machine has been converted. This means that both m68k and arm (for riscpc) revert to TODO. At this point, we could just always enable CONFIG_GENERIC_CLOCKEVENTS rather than leaving it off when not needed. I built an m68k defconfig kernel (using gcc-10.1.0) and found that this would add around 5.5KB in kernel image size: text data bss dec hex filename 3861936 1092236 196656 5150828 4e986c obj-m68k/vmlinux-no-clockevent 3866201 1093832 196184 5156217 4ead79 obj-m68k/vmlinux-clockevent On Arm (MACH_RPC), that difference appears to be twice as large, around 11KB on top of an 6MB vmlinux. Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |